r8a73a4.dtsi 2.2 KB

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  1. /*
  2. * Device Tree Source for the r8a73a4 SoC
  3. *
  4. * Copyright (C) 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Magnus Damm
  6. *
  7. * This file is licensed under the terms of the GNU General Public License
  8. * version 2. This program is licensed "as is" without any warranty of any
  9. * kind, whether express or implied.
  10. */
  11. / {
  12. compatible = "renesas,r8a73a4";
  13. interrupt-parent = <&gic>;
  14. #address-cells = <2>;
  15. #size-cells = <2>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. cpu0: cpu@0 {
  20. device_type = "cpu";
  21. compatible = "arm,cortex-a15";
  22. reg = <0>;
  23. clock-frequency = <1500000000>;
  24. };
  25. };
  26. gic: interrupt-controller@f1001000 {
  27. compatible = "arm,cortex-a15-gic";
  28. #interrupt-cells = <3>;
  29. #address-cells = <0>;
  30. interrupt-controller;
  31. reg = <0 0xf1001000 0 0x1000>,
  32. <0 0xf1002000 0 0x1000>,
  33. <0 0xf1004000 0 0x2000>,
  34. <0 0xf1006000 0 0x2000>;
  35. interrupts = <1 9 0xf04>;
  36. };
  37. timer {
  38. compatible = "arm,armv7-timer";
  39. interrupts = <1 13 0xf08>,
  40. <1 14 0xf08>,
  41. <1 11 0xf08>,
  42. <1 10 0xf08>;
  43. };
  44. irqc0: interrupt-controller@e61c0000 {
  45. compatible = "renesas,irqc";
  46. #interrupt-cells = <2>;
  47. interrupt-controller;
  48. reg = <0 0xe61c0000 0 0x200>;
  49. interrupt-parent = <&gic>;
  50. interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>,
  51. <0 4 4>, <0 5 4>, <0 6 4>, <0 7 4>,
  52. <0 8 4>, <0 9 4>, <0 10 4>, <0 11 4>,
  53. <0 12 4>, <0 13 4>, <0 14 4>, <0 15 4>,
  54. <0 16 4>, <0 17 4>, <0 18 4>, <0 19 4>,
  55. <0 20 4>, <0 21 4>, <0 22 4>, <0 23 4>,
  56. <0 24 4>, <0 25 4>, <0 26 4>, <0 27 4>,
  57. <0 28 4>, <0 29 4>, <0 30 4>, <0 31 4>;
  58. };
  59. irqc1: interrupt-controller@e61c0200 {
  60. compatible = "renesas,irqc";
  61. #interrupt-cells = <2>;
  62. interrupt-controller;
  63. reg = <0 0xe61c0200 0 0x200>;
  64. interrupt-parent = <&gic>;
  65. interrupts = <0 32 4>, <0 33 4>, <0 34 4>, <0 35 4>,
  66. <0 36 4>, <0 37 4>, <0 38 4>, <0 39 4>,
  67. <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>,
  68. <0 44 4>, <0 45 4>, <0 46 4>, <0 47 4>,
  69. <0 48 4>, <0 49 4>, <0 50 4>, <0 51 4>,
  70. <0 52 4>, <0 53 4>, <0 54 4>, <0 55 4>,
  71. <0 56 4>, <0 57 4>;
  72. };
  73. thermal@e61f0000 {
  74. compatible = "renesas,rcar-thermal";
  75. reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
  76. <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
  77. interrupt-parent = <&gic>;
  78. interrupts = <0 69 4>;
  79. };
  80. };