msm_hsusb.h 3.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112
  1. /* linux/include/asm-arm/arch-msm/hsusb.h
  2. *
  3. * Copyright (C) 2008 Google, Inc.
  4. * Author: Brian Swetland <swetland@google.com>
  5. * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
  6. *
  7. * This software is licensed under the terms of the GNU General Public
  8. * License version 2, as published by the Free Software Foundation, and
  9. * may be copied, distributed, and modified under those terms.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. */
  17. #ifndef __ASM_ARCH_MSM_HSUSB_H
  18. #define __ASM_ARCH_MSM_HSUSB_H
  19. #include <linux/types.h>
  20. #include <linux/usb/otg.h>
  21. /**
  22. * Supported USB modes
  23. *
  24. * USB_PERIPHERAL Only peripheral mode is supported.
  25. * USB_HOST Only host mode is supported.
  26. * USB_OTG OTG mode is supported.
  27. *
  28. */
  29. enum usb_mode_type {
  30. USB_NONE = 0,
  31. USB_PERIPHERAL,
  32. USB_HOST,
  33. USB_OTG,
  34. };
  35. /**
  36. * OTG control
  37. *
  38. * OTG_NO_CONTROL Id/VBUS notifications not required. Useful in host
  39. * only configuration.
  40. * OTG_PHY_CONTROL Id/VBUS notifications comes form USB PHY.
  41. * OTG_PMIC_CONTROL Id/VBUS notifications comes from PMIC hardware.
  42. * OTG_USER_CONTROL Id/VBUS notifcations comes from User via sysfs.
  43. *
  44. */
  45. enum otg_control_type {
  46. OTG_NO_CONTROL = 0,
  47. OTG_PHY_CONTROL,
  48. OTG_PMIC_CONTROL,
  49. OTG_USER_CONTROL,
  50. };
  51. /**
  52. * struct msm_otg_platform_data - platform device data
  53. * for msm_otg driver.
  54. * @phy_init_seq: PHY configuration sequence. val, reg pairs
  55. * terminated by -1.
  56. * @vbus_power: VBUS power on/off routine.
  57. * @power_budget: VBUS power budget in mA (0 will be treated as 500mA).
  58. * @mode: Supported mode (OTG/peripheral/host).
  59. * @otg_control: OTG switch controlled by user/Id pin
  60. * @default_mode: Default operational mode. Applicable only if
  61. * OTG switch is controller by user.
  62. *
  63. */
  64. struct msm_otg_platform_data {
  65. int *phy_init_seq;
  66. void (*vbus_power)(bool on);
  67. unsigned power_budget;
  68. enum usb_mode_type mode;
  69. enum otg_control_type otg_control;
  70. enum usb_mode_type default_mode;
  71. void (*setup_gpio)(enum usb_otg_state state);
  72. };
  73. /**
  74. * struct msm_otg: OTG driver data. Shared by HCD and DCD.
  75. * @otg: USB OTG Transceiver structure.
  76. * @pdata: otg device platform data.
  77. * @irq: IRQ number assigned for HSUSB controller.
  78. * @clk: clock struct of usb_hs_clk.
  79. * @pclk: clock struct of usb_hs_pclk.
  80. * @phy_reset_clk: clock struct of usb_phy_clk.
  81. * @core_clk: clock struct of usb_hs_core_clk.
  82. * @regs: ioremapped register base address.
  83. * @inputs: OTG state machine inputs(Id, SessValid etc).
  84. * @sm_work: OTG state machine work.
  85. * @in_lpm: indicates low power mode (LPM) state.
  86. * @async_int: Async interrupt arrived.
  87. *
  88. */
  89. struct msm_otg {
  90. struct otg_transceiver otg;
  91. struct msm_otg_platform_data *pdata;
  92. int irq;
  93. struct clk *clk;
  94. struct clk *pclk;
  95. struct clk *phy_reset_clk;
  96. struct clk *core_clk;
  97. void __iomem *regs;
  98. #define ID 0
  99. #define B_SESS_VLD 1
  100. unsigned long inputs;
  101. struct work_struct sm_work;
  102. atomic_t in_lpm;
  103. int async_int;
  104. };
  105. #endif