smc91x.c 59 KB

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  1. /*
  2. * smc91x.c
  3. * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
  4. *
  5. * Copyright (C) 1996 by Erik Stahlman
  6. * Copyright (C) 2001 Standard Microsystems Corporation
  7. * Developed by Simple Network Magic Corporation
  8. * Copyright (C) 2003 Monta Vista Software, Inc.
  9. * Unified SMC91x driver by Nicolas Pitre
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. * Arguments:
  26. * io = for the base address
  27. * irq = for the IRQ
  28. * nowait = 0 for normal wait states, 1 eliminates additional wait states
  29. *
  30. * original author:
  31. * Erik Stahlman <erik@vt.edu>
  32. *
  33. * hardware multicast code:
  34. * Peter Cammaert <pc@denkart.be>
  35. *
  36. * contributors:
  37. * Daris A Nevil <dnevil@snmc.com>
  38. * Nicolas Pitre <nico@cam.org>
  39. * Russell King <rmk@arm.linux.org.uk>
  40. *
  41. * History:
  42. * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
  43. * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
  44. * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
  45. * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
  46. * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
  47. * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
  48. * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
  49. * more bus abstraction, big cleanup, etc.
  50. * 29/09/03 Russell King - add driver model support
  51. * - ethtool support
  52. * - convert to use generic MII interface
  53. * - add link up/down notification
  54. * - don't try to handle full negotiation in
  55. * smc_phy_configure
  56. * - clean up (and fix stack overrun) in PHY
  57. * MII read/write functions
  58. * 22/09/04 Nicolas Pitre big update (see commit log for details)
  59. */
  60. static const char version[] =
  61. "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
  62. /* Debugging level */
  63. #ifndef SMC_DEBUG
  64. #define SMC_DEBUG 0
  65. #endif
  66. #include <linux/config.h>
  67. #include <linux/init.h>
  68. #include <linux/module.h>
  69. #include <linux/kernel.h>
  70. #include <linux/sched.h>
  71. #include <linux/slab.h>
  72. #include <linux/delay.h>
  73. #include <linux/interrupt.h>
  74. #include <linux/errno.h>
  75. #include <linux/ioport.h>
  76. #include <linux/crc32.h>
  77. #include <linux/device.h>
  78. #include <linux/spinlock.h>
  79. #include <linux/ethtool.h>
  80. #include <linux/mii.h>
  81. #include <linux/workqueue.h>
  82. #include <linux/netdevice.h>
  83. #include <linux/etherdevice.h>
  84. #include <linux/skbuff.h>
  85. #include <asm/io.h>
  86. #include <asm/irq.h>
  87. #include "smc91x.h"
  88. #ifdef CONFIG_ISA
  89. /*
  90. * the LAN91C111 can be at any of the following port addresses. To change,
  91. * for a slightly different card, you can add it to the array. Keep in
  92. * mind that the array must end in zero.
  93. */
  94. static unsigned int smc_portlist[] __initdata = {
  95. 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
  96. 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
  97. };
  98. #ifndef SMC_IOADDR
  99. # define SMC_IOADDR -1
  100. #endif
  101. static unsigned long io = SMC_IOADDR;
  102. module_param(io, ulong, 0400);
  103. MODULE_PARM_DESC(io, "I/O base address");
  104. #ifndef SMC_IRQ
  105. # define SMC_IRQ -1
  106. #endif
  107. static int irq = SMC_IRQ;
  108. module_param(irq, int, 0400);
  109. MODULE_PARM_DESC(irq, "IRQ number");
  110. #endif /* CONFIG_ISA */
  111. #ifndef SMC_NOWAIT
  112. # define SMC_NOWAIT 0
  113. #endif
  114. static int nowait = SMC_NOWAIT;
  115. module_param(nowait, int, 0400);
  116. MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
  117. /*
  118. * Transmit timeout, default 5 seconds.
  119. */
  120. static int watchdog = 1000;
  121. module_param(watchdog, int, 0400);
  122. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  123. MODULE_LICENSE("GPL");
  124. /*
  125. * The internal workings of the driver. If you are changing anything
  126. * here with the SMC stuff, you should have the datasheet and know
  127. * what you are doing.
  128. */
  129. #define CARDNAME "smc91x"
  130. /*
  131. * Use power-down feature of the chip
  132. */
  133. #define POWER_DOWN 1
  134. /*
  135. * Wait time for memory to be free. This probably shouldn't be
  136. * tuned that much, as waiting for this means nothing else happens
  137. * in the system
  138. */
  139. #define MEMORY_WAIT_TIME 16
  140. /*
  141. * This selects whether TX packets are sent one by one to the SMC91x internal
  142. * memory and throttled until transmission completes. This may prevent
  143. * RX overruns a litle by keeping much of the memory free for RX packets
  144. * but to the expense of reduced TX throughput and increased IRQ overhead.
  145. * Note this is not a cure for a too slow data bus or too high IRQ latency.
  146. */
  147. #define THROTTLE_TX_PKTS 0
  148. /*
  149. * The MII clock high/low times. 2x this number gives the MII clock period
  150. * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
  151. */
  152. #define MII_DELAY 1
  153. /* store this information for the driver.. */
  154. struct smc_local {
  155. /*
  156. * If I have to wait until memory is available to send a
  157. * packet, I will store the skbuff here, until I get the
  158. * desired memory. Then, I'll send it out and free it.
  159. */
  160. struct sk_buff *pending_tx_skb;
  161. struct tasklet_struct tx_task;
  162. /*
  163. * these are things that the kernel wants me to keep, so users
  164. * can find out semi-useless statistics of how well the card is
  165. * performing
  166. */
  167. struct net_device_stats stats;
  168. /* version/revision of the SMC91x chip */
  169. int version;
  170. /* Contains the current active transmission mode */
  171. int tcr_cur_mode;
  172. /* Contains the current active receive mode */
  173. int rcr_cur_mode;
  174. /* Contains the current active receive/phy mode */
  175. int rpc_cur_mode;
  176. int ctl_rfduplx;
  177. int ctl_rspeed;
  178. u32 msg_enable;
  179. u32 phy_type;
  180. struct mii_if_info mii;
  181. /* work queue */
  182. struct work_struct phy_configure;
  183. int work_pending;
  184. spinlock_t lock;
  185. #ifdef SMC_CAN_USE_DATACS
  186. u32 __iomem *datacs;
  187. #endif
  188. #ifdef SMC_USE_PXA_DMA
  189. /* DMA needs the physical address of the chip */
  190. u_long physaddr;
  191. #endif
  192. void __iomem *base;
  193. };
  194. #if SMC_DEBUG > 0
  195. #define DBG(n, args...) \
  196. do { \
  197. if (SMC_DEBUG >= (n)) \
  198. printk(args); \
  199. } while (0)
  200. #define PRINTK(args...) printk(args)
  201. #else
  202. #define DBG(n, args...) do { } while(0)
  203. #define PRINTK(args...) printk(KERN_DEBUG args)
  204. #endif
  205. #if SMC_DEBUG > 3
  206. static void PRINT_PKT(u_char *buf, int length)
  207. {
  208. int i;
  209. int remainder;
  210. int lines;
  211. lines = length / 16;
  212. remainder = length % 16;
  213. for (i = 0; i < lines ; i ++) {
  214. int cur;
  215. for (cur = 0; cur < 8; cur++) {
  216. u_char a, b;
  217. a = *buf++;
  218. b = *buf++;
  219. printk("%02x%02x ", a, b);
  220. }
  221. printk("\n");
  222. }
  223. for (i = 0; i < remainder/2 ; i++) {
  224. u_char a, b;
  225. a = *buf++;
  226. b = *buf++;
  227. printk("%02x%02x ", a, b);
  228. }
  229. printk("\n");
  230. }
  231. #else
  232. #define PRINT_PKT(x...) do { } while(0)
  233. #endif
  234. /* this enables an interrupt in the interrupt mask register */
  235. #define SMC_ENABLE_INT(x) do { \
  236. unsigned char mask; \
  237. spin_lock_irq(&lp->lock); \
  238. mask = SMC_GET_INT_MASK(); \
  239. mask |= (x); \
  240. SMC_SET_INT_MASK(mask); \
  241. spin_unlock_irq(&lp->lock); \
  242. } while (0)
  243. /* this disables an interrupt from the interrupt mask register */
  244. #define SMC_DISABLE_INT(x) do { \
  245. unsigned char mask; \
  246. spin_lock_irq(&lp->lock); \
  247. mask = SMC_GET_INT_MASK(); \
  248. mask &= ~(x); \
  249. SMC_SET_INT_MASK(mask); \
  250. spin_unlock_irq(&lp->lock); \
  251. } while (0)
  252. /*
  253. * Wait while MMU is busy. This is usually in the order of a few nanosecs
  254. * if at all, but let's avoid deadlocking the system if the hardware
  255. * decides to go south.
  256. */
  257. #define SMC_WAIT_MMU_BUSY() do { \
  258. if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
  259. unsigned long timeout = jiffies + 2; \
  260. while (SMC_GET_MMU_CMD() & MC_BUSY) { \
  261. if (time_after(jiffies, timeout)) { \
  262. printk("%s: timeout %s line %d\n", \
  263. dev->name, __FILE__, __LINE__); \
  264. break; \
  265. } \
  266. cpu_relax(); \
  267. } \
  268. } \
  269. } while (0)
  270. /*
  271. * this does a soft reset on the device
  272. */
  273. static void smc_reset(struct net_device *dev)
  274. {
  275. struct smc_local *lp = netdev_priv(dev);
  276. void __iomem *ioaddr = lp->base;
  277. unsigned int ctl, cfg;
  278. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  279. /* Disable all interrupts */
  280. spin_lock(&lp->lock);
  281. SMC_SELECT_BANK(2);
  282. SMC_SET_INT_MASK(0);
  283. spin_unlock(&lp->lock);
  284. /*
  285. * This resets the registers mostly to defaults, but doesn't
  286. * affect EEPROM. That seems unnecessary
  287. */
  288. SMC_SELECT_BANK(0);
  289. SMC_SET_RCR(RCR_SOFTRST);
  290. /*
  291. * Setup the Configuration Register
  292. * This is necessary because the CONFIG_REG is not affected
  293. * by a soft reset
  294. */
  295. SMC_SELECT_BANK(1);
  296. cfg = CONFIG_DEFAULT;
  297. /*
  298. * Setup for fast accesses if requested. If the card/system
  299. * can't handle it then there will be no recovery except for
  300. * a hard reset or power cycle
  301. */
  302. if (nowait)
  303. cfg |= CONFIG_NO_WAIT;
  304. /*
  305. * Release from possible power-down state
  306. * Configuration register is not affected by Soft Reset
  307. */
  308. cfg |= CONFIG_EPH_POWER_EN;
  309. SMC_SET_CONFIG(cfg);
  310. /* this should pause enough for the chip to be happy */
  311. /*
  312. * elaborate? What does the chip _need_? --jgarzik
  313. *
  314. * This seems to be undocumented, but something the original
  315. * driver(s) have always done. Suspect undocumented timing
  316. * info/determined empirically. --rmk
  317. */
  318. udelay(1);
  319. /* Disable transmit and receive functionality */
  320. SMC_SELECT_BANK(0);
  321. SMC_SET_RCR(RCR_CLEAR);
  322. SMC_SET_TCR(TCR_CLEAR);
  323. SMC_SELECT_BANK(1);
  324. ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
  325. /*
  326. * Set the control register to automatically release successfully
  327. * transmitted packets, to make the best use out of our limited
  328. * memory
  329. */
  330. if(!THROTTLE_TX_PKTS)
  331. ctl |= CTL_AUTO_RELEASE;
  332. else
  333. ctl &= ~CTL_AUTO_RELEASE;
  334. SMC_SET_CTL(ctl);
  335. /* Reset the MMU */
  336. SMC_SELECT_BANK(2);
  337. SMC_SET_MMU_CMD(MC_RESET);
  338. SMC_WAIT_MMU_BUSY();
  339. /* clear anything saved */
  340. if (lp->pending_tx_skb != NULL) {
  341. dev_kfree_skb (lp->pending_tx_skb);
  342. lp->pending_tx_skb = NULL;
  343. lp->stats.tx_errors++;
  344. lp->stats.tx_aborted_errors++;
  345. }
  346. }
  347. /*
  348. * Enable Interrupts, Receive, and Transmit
  349. */
  350. static void smc_enable(struct net_device *dev)
  351. {
  352. struct smc_local *lp = netdev_priv(dev);
  353. void __iomem *ioaddr = lp->base;
  354. int mask;
  355. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  356. /* see the header file for options in TCR/RCR DEFAULT */
  357. SMC_SELECT_BANK(0);
  358. SMC_SET_TCR(lp->tcr_cur_mode);
  359. SMC_SET_RCR(lp->rcr_cur_mode);
  360. SMC_SELECT_BANK(1);
  361. SMC_SET_MAC_ADDR(dev->dev_addr);
  362. /* now, enable interrupts */
  363. mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
  364. if (lp->version >= (CHIP_91100 << 4))
  365. mask |= IM_MDINT;
  366. SMC_SELECT_BANK(2);
  367. SMC_SET_INT_MASK(mask);
  368. /*
  369. * From this point the register bank must _NOT_ be switched away
  370. * to something else than bank 2 without proper locking against
  371. * races with any tasklet or interrupt handlers until smc_shutdown()
  372. * or smc_reset() is called.
  373. */
  374. }
  375. /*
  376. * this puts the device in an inactive state
  377. */
  378. static void smc_shutdown(struct net_device *dev)
  379. {
  380. struct smc_local *lp = netdev_priv(dev);
  381. void __iomem *ioaddr = lp->base;
  382. DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
  383. /* no more interrupts for me */
  384. spin_lock(&lp->lock);
  385. SMC_SELECT_BANK(2);
  386. SMC_SET_INT_MASK(0);
  387. spin_unlock(&lp->lock);
  388. /* and tell the card to stay away from that nasty outside world */
  389. SMC_SELECT_BANK(0);
  390. SMC_SET_RCR(RCR_CLEAR);
  391. SMC_SET_TCR(TCR_CLEAR);
  392. #ifdef POWER_DOWN
  393. /* finally, shut the chip down */
  394. SMC_SELECT_BANK(1);
  395. SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
  396. #endif
  397. }
  398. /*
  399. * This is the procedure to handle the receipt of a packet.
  400. */
  401. static inline void smc_rcv(struct net_device *dev)
  402. {
  403. struct smc_local *lp = netdev_priv(dev);
  404. void __iomem *ioaddr = lp->base;
  405. unsigned int packet_number, status, packet_len;
  406. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  407. packet_number = SMC_GET_RXFIFO();
  408. if (unlikely(packet_number & RXFIFO_REMPTY)) {
  409. PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
  410. return;
  411. }
  412. /* read from start of packet */
  413. SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
  414. /* First two words are status and packet length */
  415. SMC_GET_PKT_HDR(status, packet_len);
  416. packet_len &= 0x07ff; /* mask off top bits */
  417. DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
  418. dev->name, packet_number, status,
  419. packet_len, packet_len);
  420. back:
  421. if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
  422. if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
  423. /* accept VLAN packets */
  424. status &= ~RS_TOOLONG;
  425. goto back;
  426. }
  427. if (packet_len < 6) {
  428. /* bloody hardware */
  429. printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
  430. dev->name, packet_len, status);
  431. status |= RS_TOOSHORT;
  432. }
  433. SMC_WAIT_MMU_BUSY();
  434. SMC_SET_MMU_CMD(MC_RELEASE);
  435. lp->stats.rx_errors++;
  436. if (status & RS_ALGNERR)
  437. lp->stats.rx_frame_errors++;
  438. if (status & (RS_TOOSHORT | RS_TOOLONG))
  439. lp->stats.rx_length_errors++;
  440. if (status & RS_BADCRC)
  441. lp->stats.rx_crc_errors++;
  442. } else {
  443. struct sk_buff *skb;
  444. unsigned char *data;
  445. unsigned int data_len;
  446. /* set multicast stats */
  447. if (status & RS_MULTICAST)
  448. lp->stats.multicast++;
  449. /*
  450. * Actual payload is packet_len - 6 (or 5 if odd byte).
  451. * We want skb_reserve(2) and the final ctrl word
  452. * (2 bytes, possibly containing the payload odd byte).
  453. * Furthermore, we add 2 bytes to allow rounding up to
  454. * multiple of 4 bytes on 32 bit buses.
  455. * Hence packet_len - 6 + 2 + 2 + 2.
  456. */
  457. skb = dev_alloc_skb(packet_len);
  458. if (unlikely(skb == NULL)) {
  459. printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
  460. dev->name);
  461. SMC_WAIT_MMU_BUSY();
  462. SMC_SET_MMU_CMD(MC_RELEASE);
  463. lp->stats.rx_dropped++;
  464. return;
  465. }
  466. /* Align IP header to 32 bits */
  467. skb_reserve(skb, 2);
  468. /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
  469. if (lp->version == 0x90)
  470. status |= RS_ODDFRAME;
  471. /*
  472. * If odd length: packet_len - 5,
  473. * otherwise packet_len - 6.
  474. * With the trailing ctrl byte it's packet_len - 4.
  475. */
  476. data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
  477. data = skb_put(skb, data_len);
  478. SMC_PULL_DATA(data, packet_len - 4);
  479. SMC_WAIT_MMU_BUSY();
  480. SMC_SET_MMU_CMD(MC_RELEASE);
  481. PRINT_PKT(data, packet_len - 4);
  482. dev->last_rx = jiffies;
  483. skb->dev = dev;
  484. skb->protocol = eth_type_trans(skb, dev);
  485. netif_rx(skb);
  486. lp->stats.rx_packets++;
  487. lp->stats.rx_bytes += data_len;
  488. }
  489. }
  490. #ifdef CONFIG_SMP
  491. /*
  492. * On SMP we have the following problem:
  493. *
  494. * A = smc_hardware_send_pkt()
  495. * B = smc_hard_start_xmit()
  496. * C = smc_interrupt()
  497. *
  498. * A and B can never be executed simultaneously. However, at least on UP,
  499. * it is possible (and even desirable) for C to interrupt execution of
  500. * A or B in order to have better RX reliability and avoid overruns.
  501. * C, just like A and B, must have exclusive access to the chip and
  502. * each of them must lock against any other concurrent access.
  503. * Unfortunately this is not possible to have C suspend execution of A or
  504. * B taking place on another CPU. On UP this is no an issue since A and B
  505. * are run from softirq context and C from hard IRQ context, and there is
  506. * no other CPU where concurrent access can happen.
  507. * If ever there is a way to force at least B and C to always be executed
  508. * on the same CPU then we could use read/write locks to protect against
  509. * any other concurrent access and C would always interrupt B. But life
  510. * isn't that easy in a SMP world...
  511. */
  512. #define smc_special_trylock(lock) \
  513. ({ \
  514. int __ret; \
  515. local_irq_disable(); \
  516. __ret = spin_trylock(lock); \
  517. if (!__ret) \
  518. local_irq_enable(); \
  519. __ret; \
  520. })
  521. #define smc_special_lock(lock) spin_lock_irq(lock)
  522. #define smc_special_unlock(lock) spin_unlock_irq(lock)
  523. #else
  524. #define smc_special_trylock(lock) (1)
  525. #define smc_special_lock(lock) do { } while (0)
  526. #define smc_special_unlock(lock) do { } while (0)
  527. #endif
  528. /*
  529. * This is called to actually send a packet to the chip.
  530. */
  531. static void smc_hardware_send_pkt(unsigned long data)
  532. {
  533. struct net_device *dev = (struct net_device *)data;
  534. struct smc_local *lp = netdev_priv(dev);
  535. void __iomem *ioaddr = lp->base;
  536. struct sk_buff *skb;
  537. unsigned int packet_no, len;
  538. unsigned char *buf;
  539. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  540. if (!smc_special_trylock(&lp->lock)) {
  541. netif_stop_queue(dev);
  542. tasklet_schedule(&lp->tx_task);
  543. return;
  544. }
  545. skb = lp->pending_tx_skb;
  546. lp->pending_tx_skb = NULL;
  547. packet_no = SMC_GET_AR();
  548. if (unlikely(packet_no & AR_FAILED)) {
  549. printk("%s: Memory allocation failed.\n", dev->name);
  550. lp->stats.tx_errors++;
  551. lp->stats.tx_fifo_errors++;
  552. smc_special_unlock(&lp->lock);
  553. goto done;
  554. }
  555. /* point to the beginning of the packet */
  556. SMC_SET_PN(packet_no);
  557. SMC_SET_PTR(PTR_AUTOINC);
  558. buf = skb->data;
  559. len = skb->len;
  560. DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
  561. dev->name, packet_no, len, len, buf);
  562. PRINT_PKT(buf, len);
  563. /*
  564. * Send the packet length (+6 for status words, length, and ctl.
  565. * The card will pad to 64 bytes with zeroes if packet is too small.
  566. */
  567. SMC_PUT_PKT_HDR(0, len + 6);
  568. /* send the actual data */
  569. SMC_PUSH_DATA(buf, len & ~1);
  570. /* Send final ctl word with the last byte if there is one */
  571. SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
  572. /*
  573. * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
  574. * have the effect of having at most one packet queued for TX
  575. * in the chip's memory at all time.
  576. *
  577. * If THROTTLE_TX_PKTS is not set then the queue is stopped only
  578. * when memory allocation (MC_ALLOC) does not succeed right away.
  579. */
  580. if (THROTTLE_TX_PKTS)
  581. netif_stop_queue(dev);
  582. /* queue the packet for TX */
  583. SMC_SET_MMU_CMD(MC_ENQUEUE);
  584. SMC_ACK_INT(IM_TX_EMPTY_INT);
  585. smc_special_unlock(&lp->lock);
  586. dev->trans_start = jiffies;
  587. lp->stats.tx_packets++;
  588. lp->stats.tx_bytes += len;
  589. SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
  590. done: if (!THROTTLE_TX_PKTS)
  591. netif_wake_queue(dev);
  592. dev_kfree_skb(skb);
  593. }
  594. /*
  595. * Since I am not sure if I will have enough room in the chip's ram
  596. * to store the packet, I call this routine which either sends it
  597. * now, or set the card to generates an interrupt when ready
  598. * for the packet.
  599. */
  600. static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  601. {
  602. struct smc_local *lp = netdev_priv(dev);
  603. void __iomem *ioaddr = lp->base;
  604. unsigned int numPages, poll_count, status;
  605. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  606. BUG_ON(lp->pending_tx_skb != NULL);
  607. lp->pending_tx_skb = skb;
  608. /*
  609. * The MMU wants the number of pages to be the number of 256 bytes
  610. * 'pages', minus 1 (since a packet can't ever have 0 pages :))
  611. *
  612. * The 91C111 ignores the size bits, but earlier models don't.
  613. *
  614. * Pkt size for allocating is data length +6 (for additional status
  615. * words, length and ctl)
  616. *
  617. * If odd size then last byte is included in ctl word.
  618. */
  619. numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
  620. if (unlikely(numPages > 7)) {
  621. printk("%s: Far too big packet error.\n", dev->name);
  622. lp->pending_tx_skb = NULL;
  623. lp->stats.tx_errors++;
  624. lp->stats.tx_dropped++;
  625. dev_kfree_skb(skb);
  626. return 0;
  627. }
  628. smc_special_lock(&lp->lock);
  629. /* now, try to allocate the memory */
  630. SMC_SET_MMU_CMD(MC_ALLOC | numPages);
  631. /*
  632. * Poll the chip for a short amount of time in case the
  633. * allocation succeeds quickly.
  634. */
  635. poll_count = MEMORY_WAIT_TIME;
  636. do {
  637. status = SMC_GET_INT();
  638. if (status & IM_ALLOC_INT) {
  639. SMC_ACK_INT(IM_ALLOC_INT);
  640. break;
  641. }
  642. } while (--poll_count);
  643. smc_special_unlock(&lp->lock);
  644. if (!poll_count) {
  645. /* oh well, wait until the chip finds memory later */
  646. netif_stop_queue(dev);
  647. DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
  648. SMC_ENABLE_INT(IM_ALLOC_INT);
  649. } else {
  650. /*
  651. * Allocation succeeded: push packet to the chip's own memory
  652. * immediately.
  653. */
  654. smc_hardware_send_pkt((unsigned long)dev);
  655. }
  656. return 0;
  657. }
  658. /*
  659. * This handles a TX interrupt, which is only called when:
  660. * - a TX error occurred, or
  661. * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
  662. */
  663. static void smc_tx(struct net_device *dev)
  664. {
  665. struct smc_local *lp = netdev_priv(dev);
  666. void __iomem *ioaddr = lp->base;
  667. unsigned int saved_packet, packet_no, tx_status, pkt_len;
  668. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  669. /* If the TX FIFO is empty then nothing to do */
  670. packet_no = SMC_GET_TXFIFO();
  671. if (unlikely(packet_no & TXFIFO_TEMPTY)) {
  672. PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
  673. return;
  674. }
  675. /* select packet to read from */
  676. saved_packet = SMC_GET_PN();
  677. SMC_SET_PN(packet_no);
  678. /* read the first word (status word) from this packet */
  679. SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
  680. SMC_GET_PKT_HDR(tx_status, pkt_len);
  681. DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
  682. dev->name, tx_status, packet_no);
  683. if (!(tx_status & ES_TX_SUC))
  684. lp->stats.tx_errors++;
  685. if (tx_status & ES_LOSTCARR)
  686. lp->stats.tx_carrier_errors++;
  687. if (tx_status & (ES_LATCOL | ES_16COL)) {
  688. PRINTK("%s: %s occurred on last xmit\n", dev->name,
  689. (tx_status & ES_LATCOL) ?
  690. "late collision" : "too many collisions");
  691. lp->stats.tx_window_errors++;
  692. if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) {
  693. printk(KERN_INFO "%s: unexpectedly large number of "
  694. "bad collisions. Please check duplex "
  695. "setting.\n", dev->name);
  696. }
  697. }
  698. /* kill the packet */
  699. SMC_WAIT_MMU_BUSY();
  700. SMC_SET_MMU_CMD(MC_FREEPKT);
  701. /* Don't restore Packet Number Reg until busy bit is cleared */
  702. SMC_WAIT_MMU_BUSY();
  703. SMC_SET_PN(saved_packet);
  704. /* re-enable transmit */
  705. SMC_SELECT_BANK(0);
  706. SMC_SET_TCR(lp->tcr_cur_mode);
  707. SMC_SELECT_BANK(2);
  708. }
  709. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  710. static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
  711. {
  712. struct smc_local *lp = netdev_priv(dev);
  713. void __iomem *ioaddr = lp->base;
  714. unsigned int mii_reg, mask;
  715. mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
  716. mii_reg |= MII_MDOE;
  717. for (mask = 1 << (bits - 1); mask; mask >>= 1) {
  718. if (val & mask)
  719. mii_reg |= MII_MDO;
  720. else
  721. mii_reg &= ~MII_MDO;
  722. SMC_SET_MII(mii_reg);
  723. udelay(MII_DELAY);
  724. SMC_SET_MII(mii_reg | MII_MCLK);
  725. udelay(MII_DELAY);
  726. }
  727. }
  728. static unsigned int smc_mii_in(struct net_device *dev, int bits)
  729. {
  730. struct smc_local *lp = netdev_priv(dev);
  731. void __iomem *ioaddr = lp->base;
  732. unsigned int mii_reg, mask, val;
  733. mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
  734. SMC_SET_MII(mii_reg);
  735. for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
  736. if (SMC_GET_MII() & MII_MDI)
  737. val |= mask;
  738. SMC_SET_MII(mii_reg);
  739. udelay(MII_DELAY);
  740. SMC_SET_MII(mii_reg | MII_MCLK);
  741. udelay(MII_DELAY);
  742. }
  743. return val;
  744. }
  745. /*
  746. * Reads a register from the MII Management serial interface
  747. */
  748. static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
  749. {
  750. struct smc_local *lp = netdev_priv(dev);
  751. void __iomem *ioaddr = lp->base;
  752. unsigned int phydata;
  753. SMC_SELECT_BANK(3);
  754. /* Idle - 32 ones */
  755. smc_mii_out(dev, 0xffffffff, 32);
  756. /* Start code (01) + read (10) + phyaddr + phyreg */
  757. smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
  758. /* Turnaround (2bits) + phydata */
  759. phydata = smc_mii_in(dev, 18);
  760. /* Return to idle state */
  761. SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
  762. DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  763. __FUNCTION__, phyaddr, phyreg, phydata);
  764. SMC_SELECT_BANK(2);
  765. return phydata;
  766. }
  767. /*
  768. * Writes a register to the MII Management serial interface
  769. */
  770. static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
  771. int phydata)
  772. {
  773. struct smc_local *lp = netdev_priv(dev);
  774. void __iomem *ioaddr = lp->base;
  775. SMC_SELECT_BANK(3);
  776. /* Idle - 32 ones */
  777. smc_mii_out(dev, 0xffffffff, 32);
  778. /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
  779. smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
  780. /* Return to idle state */
  781. SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
  782. DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  783. __FUNCTION__, phyaddr, phyreg, phydata);
  784. SMC_SELECT_BANK(2);
  785. }
  786. /*
  787. * Finds and reports the PHY address
  788. */
  789. static void smc_phy_detect(struct net_device *dev)
  790. {
  791. struct smc_local *lp = netdev_priv(dev);
  792. int phyaddr;
  793. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  794. lp->phy_type = 0;
  795. /*
  796. * Scan all 32 PHY addresses if necessary, starting at
  797. * PHY#1 to PHY#31, and then PHY#0 last.
  798. */
  799. for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
  800. unsigned int id1, id2;
  801. /* Read the PHY identifiers */
  802. id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
  803. id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
  804. DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
  805. dev->name, id1, id2);
  806. /* Make sure it is a valid identifier */
  807. if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
  808. id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
  809. /* Save the PHY's address */
  810. lp->mii.phy_id = phyaddr & 31;
  811. lp->phy_type = id1 << 16 | id2;
  812. break;
  813. }
  814. }
  815. }
  816. /*
  817. * Sets the PHY to a configuration as determined by the user
  818. */
  819. static int smc_phy_fixed(struct net_device *dev)
  820. {
  821. struct smc_local *lp = netdev_priv(dev);
  822. void __iomem *ioaddr = lp->base;
  823. int phyaddr = lp->mii.phy_id;
  824. int bmcr, cfg1;
  825. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  826. /* Enter Link Disable state */
  827. cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
  828. cfg1 |= PHY_CFG1_LNKDIS;
  829. smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
  830. /*
  831. * Set our fixed capabilities
  832. * Disable auto-negotiation
  833. */
  834. bmcr = 0;
  835. if (lp->ctl_rfduplx)
  836. bmcr |= BMCR_FULLDPLX;
  837. if (lp->ctl_rspeed == 100)
  838. bmcr |= BMCR_SPEED100;
  839. /* Write our capabilities to the phy control register */
  840. smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
  841. /* Re-Configure the Receive/Phy Control register */
  842. SMC_SELECT_BANK(0);
  843. SMC_SET_RPC(lp->rpc_cur_mode);
  844. SMC_SELECT_BANK(2);
  845. return 1;
  846. }
  847. /*
  848. * smc_phy_reset - reset the phy
  849. * @dev: net device
  850. * @phy: phy address
  851. *
  852. * Issue a software reset for the specified PHY and
  853. * wait up to 100ms for the reset to complete. We should
  854. * not access the PHY for 50ms after issuing the reset.
  855. *
  856. * The time to wait appears to be dependent on the PHY.
  857. *
  858. * Must be called with lp->lock locked.
  859. */
  860. static int smc_phy_reset(struct net_device *dev, int phy)
  861. {
  862. struct smc_local *lp = netdev_priv(dev);
  863. unsigned int bmcr;
  864. int timeout;
  865. smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
  866. for (timeout = 2; timeout; timeout--) {
  867. spin_unlock_irq(&lp->lock);
  868. msleep(50);
  869. spin_lock_irq(&lp->lock);
  870. bmcr = smc_phy_read(dev, phy, MII_BMCR);
  871. if (!(bmcr & BMCR_RESET))
  872. break;
  873. }
  874. return bmcr & BMCR_RESET;
  875. }
  876. /*
  877. * smc_phy_powerdown - powerdown phy
  878. * @dev: net device
  879. *
  880. * Power down the specified PHY
  881. */
  882. static void smc_phy_powerdown(struct net_device *dev)
  883. {
  884. struct smc_local *lp = netdev_priv(dev);
  885. unsigned int bmcr;
  886. int phy = lp->mii.phy_id;
  887. if (lp->phy_type == 0)
  888. return;
  889. /* We need to ensure that no calls to smc_phy_configure are
  890. pending.
  891. flush_scheduled_work() cannot be called because we are
  892. running with the netlink semaphore held (from
  893. devinet_ioctl()) and the pending work queue contains
  894. linkwatch_event() (scheduled by netif_carrier_off()
  895. above). linkwatch_event() also wants the netlink semaphore.
  896. */
  897. while(lp->work_pending)
  898. schedule();
  899. bmcr = smc_phy_read(dev, phy, MII_BMCR);
  900. smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
  901. }
  902. /*
  903. * smc_phy_check_media - check the media status and adjust TCR
  904. * @dev: net device
  905. * @init: set true for initialisation
  906. *
  907. * Select duplex mode depending on negotiation state. This
  908. * also updates our carrier state.
  909. */
  910. static void smc_phy_check_media(struct net_device *dev, int init)
  911. {
  912. struct smc_local *lp = netdev_priv(dev);
  913. void __iomem *ioaddr = lp->base;
  914. if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
  915. /* duplex state has changed */
  916. if (lp->mii.full_duplex) {
  917. lp->tcr_cur_mode |= TCR_SWFDUP;
  918. } else {
  919. lp->tcr_cur_mode &= ~TCR_SWFDUP;
  920. }
  921. SMC_SELECT_BANK(0);
  922. SMC_SET_TCR(lp->tcr_cur_mode);
  923. }
  924. }
  925. /*
  926. * Configures the specified PHY through the MII management interface
  927. * using Autonegotiation.
  928. * Calls smc_phy_fixed() if the user has requested a certain config.
  929. * If RPC ANEG bit is set, the media selection is dependent purely on
  930. * the selection by the MII (either in the MII BMCR reg or the result
  931. * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
  932. * is controlled by the RPC SPEED and RPC DPLX bits.
  933. */
  934. static void smc_phy_configure(void *data)
  935. {
  936. struct net_device *dev = data;
  937. struct smc_local *lp = netdev_priv(dev);
  938. void __iomem *ioaddr = lp->base;
  939. int phyaddr = lp->mii.phy_id;
  940. int my_phy_caps; /* My PHY capabilities */
  941. int my_ad_caps; /* My Advertised capabilities */
  942. int status;
  943. DBG(3, "%s:smc_program_phy()\n", dev->name);
  944. spin_lock_irq(&lp->lock);
  945. /*
  946. * We should not be called if phy_type is zero.
  947. */
  948. if (lp->phy_type == 0)
  949. goto smc_phy_configure_exit;
  950. if (smc_phy_reset(dev, phyaddr)) {
  951. printk("%s: PHY reset timed out\n", dev->name);
  952. goto smc_phy_configure_exit;
  953. }
  954. /*
  955. * Enable PHY Interrupts (for register 18)
  956. * Interrupts listed here are disabled
  957. */
  958. smc_phy_write(dev, phyaddr, PHY_MASK_REG,
  959. PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
  960. PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
  961. PHY_INT_SPDDET | PHY_INT_DPLXDET);
  962. /* Configure the Receive/Phy Control register */
  963. SMC_SELECT_BANK(0);
  964. SMC_SET_RPC(lp->rpc_cur_mode);
  965. /* If the user requested no auto neg, then go set his request */
  966. if (lp->mii.force_media) {
  967. smc_phy_fixed(dev);
  968. goto smc_phy_configure_exit;
  969. }
  970. /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
  971. my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
  972. if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
  973. printk(KERN_INFO "Auto negotiation NOT supported\n");
  974. smc_phy_fixed(dev);
  975. goto smc_phy_configure_exit;
  976. }
  977. my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
  978. if (my_phy_caps & BMSR_100BASE4)
  979. my_ad_caps |= ADVERTISE_100BASE4;
  980. if (my_phy_caps & BMSR_100FULL)
  981. my_ad_caps |= ADVERTISE_100FULL;
  982. if (my_phy_caps & BMSR_100HALF)
  983. my_ad_caps |= ADVERTISE_100HALF;
  984. if (my_phy_caps & BMSR_10FULL)
  985. my_ad_caps |= ADVERTISE_10FULL;
  986. if (my_phy_caps & BMSR_10HALF)
  987. my_ad_caps |= ADVERTISE_10HALF;
  988. /* Disable capabilities not selected by our user */
  989. if (lp->ctl_rspeed != 100)
  990. my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
  991. if (!lp->ctl_rfduplx)
  992. my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
  993. /* Update our Auto-Neg Advertisement Register */
  994. smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
  995. lp->mii.advertising = my_ad_caps;
  996. /*
  997. * Read the register back. Without this, it appears that when
  998. * auto-negotiation is restarted, sometimes it isn't ready and
  999. * the link does not come up.
  1000. */
  1001. status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
  1002. DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
  1003. DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
  1004. /* Restart auto-negotiation process in order to advertise my caps */
  1005. smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
  1006. smc_phy_check_media(dev, 1);
  1007. smc_phy_configure_exit:
  1008. spin_unlock_irq(&lp->lock);
  1009. lp->work_pending = 0;
  1010. }
  1011. /*
  1012. * smc_phy_interrupt
  1013. *
  1014. * Purpose: Handle interrupts relating to PHY register 18. This is
  1015. * called from the "hard" interrupt handler under our private spinlock.
  1016. */
  1017. static void smc_phy_interrupt(struct net_device *dev)
  1018. {
  1019. struct smc_local *lp = netdev_priv(dev);
  1020. int phyaddr = lp->mii.phy_id;
  1021. int phy18;
  1022. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1023. if (lp->phy_type == 0)
  1024. return;
  1025. for(;;) {
  1026. smc_phy_check_media(dev, 0);
  1027. /* Read PHY Register 18, Status Output */
  1028. phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
  1029. if ((phy18 & PHY_INT_INT) == 0)
  1030. break;
  1031. }
  1032. }
  1033. /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
  1034. static void smc_10bt_check_media(struct net_device *dev, int init)
  1035. {
  1036. struct smc_local *lp = netdev_priv(dev);
  1037. void __iomem *ioaddr = lp->base;
  1038. unsigned int old_carrier, new_carrier;
  1039. old_carrier = netif_carrier_ok(dev) ? 1 : 0;
  1040. SMC_SELECT_BANK(0);
  1041. new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
  1042. SMC_SELECT_BANK(2);
  1043. if (init || (old_carrier != new_carrier)) {
  1044. if (!new_carrier) {
  1045. netif_carrier_off(dev);
  1046. } else {
  1047. netif_carrier_on(dev);
  1048. }
  1049. if (netif_msg_link(lp))
  1050. printk(KERN_INFO "%s: link %s\n", dev->name,
  1051. new_carrier ? "up" : "down");
  1052. }
  1053. }
  1054. static void smc_eph_interrupt(struct net_device *dev)
  1055. {
  1056. struct smc_local *lp = netdev_priv(dev);
  1057. void __iomem *ioaddr = lp->base;
  1058. unsigned int ctl;
  1059. smc_10bt_check_media(dev, 0);
  1060. SMC_SELECT_BANK(1);
  1061. ctl = SMC_GET_CTL();
  1062. SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
  1063. SMC_SET_CTL(ctl);
  1064. SMC_SELECT_BANK(2);
  1065. }
  1066. /*
  1067. * This is the main routine of the driver, to handle the device when
  1068. * it needs some attention.
  1069. */
  1070. static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  1071. {
  1072. struct net_device *dev = dev_id;
  1073. struct smc_local *lp = netdev_priv(dev);
  1074. void __iomem *ioaddr = lp->base;
  1075. int status, mask, timeout, card_stats;
  1076. int saved_pointer;
  1077. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  1078. spin_lock(&lp->lock);
  1079. /* A preamble may be used when there is a potential race
  1080. * between the interruptible transmit functions and this
  1081. * ISR. */
  1082. SMC_INTERRUPT_PREAMBLE;
  1083. saved_pointer = SMC_GET_PTR();
  1084. mask = SMC_GET_INT_MASK();
  1085. SMC_SET_INT_MASK(0);
  1086. /* set a timeout value, so I don't stay here forever */
  1087. timeout = 8;
  1088. do {
  1089. status = SMC_GET_INT();
  1090. DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
  1091. dev->name, status, mask,
  1092. ({ int meminfo; SMC_SELECT_BANK(0);
  1093. meminfo = SMC_GET_MIR();
  1094. SMC_SELECT_BANK(2); meminfo; }),
  1095. SMC_GET_FIFO());
  1096. status &= mask;
  1097. if (!status)
  1098. break;
  1099. if (status & IM_TX_INT) {
  1100. /* do this before RX as it will free memory quickly */
  1101. DBG(3, "%s: TX int\n", dev->name);
  1102. smc_tx(dev);
  1103. SMC_ACK_INT(IM_TX_INT);
  1104. if (THROTTLE_TX_PKTS)
  1105. netif_wake_queue(dev);
  1106. } else if (status & IM_RCV_INT) {
  1107. DBG(3, "%s: RX irq\n", dev->name);
  1108. smc_rcv(dev);
  1109. } else if (status & IM_ALLOC_INT) {
  1110. DBG(3, "%s: Allocation irq\n", dev->name);
  1111. tasklet_hi_schedule(&lp->tx_task);
  1112. mask &= ~IM_ALLOC_INT;
  1113. } else if (status & IM_TX_EMPTY_INT) {
  1114. DBG(3, "%s: TX empty\n", dev->name);
  1115. mask &= ~IM_TX_EMPTY_INT;
  1116. /* update stats */
  1117. SMC_SELECT_BANK(0);
  1118. card_stats = SMC_GET_COUNTER();
  1119. SMC_SELECT_BANK(2);
  1120. /* single collisions */
  1121. lp->stats.collisions += card_stats & 0xF;
  1122. card_stats >>= 4;
  1123. /* multiple collisions */
  1124. lp->stats.collisions += card_stats & 0xF;
  1125. } else if (status & IM_RX_OVRN_INT) {
  1126. DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
  1127. ({ int eph_st; SMC_SELECT_BANK(0);
  1128. eph_st = SMC_GET_EPH_STATUS();
  1129. SMC_SELECT_BANK(2); eph_st; }) );
  1130. SMC_ACK_INT(IM_RX_OVRN_INT);
  1131. lp->stats.rx_errors++;
  1132. lp->stats.rx_fifo_errors++;
  1133. } else if (status & IM_EPH_INT) {
  1134. smc_eph_interrupt(dev);
  1135. } else if (status & IM_MDINT) {
  1136. SMC_ACK_INT(IM_MDINT);
  1137. smc_phy_interrupt(dev);
  1138. } else if (status & IM_ERCV_INT) {
  1139. SMC_ACK_INT(IM_ERCV_INT);
  1140. PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
  1141. }
  1142. } while (--timeout);
  1143. /* restore register states */
  1144. SMC_SET_PTR(saved_pointer);
  1145. SMC_SET_INT_MASK(mask);
  1146. spin_unlock(&lp->lock);
  1147. DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
  1148. /*
  1149. * We return IRQ_HANDLED unconditionally here even if there was
  1150. * nothing to do. There is a possibility that a packet might
  1151. * get enqueued into the chip right after TX_EMPTY_INT is raised
  1152. * but just before the CPU acknowledges the IRQ.
  1153. * Better take an unneeded IRQ in some occasions than complexifying
  1154. * the code for all cases.
  1155. */
  1156. return IRQ_HANDLED;
  1157. }
  1158. #ifdef CONFIG_NET_POLL_CONTROLLER
  1159. /*
  1160. * Polling receive - used by netconsole and other diagnostic tools
  1161. * to allow network i/o with interrupts disabled.
  1162. */
  1163. static void smc_poll_controller(struct net_device *dev)
  1164. {
  1165. disable_irq(dev->irq);
  1166. smc_interrupt(dev->irq, dev, NULL);
  1167. enable_irq(dev->irq);
  1168. }
  1169. #endif
  1170. /* Our watchdog timed out. Called by the networking layer */
  1171. static void smc_timeout(struct net_device *dev)
  1172. {
  1173. struct smc_local *lp = netdev_priv(dev);
  1174. void __iomem *ioaddr = lp->base;
  1175. int status, mask, eph_st, meminfo, fifo;
  1176. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1177. spin_lock_irq(&lp->lock);
  1178. status = SMC_GET_INT();
  1179. mask = SMC_GET_INT_MASK();
  1180. fifo = SMC_GET_FIFO();
  1181. SMC_SELECT_BANK(0);
  1182. eph_st = SMC_GET_EPH_STATUS();
  1183. meminfo = SMC_GET_MIR();
  1184. SMC_SELECT_BANK(2);
  1185. spin_unlock_irq(&lp->lock);
  1186. PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
  1187. "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
  1188. dev->name, status, mask, meminfo, fifo, eph_st );
  1189. smc_reset(dev);
  1190. smc_enable(dev);
  1191. /*
  1192. * Reconfiguring the PHY doesn't seem like a bad idea here, but
  1193. * smc_phy_configure() calls msleep() which calls schedule_timeout()
  1194. * which calls schedule(). Hence we use a work queue.
  1195. */
  1196. if (lp->phy_type != 0) {
  1197. if (schedule_work(&lp->phy_configure)) {
  1198. lp->work_pending = 1;
  1199. }
  1200. }
  1201. /* We can accept TX packets again */
  1202. dev->trans_start = jiffies;
  1203. netif_wake_queue(dev);
  1204. }
  1205. /*
  1206. * This routine will, depending on the values passed to it,
  1207. * either make it accept multicast packets, go into
  1208. * promiscuous mode (for TCPDUMP and cousins) or accept
  1209. * a select set of multicast packets
  1210. */
  1211. static void smc_set_multicast_list(struct net_device *dev)
  1212. {
  1213. struct smc_local *lp = netdev_priv(dev);
  1214. void __iomem *ioaddr = lp->base;
  1215. unsigned char multicast_table[8];
  1216. int update_multicast = 0;
  1217. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1218. if (dev->flags & IFF_PROMISC) {
  1219. DBG(2, "%s: RCR_PRMS\n", dev->name);
  1220. lp->rcr_cur_mode |= RCR_PRMS;
  1221. }
  1222. /* BUG? I never disable promiscuous mode if multicasting was turned on.
  1223. Now, I turn off promiscuous mode, but I don't do anything to multicasting
  1224. when promiscuous mode is turned on.
  1225. */
  1226. /*
  1227. * Here, I am setting this to accept all multicast packets.
  1228. * I don't need to zero the multicast table, because the flag is
  1229. * checked before the table is
  1230. */
  1231. else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
  1232. DBG(2, "%s: RCR_ALMUL\n", dev->name);
  1233. lp->rcr_cur_mode |= RCR_ALMUL;
  1234. }
  1235. /*
  1236. * This sets the internal hardware table to filter out unwanted
  1237. * multicast packets before they take up memory.
  1238. *
  1239. * The SMC chip uses a hash table where the high 6 bits of the CRC of
  1240. * address are the offset into the table. If that bit is 1, then the
  1241. * multicast packet is accepted. Otherwise, it's dropped silently.
  1242. *
  1243. * To use the 6 bits as an offset into the table, the high 3 bits are
  1244. * the number of the 8 bit register, while the low 3 bits are the bit
  1245. * within that register.
  1246. */
  1247. else if (dev->mc_count) {
  1248. int i;
  1249. struct dev_mc_list *cur_addr;
  1250. /* table for flipping the order of 3 bits */
  1251. static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
  1252. /* start with a table of all zeros: reject all */
  1253. memset(multicast_table, 0, sizeof(multicast_table));
  1254. cur_addr = dev->mc_list;
  1255. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1256. int position;
  1257. /* do we have a pointer here? */
  1258. if (!cur_addr)
  1259. break;
  1260. /* make sure this is a multicast address -
  1261. shouldn't this be a given if we have it here ? */
  1262. if (!(*cur_addr->dmi_addr & 1))
  1263. continue;
  1264. /* only use the low order bits */
  1265. position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
  1266. /* do some messy swapping to put the bit in the right spot */
  1267. multicast_table[invert3[position&7]] |=
  1268. (1<<invert3[(position>>3)&7]);
  1269. }
  1270. /* be sure I get rid of flags I might have set */
  1271. lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
  1272. /* now, the table can be loaded into the chipset */
  1273. update_multicast = 1;
  1274. } else {
  1275. DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
  1276. lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
  1277. /*
  1278. * since I'm disabling all multicast entirely, I need to
  1279. * clear the multicast list
  1280. */
  1281. memset(multicast_table, 0, sizeof(multicast_table));
  1282. update_multicast = 1;
  1283. }
  1284. spin_lock_irq(&lp->lock);
  1285. SMC_SELECT_BANK(0);
  1286. SMC_SET_RCR(lp->rcr_cur_mode);
  1287. if (update_multicast) {
  1288. SMC_SELECT_BANK(3);
  1289. SMC_SET_MCAST(multicast_table);
  1290. }
  1291. SMC_SELECT_BANK(2);
  1292. spin_unlock_irq(&lp->lock);
  1293. }
  1294. /*
  1295. * Open and Initialize the board
  1296. *
  1297. * Set up everything, reset the card, etc..
  1298. */
  1299. static int
  1300. smc_open(struct net_device *dev)
  1301. {
  1302. struct smc_local *lp = netdev_priv(dev);
  1303. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1304. /*
  1305. * Check that the address is valid. If its not, refuse
  1306. * to bring the device up. The user must specify an
  1307. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  1308. */
  1309. if (!is_valid_ether_addr(dev->dev_addr)) {
  1310. PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
  1311. return -EINVAL;
  1312. }
  1313. /* Setup the default Register Modes */
  1314. lp->tcr_cur_mode = TCR_DEFAULT;
  1315. lp->rcr_cur_mode = RCR_DEFAULT;
  1316. lp->rpc_cur_mode = RPC_DEFAULT;
  1317. /*
  1318. * If we are not using a MII interface, we need to
  1319. * monitor our own carrier signal to detect faults.
  1320. */
  1321. if (lp->phy_type == 0)
  1322. lp->tcr_cur_mode |= TCR_MON_CSN;
  1323. /* reset the hardware */
  1324. smc_reset(dev);
  1325. smc_enable(dev);
  1326. /* Configure the PHY, initialize the link state */
  1327. if (lp->phy_type != 0)
  1328. smc_phy_configure(dev);
  1329. else {
  1330. spin_lock_irq(&lp->lock);
  1331. smc_10bt_check_media(dev, 1);
  1332. spin_unlock_irq(&lp->lock);
  1333. }
  1334. netif_start_queue(dev);
  1335. return 0;
  1336. }
  1337. /*
  1338. * smc_close
  1339. *
  1340. * this makes the board clean up everything that it can
  1341. * and not talk to the outside world. Caused by
  1342. * an 'ifconfig ethX down'
  1343. */
  1344. static int smc_close(struct net_device *dev)
  1345. {
  1346. struct smc_local *lp = netdev_priv(dev);
  1347. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1348. netif_stop_queue(dev);
  1349. netif_carrier_off(dev);
  1350. /* clear everything */
  1351. smc_shutdown(dev);
  1352. smc_phy_powerdown(dev);
  1353. if (lp->pending_tx_skb) {
  1354. dev_kfree_skb(lp->pending_tx_skb);
  1355. lp->pending_tx_skb = NULL;
  1356. }
  1357. return 0;
  1358. }
  1359. /*
  1360. * Get the current statistics.
  1361. * This may be called with the card open or closed.
  1362. */
  1363. static struct net_device_stats *smc_query_statistics(struct net_device *dev)
  1364. {
  1365. struct smc_local *lp = netdev_priv(dev);
  1366. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1367. return &lp->stats;
  1368. }
  1369. /*
  1370. * Ethtool support
  1371. */
  1372. static int
  1373. smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1374. {
  1375. struct smc_local *lp = netdev_priv(dev);
  1376. int ret;
  1377. cmd->maxtxpkt = 1;
  1378. cmd->maxrxpkt = 1;
  1379. if (lp->phy_type != 0) {
  1380. spin_lock_irq(&lp->lock);
  1381. ret = mii_ethtool_gset(&lp->mii, cmd);
  1382. spin_unlock_irq(&lp->lock);
  1383. } else {
  1384. cmd->supported = SUPPORTED_10baseT_Half |
  1385. SUPPORTED_10baseT_Full |
  1386. SUPPORTED_TP | SUPPORTED_AUI;
  1387. if (lp->ctl_rspeed == 10)
  1388. cmd->speed = SPEED_10;
  1389. else if (lp->ctl_rspeed == 100)
  1390. cmd->speed = SPEED_100;
  1391. cmd->autoneg = AUTONEG_DISABLE;
  1392. cmd->transceiver = XCVR_INTERNAL;
  1393. cmd->port = 0;
  1394. cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
  1395. ret = 0;
  1396. }
  1397. return ret;
  1398. }
  1399. static int
  1400. smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1401. {
  1402. struct smc_local *lp = netdev_priv(dev);
  1403. int ret;
  1404. if (lp->phy_type != 0) {
  1405. spin_lock_irq(&lp->lock);
  1406. ret = mii_ethtool_sset(&lp->mii, cmd);
  1407. spin_unlock_irq(&lp->lock);
  1408. } else {
  1409. if (cmd->autoneg != AUTONEG_DISABLE ||
  1410. cmd->speed != SPEED_10 ||
  1411. (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
  1412. (cmd->port != PORT_TP && cmd->port != PORT_AUI))
  1413. return -EINVAL;
  1414. // lp->port = cmd->port;
  1415. lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
  1416. // if (netif_running(dev))
  1417. // smc_set_port(dev);
  1418. ret = 0;
  1419. }
  1420. return ret;
  1421. }
  1422. static void
  1423. smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1424. {
  1425. strncpy(info->driver, CARDNAME, sizeof(info->driver));
  1426. strncpy(info->version, version, sizeof(info->version));
  1427. strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
  1428. }
  1429. static int smc_ethtool_nwayreset(struct net_device *dev)
  1430. {
  1431. struct smc_local *lp = netdev_priv(dev);
  1432. int ret = -EINVAL;
  1433. if (lp->phy_type != 0) {
  1434. spin_lock_irq(&lp->lock);
  1435. ret = mii_nway_restart(&lp->mii);
  1436. spin_unlock_irq(&lp->lock);
  1437. }
  1438. return ret;
  1439. }
  1440. static u32 smc_ethtool_getmsglevel(struct net_device *dev)
  1441. {
  1442. struct smc_local *lp = netdev_priv(dev);
  1443. return lp->msg_enable;
  1444. }
  1445. static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1446. {
  1447. struct smc_local *lp = netdev_priv(dev);
  1448. lp->msg_enable = level;
  1449. }
  1450. static struct ethtool_ops smc_ethtool_ops = {
  1451. .get_settings = smc_ethtool_getsettings,
  1452. .set_settings = smc_ethtool_setsettings,
  1453. .get_drvinfo = smc_ethtool_getdrvinfo,
  1454. .get_msglevel = smc_ethtool_getmsglevel,
  1455. .set_msglevel = smc_ethtool_setmsglevel,
  1456. .nway_reset = smc_ethtool_nwayreset,
  1457. .get_link = ethtool_op_get_link,
  1458. // .get_eeprom = smc_ethtool_geteeprom,
  1459. // .set_eeprom = smc_ethtool_seteeprom,
  1460. };
  1461. /*
  1462. * smc_findirq
  1463. *
  1464. * This routine has a simple purpose -- make the SMC chip generate an
  1465. * interrupt, so an auto-detect routine can detect it, and find the IRQ,
  1466. */
  1467. /*
  1468. * does this still work?
  1469. *
  1470. * I just deleted auto_irq.c, since it was never built...
  1471. * --jgarzik
  1472. */
  1473. static int __init smc_findirq(void __iomem *ioaddr)
  1474. {
  1475. int timeout = 20;
  1476. unsigned long cookie;
  1477. DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
  1478. cookie = probe_irq_on();
  1479. /*
  1480. * What I try to do here is trigger an ALLOC_INT. This is done
  1481. * by allocating a small chunk of memory, which will give an interrupt
  1482. * when done.
  1483. */
  1484. /* enable ALLOCation interrupts ONLY */
  1485. SMC_SELECT_BANK(2);
  1486. SMC_SET_INT_MASK(IM_ALLOC_INT);
  1487. /*
  1488. * Allocate 512 bytes of memory. Note that the chip was just
  1489. * reset so all the memory is available
  1490. */
  1491. SMC_SET_MMU_CMD(MC_ALLOC | 1);
  1492. /*
  1493. * Wait until positive that the interrupt has been generated
  1494. */
  1495. do {
  1496. int int_status;
  1497. udelay(10);
  1498. int_status = SMC_GET_INT();
  1499. if (int_status & IM_ALLOC_INT)
  1500. break; /* got the interrupt */
  1501. } while (--timeout);
  1502. /*
  1503. * there is really nothing that I can do here if timeout fails,
  1504. * as autoirq_report will return a 0 anyway, which is what I
  1505. * want in this case. Plus, the clean up is needed in both
  1506. * cases.
  1507. */
  1508. /* and disable all interrupts again */
  1509. SMC_SET_INT_MASK(0);
  1510. /* and return what I found */
  1511. return probe_irq_off(cookie);
  1512. }
  1513. /*
  1514. * Function: smc_probe(unsigned long ioaddr)
  1515. *
  1516. * Purpose:
  1517. * Tests to see if a given ioaddr points to an SMC91x chip.
  1518. * Returns a 0 on success
  1519. *
  1520. * Algorithm:
  1521. * (1) see if the high byte of BANK_SELECT is 0x33
  1522. * (2) compare the ioaddr with the base register's address
  1523. * (3) see if I recognize the chip ID in the appropriate register
  1524. *
  1525. * Here I do typical initialization tasks.
  1526. *
  1527. * o Initialize the structure if needed
  1528. * o print out my vanity message if not done so already
  1529. * o print out what type of hardware is detected
  1530. * o print out the ethernet address
  1531. * o find the IRQ
  1532. * o set up my private data
  1533. * o configure the dev structure with my subroutines
  1534. * o actually GRAB the irq.
  1535. * o GRAB the region
  1536. */
  1537. static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr)
  1538. {
  1539. struct smc_local *lp = netdev_priv(dev);
  1540. static int version_printed = 0;
  1541. int i, retval;
  1542. unsigned int val, revision_register;
  1543. const char *version_string;
  1544. DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
  1545. /* First, see if the high byte is 0x33 */
  1546. val = SMC_CURRENT_BANK();
  1547. DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
  1548. if ((val & 0xFF00) != 0x3300) {
  1549. if ((val & 0xFF) == 0x33) {
  1550. printk(KERN_WARNING
  1551. "%s: Detected possible byte-swapped interface"
  1552. " at IOADDR %p\n", CARDNAME, ioaddr);
  1553. }
  1554. retval = -ENODEV;
  1555. goto err_out;
  1556. }
  1557. /*
  1558. * The above MIGHT indicate a device, but I need to write to
  1559. * further test this.
  1560. */
  1561. SMC_SELECT_BANK(0);
  1562. val = SMC_CURRENT_BANK();
  1563. if ((val & 0xFF00) != 0x3300) {
  1564. retval = -ENODEV;
  1565. goto err_out;
  1566. }
  1567. /*
  1568. * well, we've already written once, so hopefully another
  1569. * time won't hurt. This time, I need to switch the bank
  1570. * register to bank 1, so I can access the base address
  1571. * register
  1572. */
  1573. SMC_SELECT_BANK(1);
  1574. val = SMC_GET_BASE();
  1575. val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
  1576. if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
  1577. printk("%s: IOADDR %p doesn't match configuration (%x).\n",
  1578. CARDNAME, ioaddr, val);
  1579. }
  1580. /*
  1581. * check if the revision register is something that I
  1582. * recognize. These might need to be added to later,
  1583. * as future revisions could be added.
  1584. */
  1585. SMC_SELECT_BANK(3);
  1586. revision_register = SMC_GET_REV();
  1587. DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
  1588. version_string = chip_ids[ (revision_register >> 4) & 0xF];
  1589. if (!version_string || (revision_register & 0xff00) != 0x3300) {
  1590. /* I don't recognize this chip, so... */
  1591. printk("%s: IO %p: Unrecognized revision register 0x%04x"
  1592. ", Contact author.\n", CARDNAME,
  1593. ioaddr, revision_register);
  1594. retval = -ENODEV;
  1595. goto err_out;
  1596. }
  1597. /* At this point I'll assume that the chip is an SMC91x. */
  1598. if (version_printed++ == 0)
  1599. printk("%s", version);
  1600. /* fill in some of the fields */
  1601. dev->base_addr = (unsigned long)ioaddr;
  1602. lp->base = ioaddr;
  1603. lp->version = revision_register & 0xff;
  1604. spin_lock_init(&lp->lock);
  1605. /* Get the MAC address */
  1606. SMC_SELECT_BANK(1);
  1607. SMC_GET_MAC_ADDR(dev->dev_addr);
  1608. /* now, reset the chip, and put it into a known state */
  1609. smc_reset(dev);
  1610. /*
  1611. * If dev->irq is 0, then the device has to be banged on to see
  1612. * what the IRQ is.
  1613. *
  1614. * This banging doesn't always detect the IRQ, for unknown reasons.
  1615. * a workaround is to reset the chip and try again.
  1616. *
  1617. * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
  1618. * be what is requested on the command line. I don't do that, mostly
  1619. * because the card that I have uses a non-standard method of accessing
  1620. * the IRQs, and because this _should_ work in most configurations.
  1621. *
  1622. * Specifying an IRQ is done with the assumption that the user knows
  1623. * what (s)he is doing. No checking is done!!!!
  1624. */
  1625. if (dev->irq < 1) {
  1626. int trials;
  1627. trials = 3;
  1628. while (trials--) {
  1629. dev->irq = smc_findirq(ioaddr);
  1630. if (dev->irq)
  1631. break;
  1632. /* kick the card and try again */
  1633. smc_reset(dev);
  1634. }
  1635. }
  1636. if (dev->irq == 0) {
  1637. printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
  1638. dev->name);
  1639. retval = -ENODEV;
  1640. goto err_out;
  1641. }
  1642. dev->irq = irq_canonicalize(dev->irq);
  1643. /* Fill in the fields of the device structure with ethernet values. */
  1644. ether_setup(dev);
  1645. dev->open = smc_open;
  1646. dev->stop = smc_close;
  1647. dev->hard_start_xmit = smc_hard_start_xmit;
  1648. dev->tx_timeout = smc_timeout;
  1649. dev->watchdog_timeo = msecs_to_jiffies(watchdog);
  1650. dev->get_stats = smc_query_statistics;
  1651. dev->set_multicast_list = smc_set_multicast_list;
  1652. dev->ethtool_ops = &smc_ethtool_ops;
  1653. #ifdef CONFIG_NET_POLL_CONTROLLER
  1654. dev->poll_controller = smc_poll_controller;
  1655. #endif
  1656. tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
  1657. INIT_WORK(&lp->phy_configure, smc_phy_configure, dev);
  1658. lp->mii.phy_id_mask = 0x1f;
  1659. lp->mii.reg_num_mask = 0x1f;
  1660. lp->mii.force_media = 0;
  1661. lp->mii.full_duplex = 0;
  1662. lp->mii.dev = dev;
  1663. lp->mii.mdio_read = smc_phy_read;
  1664. lp->mii.mdio_write = smc_phy_write;
  1665. /*
  1666. * Locate the phy, if any.
  1667. */
  1668. if (lp->version >= (CHIP_91100 << 4))
  1669. smc_phy_detect(dev);
  1670. /* Set default parameters */
  1671. lp->msg_enable = NETIF_MSG_LINK;
  1672. lp->ctl_rfduplx = 0;
  1673. lp->ctl_rspeed = 10;
  1674. if (lp->version >= (CHIP_91100 << 4)) {
  1675. lp->ctl_rfduplx = 1;
  1676. lp->ctl_rspeed = 100;
  1677. }
  1678. /* Grab the IRQ */
  1679. retval = request_irq(dev->irq, &smc_interrupt, 0, dev->name, dev);
  1680. if (retval)
  1681. goto err_out;
  1682. set_irq_type(dev->irq, IRQT_RISING);
  1683. #ifdef SMC_USE_PXA_DMA
  1684. {
  1685. int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
  1686. smc_pxa_dma_irq, NULL);
  1687. if (dma >= 0)
  1688. dev->dma = dma;
  1689. }
  1690. #endif
  1691. retval = register_netdev(dev);
  1692. if (retval == 0) {
  1693. /* now, print out the card info, in a short format.. */
  1694. printk("%s: %s (rev %d) at %p IRQ %d",
  1695. dev->name, version_string, revision_register & 0x0f,
  1696. lp->base, dev->irq);
  1697. if (dev->dma != (unsigned char)-1)
  1698. printk(" DMA %d", dev->dma);
  1699. printk("%s%s\n", nowait ? " [nowait]" : "",
  1700. THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
  1701. if (!is_valid_ether_addr(dev->dev_addr)) {
  1702. printk("%s: Invalid ethernet MAC address. Please "
  1703. "set using ifconfig\n", dev->name);
  1704. } else {
  1705. /* Print the Ethernet address */
  1706. printk("%s: Ethernet addr: ", dev->name);
  1707. for (i = 0; i < 5; i++)
  1708. printk("%2.2x:", dev->dev_addr[i]);
  1709. printk("%2.2x\n", dev->dev_addr[5]);
  1710. }
  1711. if (lp->phy_type == 0) {
  1712. PRINTK("%s: No PHY found\n", dev->name);
  1713. } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
  1714. PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
  1715. } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
  1716. PRINTK("%s: PHY LAN83C180\n", dev->name);
  1717. }
  1718. }
  1719. err_out:
  1720. #ifdef SMC_USE_PXA_DMA
  1721. if (retval && dev->dma != (unsigned char)-1)
  1722. pxa_free_dma(dev->dma);
  1723. #endif
  1724. return retval;
  1725. }
  1726. static int smc_enable_device(struct platform_device *pdev)
  1727. {
  1728. unsigned long flags;
  1729. unsigned char ecor, ecsr;
  1730. void __iomem *addr;
  1731. struct resource * res;
  1732. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
  1733. if (!res)
  1734. return 0;
  1735. /*
  1736. * Map the attribute space. This is overkill, but clean.
  1737. */
  1738. addr = ioremap(res->start, ATTRIB_SIZE);
  1739. if (!addr)
  1740. return -ENOMEM;
  1741. /*
  1742. * Reset the device. We must disable IRQs around this
  1743. * since a reset causes the IRQ line become active.
  1744. */
  1745. local_irq_save(flags);
  1746. ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
  1747. writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
  1748. readb(addr + (ECOR << SMC_IO_SHIFT));
  1749. /*
  1750. * Wait 100us for the chip to reset.
  1751. */
  1752. udelay(100);
  1753. /*
  1754. * The device will ignore all writes to the enable bit while
  1755. * reset is asserted, even if the reset bit is cleared in the
  1756. * same write. Must clear reset first, then enable the device.
  1757. */
  1758. writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
  1759. writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
  1760. /*
  1761. * Set the appropriate byte/word mode.
  1762. */
  1763. ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
  1764. #ifndef SMC_CAN_USE_16BIT
  1765. ecsr |= ECSR_IOIS8;
  1766. #endif
  1767. writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
  1768. local_irq_restore(flags);
  1769. iounmap(addr);
  1770. /*
  1771. * Wait for the chip to wake up. We could poll the control
  1772. * register in the main register space, but that isn't mapped
  1773. * yet. We know this is going to take 750us.
  1774. */
  1775. msleep(1);
  1776. return 0;
  1777. }
  1778. static int smc_request_attrib(struct platform_device *pdev)
  1779. {
  1780. struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
  1781. if (!res)
  1782. return 0;
  1783. if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
  1784. return -EBUSY;
  1785. return 0;
  1786. }
  1787. static void smc_release_attrib(struct platform_device *pdev)
  1788. {
  1789. struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
  1790. if (res)
  1791. release_mem_region(res->start, ATTRIB_SIZE);
  1792. }
  1793. #ifdef SMC_CAN_USE_DATACS
  1794. static void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
  1795. {
  1796. struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
  1797. struct smc_local *lp = netdev_priv(ndev);
  1798. if (!res)
  1799. return;
  1800. if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
  1801. printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
  1802. return;
  1803. }
  1804. lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
  1805. }
  1806. static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
  1807. {
  1808. struct smc_local *lp = netdev_priv(ndev);
  1809. struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
  1810. if (lp->datacs)
  1811. iounmap(lp->datacs);
  1812. lp->datacs = NULL;
  1813. if (res)
  1814. release_mem_region(res->start, SMC_DATA_EXTENT);
  1815. }
  1816. #else
  1817. static void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev) {}
  1818. static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev) {}
  1819. #endif
  1820. /*
  1821. * smc_init(void)
  1822. * Input parameters:
  1823. * dev->base_addr == 0, try to find all possible locations
  1824. * dev->base_addr > 0x1ff, this is the address to check
  1825. * dev->base_addr == <anything else>, return failure code
  1826. *
  1827. * Output:
  1828. * 0 --> there is a device
  1829. * anything else, error
  1830. */
  1831. static int smc_drv_probe(struct device *dev)
  1832. {
  1833. struct platform_device *pdev = to_platform_device(dev);
  1834. struct net_device *ndev;
  1835. struct resource *res;
  1836. unsigned int __iomem *addr;
  1837. int ret;
  1838. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
  1839. if (!res)
  1840. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1841. if (!res) {
  1842. ret = -ENODEV;
  1843. goto out;
  1844. }
  1845. if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
  1846. ret = -EBUSY;
  1847. goto out;
  1848. }
  1849. ndev = alloc_etherdev(sizeof(struct smc_local));
  1850. if (!ndev) {
  1851. printk("%s: could not allocate device.\n", CARDNAME);
  1852. ret = -ENOMEM;
  1853. goto out_release_io;
  1854. }
  1855. SET_MODULE_OWNER(ndev);
  1856. SET_NETDEV_DEV(ndev, dev);
  1857. ndev->dma = (unsigned char)-1;
  1858. ndev->irq = platform_get_irq(pdev, 0);
  1859. ret = smc_request_attrib(pdev);
  1860. if (ret)
  1861. goto out_free_netdev;
  1862. #if defined(CONFIG_SA1100_ASSABET)
  1863. NCR_0 |= NCR_ENET_OSC_EN;
  1864. #endif
  1865. ret = smc_enable_device(pdev);
  1866. if (ret)
  1867. goto out_release_attrib;
  1868. addr = ioremap(res->start, SMC_IO_EXTENT);
  1869. if (!addr) {
  1870. ret = -ENOMEM;
  1871. goto out_release_attrib;
  1872. }
  1873. dev_set_drvdata(dev, ndev);
  1874. ret = smc_probe(ndev, addr);
  1875. if (ret != 0)
  1876. goto out_iounmap;
  1877. #ifdef SMC_USE_PXA_DMA
  1878. else {
  1879. struct smc_local *lp = netdev_priv(ndev);
  1880. lp->physaddr = res->start;
  1881. }
  1882. #endif
  1883. smc_request_datacs(pdev, ndev);
  1884. return 0;
  1885. out_iounmap:
  1886. dev_set_drvdata(dev, NULL);
  1887. iounmap(addr);
  1888. out_release_attrib:
  1889. smc_release_attrib(pdev);
  1890. out_free_netdev:
  1891. free_netdev(ndev);
  1892. out_release_io:
  1893. release_mem_region(res->start, SMC_IO_EXTENT);
  1894. out:
  1895. printk("%s: not found (%d).\n", CARDNAME, ret);
  1896. return ret;
  1897. }
  1898. static int smc_drv_remove(struct device *dev)
  1899. {
  1900. struct platform_device *pdev = to_platform_device(dev);
  1901. struct net_device *ndev = dev_get_drvdata(dev);
  1902. struct smc_local *lp = netdev_priv(ndev);
  1903. struct resource *res;
  1904. dev_set_drvdata(dev, NULL);
  1905. unregister_netdev(ndev);
  1906. free_irq(ndev->irq, ndev);
  1907. #ifdef SMC_USE_PXA_DMA
  1908. if (ndev->dma != (unsigned char)-1)
  1909. pxa_free_dma(ndev->dma);
  1910. #endif
  1911. iounmap(lp->base);
  1912. smc_release_datacs(pdev,ndev);
  1913. smc_release_attrib(pdev);
  1914. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
  1915. if (!res)
  1916. platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1917. release_mem_region(res->start, SMC_IO_EXTENT);
  1918. free_netdev(ndev);
  1919. return 0;
  1920. }
  1921. static int smc_drv_suspend(struct device *dev, pm_message_t state, u32 level)
  1922. {
  1923. struct net_device *ndev = dev_get_drvdata(dev);
  1924. if (ndev && level == SUSPEND_DISABLE) {
  1925. if (netif_running(ndev)) {
  1926. netif_device_detach(ndev);
  1927. smc_shutdown(ndev);
  1928. smc_phy_powerdown(ndev);
  1929. }
  1930. }
  1931. return 0;
  1932. }
  1933. static int smc_drv_resume(struct device *dev, u32 level)
  1934. {
  1935. struct platform_device *pdev = to_platform_device(dev);
  1936. struct net_device *ndev = dev_get_drvdata(dev);
  1937. if (ndev && level == RESUME_ENABLE) {
  1938. struct smc_local *lp = netdev_priv(ndev);
  1939. smc_enable_device(pdev);
  1940. if (netif_running(ndev)) {
  1941. smc_reset(ndev);
  1942. smc_enable(ndev);
  1943. if (lp->phy_type != 0)
  1944. smc_phy_configure(ndev);
  1945. netif_device_attach(ndev);
  1946. }
  1947. }
  1948. return 0;
  1949. }
  1950. static struct device_driver smc_driver = {
  1951. .name = CARDNAME,
  1952. .bus = &platform_bus_type,
  1953. .probe = smc_drv_probe,
  1954. .remove = smc_drv_remove,
  1955. .suspend = smc_drv_suspend,
  1956. .resume = smc_drv_resume,
  1957. };
  1958. static int __init smc_init(void)
  1959. {
  1960. #ifdef MODULE
  1961. #ifdef CONFIG_ISA
  1962. if (io == -1)
  1963. printk(KERN_WARNING
  1964. "%s: You shouldn't use auto-probing with insmod!\n",
  1965. CARDNAME);
  1966. #endif
  1967. #endif
  1968. return driver_register(&smc_driver);
  1969. }
  1970. static void __exit smc_cleanup(void)
  1971. {
  1972. driver_unregister(&smc_driver);
  1973. }
  1974. module_init(smc_init);
  1975. module_exit(smc_cleanup);