mpi_ioc.h 43 KB

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  1. /*
  2. * Copyright (c) 2000-2005 LSI Logic Corporation.
  3. *
  4. *
  5. * Name: mpi_ioc.h
  6. * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
  7. * Creation Date: August 11, 2000
  8. *
  9. * mpi_ioc.h Version: 01.05.08
  10. *
  11. * Version History
  12. * ---------------
  13. *
  14. * Date Version Description
  15. * -------- -------- ------------------------------------------------------
  16. * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
  17. * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure.
  18. * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
  19. * 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure.
  20. * Added _MSG_EVENT_ACK_REPLY structure.
  21. * Added _MSG_FW_DOWNLOAD_REPLY structure.
  22. * Added _MSG_TOOLBOX_REPLY structure.
  23. * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure.
  24. * 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI,
  25. * _LINK_STATUS, _LOOP_STATE and _LOGOUT.
  26. * 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in
  27. * _MSG_EVENT_ACK_REPLY structure to match specification.
  28. * 11-02-00 01.01.01 Original release for post 1.0 work.
  29. * Added a value for Manufacturer to WhoInit.
  30. * 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and
  31. * removed toolbox message.
  32. * 01-09-01 01.01.03 Added event enabled and disabled defines.
  33. * Added structures for FwHeader and DataHeader.
  34. * Added ImageType to FwUpload reply.
  35. * 02-20-01 01.01.04 Started using MPI_POINTER.
  36. * 02-27-01 01.01.05 Added event for RAID status change and its event data.
  37. * Added IocNumber field to MSG_IOC_FACTS_REPLY.
  38. * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER.
  39. * Added structure offset comments.
  40. * 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE.
  41. * 08-08-01 01.02.01 Original release for v1.2 work.
  42. * New format for FWVersion and ProductId in
  43. * MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
  44. * 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
  45. * related structure and defines.
  46. * Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
  47. * Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
  48. * Replaced a reserved field in MSG_IOC_FACTS_REPLY with
  49. * IOCExceptions and changed DataImageSize to reserved.
  50. * Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
  51. * MPI_FW_UPLOAD_ITYPE_NVDATA.
  52. * 09-28-01 01.02.03 Modified Event Data for Integrated RAID.
  53. * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
  54. * 03-14-02 01.02.05 Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
  55. * 05-31-02 01.02.06 Added define for
  56. * MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
  57. * Added AliasIndex to EVENT_DATA_LOGOUT structure.
  58. * 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_.
  59. * 06-26-03 01.02.08 Added new values to the product family defines.
  60. * 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
  61. * added related defines.
  62. * 05-11-04 01.03.01 Original release for MPI v1.3.
  63. * 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT.
  64. * Added three new fields to MSG_IOC_FACTS_REPLY.
  65. * Defined four new bits for the IOCCapabilities field of
  66. * the IOCFacts reply.
  67. * Added two new PortTypes for the PortFacts reply.
  68. * Added six new events along with their EventData
  69. * structures.
  70. * Added a new MsgFlag to the FwDownload request to
  71. * indicate last segment.
  72. * Defined a new image type of boot loader.
  73. * Added FW family codes for SAS product families.
  74. * 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to
  75. * MSG_IOC_FACTS_REPLY.
  76. * 12-07-04 01.05.03 Added more defines for SAS Discovery Error event.
  77. * 12-09-04 01.05.04 Added Unsupported device to SAS Device event.
  78. * 01-15-05 01.05.05 Added event data for SAS SES Event.
  79. * 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
  80. * 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts
  81. * Reply and IOC Init Request.
  82. * 03-11-05 01.05.08 Added family code for 1068E family.
  83. * Removed IOCFacts Reply EEDP Capability bit.
  84. * --------------------------------------------------------------------------
  85. */
  86. #ifndef MPI_IOC_H
  87. #define MPI_IOC_H
  88. /*****************************************************************************
  89. *
  90. * I O C M e s s a g e s
  91. *
  92. *****************************************************************************/
  93. /****************************************************************************/
  94. /* IOCInit message */
  95. /****************************************************************************/
  96. typedef struct _MSG_IOC_INIT
  97. {
  98. U8 WhoInit; /* 00h */
  99. U8 Reserved; /* 01h */
  100. U8 ChainOffset; /* 02h */
  101. U8 Function; /* 03h */
  102. U8 Flags; /* 04h */
  103. U8 MaxDevices; /* 05h */
  104. U8 MaxBuses; /* 06h */
  105. U8 MsgFlags; /* 07h */
  106. U32 MsgContext; /* 08h */
  107. U16 ReplyFrameSize; /* 0Ch */
  108. U8 Reserved1[2]; /* 0Eh */
  109. U32 HostMfaHighAddr; /* 10h */
  110. U32 SenseBufferHighAddr; /* 14h */
  111. U32 ReplyFifoHostSignalingAddr; /* 18h */
  112. SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */
  113. U16 MsgVersion; /* 28h */
  114. U16 HeaderVersion; /* 2Ah */
  115. } MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
  116. IOCInit_t, MPI_POINTER pIOCInit_t;
  117. /* WhoInit values */
  118. #define MPI_WHOINIT_NO_ONE (0x00)
  119. #define MPI_WHOINIT_SYSTEM_BIOS (0x01)
  120. #define MPI_WHOINIT_ROM_BIOS (0x02)
  121. #define MPI_WHOINIT_PCI_PEER (0x03)
  122. #define MPI_WHOINIT_HOST_DRIVER (0x04)
  123. #define MPI_WHOINIT_MANUFACTURER (0x05)
  124. /* Flags values */
  125. #define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
  126. #define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
  127. #define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
  128. /* MsgVersion */
  129. #define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
  130. #define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
  131. #define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
  132. #define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
  133. /* HeaderVersion */
  134. #define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00)
  135. #define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8)
  136. #define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF)
  137. #define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0)
  138. typedef struct _MSG_IOC_INIT_REPLY
  139. {
  140. U8 WhoInit; /* 00h */
  141. U8 Reserved; /* 01h */
  142. U8 MsgLength; /* 02h */
  143. U8 Function; /* 03h */
  144. U8 Flags; /* 04h */
  145. U8 MaxDevices; /* 05h */
  146. U8 MaxBuses; /* 06h */
  147. U8 MsgFlags; /* 07h */
  148. U32 MsgContext; /* 08h */
  149. U16 Reserved2; /* 0Ch */
  150. U16 IOCStatus; /* 0Eh */
  151. U32 IOCLogInfo; /* 10h */
  152. } MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
  153. IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
  154. /****************************************************************************/
  155. /* IOC Facts message */
  156. /****************************************************************************/
  157. typedef struct _MSG_IOC_FACTS
  158. {
  159. U8 Reserved[2]; /* 00h */
  160. U8 ChainOffset; /* 01h */
  161. U8 Function; /* 02h */
  162. U8 Reserved1[3]; /* 03h */
  163. U8 MsgFlags; /* 04h */
  164. U32 MsgContext; /* 08h */
  165. } MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
  166. IOCFacts_t, MPI_POINTER pIOCFacts_t;
  167. typedef struct _MPI_FW_VERSION_STRUCT
  168. {
  169. U8 Dev; /* 00h */
  170. U8 Unit; /* 01h */
  171. U8 Minor; /* 02h */
  172. U8 Major; /* 03h */
  173. } MPI_FW_VERSION_STRUCT;
  174. typedef union _MPI_FW_VERSION
  175. {
  176. MPI_FW_VERSION_STRUCT Struct;
  177. U32 Word;
  178. } MPI_FW_VERSION;
  179. /* IOC Facts Reply */
  180. typedef struct _MSG_IOC_FACTS_REPLY
  181. {
  182. U16 MsgVersion; /* 00h */
  183. U8 MsgLength; /* 02h */
  184. U8 Function; /* 03h */
  185. U16 HeaderVersion; /* 04h */
  186. U8 IOCNumber; /* 06h */
  187. U8 MsgFlags; /* 07h */
  188. U32 MsgContext; /* 08h */
  189. U16 IOCExceptions; /* 0Ch */
  190. U16 IOCStatus; /* 0Eh */
  191. U32 IOCLogInfo; /* 10h */
  192. U8 MaxChainDepth; /* 14h */
  193. U8 WhoInit; /* 15h */
  194. U8 BlockSize; /* 16h */
  195. U8 Flags; /* 17h */
  196. U16 ReplyQueueDepth; /* 18h */
  197. U16 RequestFrameSize; /* 1Ah */
  198. U16 Reserved_0101_FWVersion; /* 1Ch */ /* obsolete 16-bit FWVersion */
  199. U16 ProductID; /* 1Eh */
  200. U32 CurrentHostMfaHighAddr; /* 20h */
  201. U16 GlobalCredits; /* 24h */
  202. U8 NumberOfPorts; /* 26h */
  203. U8 EventState; /* 27h */
  204. U32 CurrentSenseBufferHighAddr; /* 28h */
  205. U16 CurReplyFrameSize; /* 2Ch */
  206. U8 MaxDevices; /* 2Eh */
  207. U8 MaxBuses; /* 2Fh */
  208. U32 FWImageSize; /* 30h */
  209. U32 IOCCapabilities; /* 34h */
  210. MPI_FW_VERSION FWVersion; /* 38h */
  211. U16 HighPriorityQueueDepth; /* 3Ch */
  212. U16 Reserved2; /* 3Eh */
  213. SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */
  214. U32 ReplyFifoHostSignalingAddr; /* 4Ch */
  215. } MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
  216. IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
  217. #define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
  218. #define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
  219. #define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
  220. #define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
  221. #define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
  222. #define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
  223. #define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
  224. #define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
  225. #define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
  226. #define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
  227. #define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
  228. #define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
  229. #define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
  230. #define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
  231. #define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
  232. #define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
  233. #define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
  234. #define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
  235. #define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
  236. #define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
  237. #define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
  238. #define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
  239. #define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
  240. /*****************************************************************************
  241. *
  242. * P o r t M e s s a g e s
  243. *
  244. *****************************************************************************/
  245. /****************************************************************************/
  246. /* Port Facts message and Reply */
  247. /****************************************************************************/
  248. typedef struct _MSG_PORT_FACTS
  249. {
  250. U8 Reserved[2]; /* 00h */
  251. U8 ChainOffset; /* 02h */
  252. U8 Function; /* 03h */
  253. U8 Reserved1[2]; /* 04h */
  254. U8 PortNumber; /* 06h */
  255. U8 MsgFlags; /* 07h */
  256. U32 MsgContext; /* 08h */
  257. } MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
  258. PortFacts_t, MPI_POINTER pPortFacts_t;
  259. typedef struct _MSG_PORT_FACTS_REPLY
  260. {
  261. U16 Reserved; /* 00h */
  262. U8 MsgLength; /* 02h */
  263. U8 Function; /* 03h */
  264. U16 Reserved1; /* 04h */
  265. U8 PortNumber; /* 06h */
  266. U8 MsgFlags; /* 07h */
  267. U32 MsgContext; /* 08h */
  268. U16 Reserved2; /* 0Ch */
  269. U16 IOCStatus; /* 0Eh */
  270. U32 IOCLogInfo; /* 10h */
  271. U8 Reserved3; /* 14h */
  272. U8 PortType; /* 15h */
  273. U16 MaxDevices; /* 16h */
  274. U16 PortSCSIID; /* 18h */
  275. U16 ProtocolFlags; /* 1Ah */
  276. U16 MaxPostedCmdBuffers; /* 1Ch */
  277. U16 MaxPersistentIDs; /* 1Eh */
  278. U16 MaxLanBuckets; /* 20h */
  279. U16 Reserved4; /* 22h */
  280. U32 Reserved5; /* 24h */
  281. } MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
  282. PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
  283. /* PortTypes values */
  284. #define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00)
  285. #define MPI_PORTFACTS_PORTTYPE_SCSI (0x01)
  286. #define MPI_PORTFACTS_PORTTYPE_FC (0x10)
  287. #define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20)
  288. #define MPI_PORTFACTS_PORTTYPE_SAS (0x30)
  289. /* ProtocolFlags values */
  290. #define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01)
  291. #define MPI_PORTFACTS_PROTOCOL_LAN (0x02)
  292. #define MPI_PORTFACTS_PROTOCOL_TARGET (0x04)
  293. #define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08)
  294. /****************************************************************************/
  295. /* Port Enable Message */
  296. /****************************************************************************/
  297. typedef struct _MSG_PORT_ENABLE
  298. {
  299. U8 Reserved[2]; /* 00h */
  300. U8 ChainOffset; /* 02h */
  301. U8 Function; /* 03h */
  302. U8 Reserved1[2]; /* 04h */
  303. U8 PortNumber; /* 06h */
  304. U8 MsgFlags; /* 07h */
  305. U32 MsgContext; /* 08h */
  306. } MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
  307. PortEnable_t, MPI_POINTER pPortEnable_t;
  308. typedef struct _MSG_PORT_ENABLE_REPLY
  309. {
  310. U8 Reserved[2]; /* 00h */
  311. U8 MsgLength; /* 02h */
  312. U8 Function; /* 03h */
  313. U8 Reserved1[2]; /* 04h */
  314. U8 PortNumber; /* 05h */
  315. U8 MsgFlags; /* 07h */
  316. U32 MsgContext; /* 08h */
  317. U16 Reserved2; /* 0Ch */
  318. U16 IOCStatus; /* 0Eh */
  319. U32 IOCLogInfo; /* 10h */
  320. } MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
  321. PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
  322. /*****************************************************************************
  323. *
  324. * E v e n t M e s s a g e s
  325. *
  326. *****************************************************************************/
  327. /****************************************************************************/
  328. /* Event Notification messages */
  329. /****************************************************************************/
  330. typedef struct _MSG_EVENT_NOTIFY
  331. {
  332. U8 Switch; /* 00h */
  333. U8 Reserved; /* 01h */
  334. U8 ChainOffset; /* 02h */
  335. U8 Function; /* 03h */
  336. U8 Reserved1[3]; /* 04h */
  337. U8 MsgFlags; /* 07h */
  338. U32 MsgContext; /* 08h */
  339. } MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
  340. EventNotification_t, MPI_POINTER pEventNotification_t;
  341. /* Event Notification Reply */
  342. typedef struct _MSG_EVENT_NOTIFY_REPLY
  343. {
  344. U16 EventDataLength; /* 00h */
  345. U8 MsgLength; /* 02h */
  346. U8 Function; /* 03h */
  347. U8 Reserved1[2]; /* 04h */
  348. U8 AckRequired; /* 06h */
  349. U8 MsgFlags; /* 07h */
  350. U32 MsgContext; /* 08h */
  351. U8 Reserved2[2]; /* 0Ch */
  352. U16 IOCStatus; /* 0Eh */
  353. U32 IOCLogInfo; /* 10h */
  354. U32 Event; /* 14h */
  355. U32 EventContext; /* 18h */
  356. U32 Data[1]; /* 1Ch */
  357. } MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
  358. EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
  359. /* Event Acknowledge */
  360. typedef struct _MSG_EVENT_ACK
  361. {
  362. U8 Reserved[2]; /* 00h */
  363. U8 ChainOffset; /* 02h */
  364. U8 Function; /* 03h */
  365. U8 Reserved1[3]; /* 04h */
  366. U8 MsgFlags; /* 07h */
  367. U32 MsgContext; /* 08h */
  368. U32 Event; /* 0Ch */
  369. U32 EventContext; /* 10h */
  370. } MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
  371. EventAck_t, MPI_POINTER pEventAck_t;
  372. typedef struct _MSG_EVENT_ACK_REPLY
  373. {
  374. U8 Reserved[2]; /* 00h */
  375. U8 MsgLength; /* 02h */
  376. U8 Function; /* 03h */
  377. U8 Reserved1[3]; /* 04h */
  378. U8 MsgFlags; /* 07h */
  379. U32 MsgContext; /* 08h */
  380. U16 Reserved2; /* 0Ch */
  381. U16 IOCStatus; /* 0Eh */
  382. U32 IOCLogInfo; /* 10h */
  383. } MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
  384. EventAckReply_t, MPI_POINTER pEventAckReply_t;
  385. /* Switch */
  386. #define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00)
  387. #define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01)
  388. /* Event */
  389. #define MPI_EVENT_NONE (0x00000000)
  390. #define MPI_EVENT_LOG_DATA (0x00000001)
  391. #define MPI_EVENT_STATE_CHANGE (0x00000002)
  392. #define MPI_EVENT_UNIT_ATTENTION (0x00000003)
  393. #define MPI_EVENT_IOC_BUS_RESET (0x00000004)
  394. #define MPI_EVENT_EXT_BUS_RESET (0x00000005)
  395. #define MPI_EVENT_RESCAN (0x00000006)
  396. #define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007)
  397. #define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008)
  398. #define MPI_EVENT_LOGOUT (0x00000009)
  399. #define MPI_EVENT_EVENT_CHANGE (0x0000000A)
  400. #define MPI_EVENT_INTEGRATED_RAID (0x0000000B)
  401. #define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
  402. #define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D)
  403. #define MPI_EVENT_QUEUE_FULL (0x0000000E)
  404. #define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
  405. #define MPI_EVENT_SAS_SES (0x00000010)
  406. #define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
  407. #define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012)
  408. #define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013)
  409. /* AckRequired field values */
  410. #define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
  411. #define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
  412. /* EventChange Event data */
  413. typedef struct _EVENT_DATA_EVENT_CHANGE
  414. {
  415. U8 EventState; /* 00h */
  416. U8 Reserved; /* 01h */
  417. U16 Reserved1; /* 02h */
  418. } EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
  419. EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
  420. /* SCSI Event data for Port, Bus and Device forms */
  421. typedef struct _EVENT_DATA_SCSI
  422. {
  423. U8 TargetID; /* 00h */
  424. U8 BusPort; /* 01h */
  425. U16 Reserved; /* 02h */
  426. } EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
  427. EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
  428. /* SCSI Device Status Change Event data */
  429. typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
  430. {
  431. U8 TargetID; /* 00h */
  432. U8 Bus; /* 01h */
  433. U8 ReasonCode; /* 02h */
  434. U8 LUN; /* 03h */
  435. U8 ASC; /* 04h */
  436. U8 ASCQ; /* 05h */
  437. U16 Reserved; /* 06h */
  438. } EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
  439. MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
  440. MpiEventDataScsiDeviceStatusChange_t,
  441. MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
  442. /* MPI SCSI Device Status Change Event data ReasonCode values */
  443. #define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03)
  444. #define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04)
  445. #define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05)
  446. /* SAS Device Status Change Event data */
  447. typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
  448. {
  449. U8 TargetID; /* 00h */
  450. U8 Bus; /* 01h */
  451. U8 ReasonCode; /* 02h */
  452. U8 Reserved; /* 03h */
  453. U8 ASC; /* 04h */
  454. U8 ASCQ; /* 05h */
  455. U16 DevHandle; /* 06h */
  456. U32 DeviceInfo; /* 08h */
  457. U16 ParentDevHandle; /* 0Ch */
  458. U8 PhyNum; /* 0Eh */
  459. U8 Reserved1; /* 0Fh */
  460. U64 SASAddress; /* 10h */
  461. } EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
  462. MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
  463. MpiEventDataSasDeviceStatusChange_t,
  464. MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
  465. /* MPI SAS Device Status Change Event data ReasonCode values */
  466. #define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03)
  467. #define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04)
  468. #define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
  469. #define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06)
  470. #define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
  471. /* SCSI Event data for Queue Full event */
  472. typedef struct _EVENT_DATA_QUEUE_FULL
  473. {
  474. U8 TargetID; /* 00h */
  475. U8 Bus; /* 01h */
  476. U16 CurrentDepth; /* 02h */
  477. } EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
  478. EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
  479. /* MPI Integrated RAID Event data */
  480. typedef struct _EVENT_DATA_RAID
  481. {
  482. U8 VolumeID; /* 00h */
  483. U8 VolumeBus; /* 01h */
  484. U8 ReasonCode; /* 02h */
  485. U8 PhysDiskNum; /* 03h */
  486. U8 ASC; /* 04h */
  487. U8 ASCQ; /* 05h */
  488. U16 Reserved; /* 06h */
  489. U32 SettingsStatus; /* 08h */
  490. } EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
  491. MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
  492. /* MPI Integrated RAID Event data ReasonCode values */
  493. #define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
  494. #define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
  495. #define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
  496. #define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
  497. #define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
  498. #define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
  499. #define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
  500. #define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
  501. #define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
  502. #define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
  503. #define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
  504. #define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
  505. /* MPI Link Status Change Event data */
  506. typedef struct _EVENT_DATA_LINK_STATUS
  507. {
  508. U8 State; /* 00h */
  509. U8 Reserved; /* 01h */
  510. U16 Reserved1; /* 02h */
  511. U8 Reserved2; /* 04h */
  512. U8 Port; /* 05h */
  513. U16 Reserved3; /* 06h */
  514. } EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
  515. EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
  516. #define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000)
  517. #define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001)
  518. /* MPI Loop State Change Event data */
  519. typedef struct _EVENT_DATA_LOOP_STATE
  520. {
  521. U8 Character4; /* 00h */
  522. U8 Character3; /* 01h */
  523. U8 Type; /* 02h */
  524. U8 Reserved; /* 03h */
  525. U8 Reserved1; /* 04h */
  526. U8 Port; /* 05h */
  527. U16 Reserved2; /* 06h */
  528. } EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
  529. EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
  530. #define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001)
  531. #define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002)
  532. #define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003)
  533. /* MPI LOGOUT Event data */
  534. typedef struct _EVENT_DATA_LOGOUT
  535. {
  536. U32 NPortID; /* 00h */
  537. U8 AliasIndex; /* 04h */
  538. U8 Port; /* 05h */
  539. U16 Reserved1; /* 06h */
  540. } EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
  541. EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
  542. #define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF)
  543. /* SAS SES Event data */
  544. typedef struct _EVENT_DATA_SAS_SES
  545. {
  546. U8 PhyNum; /* 00h */
  547. U8 Port; /* 01h */
  548. U8 PortWidth; /* 02h */
  549. U8 Reserved1; /* 04h */
  550. } EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
  551. MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
  552. /* SAS Phy Link Status Event data */
  553. typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
  554. {
  555. U8 PhyNum; /* 00h */
  556. U8 LinkRates; /* 01h */
  557. U16 DevHandle; /* 02h */
  558. U64 SASAddress; /* 04h */
  559. } EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
  560. MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
  561. /* defines for the LinkRates field of the SAS PHY Link Status event */
  562. #define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0)
  563. #define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4)
  564. #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F)
  565. #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0)
  566. #define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00)
  567. #define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01)
  568. #define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02)
  569. #define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03)
  570. #define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08)
  571. #define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09)
  572. /* SAS Discovery Errror Event data */
  573. typedef struct _EVENT_DATA_DISCOVERY_ERROR
  574. {
  575. U32 DiscoveryStatus; /* 00h */
  576. U8 Port; /* 04h */
  577. U8 Reserved1; /* 05h */
  578. U16 Reserved2; /* 06h */
  579. } EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
  580. EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
  581. #define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001)
  582. #define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002)
  583. #define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004)
  584. #define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008)
  585. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010)
  586. #define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020)
  587. #define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040)
  588. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080)
  589. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100)
  590. #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200)
  591. #define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400)
  592. #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_PATHS (0x00000800)
  593. /*****************************************************************************
  594. *
  595. * F i r m w a r e L o a d M e s s a g e s
  596. *
  597. *****************************************************************************/
  598. /****************************************************************************/
  599. /* Firmware Download message and associated structures */
  600. /****************************************************************************/
  601. typedef struct _MSG_FW_DOWNLOAD
  602. {
  603. U8 ImageType; /* 00h */
  604. U8 Reserved; /* 01h */
  605. U8 ChainOffset; /* 02h */
  606. U8 Function; /* 03h */
  607. U8 Reserved1[3]; /* 04h */
  608. U8 MsgFlags; /* 07h */
  609. U32 MsgContext; /* 08h */
  610. SGE_MPI_UNION SGL; /* 0Ch */
  611. } MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
  612. FWDownload_t, MPI_POINTER pFWDownload_t;
  613. #define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
  614. #define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
  615. #define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
  616. #define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
  617. #define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
  618. #define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
  619. typedef struct _FWDownloadTCSGE
  620. {
  621. U8 Reserved; /* 00h */
  622. U8 ContextSize; /* 01h */
  623. U8 DetailsLength; /* 02h */
  624. U8 Flags; /* 03h */
  625. U32 Reserved_0100_Checksum; /* 04h */ /* obsolete Checksum */
  626. U32 ImageOffset; /* 08h */
  627. U32 ImageSize; /* 0Ch */
  628. } FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
  629. FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
  630. /* Firmware Download reply */
  631. typedef struct _MSG_FW_DOWNLOAD_REPLY
  632. {
  633. U8 ImageType; /* 00h */
  634. U8 Reserved; /* 01h */
  635. U8 MsgLength; /* 02h */
  636. U8 Function; /* 03h */
  637. U8 Reserved1[3]; /* 04h */
  638. U8 MsgFlags; /* 07h */
  639. U32 MsgContext; /* 08h */
  640. U16 Reserved2; /* 0Ch */
  641. U16 IOCStatus; /* 0Eh */
  642. U32 IOCLogInfo; /* 10h */
  643. } MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
  644. FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
  645. /****************************************************************************/
  646. /* Firmware Upload message and associated structures */
  647. /****************************************************************************/
  648. typedef struct _MSG_FW_UPLOAD
  649. {
  650. U8 ImageType; /* 00h */
  651. U8 Reserved; /* 01h */
  652. U8 ChainOffset; /* 02h */
  653. U8 Function; /* 03h */
  654. U8 Reserved1[3]; /* 04h */
  655. U8 MsgFlags; /* 07h */
  656. U32 MsgContext; /* 08h */
  657. SGE_MPI_UNION SGL; /* 0Ch */
  658. } MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
  659. FWUpload_t, MPI_POINTER pFWUpload_t;
  660. #define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00)
  661. #define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
  662. #define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
  663. #define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
  664. #define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04)
  665. #define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
  666. typedef struct _FWUploadTCSGE
  667. {
  668. U8 Reserved; /* 00h */
  669. U8 ContextSize; /* 01h */
  670. U8 DetailsLength; /* 02h */
  671. U8 Flags; /* 03h */
  672. U32 Reserved1; /* 04h */
  673. U32 ImageOffset; /* 08h */
  674. U32 ImageSize; /* 0Ch */
  675. } FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
  676. FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
  677. /* Firmware Upload reply */
  678. typedef struct _MSG_FW_UPLOAD_REPLY
  679. {
  680. U8 ImageType; /* 00h */
  681. U8 Reserved; /* 01h */
  682. U8 MsgLength; /* 02h */
  683. U8 Function; /* 03h */
  684. U8 Reserved1[3]; /* 04h */
  685. U8 MsgFlags; /* 07h */
  686. U32 MsgContext; /* 08h */
  687. U16 Reserved2; /* 0Ch */
  688. U16 IOCStatus; /* 0Eh */
  689. U32 IOCLogInfo; /* 10h */
  690. U32 ActualImageSize; /* 14h */
  691. } MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
  692. FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
  693. typedef struct _MPI_FW_HEADER
  694. {
  695. U32 ArmBranchInstruction0; /* 00h */
  696. U32 Signature0; /* 04h */
  697. U32 Signature1; /* 08h */
  698. U32 Signature2; /* 0Ch */
  699. U32 ArmBranchInstruction1; /* 10h */
  700. U32 ArmBranchInstruction2; /* 14h */
  701. U32 Reserved; /* 18h */
  702. U32 Checksum; /* 1Ch */
  703. U16 VendorId; /* 20h */
  704. U16 ProductId; /* 22h */
  705. MPI_FW_VERSION FWVersion; /* 24h */
  706. U32 SeqCodeVersion; /* 28h */
  707. U32 ImageSize; /* 2Ch */
  708. U32 NextImageHeaderOffset; /* 30h */
  709. U32 LoadStartAddress; /* 34h */
  710. U32 IopResetVectorValue; /* 38h */
  711. U32 IopResetRegAddr; /* 3Ch */
  712. U32 VersionNameWhat; /* 40h */
  713. U8 VersionName[32]; /* 44h */
  714. U32 VendorNameWhat; /* 64h */
  715. U8 VendorName[32]; /* 68h */
  716. } MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
  717. MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
  718. #define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840)
  719. /* defines for using the ProductId field */
  720. #define MPI_FW_HEADER_PID_TYPE_MASK (0xF000)
  721. #define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000)
  722. #define MPI_FW_HEADER_PID_TYPE_FC (0x1000)
  723. #define MPI_FW_HEADER_PID_TYPE_SAS (0x2000)
  724. #define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A)
  725. #define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5)
  726. #define MPI_FW_HEADER_SIGNATURE_2 (0x5AA55AEA)
  727. #define MPI_FW_HEADER_PID_PROD_MASK (0x0F00)
  728. #define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100)
  729. #define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
  730. #define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300)
  731. #define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400)
  732. #define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500)
  733. #define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600)
  734. #define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
  735. #define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF)
  736. /* SCSI */
  737. #define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001)
  738. #define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002)
  739. #define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003)
  740. #define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004)
  741. #define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005)
  742. #define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006)
  743. #define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007)
  744. #define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008)
  745. #define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009)
  746. #define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A)
  747. #define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B)
  748. #define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C)
  749. /* Fibre Channel */
  750. #define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000)
  751. #define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) /* 919 and 929 */
  752. #define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) /* 919X and 929X */
  753. #define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003) /* 919XL and 929XL */
  754. #define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004) /* 939X and 949X */
  755. #define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005)
  756. /* SAS */
  757. #define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001)
  758. #define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002)
  759. #define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003)
  760. #define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004) /* 1068E, 1066E, and 1064E */
  761. typedef struct _MPI_EXT_IMAGE_HEADER
  762. {
  763. U8 ImageType; /* 00h */
  764. U8 Reserved; /* 01h */
  765. U16 Reserved1; /* 02h */
  766. U32 Checksum; /* 04h */
  767. U32 ImageSize; /* 08h */
  768. U32 NextImageHeaderOffset; /* 0Ch */
  769. U32 LoadStartAddress; /* 10h */
  770. U32 Reserved2; /* 14h */
  771. } MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
  772. MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
  773. /* defines for the ImageType field */
  774. #define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
  775. #define MPI_EXT_IMAGE_TYPE_FW (0x01)
  776. #define MPI_EXT_IMAGE_TYPE_NVDATA (0x03)
  777. #define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
  778. #endif