iwl4965-base.c 253 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-core.h"
  45. #include "iwl-4965.h"
  46. #include "iwl-helpers.h"
  47. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  48. struct iwl4965_tx_queue *txq);
  49. /******************************************************************************
  50. *
  51. * module boiler plate
  52. *
  53. ******************************************************************************/
  54. /* module parameters */
  55. static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
  56. static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
  57. static int iwl4965_param_disable; /* def: enable radio */
  58. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  59. int iwl4965_param_hwcrypto; /* def: using software encryption */
  60. static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
  61. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
  62. int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
  63. /*
  64. * module name, copyright, version, etc.
  65. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  66. */
  67. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  68. #ifdef CONFIG_IWL4965_DEBUG
  69. #define VD "d"
  70. #else
  71. #define VD
  72. #endif
  73. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  74. #define VS "s"
  75. #else
  76. #define VS
  77. #endif
  78. #define DRV_VERSION IWLWIFI_VERSION VD VS
  79. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  80. MODULE_VERSION(DRV_VERSION);
  81. MODULE_AUTHOR(DRV_COPYRIGHT);
  82. MODULE_LICENSE("GPL");
  83. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  84. {
  85. u16 fc = le16_to_cpu(hdr->frame_control);
  86. int hdr_len = ieee80211_get_hdrlen(fc);
  87. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  88. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  89. return NULL;
  90. }
  91. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  92. struct iwl4965_priv *priv, enum ieee80211_band band)
  93. {
  94. return priv->hw->wiphy->bands[band];
  95. }
  96. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  97. {
  98. /* Single white space is for Linksys APs */
  99. if (essid_len == 1 && essid[0] == ' ')
  100. return 1;
  101. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  102. while (essid_len) {
  103. essid_len--;
  104. if (essid[essid_len] != '\0')
  105. return 0;
  106. }
  107. return 1;
  108. }
  109. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  110. {
  111. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  112. const char *s = essid;
  113. char *d = escaped;
  114. if (iwl4965_is_empty_essid(essid, essid_len)) {
  115. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  116. return escaped;
  117. }
  118. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  119. while (essid_len--) {
  120. if (*s == '\0') {
  121. *d++ = '\\';
  122. *d++ = '0';
  123. s++;
  124. } else
  125. *d++ = *s++;
  126. }
  127. *d = '\0';
  128. return escaped;
  129. }
  130. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  131. * DMA services
  132. *
  133. * Theory of operation
  134. *
  135. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  136. * of buffer descriptors, each of which points to one or more data buffers for
  137. * the device to read from or fill. Driver and device exchange status of each
  138. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  139. * entries in each circular buffer, to protect against confusing empty and full
  140. * queue states.
  141. *
  142. * The device reads or writes the data in the queues via the device's several
  143. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  144. *
  145. * For Tx queue, there are low mark and high mark limits. If, after queuing
  146. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  147. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  148. * Tx queue resumed.
  149. *
  150. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  151. * queue (#4) for sending commands to the device firmware, and 15 other
  152. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  153. *
  154. * See more detailed info in iwl-4965-hw.h.
  155. ***************************************************/
  156. int iwl4965_queue_space(const struct iwl4965_queue *q)
  157. {
  158. int s = q->read_ptr - q->write_ptr;
  159. if (q->read_ptr > q->write_ptr)
  160. s -= q->n_bd;
  161. if (s <= 0)
  162. s += q->n_window;
  163. /* keep some reserve to not confuse empty and full situations */
  164. s -= 2;
  165. if (s < 0)
  166. s = 0;
  167. return s;
  168. }
  169. /**
  170. * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
  171. * @index -- current index
  172. * @n_bd -- total number of entries in queue (must be power of 2)
  173. */
  174. static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
  175. {
  176. return ++index & (n_bd - 1);
  177. }
  178. /**
  179. * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
  180. * @index -- current index
  181. * @n_bd -- total number of entries in queue (must be power of 2)
  182. */
  183. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  184. {
  185. return --index & (n_bd - 1);
  186. }
  187. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  188. {
  189. return q->write_ptr > q->read_ptr ?
  190. (i >= q->read_ptr && i < q->write_ptr) :
  191. !(i < q->read_ptr && i >= q->write_ptr);
  192. }
  193. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  194. {
  195. /* This is for scan command, the big buffer at end of command array */
  196. if (is_huge)
  197. return q->n_window; /* must be power of 2 */
  198. /* Otherwise, use normal size buffers */
  199. return index & (q->n_window - 1);
  200. }
  201. /**
  202. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  203. */
  204. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  205. int count, int slots_num, u32 id)
  206. {
  207. q->n_bd = count;
  208. q->n_window = slots_num;
  209. q->id = id;
  210. /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
  211. * and iwl4965_queue_dec_wrap are broken. */
  212. BUG_ON(!is_power_of_2(count));
  213. /* slots_num must be power-of-two size, otherwise
  214. * get_cmd_index is broken. */
  215. BUG_ON(!is_power_of_2(slots_num));
  216. q->low_mark = q->n_window / 4;
  217. if (q->low_mark < 4)
  218. q->low_mark = 4;
  219. q->high_mark = q->n_window / 8;
  220. if (q->high_mark < 2)
  221. q->high_mark = 2;
  222. q->write_ptr = q->read_ptr = 0;
  223. return 0;
  224. }
  225. /**
  226. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  227. */
  228. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  229. struct iwl4965_tx_queue *txq, u32 id)
  230. {
  231. struct pci_dev *dev = priv->pci_dev;
  232. /* Driver private data, only for Tx (not command) queues,
  233. * not shared with device. */
  234. if (id != IWL_CMD_QUEUE_NUM) {
  235. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  236. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  237. if (!txq->txb) {
  238. IWL_ERROR("kmalloc for auxiliary BD "
  239. "structures failed\n");
  240. goto error;
  241. }
  242. } else
  243. txq->txb = NULL;
  244. /* Circular buffer of transmit frame descriptors (TFDs),
  245. * shared with device */
  246. txq->bd = pci_alloc_consistent(dev,
  247. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  248. &txq->q.dma_addr);
  249. if (!txq->bd) {
  250. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  251. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  252. goto error;
  253. }
  254. txq->q.id = id;
  255. return 0;
  256. error:
  257. if (txq->txb) {
  258. kfree(txq->txb);
  259. txq->txb = NULL;
  260. }
  261. return -ENOMEM;
  262. }
  263. /**
  264. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  265. */
  266. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  267. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  268. {
  269. struct pci_dev *dev = priv->pci_dev;
  270. int len;
  271. int rc = 0;
  272. /*
  273. * Alloc buffer array for commands (Tx or other types of commands).
  274. * For the command queue (#4), allocate command space + one big
  275. * command for scan, since scan command is very huge; the system will
  276. * not have two scans at the same time, so only one is needed.
  277. * For normal Tx queues (all other queues), no super-size command
  278. * space is needed.
  279. */
  280. len = sizeof(struct iwl4965_cmd) * slots_num;
  281. if (txq_id == IWL_CMD_QUEUE_NUM)
  282. len += IWL_MAX_SCAN_SIZE;
  283. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  284. if (!txq->cmd)
  285. return -ENOMEM;
  286. /* Alloc driver data array and TFD circular buffer */
  287. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  288. if (rc) {
  289. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  290. return -ENOMEM;
  291. }
  292. txq->need_update = 0;
  293. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  294. * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
  295. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  296. /* Initialize queue's high/low-water marks, and head/tail indexes */
  297. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  298. /* Tell device where to find queue */
  299. iwl4965_hw_tx_queue_init(priv, txq);
  300. return 0;
  301. }
  302. /**
  303. * iwl4965_tx_queue_free - Deallocate DMA queue.
  304. * @txq: Transmit queue to deallocate.
  305. *
  306. * Empty queue by removing and destroying all BD's.
  307. * Free all buffers.
  308. * 0-fill, but do not free "txq" descriptor structure.
  309. */
  310. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  311. {
  312. struct iwl4965_queue *q = &txq->q;
  313. struct pci_dev *dev = priv->pci_dev;
  314. int len;
  315. if (q->n_bd == 0)
  316. return;
  317. /* first, empty all BD's */
  318. for (; q->write_ptr != q->read_ptr;
  319. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
  320. iwl4965_hw_txq_free_tfd(priv, txq);
  321. len = sizeof(struct iwl4965_cmd) * q->n_window;
  322. if (q->id == IWL_CMD_QUEUE_NUM)
  323. len += IWL_MAX_SCAN_SIZE;
  324. /* De-alloc array of command/tx buffers */
  325. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  326. /* De-alloc circular buffer of TFDs */
  327. if (txq->q.n_bd)
  328. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  329. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  330. /* De-alloc array of per-TFD driver data */
  331. if (txq->txb) {
  332. kfree(txq->txb);
  333. txq->txb = NULL;
  334. }
  335. /* 0-fill queue descriptor structure */
  336. memset(txq, 0, sizeof(*txq));
  337. }
  338. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  339. /*************** STATION TABLE MANAGEMENT ****
  340. * mac80211 should be examined to determine if sta_info is duplicating
  341. * the functionality provided here
  342. */
  343. /**************************************************************/
  344. #if 0 /* temporary disable till we add real remove station */
  345. /**
  346. * iwl4965_remove_station - Remove driver's knowledge of station.
  347. *
  348. * NOTE: This does not remove station from device's station table.
  349. */
  350. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  351. {
  352. int index = IWL_INVALID_STATION;
  353. int i;
  354. unsigned long flags;
  355. spin_lock_irqsave(&priv->sta_lock, flags);
  356. if (is_ap)
  357. index = IWL_AP_ID;
  358. else if (is_broadcast_ether_addr(addr))
  359. index = priv->hw_setting.bcast_sta_id;
  360. else
  361. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  362. if (priv->stations[i].used &&
  363. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  364. addr)) {
  365. index = i;
  366. break;
  367. }
  368. if (unlikely(index == IWL_INVALID_STATION))
  369. goto out;
  370. if (priv->stations[index].used) {
  371. priv->stations[index].used = 0;
  372. priv->num_stations--;
  373. }
  374. BUG_ON(priv->num_stations < 0);
  375. out:
  376. spin_unlock_irqrestore(&priv->sta_lock, flags);
  377. return 0;
  378. }
  379. #endif
  380. /**
  381. * iwl4965_clear_stations_table - Clear the driver's station table
  382. *
  383. * NOTE: This does not clear or otherwise alter the device's station table.
  384. */
  385. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  386. {
  387. unsigned long flags;
  388. spin_lock_irqsave(&priv->sta_lock, flags);
  389. priv->num_stations = 0;
  390. memset(priv->stations, 0, sizeof(priv->stations));
  391. spin_unlock_irqrestore(&priv->sta_lock, flags);
  392. }
  393. /**
  394. * iwl4965_add_station_flags - Add station to tables in driver and device
  395. */
  396. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
  397. int is_ap, u8 flags, void *ht_data)
  398. {
  399. int i;
  400. int index = IWL_INVALID_STATION;
  401. struct iwl4965_station_entry *station;
  402. unsigned long flags_spin;
  403. DECLARE_MAC_BUF(mac);
  404. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  405. if (is_ap)
  406. index = IWL_AP_ID;
  407. else if (is_broadcast_ether_addr(addr))
  408. index = priv->hw_setting.bcast_sta_id;
  409. else
  410. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  411. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  412. addr)) {
  413. index = i;
  414. break;
  415. }
  416. if (!priv->stations[i].used &&
  417. index == IWL_INVALID_STATION)
  418. index = i;
  419. }
  420. /* These two conditions have the same outcome, but keep them separate
  421. since they have different meanings */
  422. if (unlikely(index == IWL_INVALID_STATION)) {
  423. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  424. return index;
  425. }
  426. if (priv->stations[index].used &&
  427. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  428. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  429. return index;
  430. }
  431. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  432. station = &priv->stations[index];
  433. station->used = 1;
  434. priv->num_stations++;
  435. /* Set up the REPLY_ADD_STA command to send to device */
  436. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  437. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  438. station->sta.mode = 0;
  439. station->sta.sta.sta_id = index;
  440. station->sta.station_flags = 0;
  441. #ifdef CONFIG_IWL4965_HT
  442. /* BCAST station and IBSS stations do not work in HT mode */
  443. if (index != priv->hw_setting.bcast_sta_id &&
  444. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  445. iwl4965_set_ht_add_station(priv, index,
  446. (struct ieee80211_ht_info *) ht_data);
  447. #endif /*CONFIG_IWL4965_HT*/
  448. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  449. /* Add station to device's station table */
  450. iwl4965_send_add_station(priv, &station->sta, flags);
  451. return index;
  452. }
  453. /*************** DRIVER STATUS FUNCTIONS *****/
  454. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  455. {
  456. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  457. * set but EXIT_PENDING is not */
  458. return test_bit(STATUS_READY, &priv->status) &&
  459. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  460. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  461. }
  462. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  463. {
  464. return test_bit(STATUS_ALIVE, &priv->status);
  465. }
  466. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  467. {
  468. return test_bit(STATUS_INIT, &priv->status);
  469. }
  470. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  471. {
  472. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  473. test_bit(STATUS_RF_KILL_SW, &priv->status);
  474. }
  475. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  476. {
  477. if (iwl4965_is_rfkill(priv))
  478. return 0;
  479. return iwl4965_is_ready(priv);
  480. }
  481. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  482. #define IWL_CMD(x) case x : return #x
  483. static const char *get_cmd_string(u8 cmd)
  484. {
  485. switch (cmd) {
  486. IWL_CMD(REPLY_ALIVE);
  487. IWL_CMD(REPLY_ERROR);
  488. IWL_CMD(REPLY_RXON);
  489. IWL_CMD(REPLY_RXON_ASSOC);
  490. IWL_CMD(REPLY_QOS_PARAM);
  491. IWL_CMD(REPLY_RXON_TIMING);
  492. IWL_CMD(REPLY_ADD_STA);
  493. IWL_CMD(REPLY_REMOVE_STA);
  494. IWL_CMD(REPLY_REMOVE_ALL_STA);
  495. IWL_CMD(REPLY_TX);
  496. IWL_CMD(REPLY_RATE_SCALE);
  497. IWL_CMD(REPLY_LEDS_CMD);
  498. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  499. IWL_CMD(RADAR_NOTIFICATION);
  500. IWL_CMD(REPLY_QUIET_CMD);
  501. IWL_CMD(REPLY_CHANNEL_SWITCH);
  502. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  503. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  504. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  505. IWL_CMD(POWER_TABLE_CMD);
  506. IWL_CMD(PM_SLEEP_NOTIFICATION);
  507. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  508. IWL_CMD(REPLY_SCAN_CMD);
  509. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  510. IWL_CMD(SCAN_START_NOTIFICATION);
  511. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  512. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  513. IWL_CMD(BEACON_NOTIFICATION);
  514. IWL_CMD(REPLY_TX_BEACON);
  515. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  516. IWL_CMD(QUIET_NOTIFICATION);
  517. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  518. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  519. IWL_CMD(REPLY_BT_CONFIG);
  520. IWL_CMD(REPLY_STATISTICS_CMD);
  521. IWL_CMD(STATISTICS_NOTIFICATION);
  522. IWL_CMD(REPLY_CARD_STATE_CMD);
  523. IWL_CMD(CARD_STATE_NOTIFICATION);
  524. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  525. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  526. IWL_CMD(SENSITIVITY_CMD);
  527. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  528. IWL_CMD(REPLY_RX_PHY_CMD);
  529. IWL_CMD(REPLY_RX_MPDU_CMD);
  530. IWL_CMD(REPLY_4965_RX);
  531. IWL_CMD(REPLY_COMPRESSED_BA);
  532. default:
  533. return "UNKNOWN";
  534. }
  535. }
  536. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  537. /**
  538. * iwl4965_enqueue_hcmd - enqueue a uCode command
  539. * @priv: device private data point
  540. * @cmd: a point to the ucode command structure
  541. *
  542. * The function returns < 0 values to indicate the operation is
  543. * failed. On success, it turns the index (> 0) of command in the
  544. * command queue.
  545. */
  546. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  547. {
  548. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  549. struct iwl4965_queue *q = &txq->q;
  550. struct iwl4965_tfd_frame *tfd;
  551. u32 *control_flags;
  552. struct iwl4965_cmd *out_cmd;
  553. u32 idx;
  554. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  555. dma_addr_t phys_addr;
  556. int ret;
  557. unsigned long flags;
  558. /* If any of the command structures end up being larger than
  559. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  560. * we will need to increase the size of the TFD entries */
  561. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  562. !(cmd->meta.flags & CMD_SIZE_HUGE));
  563. if (iwl4965_is_rfkill(priv)) {
  564. IWL_DEBUG_INFO("Not sending command - RF KILL");
  565. return -EIO;
  566. }
  567. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  568. IWL_ERROR("No space for Tx\n");
  569. return -ENOSPC;
  570. }
  571. spin_lock_irqsave(&priv->hcmd_lock, flags);
  572. tfd = &txq->bd[q->write_ptr];
  573. memset(tfd, 0, sizeof(*tfd));
  574. control_flags = (u32 *) tfd;
  575. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  576. out_cmd = &txq->cmd[idx];
  577. out_cmd->hdr.cmd = cmd->id;
  578. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  579. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  580. /* At this point, the out_cmd now has all of the incoming cmd
  581. * information */
  582. out_cmd->hdr.flags = 0;
  583. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  584. INDEX_TO_SEQ(q->write_ptr));
  585. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  586. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  587. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  588. offsetof(struct iwl4965_cmd, hdr);
  589. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  590. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  591. "%d bytes at %d[%d]:%d\n",
  592. get_cmd_string(out_cmd->hdr.cmd),
  593. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  594. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  595. txq->need_update = 1;
  596. /* Set up entry in queue's byte count circular buffer */
  597. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  598. /* Increment and update queue's write index */
  599. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  600. iwl4965_tx_queue_update_write_ptr(priv, txq);
  601. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  602. return ret ? ret : idx;
  603. }
  604. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  605. {
  606. int ret;
  607. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  608. /* An asynchronous command can not expect an SKB to be set. */
  609. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  610. /* An asynchronous command MUST have a callback. */
  611. BUG_ON(!cmd->meta.u.callback);
  612. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  613. return -EBUSY;
  614. ret = iwl4965_enqueue_hcmd(priv, cmd);
  615. if (ret < 0) {
  616. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  617. get_cmd_string(cmd->id), ret);
  618. return ret;
  619. }
  620. return 0;
  621. }
  622. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  623. {
  624. int cmd_idx;
  625. int ret;
  626. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  627. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  628. /* A synchronous command can not have a callback set. */
  629. BUG_ON(cmd->meta.u.callback != NULL);
  630. if (atomic_xchg(&entry, 1)) {
  631. IWL_ERROR("Error sending %s: Already sending a host command\n",
  632. get_cmd_string(cmd->id));
  633. return -EBUSY;
  634. }
  635. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  636. if (cmd->meta.flags & CMD_WANT_SKB)
  637. cmd->meta.source = &cmd->meta;
  638. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  639. if (cmd_idx < 0) {
  640. ret = cmd_idx;
  641. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  642. get_cmd_string(cmd->id), ret);
  643. goto out;
  644. }
  645. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  646. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  647. HOST_COMPLETE_TIMEOUT);
  648. if (!ret) {
  649. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  650. IWL_ERROR("Error sending %s: time out after %dms.\n",
  651. get_cmd_string(cmd->id),
  652. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  653. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  654. ret = -ETIMEDOUT;
  655. goto cancel;
  656. }
  657. }
  658. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  659. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  660. get_cmd_string(cmd->id));
  661. ret = -ECANCELED;
  662. goto fail;
  663. }
  664. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  665. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  666. get_cmd_string(cmd->id));
  667. ret = -EIO;
  668. goto fail;
  669. }
  670. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  671. IWL_ERROR("Error: Response NULL in '%s'\n",
  672. get_cmd_string(cmd->id));
  673. ret = -EIO;
  674. goto out;
  675. }
  676. ret = 0;
  677. goto out;
  678. cancel:
  679. if (cmd->meta.flags & CMD_WANT_SKB) {
  680. struct iwl4965_cmd *qcmd;
  681. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  682. * TX cmd queue. Otherwise in case the cmd comes
  683. * in later, it will possibly set an invalid
  684. * address (cmd->meta.source). */
  685. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  686. qcmd->meta.flags &= ~CMD_WANT_SKB;
  687. }
  688. fail:
  689. if (cmd->meta.u.skb) {
  690. dev_kfree_skb_any(cmd->meta.u.skb);
  691. cmd->meta.u.skb = NULL;
  692. }
  693. out:
  694. atomic_set(&entry, 0);
  695. return ret;
  696. }
  697. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  698. {
  699. if (cmd->meta.flags & CMD_ASYNC)
  700. return iwl4965_send_cmd_async(priv, cmd);
  701. return iwl4965_send_cmd_sync(priv, cmd);
  702. }
  703. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  704. {
  705. struct iwl4965_host_cmd cmd = {
  706. .id = id,
  707. .len = len,
  708. .data = data,
  709. };
  710. return iwl4965_send_cmd_sync(priv, &cmd);
  711. }
  712. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  713. {
  714. struct iwl4965_host_cmd cmd = {
  715. .id = id,
  716. .len = sizeof(val),
  717. .data = &val,
  718. };
  719. return iwl4965_send_cmd_sync(priv, &cmd);
  720. }
  721. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  722. {
  723. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  724. }
  725. /**
  726. * iwl4965_rxon_add_station - add station into station table.
  727. *
  728. * there is only one AP station with id= IWL_AP_ID
  729. * NOTE: mutex must be held before calling this fnction
  730. */
  731. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  732. const u8 *addr, int is_ap)
  733. {
  734. u8 sta_id;
  735. /* Add station to device's station table */
  736. #ifdef CONFIG_IWL4965_HT
  737. struct ieee80211_conf *conf = &priv->hw->conf;
  738. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  739. if ((is_ap) &&
  740. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  741. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  742. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  743. 0, cur_ht_config);
  744. else
  745. #endif /* CONFIG_IWL4965_HT */
  746. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  747. 0, NULL);
  748. /* Set up default rate scaling table in device's station table */
  749. iwl4965_add_station(priv, addr, is_ap);
  750. return sta_id;
  751. }
  752. /**
  753. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  754. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  755. * @channel: Any channel valid for the requested phymode
  756. * In addition to setting the staging RXON, priv->phymode is also set.
  757. *
  758. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  759. * in the staging RXON flag structure based on the phymode
  760. */
  761. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv,
  762. enum ieee80211_band band,
  763. u16 channel)
  764. {
  765. if (!iwl4965_get_channel_info(priv, band, channel)) {
  766. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  767. channel, band);
  768. return -EINVAL;
  769. }
  770. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  771. (priv->band == band))
  772. return 0;
  773. priv->staging_rxon.channel = cpu_to_le16(channel);
  774. if (band == IEEE80211_BAND_5GHZ)
  775. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  776. else
  777. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  778. priv->band = band;
  779. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  780. return 0;
  781. }
  782. /**
  783. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  784. *
  785. * NOTE: This is really only useful during development and can eventually
  786. * be #ifdef'd out once the driver is stable and folks aren't actively
  787. * making changes
  788. */
  789. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  790. {
  791. int error = 0;
  792. int counter = 1;
  793. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  794. error |= le32_to_cpu(rxon->flags &
  795. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  796. RXON_FLG_RADAR_DETECT_MSK));
  797. if (error)
  798. IWL_WARNING("check 24G fields %d | %d\n",
  799. counter++, error);
  800. } else {
  801. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  802. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  803. if (error)
  804. IWL_WARNING("check 52 fields %d | %d\n",
  805. counter++, error);
  806. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  807. if (error)
  808. IWL_WARNING("check 52 CCK %d | %d\n",
  809. counter++, error);
  810. }
  811. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  812. if (error)
  813. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  814. /* make sure basic rates 6Mbps and 1Mbps are supported */
  815. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  816. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  817. if (error)
  818. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  819. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  820. if (error)
  821. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  822. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  823. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  824. if (error)
  825. IWL_WARNING("check CCK and short slot %d | %d\n",
  826. counter++, error);
  827. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  828. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  829. if (error)
  830. IWL_WARNING("check CCK & auto detect %d | %d\n",
  831. counter++, error);
  832. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  833. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  834. if (error)
  835. IWL_WARNING("check TGG and auto detect %d | %d\n",
  836. counter++, error);
  837. if (error)
  838. IWL_WARNING("Tuning to channel %d\n",
  839. le16_to_cpu(rxon->channel));
  840. if (error) {
  841. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  842. return -1;
  843. }
  844. return 0;
  845. }
  846. /**
  847. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  848. * @priv: staging_rxon is compared to active_rxon
  849. *
  850. * If the RXON structure is changing enough to require a new tune,
  851. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  852. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  853. */
  854. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  855. {
  856. /* These items are only settable from the full RXON command */
  857. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  858. compare_ether_addr(priv->staging_rxon.bssid_addr,
  859. priv->active_rxon.bssid_addr) ||
  860. compare_ether_addr(priv->staging_rxon.node_addr,
  861. priv->active_rxon.node_addr) ||
  862. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  863. priv->active_rxon.wlap_bssid_addr) ||
  864. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  865. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  866. (priv->staging_rxon.air_propagation !=
  867. priv->active_rxon.air_propagation) ||
  868. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  869. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  870. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  871. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  872. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  873. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  874. return 1;
  875. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  876. * be updated with the RXON_ASSOC command -- however only some
  877. * flag transitions are allowed using RXON_ASSOC */
  878. /* Check if we are not switching bands */
  879. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  880. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  881. return 1;
  882. /* Check if we are switching association toggle */
  883. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  884. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  885. return 1;
  886. return 0;
  887. }
  888. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  889. {
  890. int rc = 0;
  891. struct iwl4965_rx_packet *res = NULL;
  892. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  893. struct iwl4965_host_cmd cmd = {
  894. .id = REPLY_RXON_ASSOC,
  895. .len = sizeof(rxon_assoc),
  896. .meta.flags = CMD_WANT_SKB,
  897. .data = &rxon_assoc,
  898. };
  899. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  900. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  901. if ((rxon1->flags == rxon2->flags) &&
  902. (rxon1->filter_flags == rxon2->filter_flags) &&
  903. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  904. (rxon1->ofdm_ht_single_stream_basic_rates ==
  905. rxon2->ofdm_ht_single_stream_basic_rates) &&
  906. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  907. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  908. (rxon1->rx_chain == rxon2->rx_chain) &&
  909. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  910. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  911. return 0;
  912. }
  913. rxon_assoc.flags = priv->staging_rxon.flags;
  914. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  915. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  916. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  917. rxon_assoc.reserved = 0;
  918. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  919. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  920. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  921. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  922. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  923. rc = iwl4965_send_cmd_sync(priv, &cmd);
  924. if (rc)
  925. return rc;
  926. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  927. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  928. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  929. rc = -EIO;
  930. }
  931. priv->alloc_rxb_skb--;
  932. dev_kfree_skb_any(cmd.meta.u.skb);
  933. return rc;
  934. }
  935. /**
  936. * iwl4965_commit_rxon - commit staging_rxon to hardware
  937. *
  938. * The RXON command in staging_rxon is committed to the hardware and
  939. * the active_rxon structure is updated with the new data. This
  940. * function correctly transitions out of the RXON_ASSOC_MSK state if
  941. * a HW tune is required based on the RXON structure changes.
  942. */
  943. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  944. {
  945. /* cast away the const for active_rxon in this function */
  946. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  947. DECLARE_MAC_BUF(mac);
  948. int rc = 0;
  949. if (!iwl4965_is_alive(priv))
  950. return -1;
  951. /* always get timestamp with Rx frame */
  952. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  953. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  954. if (rc) {
  955. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  956. return -EINVAL;
  957. }
  958. /* If we don't need to send a full RXON, we can use
  959. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  960. * and other flags for the current radio configuration. */
  961. if (!iwl4965_full_rxon_required(priv)) {
  962. rc = iwl4965_send_rxon_assoc(priv);
  963. if (rc) {
  964. IWL_ERROR("Error setting RXON_ASSOC "
  965. "configuration (%d).\n", rc);
  966. return rc;
  967. }
  968. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  969. return 0;
  970. }
  971. /* station table will be cleared */
  972. priv->assoc_station_added = 0;
  973. #ifdef CONFIG_IWL4965_SENSITIVITY
  974. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  975. if (!priv->error_recovering)
  976. priv->start_calib = 0;
  977. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  978. #endif /* CONFIG_IWL4965_SENSITIVITY */
  979. /* If we are currently associated and the new config requires
  980. * an RXON_ASSOC and the new config wants the associated mask enabled,
  981. * we must clear the associated from the active configuration
  982. * before we apply the new config */
  983. if (iwl4965_is_associated(priv) &&
  984. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  985. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  986. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  987. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  988. sizeof(struct iwl4965_rxon_cmd),
  989. &priv->active_rxon);
  990. /* If the mask clearing failed then we set
  991. * active_rxon back to what it was previously */
  992. if (rc) {
  993. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  994. IWL_ERROR("Error clearing ASSOC_MSK on current "
  995. "configuration (%d).\n", rc);
  996. return rc;
  997. }
  998. }
  999. IWL_DEBUG_INFO("Sending RXON\n"
  1000. "* with%s RXON_FILTER_ASSOC_MSK\n"
  1001. "* channel = %d\n"
  1002. "* bssid = %s\n",
  1003. ((priv->staging_rxon.filter_flags &
  1004. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  1005. le16_to_cpu(priv->staging_rxon.channel),
  1006. print_mac(mac, priv->staging_rxon.bssid_addr));
  1007. /* Apply the new configuration */
  1008. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1009. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  1010. if (rc) {
  1011. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  1012. return rc;
  1013. }
  1014. iwl4965_clear_stations_table(priv);
  1015. #ifdef CONFIG_IWL4965_SENSITIVITY
  1016. if (!priv->error_recovering)
  1017. priv->start_calib = 0;
  1018. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1019. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1020. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1021. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1022. /* If we issue a new RXON command which required a tune then we must
  1023. * send a new TXPOWER command or we won't be able to Tx any frames */
  1024. rc = iwl4965_hw_reg_send_txpower(priv);
  1025. if (rc) {
  1026. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1027. return rc;
  1028. }
  1029. /* Add the broadcast address so we can send broadcast frames */
  1030. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1031. IWL_INVALID_STATION) {
  1032. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1033. return -EIO;
  1034. }
  1035. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1036. * add the IWL_AP_ID to the station rate table */
  1037. if (iwl4965_is_associated(priv) &&
  1038. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1039. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1040. == IWL_INVALID_STATION) {
  1041. IWL_ERROR("Error adding AP address for transmit.\n");
  1042. return -EIO;
  1043. }
  1044. priv->assoc_station_added = 1;
  1045. }
  1046. return 0;
  1047. }
  1048. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1049. {
  1050. struct iwl4965_bt_cmd bt_cmd = {
  1051. .flags = 3,
  1052. .lead_time = 0xAA,
  1053. .max_kill = 1,
  1054. .kill_ack_mask = 0,
  1055. .kill_cts_mask = 0,
  1056. };
  1057. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1058. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1059. }
  1060. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1061. {
  1062. int rc = 0;
  1063. struct iwl4965_rx_packet *res;
  1064. struct iwl4965_host_cmd cmd = {
  1065. .id = REPLY_SCAN_ABORT_CMD,
  1066. .meta.flags = CMD_WANT_SKB,
  1067. };
  1068. /* If there isn't a scan actively going on in the hardware
  1069. * then we are in between scan bands and not actually
  1070. * actively scanning, so don't send the abort command */
  1071. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1072. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1073. return 0;
  1074. }
  1075. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1076. if (rc) {
  1077. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1078. return rc;
  1079. }
  1080. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1081. if (res->u.status != CAN_ABORT_STATUS) {
  1082. /* The scan abort will return 1 for success or
  1083. * 2 for "failure". A failure condition can be
  1084. * due to simply not being in an active scan which
  1085. * can occur if we send the scan abort before we
  1086. * the microcode has notified us that a scan is
  1087. * completed. */
  1088. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1089. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1090. clear_bit(STATUS_SCAN_HW, &priv->status);
  1091. }
  1092. dev_kfree_skb_any(cmd.meta.u.skb);
  1093. return rc;
  1094. }
  1095. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1096. struct iwl4965_cmd *cmd,
  1097. struct sk_buff *skb)
  1098. {
  1099. return 1;
  1100. }
  1101. /*
  1102. * CARD_STATE_CMD
  1103. *
  1104. * Use: Sets the device's internal card state to enable, disable, or halt
  1105. *
  1106. * When in the 'enable' state the card operates as normal.
  1107. * When in the 'disable' state, the card enters into a low power mode.
  1108. * When in the 'halt' state, the card is shut down and must be fully
  1109. * restarted to come back on.
  1110. */
  1111. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1112. {
  1113. struct iwl4965_host_cmd cmd = {
  1114. .id = REPLY_CARD_STATE_CMD,
  1115. .len = sizeof(u32),
  1116. .data = &flags,
  1117. .meta.flags = meta_flag,
  1118. };
  1119. if (meta_flag & CMD_ASYNC)
  1120. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1121. return iwl4965_send_cmd(priv, &cmd);
  1122. }
  1123. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1124. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1125. {
  1126. struct iwl4965_rx_packet *res = NULL;
  1127. if (!skb) {
  1128. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1129. return 1;
  1130. }
  1131. res = (struct iwl4965_rx_packet *)skb->data;
  1132. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1133. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1134. res->hdr.flags);
  1135. return 1;
  1136. }
  1137. switch (res->u.add_sta.status) {
  1138. case ADD_STA_SUCCESS_MSK:
  1139. break;
  1140. default:
  1141. break;
  1142. }
  1143. /* We didn't cache the SKB; let the caller free it */
  1144. return 1;
  1145. }
  1146. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1147. struct iwl4965_addsta_cmd *sta, u8 flags)
  1148. {
  1149. struct iwl4965_rx_packet *res = NULL;
  1150. int rc = 0;
  1151. struct iwl4965_host_cmd cmd = {
  1152. .id = REPLY_ADD_STA,
  1153. .len = sizeof(struct iwl4965_addsta_cmd),
  1154. .meta.flags = flags,
  1155. .data = sta,
  1156. };
  1157. if (flags & CMD_ASYNC)
  1158. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1159. else
  1160. cmd.meta.flags |= CMD_WANT_SKB;
  1161. rc = iwl4965_send_cmd(priv, &cmd);
  1162. if (rc || (flags & CMD_ASYNC))
  1163. return rc;
  1164. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1165. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1166. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1167. res->hdr.flags);
  1168. rc = -EIO;
  1169. }
  1170. if (rc == 0) {
  1171. switch (res->u.add_sta.status) {
  1172. case ADD_STA_SUCCESS_MSK:
  1173. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1174. break;
  1175. default:
  1176. rc = -EIO;
  1177. IWL_WARNING("REPLY_ADD_STA failed\n");
  1178. break;
  1179. }
  1180. }
  1181. priv->alloc_rxb_skb--;
  1182. dev_kfree_skb_any(cmd.meta.u.skb);
  1183. return rc;
  1184. }
  1185. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1186. struct ieee80211_key_conf *keyconf,
  1187. u8 sta_id)
  1188. {
  1189. unsigned long flags;
  1190. __le16 key_flags = 0;
  1191. switch (keyconf->alg) {
  1192. case ALG_CCMP:
  1193. key_flags |= STA_KEY_FLG_CCMP;
  1194. key_flags |= cpu_to_le16(
  1195. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1196. key_flags &= ~STA_KEY_FLG_INVALID;
  1197. break;
  1198. case ALG_TKIP:
  1199. case ALG_WEP:
  1200. default:
  1201. return -EINVAL;
  1202. }
  1203. spin_lock_irqsave(&priv->sta_lock, flags);
  1204. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1205. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1206. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1207. keyconf->keylen);
  1208. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1209. keyconf->keylen);
  1210. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1211. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1212. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1213. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1214. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1215. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1216. return 0;
  1217. }
  1218. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1219. {
  1220. unsigned long flags;
  1221. spin_lock_irqsave(&priv->sta_lock, flags);
  1222. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1223. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1224. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1225. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1226. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1227. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1228. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1229. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1230. return 0;
  1231. }
  1232. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1233. {
  1234. struct list_head *element;
  1235. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1236. priv->frames_count);
  1237. while (!list_empty(&priv->free_frames)) {
  1238. element = priv->free_frames.next;
  1239. list_del(element);
  1240. kfree(list_entry(element, struct iwl4965_frame, list));
  1241. priv->frames_count--;
  1242. }
  1243. if (priv->frames_count) {
  1244. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1245. priv->frames_count);
  1246. priv->frames_count = 0;
  1247. }
  1248. }
  1249. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1250. {
  1251. struct iwl4965_frame *frame;
  1252. struct list_head *element;
  1253. if (list_empty(&priv->free_frames)) {
  1254. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1255. if (!frame) {
  1256. IWL_ERROR("Could not allocate frame!\n");
  1257. return NULL;
  1258. }
  1259. priv->frames_count++;
  1260. return frame;
  1261. }
  1262. element = priv->free_frames.next;
  1263. list_del(element);
  1264. return list_entry(element, struct iwl4965_frame, list);
  1265. }
  1266. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1267. {
  1268. memset(frame, 0, sizeof(*frame));
  1269. list_add(&frame->list, &priv->free_frames);
  1270. }
  1271. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1272. struct ieee80211_hdr *hdr,
  1273. const u8 *dest, int left)
  1274. {
  1275. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1276. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1277. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1278. return 0;
  1279. if (priv->ibss_beacon->len > left)
  1280. return 0;
  1281. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1282. return priv->ibss_beacon->len;
  1283. }
  1284. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1285. {
  1286. u8 i;
  1287. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1288. i = iwl4965_rates[i].next_ieee) {
  1289. if (rate_mask & (1 << i))
  1290. return iwl4965_rates[i].plcp;
  1291. }
  1292. return IWL_RATE_INVALID;
  1293. }
  1294. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1295. {
  1296. struct iwl4965_frame *frame;
  1297. unsigned int frame_size;
  1298. int rc;
  1299. u8 rate;
  1300. frame = iwl4965_get_free_frame(priv);
  1301. if (!frame) {
  1302. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1303. "command.\n");
  1304. return -ENOMEM;
  1305. }
  1306. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1307. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1308. 0xFF0);
  1309. if (rate == IWL_INVALID_RATE)
  1310. rate = IWL_RATE_6M_PLCP;
  1311. } else {
  1312. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1313. if (rate == IWL_INVALID_RATE)
  1314. rate = IWL_RATE_1M_PLCP;
  1315. }
  1316. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1317. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1318. &frame->u.cmd[0]);
  1319. iwl4965_free_frame(priv, frame);
  1320. return rc;
  1321. }
  1322. /******************************************************************************
  1323. *
  1324. * EEPROM related functions
  1325. *
  1326. ******************************************************************************/
  1327. static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
  1328. {
  1329. memcpy(mac, priv->eeprom.mac_address, 6);
  1330. }
  1331. static inline void iwl4965_eeprom_release_semaphore(struct iwl4965_priv *priv)
  1332. {
  1333. iwl4965_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
  1334. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
  1335. }
  1336. /**
  1337. * iwl4965_eeprom_init - read EEPROM contents
  1338. *
  1339. * Load the EEPROM contents from adapter into priv->eeprom
  1340. *
  1341. * NOTE: This routine uses the non-debug IO access functions.
  1342. */
  1343. int iwl4965_eeprom_init(struct iwl4965_priv *priv)
  1344. {
  1345. u16 *e = (u16 *)&priv->eeprom;
  1346. u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
  1347. u32 r;
  1348. int sz = sizeof(priv->eeprom);
  1349. int rc;
  1350. int i;
  1351. u16 addr;
  1352. /* The EEPROM structure has several padding buffers within it
  1353. * and when adding new EEPROM maps is subject to programmer errors
  1354. * which may be very difficult to identify without explicitly
  1355. * checking the resulting size of the eeprom map. */
  1356. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1357. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1358. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1359. return -ENOENT;
  1360. }
  1361. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  1362. rc = iwl4965_eeprom_acquire_semaphore(priv);
  1363. if (rc < 0) {
  1364. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1365. return -ENOENT;
  1366. }
  1367. /* eeprom is an array of 16bit values */
  1368. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1369. _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
  1370. _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1371. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1372. i += IWL_EEPROM_ACCESS_DELAY) {
  1373. r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
  1374. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1375. break;
  1376. udelay(IWL_EEPROM_ACCESS_DELAY);
  1377. }
  1378. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1379. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1380. rc = -ETIMEDOUT;
  1381. goto done;
  1382. }
  1383. e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
  1384. }
  1385. rc = 0;
  1386. done:
  1387. iwl4965_eeprom_release_semaphore(priv);
  1388. return rc;
  1389. }
  1390. /******************************************************************************
  1391. *
  1392. * Misc. internal state and helper functions
  1393. *
  1394. ******************************************************************************/
  1395. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1396. {
  1397. if (priv->hw_setting.shared_virt)
  1398. pci_free_consistent(priv->pci_dev,
  1399. sizeof(struct iwl4965_shared),
  1400. priv->hw_setting.shared_virt,
  1401. priv->hw_setting.shared_phys);
  1402. }
  1403. /**
  1404. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1405. *
  1406. * return : set the bit for each supported rate insert in ie
  1407. */
  1408. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1409. u16 basic_rate, int *left)
  1410. {
  1411. u16 ret_rates = 0, bit;
  1412. int i;
  1413. u8 *cnt = ie;
  1414. u8 *rates = ie + 1;
  1415. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1416. if (bit & supported_rate) {
  1417. ret_rates |= bit;
  1418. rates[*cnt] = iwl4965_rates[i].ieee |
  1419. ((bit & basic_rate) ? 0x80 : 0x00);
  1420. (*cnt)++;
  1421. (*left)--;
  1422. if ((*left <= 0) ||
  1423. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1424. break;
  1425. }
  1426. }
  1427. return ret_rates;
  1428. }
  1429. /**
  1430. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1431. */
  1432. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1433. enum ieee80211_band band,
  1434. struct ieee80211_mgmt *frame,
  1435. int left, int is_direct)
  1436. {
  1437. int len = 0;
  1438. u8 *pos = NULL;
  1439. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1440. #ifdef CONFIG_IWL4965_HT
  1441. const struct ieee80211_supported_band *sband =
  1442. iwl4965_get_hw_mode(priv, band);
  1443. #endif /* CONFIG_IWL4965_HT */
  1444. /* Make sure there is enough space for the probe request,
  1445. * two mandatory IEs and the data */
  1446. left -= 24;
  1447. if (left < 0)
  1448. return 0;
  1449. len += 24;
  1450. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1451. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1452. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1453. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1454. frame->seq_ctrl = 0;
  1455. /* fill in our indirect SSID IE */
  1456. /* ...next IE... */
  1457. left -= 2;
  1458. if (left < 0)
  1459. return 0;
  1460. len += 2;
  1461. pos = &(frame->u.probe_req.variable[0]);
  1462. *pos++ = WLAN_EID_SSID;
  1463. *pos++ = 0;
  1464. /* fill in our direct SSID IE... */
  1465. if (is_direct) {
  1466. /* ...next IE... */
  1467. left -= 2 + priv->essid_len;
  1468. if (left < 0)
  1469. return 0;
  1470. /* ... fill it in... */
  1471. *pos++ = WLAN_EID_SSID;
  1472. *pos++ = priv->essid_len;
  1473. memcpy(pos, priv->essid, priv->essid_len);
  1474. pos += priv->essid_len;
  1475. len += 2 + priv->essid_len;
  1476. }
  1477. /* fill in supported rate */
  1478. /* ...next IE... */
  1479. left -= 2;
  1480. if (left < 0)
  1481. return 0;
  1482. /* ... fill it in... */
  1483. *pos++ = WLAN_EID_SUPP_RATES;
  1484. *pos = 0;
  1485. /* exclude 60M rate */
  1486. active_rates = priv->rates_mask;
  1487. active_rates &= ~IWL_RATE_60M_MASK;
  1488. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1489. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1490. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1491. active_rate_basic, &left);
  1492. active_rates &= ~ret_rates;
  1493. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1494. active_rate_basic, &left);
  1495. active_rates &= ~ret_rates;
  1496. len += 2 + *pos;
  1497. pos += (*pos) + 1;
  1498. if (active_rates == 0)
  1499. goto fill_end;
  1500. /* fill in supported extended rate */
  1501. /* ...next IE... */
  1502. left -= 2;
  1503. if (left < 0)
  1504. return 0;
  1505. /* ... fill it in... */
  1506. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1507. *pos = 0;
  1508. iwl4965_supported_rate_to_ie(pos, active_rates,
  1509. active_rate_basic, &left);
  1510. if (*pos > 0)
  1511. len += 2 + *pos;
  1512. #ifdef CONFIG_IWL4965_HT
  1513. if (sband && sband->ht_info.ht_supported) {
  1514. struct ieee80211_ht_cap *ht_cap;
  1515. pos += (*pos) + 1;
  1516. *pos++ = WLAN_EID_HT_CAPABILITY;
  1517. *pos++ = sizeof(struct ieee80211_ht_cap);
  1518. ht_cap = (struct ieee80211_ht_cap *)pos;
  1519. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1520. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1521. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1522. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1523. ((sband->ht_info.ampdu_density << 2) &
  1524. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1525. len += 2 + sizeof(struct ieee80211_ht_cap);
  1526. }
  1527. #endif /*CONFIG_IWL4965_HT */
  1528. fill_end:
  1529. return (u16)len;
  1530. }
  1531. /*
  1532. * QoS support
  1533. */
  1534. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1535. struct iwl4965_qosparam_cmd *qos)
  1536. {
  1537. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1538. sizeof(struct iwl4965_qosparam_cmd), qos);
  1539. }
  1540. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1541. {
  1542. u16 cw_min = 15;
  1543. u16 cw_max = 1023;
  1544. u8 aifs = 2;
  1545. u8 is_legacy = 0;
  1546. unsigned long flags;
  1547. int i;
  1548. spin_lock_irqsave(&priv->lock, flags);
  1549. priv->qos_data.qos_active = 0;
  1550. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1551. if (priv->qos_data.qos_enable)
  1552. priv->qos_data.qos_active = 1;
  1553. if (!(priv->active_rate & 0xfff0)) {
  1554. cw_min = 31;
  1555. is_legacy = 1;
  1556. }
  1557. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1558. if (priv->qos_data.qos_enable)
  1559. priv->qos_data.qos_active = 1;
  1560. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1561. cw_min = 31;
  1562. is_legacy = 1;
  1563. }
  1564. if (priv->qos_data.qos_active)
  1565. aifs = 3;
  1566. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1567. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1568. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1569. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1570. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1571. if (priv->qos_data.qos_active) {
  1572. i = 1;
  1573. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1574. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1575. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1576. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1577. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1578. i = 2;
  1579. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1580. cpu_to_le16((cw_min + 1) / 2 - 1);
  1581. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1582. cpu_to_le16(cw_max);
  1583. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1584. if (is_legacy)
  1585. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1586. cpu_to_le16(6016);
  1587. else
  1588. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1589. cpu_to_le16(3008);
  1590. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1591. i = 3;
  1592. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1593. cpu_to_le16((cw_min + 1) / 4 - 1);
  1594. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1595. cpu_to_le16((cw_max + 1) / 2 - 1);
  1596. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1597. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1598. if (is_legacy)
  1599. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1600. cpu_to_le16(3264);
  1601. else
  1602. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1603. cpu_to_le16(1504);
  1604. } else {
  1605. for (i = 1; i < 4; i++) {
  1606. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1607. cpu_to_le16(cw_min);
  1608. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1609. cpu_to_le16(cw_max);
  1610. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1611. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1612. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1613. }
  1614. }
  1615. IWL_DEBUG_QOS("set QoS to default \n");
  1616. spin_unlock_irqrestore(&priv->lock, flags);
  1617. }
  1618. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1619. {
  1620. unsigned long flags;
  1621. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1622. return;
  1623. if (!priv->qos_data.qos_enable)
  1624. return;
  1625. spin_lock_irqsave(&priv->lock, flags);
  1626. priv->qos_data.def_qos_parm.qos_flags = 0;
  1627. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1628. !priv->qos_data.qos_cap.q_AP.txop_request)
  1629. priv->qos_data.def_qos_parm.qos_flags |=
  1630. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1631. if (priv->qos_data.qos_active)
  1632. priv->qos_data.def_qos_parm.qos_flags |=
  1633. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1634. #ifdef CONFIG_IWL4965_HT
  1635. if (priv->current_ht_config.is_ht)
  1636. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1637. #endif /* CONFIG_IWL4965_HT */
  1638. spin_unlock_irqrestore(&priv->lock, flags);
  1639. if (force || iwl4965_is_associated(priv)) {
  1640. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1641. priv->qos_data.qos_active,
  1642. priv->qos_data.def_qos_parm.qos_flags);
  1643. iwl4965_send_qos_params_command(priv,
  1644. &(priv->qos_data.def_qos_parm));
  1645. }
  1646. }
  1647. /*
  1648. * Power management (not Tx power!) functions
  1649. */
  1650. #define MSEC_TO_USEC 1024
  1651. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1652. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1653. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1654. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1655. __constant_cpu_to_le32(X1), \
  1656. __constant_cpu_to_le32(X2), \
  1657. __constant_cpu_to_le32(X3), \
  1658. __constant_cpu_to_le32(X4)}
  1659. /* default power management (not Tx power) table values */
  1660. /* for tim 0-10 */
  1661. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1662. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1663. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1664. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1665. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1666. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1667. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1668. };
  1669. /* for tim > 10 */
  1670. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1671. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1672. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1673. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1674. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1675. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1676. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1677. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1678. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1679. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1680. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1681. };
  1682. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1683. {
  1684. int rc = 0, i;
  1685. struct iwl4965_power_mgr *pow_data;
  1686. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1687. u16 pci_pm;
  1688. IWL_DEBUG_POWER("Initialize power \n");
  1689. pow_data = &(priv->power_data);
  1690. memset(pow_data, 0, sizeof(*pow_data));
  1691. pow_data->active_index = IWL_POWER_RANGE_0;
  1692. pow_data->dtim_val = 0xffff;
  1693. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1694. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1695. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1696. if (rc != 0)
  1697. return 0;
  1698. else {
  1699. struct iwl4965_powertable_cmd *cmd;
  1700. IWL_DEBUG_POWER("adjust power command flags\n");
  1701. for (i = 0; i < IWL_POWER_AC; i++) {
  1702. cmd = &pow_data->pwr_range_0[i].cmd;
  1703. if (pci_pm & 0x1)
  1704. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1705. else
  1706. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1707. }
  1708. }
  1709. return rc;
  1710. }
  1711. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1712. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1713. {
  1714. int rc = 0, i;
  1715. u8 skip;
  1716. u32 max_sleep = 0;
  1717. struct iwl4965_power_vec_entry *range;
  1718. u8 period = 0;
  1719. struct iwl4965_power_mgr *pow_data;
  1720. if (mode > IWL_POWER_INDEX_5) {
  1721. IWL_DEBUG_POWER("Error invalid power mode \n");
  1722. return -1;
  1723. }
  1724. pow_data = &(priv->power_data);
  1725. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1726. range = &pow_data->pwr_range_0[0];
  1727. else
  1728. range = &pow_data->pwr_range_1[1];
  1729. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1730. #ifdef IWL_MAC80211_DISABLE
  1731. if (priv->assoc_network != NULL) {
  1732. unsigned long flags;
  1733. period = priv->assoc_network->tim.tim_period;
  1734. }
  1735. #endif /*IWL_MAC80211_DISABLE */
  1736. skip = range[mode].no_dtim;
  1737. if (period == 0) {
  1738. period = 1;
  1739. skip = 0;
  1740. }
  1741. if (skip == 0) {
  1742. max_sleep = period;
  1743. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1744. } else {
  1745. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1746. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1747. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1748. }
  1749. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1750. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1751. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1752. }
  1753. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1754. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1755. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1756. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1757. le32_to_cpu(cmd->sleep_interval[0]),
  1758. le32_to_cpu(cmd->sleep_interval[1]),
  1759. le32_to_cpu(cmd->sleep_interval[2]),
  1760. le32_to_cpu(cmd->sleep_interval[3]),
  1761. le32_to_cpu(cmd->sleep_interval[4]));
  1762. return rc;
  1763. }
  1764. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1765. {
  1766. u32 uninitialized_var(final_mode);
  1767. int rc;
  1768. struct iwl4965_powertable_cmd cmd;
  1769. /* If on battery, set to 3,
  1770. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1771. * else user level */
  1772. switch (mode) {
  1773. case IWL_POWER_BATTERY:
  1774. final_mode = IWL_POWER_INDEX_3;
  1775. break;
  1776. case IWL_POWER_AC:
  1777. final_mode = IWL_POWER_MODE_CAM;
  1778. break;
  1779. default:
  1780. final_mode = mode;
  1781. break;
  1782. }
  1783. cmd.keep_alive_beacons = 0;
  1784. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1785. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1786. if (final_mode == IWL_POWER_MODE_CAM)
  1787. clear_bit(STATUS_POWER_PMI, &priv->status);
  1788. else
  1789. set_bit(STATUS_POWER_PMI, &priv->status);
  1790. return rc;
  1791. }
  1792. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1793. {
  1794. /* Filter incoming packets to determine if they are targeted toward
  1795. * this network, discarding packets coming from ourselves */
  1796. switch (priv->iw_mode) {
  1797. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1798. /* packets from our adapter are dropped (echo) */
  1799. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1800. return 0;
  1801. /* {broad,multi}cast packets to our IBSS go through */
  1802. if (is_multicast_ether_addr(header->addr1))
  1803. return !compare_ether_addr(header->addr3, priv->bssid);
  1804. /* packets to our adapter go through */
  1805. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1806. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1807. /* packets from our adapter are dropped (echo) */
  1808. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1809. return 0;
  1810. /* {broad,multi}cast packets to our BSS go through */
  1811. if (is_multicast_ether_addr(header->addr1))
  1812. return !compare_ether_addr(header->addr2, priv->bssid);
  1813. /* packets to our adapter go through */
  1814. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1815. }
  1816. return 1;
  1817. }
  1818. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1819. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1820. {
  1821. switch (status & TX_STATUS_MSK) {
  1822. case TX_STATUS_SUCCESS:
  1823. return "SUCCESS";
  1824. TX_STATUS_ENTRY(SHORT_LIMIT);
  1825. TX_STATUS_ENTRY(LONG_LIMIT);
  1826. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1827. TX_STATUS_ENTRY(MGMNT_ABORT);
  1828. TX_STATUS_ENTRY(NEXT_FRAG);
  1829. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1830. TX_STATUS_ENTRY(DEST_PS);
  1831. TX_STATUS_ENTRY(ABORTED);
  1832. TX_STATUS_ENTRY(BT_RETRY);
  1833. TX_STATUS_ENTRY(STA_INVALID);
  1834. TX_STATUS_ENTRY(FRAG_DROPPED);
  1835. TX_STATUS_ENTRY(TID_DISABLE);
  1836. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1837. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1838. TX_STATUS_ENTRY(TX_LOCKED);
  1839. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1840. }
  1841. return "UNKNOWN";
  1842. }
  1843. /**
  1844. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1845. *
  1846. * NOTE: priv->mutex is not required before calling this function
  1847. */
  1848. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  1849. {
  1850. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1851. clear_bit(STATUS_SCANNING, &priv->status);
  1852. return 0;
  1853. }
  1854. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1855. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1856. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1857. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1858. queue_work(priv->workqueue, &priv->abort_scan);
  1859. } else
  1860. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1861. return test_bit(STATUS_SCANNING, &priv->status);
  1862. }
  1863. return 0;
  1864. }
  1865. /**
  1866. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1867. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1868. *
  1869. * NOTE: priv->mutex must be held before calling this function
  1870. */
  1871. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  1872. {
  1873. unsigned long now = jiffies;
  1874. int ret;
  1875. ret = iwl4965_scan_cancel(priv);
  1876. if (ret && ms) {
  1877. mutex_unlock(&priv->mutex);
  1878. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1879. test_bit(STATUS_SCANNING, &priv->status))
  1880. msleep(1);
  1881. mutex_lock(&priv->mutex);
  1882. return test_bit(STATUS_SCANNING, &priv->status);
  1883. }
  1884. return ret;
  1885. }
  1886. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  1887. {
  1888. /* Reset ieee stats */
  1889. /* We don't reset the net_device_stats (ieee->stats) on
  1890. * re-association */
  1891. priv->last_seq_num = -1;
  1892. priv->last_frag_num = -1;
  1893. priv->last_packet_time = 0;
  1894. iwl4965_scan_cancel(priv);
  1895. }
  1896. #define MAX_UCODE_BEACON_INTERVAL 4096
  1897. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1898. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1899. {
  1900. u16 new_val = 0;
  1901. u16 beacon_factor = 0;
  1902. beacon_factor =
  1903. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1904. / MAX_UCODE_BEACON_INTERVAL;
  1905. new_val = beacon_val / beacon_factor;
  1906. return cpu_to_le16(new_val);
  1907. }
  1908. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  1909. {
  1910. u64 interval_tm_unit;
  1911. u64 tsf, result;
  1912. unsigned long flags;
  1913. struct ieee80211_conf *conf = NULL;
  1914. u16 beacon_int = 0;
  1915. conf = ieee80211_get_hw_conf(priv->hw);
  1916. spin_lock_irqsave(&priv->lock, flags);
  1917. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1918. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1919. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1920. tsf = priv->timestamp1;
  1921. tsf = ((tsf << 32) | priv->timestamp0);
  1922. beacon_int = priv->beacon_int;
  1923. spin_unlock_irqrestore(&priv->lock, flags);
  1924. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1925. if (beacon_int == 0) {
  1926. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1927. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1928. } else {
  1929. priv->rxon_timing.beacon_interval =
  1930. cpu_to_le16(beacon_int);
  1931. priv->rxon_timing.beacon_interval =
  1932. iwl4965_adjust_beacon_interval(
  1933. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1934. }
  1935. priv->rxon_timing.atim_window = 0;
  1936. } else {
  1937. priv->rxon_timing.beacon_interval =
  1938. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1939. /* TODO: we need to get atim_window from upper stack
  1940. * for now we set to 0 */
  1941. priv->rxon_timing.atim_window = 0;
  1942. }
  1943. interval_tm_unit =
  1944. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1945. result = do_div(tsf, interval_tm_unit);
  1946. priv->rxon_timing.beacon_init_val =
  1947. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1948. IWL_DEBUG_ASSOC
  1949. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1950. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1951. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1952. le16_to_cpu(priv->rxon_timing.atim_window));
  1953. }
  1954. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  1955. {
  1956. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1957. IWL_ERROR("APs don't scan.\n");
  1958. return 0;
  1959. }
  1960. if (!iwl4965_is_ready_rf(priv)) {
  1961. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1962. return -EIO;
  1963. }
  1964. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1965. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1966. return -EAGAIN;
  1967. }
  1968. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1969. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1970. "Queuing.\n");
  1971. return -EAGAIN;
  1972. }
  1973. IWL_DEBUG_INFO("Starting scan...\n");
  1974. priv->scan_bands = 2;
  1975. set_bit(STATUS_SCANNING, &priv->status);
  1976. priv->scan_start = jiffies;
  1977. priv->scan_pass_start = priv->scan_start;
  1978. queue_work(priv->workqueue, &priv->request_scan);
  1979. return 0;
  1980. }
  1981. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  1982. {
  1983. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  1984. if (hw_decrypt)
  1985. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  1986. else
  1987. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  1988. return 0;
  1989. }
  1990. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv,
  1991. enum ieee80211_band band)
  1992. {
  1993. if (band == IEEE80211_BAND_5GHZ) {
  1994. priv->staging_rxon.flags &=
  1995. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1996. | RXON_FLG_CCK_MSK);
  1997. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1998. } else {
  1999. /* Copied from iwl4965_bg_post_associate() */
  2000. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2001. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2002. else
  2003. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2004. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2005. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2006. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2007. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2008. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2009. }
  2010. }
  2011. /*
  2012. * initialize rxon structure with default values from eeprom
  2013. */
  2014. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  2015. {
  2016. const struct iwl4965_channel_info *ch_info;
  2017. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2018. switch (priv->iw_mode) {
  2019. case IEEE80211_IF_TYPE_AP:
  2020. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2021. break;
  2022. case IEEE80211_IF_TYPE_STA:
  2023. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2024. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2025. break;
  2026. case IEEE80211_IF_TYPE_IBSS:
  2027. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2028. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2029. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2030. RXON_FILTER_ACCEPT_GRP_MSK;
  2031. break;
  2032. case IEEE80211_IF_TYPE_MNTR:
  2033. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2034. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2035. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2036. break;
  2037. }
  2038. #if 0
  2039. /* TODO: Figure out when short_preamble would be set and cache from
  2040. * that */
  2041. if (!hw_to_local(priv->hw)->short_preamble)
  2042. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2043. else
  2044. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2045. #endif
  2046. ch_info = iwl4965_get_channel_info(priv, priv->band,
  2047. le16_to_cpu(priv->staging_rxon.channel));
  2048. if (!ch_info)
  2049. ch_info = &priv->channel_info[0];
  2050. /*
  2051. * in some case A channels are all non IBSS
  2052. * in this case force B/G channel
  2053. */
  2054. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2055. !(is_channel_ibss(ch_info)))
  2056. ch_info = &priv->channel_info[0];
  2057. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2058. priv->band = ch_info->band;
  2059. iwl4965_set_flags_for_phymode(priv, priv->band);
  2060. priv->staging_rxon.ofdm_basic_rates =
  2061. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2062. priv->staging_rxon.cck_basic_rates =
  2063. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2064. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2065. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2066. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2067. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2068. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2069. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2070. iwl4965_set_rxon_chain(priv);
  2071. }
  2072. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  2073. {
  2074. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2075. const struct iwl4965_channel_info *ch_info;
  2076. ch_info = iwl4965_get_channel_info(priv,
  2077. priv->band,
  2078. le16_to_cpu(priv->staging_rxon.channel));
  2079. if (!ch_info || !is_channel_ibss(ch_info)) {
  2080. IWL_ERROR("channel %d not IBSS channel\n",
  2081. le16_to_cpu(priv->staging_rxon.channel));
  2082. return -EINVAL;
  2083. }
  2084. }
  2085. priv->iw_mode = mode;
  2086. iwl4965_connection_init_rx_config(priv);
  2087. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2088. iwl4965_clear_stations_table(priv);
  2089. /* dont commit rxon if rf-kill is on*/
  2090. if (!iwl4965_is_ready_rf(priv))
  2091. return -EAGAIN;
  2092. cancel_delayed_work(&priv->scan_check);
  2093. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2094. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2095. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2096. return -EAGAIN;
  2097. }
  2098. iwl4965_commit_rxon(priv);
  2099. return 0;
  2100. }
  2101. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2102. struct ieee80211_tx_control *ctl,
  2103. struct iwl4965_cmd *cmd,
  2104. struct sk_buff *skb_frag,
  2105. int last_frag)
  2106. {
  2107. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2108. switch (keyinfo->alg) {
  2109. case ALG_CCMP:
  2110. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2111. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2112. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2113. break;
  2114. case ALG_TKIP:
  2115. #if 0
  2116. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2117. if (last_frag)
  2118. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2119. 8);
  2120. else
  2121. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2122. #endif
  2123. break;
  2124. case ALG_WEP:
  2125. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2126. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2127. if (keyinfo->keylen == 13)
  2128. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2129. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2130. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2131. "with key %d\n", ctl->key_idx);
  2132. break;
  2133. default:
  2134. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2135. break;
  2136. }
  2137. }
  2138. /*
  2139. * handle build REPLY_TX command notification.
  2140. */
  2141. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2142. struct iwl4965_cmd *cmd,
  2143. struct ieee80211_tx_control *ctrl,
  2144. struct ieee80211_hdr *hdr,
  2145. int is_unicast, u8 std_id)
  2146. {
  2147. __le16 *qc;
  2148. u16 fc = le16_to_cpu(hdr->frame_control);
  2149. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2150. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2151. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2152. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2153. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2154. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2155. if (ieee80211_is_probe_response(fc) &&
  2156. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2157. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2158. } else {
  2159. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2160. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2161. }
  2162. if (ieee80211_is_back_request(fc))
  2163. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  2164. cmd->cmd.tx.sta_id = std_id;
  2165. if (ieee80211_get_morefrag(hdr))
  2166. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2167. qc = ieee80211_get_qos_ctrl(hdr);
  2168. if (qc) {
  2169. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2170. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2171. } else
  2172. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2173. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2174. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2175. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2176. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2177. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2178. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2179. }
  2180. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2181. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2182. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2183. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2184. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2185. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2186. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2187. else
  2188. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2189. } else
  2190. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2191. cmd->cmd.tx.driver_txop = 0;
  2192. cmd->cmd.tx.tx_flags = tx_flags;
  2193. cmd->cmd.tx.next_frame_len = 0;
  2194. }
  2195. /**
  2196. * iwl4965_get_sta_id - Find station's index within station table
  2197. *
  2198. * If new IBSS station, create new entry in station table
  2199. */
  2200. static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
  2201. struct ieee80211_hdr *hdr)
  2202. {
  2203. int sta_id;
  2204. u16 fc = le16_to_cpu(hdr->frame_control);
  2205. DECLARE_MAC_BUF(mac);
  2206. /* If this frame is broadcast or management, use broadcast station id */
  2207. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2208. is_multicast_ether_addr(hdr->addr1))
  2209. return priv->hw_setting.bcast_sta_id;
  2210. switch (priv->iw_mode) {
  2211. /* If we are a client station in a BSS network, use the special
  2212. * AP station entry (that's the only station we communicate with) */
  2213. case IEEE80211_IF_TYPE_STA:
  2214. return IWL_AP_ID;
  2215. /* If we are an AP, then find the station, or use BCAST */
  2216. case IEEE80211_IF_TYPE_AP:
  2217. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2218. if (sta_id != IWL_INVALID_STATION)
  2219. return sta_id;
  2220. return priv->hw_setting.bcast_sta_id;
  2221. /* If this frame is going out to an IBSS network, find the station,
  2222. * or create a new station table entry */
  2223. case IEEE80211_IF_TYPE_IBSS:
  2224. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2225. if (sta_id != IWL_INVALID_STATION)
  2226. return sta_id;
  2227. /* Create new station table entry */
  2228. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  2229. 0, CMD_ASYNC, NULL);
  2230. if (sta_id != IWL_INVALID_STATION)
  2231. return sta_id;
  2232. IWL_DEBUG_DROP("Station %s not in station map. "
  2233. "Defaulting to broadcast...\n",
  2234. print_mac(mac, hdr->addr1));
  2235. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2236. return priv->hw_setting.bcast_sta_id;
  2237. default:
  2238. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2239. return priv->hw_setting.bcast_sta_id;
  2240. }
  2241. }
  2242. /*
  2243. * start REPLY_TX command process
  2244. */
  2245. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2246. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2247. {
  2248. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2249. struct iwl4965_tfd_frame *tfd;
  2250. u32 *control_flags;
  2251. int txq_id = ctl->queue;
  2252. struct iwl4965_tx_queue *txq = NULL;
  2253. struct iwl4965_queue *q = NULL;
  2254. dma_addr_t phys_addr;
  2255. dma_addr_t txcmd_phys;
  2256. dma_addr_t scratch_phys;
  2257. struct iwl4965_cmd *out_cmd = NULL;
  2258. u16 len, idx, len_org;
  2259. u8 id, hdr_len, unicast;
  2260. u8 sta_id;
  2261. u16 seq_number = 0;
  2262. u16 fc;
  2263. __le16 *qc;
  2264. u8 wait_write_ptr = 0;
  2265. unsigned long flags;
  2266. int rc;
  2267. spin_lock_irqsave(&priv->lock, flags);
  2268. if (iwl4965_is_rfkill(priv)) {
  2269. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2270. goto drop_unlock;
  2271. }
  2272. if (!priv->vif) {
  2273. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  2274. goto drop_unlock;
  2275. }
  2276. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  2277. IWL_ERROR("ERROR: No TX rate available.\n");
  2278. goto drop_unlock;
  2279. }
  2280. unicast = !is_multicast_ether_addr(hdr->addr1);
  2281. id = 0;
  2282. fc = le16_to_cpu(hdr->frame_control);
  2283. #ifdef CONFIG_IWL4965_DEBUG
  2284. if (ieee80211_is_auth(fc))
  2285. IWL_DEBUG_TX("Sending AUTH frame\n");
  2286. else if (ieee80211_is_assoc_request(fc))
  2287. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2288. else if (ieee80211_is_reassoc_request(fc))
  2289. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2290. #endif
  2291. /* drop all data frame if we are not associated */
  2292. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  2293. (!iwl4965_is_associated(priv) ||
  2294. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  2295. !priv->assoc_station_added)) {
  2296. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2297. goto drop_unlock;
  2298. }
  2299. spin_unlock_irqrestore(&priv->lock, flags);
  2300. hdr_len = ieee80211_get_hdrlen(fc);
  2301. /* Find (or create) index into station table for destination station */
  2302. sta_id = iwl4965_get_sta_id(priv, hdr);
  2303. if (sta_id == IWL_INVALID_STATION) {
  2304. DECLARE_MAC_BUF(mac);
  2305. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2306. print_mac(mac, hdr->addr1));
  2307. goto drop;
  2308. }
  2309. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2310. qc = ieee80211_get_qos_ctrl(hdr);
  2311. if (qc) {
  2312. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2313. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2314. IEEE80211_SCTL_SEQ;
  2315. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2316. (hdr->seq_ctrl &
  2317. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2318. seq_number += 0x10;
  2319. #ifdef CONFIG_IWL4965_HT
  2320. /* aggregation is on for this <sta,tid> */
  2321. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  2322. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2323. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  2324. #endif /* CONFIG_IWL4965_HT */
  2325. }
  2326. /* Descriptor for chosen Tx queue */
  2327. txq = &priv->txq[txq_id];
  2328. q = &txq->q;
  2329. spin_lock_irqsave(&priv->lock, flags);
  2330. /* Set up first empty TFD within this queue's circular TFD buffer */
  2331. tfd = &txq->bd[q->write_ptr];
  2332. memset(tfd, 0, sizeof(*tfd));
  2333. control_flags = (u32 *) tfd;
  2334. idx = get_cmd_index(q, q->write_ptr, 0);
  2335. /* Set up driver data for this TFD */
  2336. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2337. txq->txb[q->write_ptr].skb[0] = skb;
  2338. memcpy(&(txq->txb[q->write_ptr].status.control),
  2339. ctl, sizeof(struct ieee80211_tx_control));
  2340. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2341. out_cmd = &txq->cmd[idx];
  2342. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2343. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2344. /*
  2345. * Set up the Tx-command (not MAC!) header.
  2346. * Store the chosen Tx queue and TFD index within the sequence field;
  2347. * after Tx, uCode's Tx response will return this value so driver can
  2348. * locate the frame within the tx queue and do post-tx processing.
  2349. */
  2350. out_cmd->hdr.cmd = REPLY_TX;
  2351. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2352. INDEX_TO_SEQ(q->write_ptr)));
  2353. /* Copy MAC header from skb into command buffer */
  2354. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2355. /*
  2356. * Use the first empty entry in this queue's command buffer array
  2357. * to contain the Tx command and MAC header concatenated together
  2358. * (payload data will be in another buffer).
  2359. * Size of this varies, due to varying MAC header length.
  2360. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2361. * of the MAC header (device reads on dword boundaries).
  2362. * We'll tell device about this padding later.
  2363. */
  2364. len = priv->hw_setting.tx_cmd_len +
  2365. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2366. len_org = len;
  2367. len = (len + 3) & ~3;
  2368. if (len_org != len)
  2369. len_org = 1;
  2370. else
  2371. len_org = 0;
  2372. /* Physical address of this Tx command's header (not MAC header!),
  2373. * within command buffer array. */
  2374. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2375. offsetof(struct iwl4965_cmd, hdr);
  2376. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2377. * first entry */
  2378. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2379. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2380. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2381. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2382. * if any (802.11 null frames have no payload). */
  2383. len = skb->len - hdr_len;
  2384. if (len) {
  2385. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2386. len, PCI_DMA_TODEVICE);
  2387. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2388. }
  2389. /* Tell 4965 about any 2-byte padding after MAC header */
  2390. if (len_org)
  2391. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2392. /* Total # bytes to be transmitted */
  2393. len = (u16)skb->len;
  2394. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2395. /* TODO need this for burst mode later on */
  2396. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2397. /* set is_hcca to 0; it probably will never be implemented */
  2398. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2399. scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
  2400. offsetof(struct iwl4965_tx_cmd, scratch);
  2401. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2402. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2403. if (!ieee80211_get_morefrag(hdr)) {
  2404. txq->need_update = 1;
  2405. if (qc) {
  2406. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2407. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2408. }
  2409. } else {
  2410. wait_write_ptr = 1;
  2411. txq->need_update = 0;
  2412. }
  2413. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2414. sizeof(out_cmd->cmd.tx));
  2415. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2416. ieee80211_get_hdrlen(fc));
  2417. /* Set up entry for this TFD in Tx byte-count array */
  2418. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2419. /* Tell device the write index *just past* this latest filled TFD */
  2420. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  2421. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2422. spin_unlock_irqrestore(&priv->lock, flags);
  2423. if (rc)
  2424. return rc;
  2425. if ((iwl4965_queue_space(q) < q->high_mark)
  2426. && priv->mac80211_registered) {
  2427. if (wait_write_ptr) {
  2428. spin_lock_irqsave(&priv->lock, flags);
  2429. txq->need_update = 1;
  2430. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2431. spin_unlock_irqrestore(&priv->lock, flags);
  2432. }
  2433. ieee80211_stop_queue(priv->hw, ctl->queue);
  2434. }
  2435. return 0;
  2436. drop_unlock:
  2437. spin_unlock_irqrestore(&priv->lock, flags);
  2438. drop:
  2439. return -1;
  2440. }
  2441. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2442. {
  2443. const struct ieee80211_supported_band *hw = NULL;
  2444. struct ieee80211_rate *rate;
  2445. int i;
  2446. hw = iwl4965_get_hw_mode(priv, priv->band);
  2447. if (!hw) {
  2448. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2449. return;
  2450. }
  2451. priv->active_rate = 0;
  2452. priv->active_rate_basic = 0;
  2453. for (i = 0; i < hw->n_bitrates; i++) {
  2454. rate = &(hw->bitrates[i]);
  2455. if (rate->hw_value < IWL_RATE_COUNT)
  2456. priv->active_rate |= (1 << rate->hw_value);
  2457. }
  2458. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2459. priv->active_rate, priv->active_rate_basic);
  2460. /*
  2461. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2462. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2463. * OFDM
  2464. */
  2465. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2466. priv->staging_rxon.cck_basic_rates =
  2467. ((priv->active_rate_basic &
  2468. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2469. else
  2470. priv->staging_rxon.cck_basic_rates =
  2471. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2472. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2473. priv->staging_rxon.ofdm_basic_rates =
  2474. ((priv->active_rate_basic &
  2475. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2476. IWL_FIRST_OFDM_RATE) & 0xFF;
  2477. else
  2478. priv->staging_rxon.ofdm_basic_rates =
  2479. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2480. }
  2481. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2482. {
  2483. unsigned long flags;
  2484. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2485. return;
  2486. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2487. disable_radio ? "OFF" : "ON");
  2488. if (disable_radio) {
  2489. iwl4965_scan_cancel(priv);
  2490. /* FIXME: This is a workaround for AP */
  2491. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2492. spin_lock_irqsave(&priv->lock, flags);
  2493. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2494. CSR_UCODE_SW_BIT_RFKILL);
  2495. spin_unlock_irqrestore(&priv->lock, flags);
  2496. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2497. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2498. }
  2499. return;
  2500. }
  2501. spin_lock_irqsave(&priv->lock, flags);
  2502. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2503. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2504. spin_unlock_irqrestore(&priv->lock, flags);
  2505. /* wake up ucode */
  2506. msleep(10);
  2507. spin_lock_irqsave(&priv->lock, flags);
  2508. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2509. if (!iwl4965_grab_nic_access(priv))
  2510. iwl4965_release_nic_access(priv);
  2511. spin_unlock_irqrestore(&priv->lock, flags);
  2512. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2513. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2514. "disabled by HW switch\n");
  2515. return;
  2516. }
  2517. queue_work(priv->workqueue, &priv->restart);
  2518. return;
  2519. }
  2520. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2521. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2522. {
  2523. u16 fc =
  2524. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2525. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2526. return;
  2527. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2528. return;
  2529. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2530. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2531. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2532. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2533. RX_RES_STATUS_BAD_ICV_MIC)
  2534. stats->flag |= RX_FLAG_MMIC_ERROR;
  2535. case RX_RES_STATUS_SEC_TYPE_WEP:
  2536. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2537. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2538. RX_RES_STATUS_DECRYPT_OK) {
  2539. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2540. stats->flag |= RX_FLAG_DECRYPTED;
  2541. }
  2542. break;
  2543. default:
  2544. break;
  2545. }
  2546. }
  2547. #define IWL_PACKET_RETRY_TIME HZ
  2548. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2549. {
  2550. u16 sc = le16_to_cpu(header->seq_ctrl);
  2551. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2552. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2553. u16 *last_seq, *last_frag;
  2554. unsigned long *last_time;
  2555. switch (priv->iw_mode) {
  2556. case IEEE80211_IF_TYPE_IBSS:{
  2557. struct list_head *p;
  2558. struct iwl4965_ibss_seq *entry = NULL;
  2559. u8 *mac = header->addr2;
  2560. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2561. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2562. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2563. if (!compare_ether_addr(entry->mac, mac))
  2564. break;
  2565. }
  2566. if (p == &priv->ibss_mac_hash[index]) {
  2567. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2568. if (!entry) {
  2569. IWL_ERROR("Cannot malloc new mac entry\n");
  2570. return 0;
  2571. }
  2572. memcpy(entry->mac, mac, ETH_ALEN);
  2573. entry->seq_num = seq;
  2574. entry->frag_num = frag;
  2575. entry->packet_time = jiffies;
  2576. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2577. return 0;
  2578. }
  2579. last_seq = &entry->seq_num;
  2580. last_frag = &entry->frag_num;
  2581. last_time = &entry->packet_time;
  2582. break;
  2583. }
  2584. case IEEE80211_IF_TYPE_STA:
  2585. last_seq = &priv->last_seq_num;
  2586. last_frag = &priv->last_frag_num;
  2587. last_time = &priv->last_packet_time;
  2588. break;
  2589. default:
  2590. return 0;
  2591. }
  2592. if ((*last_seq == seq) &&
  2593. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2594. if (*last_frag == frag)
  2595. goto drop;
  2596. if (*last_frag + 1 != frag)
  2597. /* out-of-order fragment */
  2598. goto drop;
  2599. } else
  2600. *last_seq = seq;
  2601. *last_frag = frag;
  2602. *last_time = jiffies;
  2603. return 0;
  2604. drop:
  2605. return 1;
  2606. }
  2607. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2608. #include "iwl-spectrum.h"
  2609. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2610. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2611. #define TIME_UNIT 1024
  2612. /*
  2613. * extended beacon time format
  2614. * time in usec will be changed into a 32-bit value in 8:24 format
  2615. * the high 1 byte is the beacon counts
  2616. * the lower 3 bytes is the time in usec within one beacon interval
  2617. */
  2618. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2619. {
  2620. u32 quot;
  2621. u32 rem;
  2622. u32 interval = beacon_interval * 1024;
  2623. if (!interval || !usec)
  2624. return 0;
  2625. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2626. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2627. return (quot << 24) + rem;
  2628. }
  2629. /* base is usually what we get from ucode with each received frame,
  2630. * the same as HW timer counter counting down
  2631. */
  2632. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2633. {
  2634. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2635. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2636. u32 interval = beacon_interval * TIME_UNIT;
  2637. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2638. (addon & BEACON_TIME_MASK_HIGH);
  2639. if (base_low > addon_low)
  2640. res += base_low - addon_low;
  2641. else if (base_low < addon_low) {
  2642. res += interval + base_low - addon_low;
  2643. res += (1 << 24);
  2644. } else
  2645. res += (1 << 24);
  2646. return cpu_to_le32(res);
  2647. }
  2648. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2649. struct ieee80211_measurement_params *params,
  2650. u8 type)
  2651. {
  2652. struct iwl4965_spectrum_cmd spectrum;
  2653. struct iwl4965_rx_packet *res;
  2654. struct iwl4965_host_cmd cmd = {
  2655. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2656. .data = (void *)&spectrum,
  2657. .meta.flags = CMD_WANT_SKB,
  2658. };
  2659. u32 add_time = le64_to_cpu(params->start_time);
  2660. int rc;
  2661. int spectrum_resp_status;
  2662. int duration = le16_to_cpu(params->duration);
  2663. if (iwl4965_is_associated(priv))
  2664. add_time =
  2665. iwl4965_usecs_to_beacons(
  2666. le64_to_cpu(params->start_time) - priv->last_tsf,
  2667. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2668. memset(&spectrum, 0, sizeof(spectrum));
  2669. spectrum.channel_count = cpu_to_le16(1);
  2670. spectrum.flags =
  2671. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2672. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2673. cmd.len = sizeof(spectrum);
  2674. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2675. if (iwl4965_is_associated(priv))
  2676. spectrum.start_time =
  2677. iwl4965_add_beacon_time(priv->last_beacon_time,
  2678. add_time,
  2679. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2680. else
  2681. spectrum.start_time = 0;
  2682. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2683. spectrum.channels[0].channel = params->channel;
  2684. spectrum.channels[0].type = type;
  2685. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2686. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2687. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2688. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2689. if (rc)
  2690. return rc;
  2691. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2692. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2693. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2694. rc = -EIO;
  2695. }
  2696. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2697. switch (spectrum_resp_status) {
  2698. case 0: /* Command will be handled */
  2699. if (res->u.spectrum.id != 0xff) {
  2700. IWL_DEBUG_INFO
  2701. ("Replaced existing measurement: %d\n",
  2702. res->u.spectrum.id);
  2703. priv->measurement_status &= ~MEASUREMENT_READY;
  2704. }
  2705. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2706. rc = 0;
  2707. break;
  2708. case 1: /* Command will not be handled */
  2709. rc = -EAGAIN;
  2710. break;
  2711. }
  2712. dev_kfree_skb_any(cmd.meta.u.skb);
  2713. return rc;
  2714. }
  2715. #endif
  2716. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2717. struct iwl4965_tx_info *tx_sta)
  2718. {
  2719. tx_sta->status.ack_signal = 0;
  2720. tx_sta->status.excessive_retries = 0;
  2721. tx_sta->status.queue_length = 0;
  2722. tx_sta->status.queue_number = 0;
  2723. if (in_interrupt())
  2724. ieee80211_tx_status_irqsafe(priv->hw,
  2725. tx_sta->skb[0], &(tx_sta->status));
  2726. else
  2727. ieee80211_tx_status(priv->hw,
  2728. tx_sta->skb[0], &(tx_sta->status));
  2729. tx_sta->skb[0] = NULL;
  2730. }
  2731. /**
  2732. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2733. *
  2734. * When FW advances 'R' index, all entries between old and new 'R' index
  2735. * need to be reclaimed. As result, some free space forms. If there is
  2736. * enough free space (> low mark), wake the stack that feeds us.
  2737. */
  2738. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2739. {
  2740. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2741. struct iwl4965_queue *q = &txq->q;
  2742. int nfreed = 0;
  2743. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2744. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2745. "is out of range [0-%d] %d %d.\n", txq_id,
  2746. index, q->n_bd, q->write_ptr, q->read_ptr);
  2747. return 0;
  2748. }
  2749. for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
  2750. q->read_ptr != index;
  2751. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2752. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2753. iwl4965_txstatus_to_ieee(priv,
  2754. &(txq->txb[txq->q.read_ptr]));
  2755. iwl4965_hw_txq_free_tfd(priv, txq);
  2756. } else if (nfreed > 1) {
  2757. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2758. q->write_ptr, q->read_ptr);
  2759. queue_work(priv->workqueue, &priv->restart);
  2760. }
  2761. nfreed++;
  2762. }
  2763. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2764. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2765. priv->mac80211_registered)
  2766. ieee80211_wake_queue(priv->hw, txq_id); */
  2767. return nfreed;
  2768. }
  2769. static int iwl4965_is_tx_success(u32 status)
  2770. {
  2771. status &= TX_STATUS_MSK;
  2772. return (status == TX_STATUS_SUCCESS)
  2773. || (status == TX_STATUS_DIRECT_DONE);
  2774. }
  2775. /******************************************************************************
  2776. *
  2777. * Generic RX handler implementations
  2778. *
  2779. ******************************************************************************/
  2780. #ifdef CONFIG_IWL4965_HT
  2781. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  2782. struct ieee80211_hdr *hdr)
  2783. {
  2784. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2785. return IWL_AP_ID;
  2786. else {
  2787. u8 *da = ieee80211_get_DA(hdr);
  2788. return iwl4965_hw_find_station(priv, da);
  2789. }
  2790. }
  2791. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2792. struct iwl4965_priv *priv, int txq_id, int idx)
  2793. {
  2794. if (priv->txq[txq_id].txb[idx].skb[0])
  2795. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2796. txb[idx].skb[0]->data;
  2797. return NULL;
  2798. }
  2799. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2800. {
  2801. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2802. tx_resp->frame_count);
  2803. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2804. }
  2805. /**
  2806. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2807. */
  2808. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  2809. struct iwl4965_ht_agg *agg,
  2810. struct iwl4965_tx_resp_agg *tx_resp,
  2811. u16 start_idx)
  2812. {
  2813. u16 status;
  2814. struct agg_tx_status *frame_status = &tx_resp->status;
  2815. struct ieee80211_tx_status *tx_status = NULL;
  2816. struct ieee80211_hdr *hdr = NULL;
  2817. int i, sh;
  2818. int txq_id, idx;
  2819. u16 seq;
  2820. if (agg->wait_for_ba)
  2821. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2822. agg->frame_count = tx_resp->frame_count;
  2823. agg->start_idx = start_idx;
  2824. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2825. agg->bitmap = 0;
  2826. /* # frames attempted by Tx command */
  2827. if (agg->frame_count == 1) {
  2828. /* Only one frame was attempted; no block-ack will arrive */
  2829. status = le16_to_cpu(frame_status[0].status);
  2830. seq = le16_to_cpu(frame_status[0].sequence);
  2831. idx = SEQ_TO_INDEX(seq);
  2832. txq_id = SEQ_TO_QUEUE(seq);
  2833. /* FIXME: code repetition */
  2834. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2835. agg->frame_count, agg->start_idx, idx);
  2836. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2837. tx_status->retry_count = tx_resp->failure_frame;
  2838. tx_status->queue_number = status & 0xff;
  2839. tx_status->queue_length = tx_resp->failure_rts;
  2840. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2841. tx_status->flags = iwl4965_is_tx_success(status)?
  2842. IEEE80211_TX_STATUS_ACK : 0;
  2843. iwl4965_hwrate_to_tx_control(priv,
  2844. le32_to_cpu(tx_resp->rate_n_flags),
  2845. &tx_status->control);
  2846. /* FIXME: code repetition end */
  2847. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2848. status & 0xff, tx_resp->failure_frame);
  2849. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2850. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2851. agg->wait_for_ba = 0;
  2852. } else {
  2853. /* Two or more frames were attempted; expect block-ack */
  2854. u64 bitmap = 0;
  2855. int start = agg->start_idx;
  2856. /* Construct bit-map of pending frames within Tx window */
  2857. for (i = 0; i < agg->frame_count; i++) {
  2858. u16 sc;
  2859. status = le16_to_cpu(frame_status[i].status);
  2860. seq = le16_to_cpu(frame_status[i].sequence);
  2861. idx = SEQ_TO_INDEX(seq);
  2862. txq_id = SEQ_TO_QUEUE(seq);
  2863. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2864. AGG_TX_STATE_ABORT_MSK))
  2865. continue;
  2866. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2867. agg->frame_count, txq_id, idx);
  2868. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2869. sc = le16_to_cpu(hdr->seq_ctrl);
  2870. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2871. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2872. " idx=%d, seq_idx=%d, seq=%d\n",
  2873. idx, SEQ_TO_SN(sc),
  2874. hdr->seq_ctrl);
  2875. return -1;
  2876. }
  2877. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2878. i, idx, SEQ_TO_SN(sc));
  2879. sh = idx - start;
  2880. if (sh > 64) {
  2881. sh = (start - idx) + 0xff;
  2882. bitmap = bitmap << sh;
  2883. sh = 0;
  2884. start = idx;
  2885. } else if (sh < -64)
  2886. sh = 0xff - (start - idx);
  2887. else if (sh < 0) {
  2888. sh = start - idx;
  2889. start = idx;
  2890. bitmap = bitmap << sh;
  2891. sh = 0;
  2892. }
  2893. bitmap |= (1 << sh);
  2894. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2895. start, (u32)(bitmap & 0xFFFFFFFF));
  2896. }
  2897. agg->bitmap = bitmap;
  2898. agg->start_idx = start;
  2899. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2900. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2901. agg->frame_count, agg->start_idx,
  2902. agg->bitmap);
  2903. if (bitmap)
  2904. agg->wait_for_ba = 1;
  2905. }
  2906. return 0;
  2907. }
  2908. #endif
  2909. /**
  2910. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2911. */
  2912. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  2913. struct iwl4965_rx_mem_buffer *rxb)
  2914. {
  2915. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2916. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2917. int txq_id = SEQ_TO_QUEUE(sequence);
  2918. int index = SEQ_TO_INDEX(sequence);
  2919. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2920. struct ieee80211_tx_status *tx_status;
  2921. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2922. u32 status = le32_to_cpu(tx_resp->status);
  2923. #ifdef CONFIG_IWL4965_HT
  2924. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2925. struct ieee80211_hdr *hdr;
  2926. __le16 *qc;
  2927. #endif
  2928. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2929. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2930. "is out of range [0-%d] %d %d\n", txq_id,
  2931. index, txq->q.n_bd, txq->q.write_ptr,
  2932. txq->q.read_ptr);
  2933. return;
  2934. }
  2935. #ifdef CONFIG_IWL4965_HT
  2936. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2937. qc = ieee80211_get_qos_ctrl(hdr);
  2938. if (qc)
  2939. tid = le16_to_cpu(*qc) & 0xf;
  2940. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2941. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2942. IWL_ERROR("Station not known\n");
  2943. return;
  2944. }
  2945. if (txq->sched_retry) {
  2946. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2947. struct iwl4965_ht_agg *agg = NULL;
  2948. if (!qc)
  2949. return;
  2950. agg = &priv->stations[sta_id].tid[tid].agg;
  2951. iwl4965_tx_status_reply_tx(priv, agg,
  2952. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2953. if ((tx_resp->frame_count == 1) &&
  2954. !iwl4965_is_tx_success(status)) {
  2955. /* TODO: send BAR */
  2956. }
  2957. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2958. int freed;
  2959. index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2960. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2961. "%d index %d\n", scd_ssn , index);
  2962. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2963. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2964. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2965. txq_id >= 0 && priv->mac80211_registered &&
  2966. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2967. ieee80211_wake_queue(priv->hw, txq_id);
  2968. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2969. }
  2970. } else {
  2971. #endif /* CONFIG_IWL4965_HT */
  2972. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2973. tx_status->retry_count = tx_resp->failure_frame;
  2974. tx_status->queue_number = status;
  2975. tx_status->queue_length = tx_resp->bt_kill_count;
  2976. tx_status->queue_length |= tx_resp->failure_rts;
  2977. tx_status->flags =
  2978. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2979. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2980. &tx_status->control);
  2981. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2982. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2983. status, le32_to_cpu(tx_resp->rate_n_flags),
  2984. tx_resp->failure_frame);
  2985. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2986. if (index != -1) {
  2987. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2988. #ifdef CONFIG_IWL4965_HT
  2989. if (tid != MAX_TID_COUNT)
  2990. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2991. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2992. (txq_id >= 0) &&
  2993. priv->mac80211_registered)
  2994. ieee80211_wake_queue(priv->hw, txq_id);
  2995. if (tid != MAX_TID_COUNT)
  2996. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2997. #endif
  2998. }
  2999. #ifdef CONFIG_IWL4965_HT
  3000. }
  3001. #endif /* CONFIG_IWL4965_HT */
  3002. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3003. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3004. }
  3005. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  3006. struct iwl4965_rx_mem_buffer *rxb)
  3007. {
  3008. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3009. struct iwl4965_alive_resp *palive;
  3010. struct delayed_work *pwork;
  3011. palive = &pkt->u.alive_frame;
  3012. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3013. "0x%01X 0x%01X\n",
  3014. palive->is_valid, palive->ver_type,
  3015. palive->ver_subtype);
  3016. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3017. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3018. memcpy(&priv->card_alive_init,
  3019. &pkt->u.alive_frame,
  3020. sizeof(struct iwl4965_init_alive_resp));
  3021. pwork = &priv->init_alive_start;
  3022. } else {
  3023. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3024. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3025. sizeof(struct iwl4965_alive_resp));
  3026. pwork = &priv->alive_start;
  3027. }
  3028. /* We delay the ALIVE response by 5ms to
  3029. * give the HW RF Kill time to activate... */
  3030. if (palive->is_valid == UCODE_VALID_OK)
  3031. queue_delayed_work(priv->workqueue, pwork,
  3032. msecs_to_jiffies(5));
  3033. else
  3034. IWL_WARNING("uCode did not respond OK.\n");
  3035. }
  3036. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  3037. struct iwl4965_rx_mem_buffer *rxb)
  3038. {
  3039. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3040. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3041. return;
  3042. }
  3043. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  3044. struct iwl4965_rx_mem_buffer *rxb)
  3045. {
  3046. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3047. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3048. "seq 0x%04X ser 0x%08X\n",
  3049. le32_to_cpu(pkt->u.err_resp.error_type),
  3050. get_cmd_string(pkt->u.err_resp.cmd_id),
  3051. pkt->u.err_resp.cmd_id,
  3052. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3053. le32_to_cpu(pkt->u.err_resp.error_info));
  3054. }
  3055. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3056. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  3057. {
  3058. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3059. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3060. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  3061. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3062. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3063. rxon->channel = csa->channel;
  3064. priv->staging_rxon.channel = csa->channel;
  3065. }
  3066. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  3067. struct iwl4965_rx_mem_buffer *rxb)
  3068. {
  3069. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  3070. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3071. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3072. if (!report->state) {
  3073. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3074. "Spectrum Measure Notification: Start\n");
  3075. return;
  3076. }
  3077. memcpy(&priv->measure_report, report, sizeof(*report));
  3078. priv->measurement_status |= MEASUREMENT_READY;
  3079. #endif
  3080. }
  3081. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  3082. struct iwl4965_rx_mem_buffer *rxb)
  3083. {
  3084. #ifdef CONFIG_IWL4965_DEBUG
  3085. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3086. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3087. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3088. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3089. #endif
  3090. }
  3091. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3092. struct iwl4965_rx_mem_buffer *rxb)
  3093. {
  3094. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3095. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3096. "notification for %s:\n",
  3097. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3098. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3099. }
  3100. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3101. {
  3102. struct iwl4965_priv *priv =
  3103. container_of(work, struct iwl4965_priv, beacon_update);
  3104. struct sk_buff *beacon;
  3105. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3106. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  3107. if (!beacon) {
  3108. IWL_ERROR("update beacon failed\n");
  3109. return;
  3110. }
  3111. mutex_lock(&priv->mutex);
  3112. /* new beacon skb is allocated every time; dispose previous.*/
  3113. if (priv->ibss_beacon)
  3114. dev_kfree_skb(priv->ibss_beacon);
  3115. priv->ibss_beacon = beacon;
  3116. mutex_unlock(&priv->mutex);
  3117. iwl4965_send_beacon_cmd(priv);
  3118. }
  3119. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3120. struct iwl4965_rx_mem_buffer *rxb)
  3121. {
  3122. #ifdef CONFIG_IWL4965_DEBUG
  3123. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3124. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3125. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3126. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3127. "tsf %d %d rate %d\n",
  3128. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3129. beacon->beacon_notify_hdr.failure_frame,
  3130. le32_to_cpu(beacon->ibss_mgr_status),
  3131. le32_to_cpu(beacon->high_tsf),
  3132. le32_to_cpu(beacon->low_tsf), rate);
  3133. #endif
  3134. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3135. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3136. queue_work(priv->workqueue, &priv->beacon_update);
  3137. }
  3138. /* Service response to REPLY_SCAN_CMD (0x80) */
  3139. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3140. struct iwl4965_rx_mem_buffer *rxb)
  3141. {
  3142. #ifdef CONFIG_IWL4965_DEBUG
  3143. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3144. struct iwl4965_scanreq_notification *notif =
  3145. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3146. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3147. #endif
  3148. }
  3149. /* Service SCAN_START_NOTIFICATION (0x82) */
  3150. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3151. struct iwl4965_rx_mem_buffer *rxb)
  3152. {
  3153. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3154. struct iwl4965_scanstart_notification *notif =
  3155. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3156. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3157. IWL_DEBUG_SCAN("Scan start: "
  3158. "%d [802.11%s] "
  3159. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3160. notif->channel,
  3161. notif->band ? "bg" : "a",
  3162. notif->tsf_high,
  3163. notif->tsf_low, notif->status, notif->beacon_timer);
  3164. }
  3165. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3166. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3167. struct iwl4965_rx_mem_buffer *rxb)
  3168. {
  3169. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3170. struct iwl4965_scanresults_notification *notif =
  3171. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3172. IWL_DEBUG_SCAN("Scan ch.res: "
  3173. "%d [802.11%s] "
  3174. "(TSF: 0x%08X:%08X) - %d "
  3175. "elapsed=%lu usec (%dms since last)\n",
  3176. notif->channel,
  3177. notif->band ? "bg" : "a",
  3178. le32_to_cpu(notif->tsf_high),
  3179. le32_to_cpu(notif->tsf_low),
  3180. le32_to_cpu(notif->statistics[0]),
  3181. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3182. jiffies_to_msecs(elapsed_jiffies
  3183. (priv->last_scan_jiffies, jiffies)));
  3184. priv->last_scan_jiffies = jiffies;
  3185. priv->next_scan_jiffies = 0;
  3186. }
  3187. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3188. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3189. struct iwl4965_rx_mem_buffer *rxb)
  3190. {
  3191. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3192. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3193. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3194. scan_notif->scanned_channels,
  3195. scan_notif->tsf_low,
  3196. scan_notif->tsf_high, scan_notif->status);
  3197. /* The HW is no longer scanning */
  3198. clear_bit(STATUS_SCAN_HW, &priv->status);
  3199. /* The scan completion notification came in, so kill that timer... */
  3200. cancel_delayed_work(&priv->scan_check);
  3201. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3202. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3203. jiffies_to_msecs(elapsed_jiffies
  3204. (priv->scan_pass_start, jiffies)));
  3205. /* Remove this scanned band from the list
  3206. * of pending bands to scan */
  3207. priv->scan_bands--;
  3208. /* If a request to abort was given, or the scan did not succeed
  3209. * then we reset the scan state machine and terminate,
  3210. * re-queuing another scan if one has been requested */
  3211. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3212. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3213. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3214. } else {
  3215. /* If there are more bands on this scan pass reschedule */
  3216. if (priv->scan_bands > 0)
  3217. goto reschedule;
  3218. }
  3219. priv->last_scan_jiffies = jiffies;
  3220. priv->next_scan_jiffies = 0;
  3221. IWL_DEBUG_INFO("Setting scan to off\n");
  3222. clear_bit(STATUS_SCANNING, &priv->status);
  3223. IWL_DEBUG_INFO("Scan took %dms\n",
  3224. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3225. queue_work(priv->workqueue, &priv->scan_completed);
  3226. return;
  3227. reschedule:
  3228. priv->scan_pass_start = jiffies;
  3229. queue_work(priv->workqueue, &priv->request_scan);
  3230. }
  3231. /* Handle notification from uCode that card's power state is changing
  3232. * due to software, hardware, or critical temperature RFKILL */
  3233. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3234. struct iwl4965_rx_mem_buffer *rxb)
  3235. {
  3236. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3237. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3238. unsigned long status = priv->status;
  3239. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3240. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3241. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3242. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3243. RF_CARD_DISABLED)) {
  3244. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3245. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3246. if (!iwl4965_grab_nic_access(priv)) {
  3247. iwl4965_write_direct32(
  3248. priv, HBUS_TARG_MBX_C,
  3249. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3250. iwl4965_release_nic_access(priv);
  3251. }
  3252. if (!(flags & RXON_CARD_DISABLED)) {
  3253. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3254. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3255. if (!iwl4965_grab_nic_access(priv)) {
  3256. iwl4965_write_direct32(
  3257. priv, HBUS_TARG_MBX_C,
  3258. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3259. iwl4965_release_nic_access(priv);
  3260. }
  3261. }
  3262. if (flags & RF_CARD_DISABLED) {
  3263. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3264. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3265. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3266. if (!iwl4965_grab_nic_access(priv))
  3267. iwl4965_release_nic_access(priv);
  3268. }
  3269. }
  3270. if (flags & HW_CARD_DISABLED)
  3271. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3272. else
  3273. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3274. if (flags & SW_CARD_DISABLED)
  3275. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3276. else
  3277. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3278. if (!(flags & RXON_CARD_DISABLED))
  3279. iwl4965_scan_cancel(priv);
  3280. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3281. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3282. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3283. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3284. queue_work(priv->workqueue, &priv->rf_kill);
  3285. else
  3286. wake_up_interruptible(&priv->wait_command_queue);
  3287. }
  3288. /**
  3289. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3290. *
  3291. * Setup the RX handlers for each of the reply types sent from the uCode
  3292. * to the host.
  3293. *
  3294. * This function chains into the hardware specific files for them to setup
  3295. * any hardware specific handlers as well.
  3296. */
  3297. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3298. {
  3299. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3300. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3301. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3302. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3303. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3304. iwl4965_rx_spectrum_measure_notif;
  3305. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3306. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3307. iwl4965_rx_pm_debug_statistics_notif;
  3308. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3309. /*
  3310. * The same handler is used for both the REPLY to a discrete
  3311. * statistics request from the host as well as for the periodic
  3312. * statistics notifications (after received beacons) from the uCode.
  3313. */
  3314. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3315. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3316. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3317. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3318. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3319. iwl4965_rx_scan_results_notif;
  3320. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3321. iwl4965_rx_scan_complete_notif;
  3322. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3323. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3324. /* Set up hardware specific Rx handlers */
  3325. iwl4965_hw_rx_handler_setup(priv);
  3326. }
  3327. /**
  3328. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3329. * @rxb: Rx buffer to reclaim
  3330. *
  3331. * If an Rx buffer has an async callback associated with it the callback
  3332. * will be executed. The attached skb (if present) will only be freed
  3333. * if the callback returns 1
  3334. */
  3335. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3336. struct iwl4965_rx_mem_buffer *rxb)
  3337. {
  3338. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3339. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3340. int txq_id = SEQ_TO_QUEUE(sequence);
  3341. int index = SEQ_TO_INDEX(sequence);
  3342. int huge = sequence & SEQ_HUGE_FRAME;
  3343. int cmd_index;
  3344. struct iwl4965_cmd *cmd;
  3345. /* If a Tx command is being handled and it isn't in the actual
  3346. * command queue then there a command routing bug has been introduced
  3347. * in the queue management code. */
  3348. if (txq_id != IWL_CMD_QUEUE_NUM)
  3349. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3350. txq_id, pkt->hdr.cmd);
  3351. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3352. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3353. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3354. /* Input error checking is done when commands are added to queue. */
  3355. if (cmd->meta.flags & CMD_WANT_SKB) {
  3356. cmd->meta.source->u.skb = rxb->skb;
  3357. rxb->skb = NULL;
  3358. } else if (cmd->meta.u.callback &&
  3359. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3360. rxb->skb = NULL;
  3361. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3362. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3363. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3364. wake_up_interruptible(&priv->wait_command_queue);
  3365. }
  3366. }
  3367. /************************** RX-FUNCTIONS ****************************/
  3368. /*
  3369. * Rx theory of operation
  3370. *
  3371. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3372. * each of which point to Receive Buffers to be filled by 4965. These get
  3373. * used not only for Rx frames, but for any command response or notification
  3374. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3375. * of indexes into the circular buffer.
  3376. *
  3377. * Rx Queue Indexes
  3378. * The host/firmware share two index registers for managing the Rx buffers.
  3379. *
  3380. * The READ index maps to the first position that the firmware may be writing
  3381. * to -- the driver can read up to (but not including) this position and get
  3382. * good data.
  3383. * The READ index is managed by the firmware once the card is enabled.
  3384. *
  3385. * The WRITE index maps to the last position the driver has read from -- the
  3386. * position preceding WRITE is the last slot the firmware can place a packet.
  3387. *
  3388. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3389. * WRITE = READ.
  3390. *
  3391. * During initialization, the host sets up the READ queue position to the first
  3392. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3393. *
  3394. * When the firmware places a packet in a buffer, it will advance the READ index
  3395. * and fire the RX interrupt. The driver can then query the READ index and
  3396. * process as many packets as possible, moving the WRITE index forward as it
  3397. * resets the Rx queue buffers with new memory.
  3398. *
  3399. * The management in the driver is as follows:
  3400. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3401. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3402. * to replenish the iwl->rxq->rx_free.
  3403. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3404. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3405. * 'processed' and 'read' driver indexes as well)
  3406. * + A received packet is processed and handed to the kernel network stack,
  3407. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3408. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3409. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3410. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3411. * were enough free buffers and RX_STALLED is set it is cleared.
  3412. *
  3413. *
  3414. * Driver sequence:
  3415. *
  3416. * iwl4965_rx_queue_alloc() Allocates rx_free
  3417. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3418. * iwl4965_rx_queue_restock
  3419. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3420. * queue, updates firmware pointers, and updates
  3421. * the WRITE index. If insufficient rx_free buffers
  3422. * are available, schedules iwl4965_rx_replenish
  3423. *
  3424. * -- enable interrupts --
  3425. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3426. * READ INDEX, detaching the SKB from the pool.
  3427. * Moves the packet buffer from queue to rx_used.
  3428. * Calls iwl4965_rx_queue_restock to refill any empty
  3429. * slots.
  3430. * ...
  3431. *
  3432. */
  3433. /**
  3434. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3435. */
  3436. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3437. {
  3438. int s = q->read - q->write;
  3439. if (s <= 0)
  3440. s += RX_QUEUE_SIZE;
  3441. /* keep some buffer to not confuse full and empty queue */
  3442. s -= 2;
  3443. if (s < 0)
  3444. s = 0;
  3445. return s;
  3446. }
  3447. /**
  3448. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3449. */
  3450. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3451. {
  3452. u32 reg = 0;
  3453. int rc = 0;
  3454. unsigned long flags;
  3455. spin_lock_irqsave(&q->lock, flags);
  3456. if (q->need_update == 0)
  3457. goto exit_unlock;
  3458. /* If power-saving is in use, make sure device is awake */
  3459. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3460. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3461. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3462. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3463. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3464. goto exit_unlock;
  3465. }
  3466. rc = iwl4965_grab_nic_access(priv);
  3467. if (rc)
  3468. goto exit_unlock;
  3469. /* Device expects a multiple of 8 */
  3470. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3471. q->write & ~0x7);
  3472. iwl4965_release_nic_access(priv);
  3473. /* Else device is assumed to be awake */
  3474. } else
  3475. /* Device expects a multiple of 8 */
  3476. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3477. q->need_update = 0;
  3478. exit_unlock:
  3479. spin_unlock_irqrestore(&q->lock, flags);
  3480. return rc;
  3481. }
  3482. /**
  3483. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3484. */
  3485. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3486. dma_addr_t dma_addr)
  3487. {
  3488. return cpu_to_le32((u32)(dma_addr >> 8));
  3489. }
  3490. /**
  3491. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3492. *
  3493. * If there are slots in the RX queue that need to be restocked,
  3494. * and we have free pre-allocated buffers, fill the ranks as much
  3495. * as we can, pulling from rx_free.
  3496. *
  3497. * This moves the 'write' index forward to catch up with 'processed', and
  3498. * also updates the memory address in the firmware to reference the new
  3499. * target buffer.
  3500. */
  3501. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3502. {
  3503. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3504. struct list_head *element;
  3505. struct iwl4965_rx_mem_buffer *rxb;
  3506. unsigned long flags;
  3507. int write, rc;
  3508. spin_lock_irqsave(&rxq->lock, flags);
  3509. write = rxq->write & ~0x7;
  3510. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3511. /* Get next free Rx buffer, remove from free list */
  3512. element = rxq->rx_free.next;
  3513. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3514. list_del(element);
  3515. /* Point to Rx buffer via next RBD in circular buffer */
  3516. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3517. rxq->queue[rxq->write] = rxb;
  3518. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3519. rxq->free_count--;
  3520. }
  3521. spin_unlock_irqrestore(&rxq->lock, flags);
  3522. /* If the pre-allocated buffer pool is dropping low, schedule to
  3523. * refill it */
  3524. if (rxq->free_count <= RX_LOW_WATERMARK)
  3525. queue_work(priv->workqueue, &priv->rx_replenish);
  3526. /* If we've added more space for the firmware to place data, tell it.
  3527. * Increment device's write pointer in multiples of 8. */
  3528. if ((write != (rxq->write & ~0x7))
  3529. || (abs(rxq->write - rxq->read) > 7)) {
  3530. spin_lock_irqsave(&rxq->lock, flags);
  3531. rxq->need_update = 1;
  3532. spin_unlock_irqrestore(&rxq->lock, flags);
  3533. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3534. if (rc)
  3535. return rc;
  3536. }
  3537. return 0;
  3538. }
  3539. /**
  3540. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3541. *
  3542. * When moving to rx_free an SKB is allocated for the slot.
  3543. *
  3544. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3545. * This is called as a scheduled work item (except for during initialization)
  3546. */
  3547. static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
  3548. {
  3549. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3550. struct list_head *element;
  3551. struct iwl4965_rx_mem_buffer *rxb;
  3552. unsigned long flags;
  3553. spin_lock_irqsave(&rxq->lock, flags);
  3554. while (!list_empty(&rxq->rx_used)) {
  3555. element = rxq->rx_used.next;
  3556. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3557. /* Alloc a new receive buffer */
  3558. rxb->skb =
  3559. alloc_skb(priv->hw_setting.rx_buf_size,
  3560. __GFP_NOWARN | GFP_ATOMIC);
  3561. if (!rxb->skb) {
  3562. if (net_ratelimit())
  3563. printk(KERN_CRIT DRV_NAME
  3564. ": Can not allocate SKB buffers\n");
  3565. /* We don't reschedule replenish work here -- we will
  3566. * call the restock method and if it still needs
  3567. * more buffers it will schedule replenish */
  3568. break;
  3569. }
  3570. priv->alloc_rxb_skb++;
  3571. list_del(element);
  3572. /* Get physical address of RB/SKB */
  3573. rxb->dma_addr =
  3574. pci_map_single(priv->pci_dev, rxb->skb->data,
  3575. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3576. list_add_tail(&rxb->list, &rxq->rx_free);
  3577. rxq->free_count++;
  3578. }
  3579. spin_unlock_irqrestore(&rxq->lock, flags);
  3580. }
  3581. /*
  3582. * this should be called while priv->lock is locked
  3583. */
  3584. static void __iwl4965_rx_replenish(void *data)
  3585. {
  3586. struct iwl4965_priv *priv = data;
  3587. iwl4965_rx_allocate(priv);
  3588. iwl4965_rx_queue_restock(priv);
  3589. }
  3590. void iwl4965_rx_replenish(void *data)
  3591. {
  3592. struct iwl4965_priv *priv = data;
  3593. unsigned long flags;
  3594. iwl4965_rx_allocate(priv);
  3595. spin_lock_irqsave(&priv->lock, flags);
  3596. iwl4965_rx_queue_restock(priv);
  3597. spin_unlock_irqrestore(&priv->lock, flags);
  3598. }
  3599. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3600. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3601. * This free routine walks the list of POOL entries and if SKB is set to
  3602. * non NULL it is unmapped and freed
  3603. */
  3604. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3605. {
  3606. int i;
  3607. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3608. if (rxq->pool[i].skb != NULL) {
  3609. pci_unmap_single(priv->pci_dev,
  3610. rxq->pool[i].dma_addr,
  3611. priv->hw_setting.rx_buf_size,
  3612. PCI_DMA_FROMDEVICE);
  3613. dev_kfree_skb(rxq->pool[i].skb);
  3614. }
  3615. }
  3616. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3617. rxq->dma_addr);
  3618. rxq->bd = NULL;
  3619. }
  3620. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3621. {
  3622. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3623. struct pci_dev *dev = priv->pci_dev;
  3624. int i;
  3625. spin_lock_init(&rxq->lock);
  3626. INIT_LIST_HEAD(&rxq->rx_free);
  3627. INIT_LIST_HEAD(&rxq->rx_used);
  3628. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3629. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3630. if (!rxq->bd)
  3631. return -ENOMEM;
  3632. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3633. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3634. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3635. /* Set us so that we have processed and used all buffers, but have
  3636. * not restocked the Rx queue with fresh buffers */
  3637. rxq->read = rxq->write = 0;
  3638. rxq->free_count = 0;
  3639. rxq->need_update = 0;
  3640. return 0;
  3641. }
  3642. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3643. {
  3644. unsigned long flags;
  3645. int i;
  3646. spin_lock_irqsave(&rxq->lock, flags);
  3647. INIT_LIST_HEAD(&rxq->rx_free);
  3648. INIT_LIST_HEAD(&rxq->rx_used);
  3649. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3650. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3651. /* In the reset function, these buffers may have been allocated
  3652. * to an SKB, so we need to unmap and free potential storage */
  3653. if (rxq->pool[i].skb != NULL) {
  3654. pci_unmap_single(priv->pci_dev,
  3655. rxq->pool[i].dma_addr,
  3656. priv->hw_setting.rx_buf_size,
  3657. PCI_DMA_FROMDEVICE);
  3658. priv->alloc_rxb_skb--;
  3659. dev_kfree_skb(rxq->pool[i].skb);
  3660. rxq->pool[i].skb = NULL;
  3661. }
  3662. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3663. }
  3664. /* Set us so that we have processed and used all buffers, but have
  3665. * not restocked the Rx queue with fresh buffers */
  3666. rxq->read = rxq->write = 0;
  3667. rxq->free_count = 0;
  3668. spin_unlock_irqrestore(&rxq->lock, flags);
  3669. }
  3670. /* Convert linear signal-to-noise ratio into dB */
  3671. static u8 ratio2dB[100] = {
  3672. /* 0 1 2 3 4 5 6 7 8 9 */
  3673. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3674. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3675. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3676. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3677. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3678. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3679. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3680. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3681. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3682. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3683. };
  3684. /* Calculates a relative dB value from a ratio of linear
  3685. * (i.e. not dB) signal levels.
  3686. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3687. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3688. {
  3689. /* 1000:1 or higher just report as 60 dB */
  3690. if (sig_ratio >= 1000)
  3691. return 60;
  3692. /* 100:1 or higher, divide by 10 and use table,
  3693. * add 20 dB to make up for divide by 10 */
  3694. if (sig_ratio >= 100)
  3695. return (20 + (int)ratio2dB[sig_ratio/10]);
  3696. /* We shouldn't see this */
  3697. if (sig_ratio < 1)
  3698. return 0;
  3699. /* Use table for ratios 1:1 - 99:1 */
  3700. return (int)ratio2dB[sig_ratio];
  3701. }
  3702. #define PERFECT_RSSI (-20) /* dBm */
  3703. #define WORST_RSSI (-95) /* dBm */
  3704. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3705. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3706. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3707. * about formulas used below. */
  3708. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3709. {
  3710. int sig_qual;
  3711. int degradation = PERFECT_RSSI - rssi_dbm;
  3712. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3713. * as indicator; formula is (signal dbm - noise dbm).
  3714. * SNR at or above 40 is a great signal (100%).
  3715. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3716. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3717. if (noise_dbm) {
  3718. if (rssi_dbm - noise_dbm >= 40)
  3719. return 100;
  3720. else if (rssi_dbm < noise_dbm)
  3721. return 0;
  3722. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3723. /* Else use just the signal level.
  3724. * This formula is a least squares fit of data points collected and
  3725. * compared with a reference system that had a percentage (%) display
  3726. * for signal quality. */
  3727. } else
  3728. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3729. (15 * RSSI_RANGE + 62 * degradation)) /
  3730. (RSSI_RANGE * RSSI_RANGE);
  3731. if (sig_qual > 100)
  3732. sig_qual = 100;
  3733. else if (sig_qual < 1)
  3734. sig_qual = 0;
  3735. return sig_qual;
  3736. }
  3737. /**
  3738. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3739. *
  3740. * Uses the priv->rx_handlers callback function array to invoke
  3741. * the appropriate handlers, including command responses,
  3742. * frame-received notifications, and other notifications.
  3743. */
  3744. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3745. {
  3746. struct iwl4965_rx_mem_buffer *rxb;
  3747. struct iwl4965_rx_packet *pkt;
  3748. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3749. u32 r, i;
  3750. int reclaim;
  3751. unsigned long flags;
  3752. u8 fill_rx = 0;
  3753. u32 count = 8;
  3754. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3755. * buffer that the driver may process (last buffer filled by ucode). */
  3756. r = iwl4965_hw_get_rx_read(priv);
  3757. i = rxq->read;
  3758. /* Rx interrupt, but nothing sent from uCode */
  3759. if (i == r)
  3760. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3761. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3762. fill_rx = 1;
  3763. while (i != r) {
  3764. rxb = rxq->queue[i];
  3765. /* If an RXB doesn't have a Rx queue slot associated with it,
  3766. * then a bug has been introduced in the queue refilling
  3767. * routines -- catch it here */
  3768. BUG_ON(rxb == NULL);
  3769. rxq->queue[i] = NULL;
  3770. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3771. priv->hw_setting.rx_buf_size,
  3772. PCI_DMA_FROMDEVICE);
  3773. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3774. /* Reclaim a command buffer only if this packet is a response
  3775. * to a (driver-originated) command.
  3776. * If the packet (e.g. Rx frame) originated from uCode,
  3777. * there is no command buffer to reclaim.
  3778. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3779. * but apparently a few don't get set; catch them here. */
  3780. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3781. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3782. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3783. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3784. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3785. (pkt->hdr.cmd != REPLY_TX);
  3786. /* Based on type of command response or notification,
  3787. * handle those that need handling via function in
  3788. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3789. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3790. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3791. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3792. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3793. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3794. } else {
  3795. /* No handling needed */
  3796. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3797. "r %d i %d No handler needed for %s, 0x%02x\n",
  3798. r, i, get_cmd_string(pkt->hdr.cmd),
  3799. pkt->hdr.cmd);
  3800. }
  3801. if (reclaim) {
  3802. /* Invoke any callbacks, transfer the skb to caller, and
  3803. * fire off the (possibly) blocking iwl4965_send_cmd()
  3804. * as we reclaim the driver command queue */
  3805. if (rxb && rxb->skb)
  3806. iwl4965_tx_cmd_complete(priv, rxb);
  3807. else
  3808. IWL_WARNING("Claim null rxb?\n");
  3809. }
  3810. /* For now we just don't re-use anything. We can tweak this
  3811. * later to try and re-use notification packets and SKBs that
  3812. * fail to Rx correctly */
  3813. if (rxb->skb != NULL) {
  3814. priv->alloc_rxb_skb--;
  3815. dev_kfree_skb_any(rxb->skb);
  3816. rxb->skb = NULL;
  3817. }
  3818. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3819. priv->hw_setting.rx_buf_size,
  3820. PCI_DMA_FROMDEVICE);
  3821. spin_lock_irqsave(&rxq->lock, flags);
  3822. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3823. spin_unlock_irqrestore(&rxq->lock, flags);
  3824. i = (i + 1) & RX_QUEUE_MASK;
  3825. /* If there are a lot of unused frames,
  3826. * restock the Rx queue so ucode wont assert. */
  3827. if (fill_rx) {
  3828. count++;
  3829. if (count >= 8) {
  3830. priv->rxq.read = i;
  3831. __iwl4965_rx_replenish(priv);
  3832. count = 0;
  3833. }
  3834. }
  3835. }
  3836. /* Backtrack one entry */
  3837. priv->rxq.read = i;
  3838. iwl4965_rx_queue_restock(priv);
  3839. }
  3840. /**
  3841. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3842. */
  3843. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  3844. struct iwl4965_tx_queue *txq)
  3845. {
  3846. u32 reg = 0;
  3847. int rc = 0;
  3848. int txq_id = txq->q.id;
  3849. if (txq->need_update == 0)
  3850. return rc;
  3851. /* if we're trying to save power */
  3852. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3853. /* wake up nic if it's powered down ...
  3854. * uCode will wake up, and interrupt us again, so next
  3855. * time we'll skip this part. */
  3856. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3857. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3858. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3859. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3860. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3861. return rc;
  3862. }
  3863. /* restore this queue's parameters in nic hardware. */
  3864. rc = iwl4965_grab_nic_access(priv);
  3865. if (rc)
  3866. return rc;
  3867. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  3868. txq->q.write_ptr | (txq_id << 8));
  3869. iwl4965_release_nic_access(priv);
  3870. /* else not in power-save mode, uCode will never sleep when we're
  3871. * trying to tx (during RFKILL, we're not trying to tx). */
  3872. } else
  3873. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  3874. txq->q.write_ptr | (txq_id << 8));
  3875. txq->need_update = 0;
  3876. return rc;
  3877. }
  3878. #ifdef CONFIG_IWL4965_DEBUG
  3879. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3880. {
  3881. DECLARE_MAC_BUF(mac);
  3882. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3883. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3884. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3885. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3886. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3887. le32_to_cpu(rxon->filter_flags));
  3888. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3889. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3890. rxon->ofdm_basic_rates);
  3891. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3892. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3893. print_mac(mac, rxon->node_addr));
  3894. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3895. print_mac(mac, rxon->bssid_addr));
  3896. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3897. }
  3898. #endif
  3899. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  3900. {
  3901. IWL_DEBUG_ISR("Enabling interrupts\n");
  3902. set_bit(STATUS_INT_ENABLED, &priv->status);
  3903. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3904. }
  3905. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  3906. {
  3907. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3908. /* disable interrupts from uCode/NIC to host */
  3909. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  3910. /* acknowledge/clear/reset any interrupts still pending
  3911. * from uCode or flow handler (Rx/Tx DMA) */
  3912. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  3913. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3914. IWL_DEBUG_ISR("Disabled interrupts\n");
  3915. }
  3916. static const char *desc_lookup(int i)
  3917. {
  3918. switch (i) {
  3919. case 1:
  3920. return "FAIL";
  3921. case 2:
  3922. return "BAD_PARAM";
  3923. case 3:
  3924. return "BAD_CHECKSUM";
  3925. case 4:
  3926. return "NMI_INTERRUPT";
  3927. case 5:
  3928. return "SYSASSERT";
  3929. case 6:
  3930. return "FATAL_ERROR";
  3931. }
  3932. return "UNKNOWN";
  3933. }
  3934. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3935. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3936. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  3937. {
  3938. u32 data2, line;
  3939. u32 desc, time, count, base, data1;
  3940. u32 blink1, blink2, ilink1, ilink2;
  3941. int rc;
  3942. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3943. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3944. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3945. return;
  3946. }
  3947. rc = iwl4965_grab_nic_access(priv);
  3948. if (rc) {
  3949. IWL_WARNING("Can not read from adapter at this time.\n");
  3950. return;
  3951. }
  3952. count = iwl4965_read_targ_mem(priv, base);
  3953. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3954. IWL_ERROR("Start IWL Error Log Dump:\n");
  3955. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3956. }
  3957. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  3958. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  3959. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  3960. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  3961. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  3962. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  3963. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  3964. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  3965. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  3966. IWL_ERROR("Desc Time "
  3967. "data1 data2 line\n");
  3968. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3969. desc_lookup(desc), desc, time, data1, data2, line);
  3970. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3971. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3972. ilink1, ilink2);
  3973. iwl4965_release_nic_access(priv);
  3974. }
  3975. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3976. /**
  3977. * iwl4965_print_event_log - Dump error event log to syslog
  3978. *
  3979. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  3980. */
  3981. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  3982. u32 num_events, u32 mode)
  3983. {
  3984. u32 i;
  3985. u32 base; /* SRAM byte address of event log header */
  3986. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3987. u32 ptr; /* SRAM byte address of log data */
  3988. u32 ev, time, data; /* event log data */
  3989. if (num_events == 0)
  3990. return;
  3991. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3992. if (mode == 0)
  3993. event_size = 2 * sizeof(u32);
  3994. else
  3995. event_size = 3 * sizeof(u32);
  3996. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3997. /* "time" is actually "data" for mode 0 (no timestamp).
  3998. * place event id # at far right for easier visual parsing. */
  3999. for (i = 0; i < num_events; i++) {
  4000. ev = iwl4965_read_targ_mem(priv, ptr);
  4001. ptr += sizeof(u32);
  4002. time = iwl4965_read_targ_mem(priv, ptr);
  4003. ptr += sizeof(u32);
  4004. if (mode == 0)
  4005. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4006. else {
  4007. data = iwl4965_read_targ_mem(priv, ptr);
  4008. ptr += sizeof(u32);
  4009. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4010. }
  4011. }
  4012. }
  4013. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  4014. {
  4015. int rc;
  4016. u32 base; /* SRAM byte address of event log header */
  4017. u32 capacity; /* event log capacity in # entries */
  4018. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4019. u32 num_wraps; /* # times uCode wrapped to top of log */
  4020. u32 next_entry; /* index of next entry to be written by uCode */
  4021. u32 size; /* # entries that we'll print */
  4022. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4023. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4024. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4025. return;
  4026. }
  4027. rc = iwl4965_grab_nic_access(priv);
  4028. if (rc) {
  4029. IWL_WARNING("Can not read from adapter at this time.\n");
  4030. return;
  4031. }
  4032. /* event log header */
  4033. capacity = iwl4965_read_targ_mem(priv, base);
  4034. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  4035. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  4036. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  4037. size = num_wraps ? capacity : next_entry;
  4038. /* bail out if nothing in log */
  4039. if (size == 0) {
  4040. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4041. iwl4965_release_nic_access(priv);
  4042. return;
  4043. }
  4044. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4045. size, num_wraps);
  4046. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4047. * i.e the next one that uCode would fill. */
  4048. if (num_wraps)
  4049. iwl4965_print_event_log(priv, next_entry,
  4050. capacity - next_entry, mode);
  4051. /* (then/else) start at top of log */
  4052. iwl4965_print_event_log(priv, 0, next_entry, mode);
  4053. iwl4965_release_nic_access(priv);
  4054. }
  4055. /**
  4056. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  4057. */
  4058. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  4059. {
  4060. /* Set the FW error flag -- cleared on iwl4965_down */
  4061. set_bit(STATUS_FW_ERROR, &priv->status);
  4062. /* Cancel currently queued command. */
  4063. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4064. #ifdef CONFIG_IWL4965_DEBUG
  4065. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  4066. iwl4965_dump_nic_error_log(priv);
  4067. iwl4965_dump_nic_event_log(priv);
  4068. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  4069. }
  4070. #endif
  4071. wake_up_interruptible(&priv->wait_command_queue);
  4072. /* Keep the restart process from trying to send host
  4073. * commands by clearing the INIT status bit */
  4074. clear_bit(STATUS_READY, &priv->status);
  4075. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4076. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4077. "Restarting adapter due to uCode error.\n");
  4078. if (iwl4965_is_associated(priv)) {
  4079. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4080. sizeof(priv->recovery_rxon));
  4081. priv->error_recovering = 1;
  4082. }
  4083. queue_work(priv->workqueue, &priv->restart);
  4084. }
  4085. }
  4086. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4087. {
  4088. unsigned long flags;
  4089. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4090. sizeof(priv->staging_rxon));
  4091. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4092. iwl4965_commit_rxon(priv);
  4093. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4094. spin_lock_irqsave(&priv->lock, flags);
  4095. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4096. priv->error_recovering = 0;
  4097. spin_unlock_irqrestore(&priv->lock, flags);
  4098. }
  4099. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4100. {
  4101. u32 inta, handled = 0;
  4102. u32 inta_fh;
  4103. unsigned long flags;
  4104. #ifdef CONFIG_IWL4965_DEBUG
  4105. u32 inta_mask;
  4106. #endif
  4107. spin_lock_irqsave(&priv->lock, flags);
  4108. /* Ack/clear/reset pending uCode interrupts.
  4109. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4110. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4111. inta = iwl4965_read32(priv, CSR_INT);
  4112. iwl4965_write32(priv, CSR_INT, inta);
  4113. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4114. * Any new interrupts that happen after this, either while we're
  4115. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4116. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4117. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4118. #ifdef CONFIG_IWL4965_DEBUG
  4119. if (iwl4965_debug_level & IWL_DL_ISR) {
  4120. /* just for debug */
  4121. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4122. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4123. inta, inta_mask, inta_fh);
  4124. }
  4125. #endif
  4126. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4127. * atomic, make sure that inta covers all the interrupts that
  4128. * we've discovered, even if FH interrupt came in just after
  4129. * reading CSR_INT. */
  4130. if (inta_fh & CSR49_FH_INT_RX_MASK)
  4131. inta |= CSR_INT_BIT_FH_RX;
  4132. if (inta_fh & CSR49_FH_INT_TX_MASK)
  4133. inta |= CSR_INT_BIT_FH_TX;
  4134. /* Now service all interrupt bits discovered above. */
  4135. if (inta & CSR_INT_BIT_HW_ERR) {
  4136. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4137. /* Tell the device to stop sending interrupts */
  4138. iwl4965_disable_interrupts(priv);
  4139. iwl4965_irq_handle_error(priv);
  4140. handled |= CSR_INT_BIT_HW_ERR;
  4141. spin_unlock_irqrestore(&priv->lock, flags);
  4142. return;
  4143. }
  4144. #ifdef CONFIG_IWL4965_DEBUG
  4145. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4146. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4147. if (inta & CSR_INT_BIT_SCD)
  4148. IWL_DEBUG_ISR("Scheduler finished to transmit "
  4149. "the frame/frames.\n");
  4150. /* Alive notification via Rx interrupt will do the real work */
  4151. if (inta & CSR_INT_BIT_ALIVE)
  4152. IWL_DEBUG_ISR("Alive interrupt\n");
  4153. }
  4154. #endif
  4155. /* Safely ignore these bits for debug checks below */
  4156. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  4157. /* HW RF KILL switch toggled */
  4158. if (inta & CSR_INT_BIT_RF_KILL) {
  4159. int hw_rf_kill = 0;
  4160. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4161. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4162. hw_rf_kill = 1;
  4163. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4164. "RF_KILL bit toggled to %s.\n",
  4165. hw_rf_kill ? "disable radio":"enable radio");
  4166. /* Queue restart only if RF_KILL switch was set to "kill"
  4167. * when we loaded driver, and is now set to "enable".
  4168. * After we're Alive, RF_KILL gets handled by
  4169. * iwl4965_rx_card_state_notif() */
  4170. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4171. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4172. queue_work(priv->workqueue, &priv->restart);
  4173. }
  4174. handled |= CSR_INT_BIT_RF_KILL;
  4175. }
  4176. /* Chip got too hot and stopped itself */
  4177. if (inta & CSR_INT_BIT_CT_KILL) {
  4178. IWL_ERROR("Microcode CT kill error detected.\n");
  4179. handled |= CSR_INT_BIT_CT_KILL;
  4180. }
  4181. /* Error detected by uCode */
  4182. if (inta & CSR_INT_BIT_SW_ERR) {
  4183. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4184. inta);
  4185. iwl4965_irq_handle_error(priv);
  4186. handled |= CSR_INT_BIT_SW_ERR;
  4187. }
  4188. /* uCode wakes up after power-down sleep */
  4189. if (inta & CSR_INT_BIT_WAKEUP) {
  4190. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4191. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4192. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4193. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4194. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4195. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4196. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4197. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4198. handled |= CSR_INT_BIT_WAKEUP;
  4199. }
  4200. /* All uCode command responses, including Tx command responses,
  4201. * Rx "responses" (frame-received notification), and other
  4202. * notifications from uCode come through here*/
  4203. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4204. iwl4965_rx_handle(priv);
  4205. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4206. }
  4207. if (inta & CSR_INT_BIT_FH_TX) {
  4208. IWL_DEBUG_ISR("Tx interrupt\n");
  4209. handled |= CSR_INT_BIT_FH_TX;
  4210. }
  4211. if (inta & ~handled)
  4212. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4213. if (inta & ~CSR_INI_SET_MASK) {
  4214. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4215. inta & ~CSR_INI_SET_MASK);
  4216. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4217. }
  4218. /* Re-enable all interrupts */
  4219. iwl4965_enable_interrupts(priv);
  4220. #ifdef CONFIG_IWL4965_DEBUG
  4221. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4222. inta = iwl4965_read32(priv, CSR_INT);
  4223. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4224. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4225. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4226. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4227. }
  4228. #endif
  4229. spin_unlock_irqrestore(&priv->lock, flags);
  4230. }
  4231. static irqreturn_t iwl4965_isr(int irq, void *data)
  4232. {
  4233. struct iwl4965_priv *priv = data;
  4234. u32 inta, inta_mask;
  4235. u32 inta_fh;
  4236. if (!priv)
  4237. return IRQ_NONE;
  4238. spin_lock(&priv->lock);
  4239. /* Disable (but don't clear!) interrupts here to avoid
  4240. * back-to-back ISRs and sporadic interrupts from our NIC.
  4241. * If we have something to service, the tasklet will re-enable ints.
  4242. * If we *don't* have something, we'll re-enable before leaving here. */
  4243. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4244. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4245. /* Discover which interrupts are active/pending */
  4246. inta = iwl4965_read32(priv, CSR_INT);
  4247. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4248. /* Ignore interrupt if there's nothing in NIC to service.
  4249. * This may be due to IRQ shared with another device,
  4250. * or due to sporadic interrupts thrown from our NIC. */
  4251. if (!inta && !inta_fh) {
  4252. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4253. goto none;
  4254. }
  4255. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4256. /* Hardware disappeared. It might have already raised
  4257. * an interrupt */
  4258. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4259. goto unplugged;
  4260. }
  4261. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4262. inta, inta_mask, inta_fh);
  4263. inta &= ~CSR_INT_BIT_SCD;
  4264. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4265. if (likely(inta || inta_fh))
  4266. tasklet_schedule(&priv->irq_tasklet);
  4267. unplugged:
  4268. spin_unlock(&priv->lock);
  4269. return IRQ_HANDLED;
  4270. none:
  4271. /* re-enable interrupts here since we don't have anything to service. */
  4272. iwl4965_enable_interrupts(priv);
  4273. spin_unlock(&priv->lock);
  4274. return IRQ_NONE;
  4275. }
  4276. /************************** EEPROM BANDS ****************************
  4277. *
  4278. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4279. * EEPROM contents to the specific channel number supported for each
  4280. * band.
  4281. *
  4282. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4283. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4284. * The specific geography and calibration information for that channel
  4285. * is contained in the eeprom map itself.
  4286. *
  4287. * During init, we copy the eeprom information and channel map
  4288. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4289. *
  4290. * channel_map_24/52 provides the index in the channel_info array for a
  4291. * given channel. We have to have two separate maps as there is channel
  4292. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4293. * band_2
  4294. *
  4295. * A value of 0xff stored in the channel_map indicates that the channel
  4296. * is not supported by the hardware at all.
  4297. *
  4298. * A value of 0xfe in the channel_map indicates that the channel is not
  4299. * valid for Tx with the current hardware. This means that
  4300. * while the system can tune and receive on a given channel, it may not
  4301. * be able to associate or transmit any frames on that
  4302. * channel. There is no corresponding channel information for that
  4303. * entry.
  4304. *
  4305. *********************************************************************/
  4306. /* 2.4 GHz */
  4307. static const u8 iwl4965_eeprom_band_1[14] = {
  4308. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4309. };
  4310. /* 5.2 GHz bands */
  4311. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4312. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4313. };
  4314. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4315. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4316. };
  4317. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4318. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4319. };
  4320. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4321. 145, 149, 153, 157, 161, 165
  4322. };
  4323. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4324. 1, 2, 3, 4, 5, 6, 7
  4325. };
  4326. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4327. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4328. };
  4329. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
  4330. int band,
  4331. int *eeprom_ch_count,
  4332. const struct iwl4965_eeprom_channel
  4333. **eeprom_ch_info,
  4334. const u8 **eeprom_ch_index)
  4335. {
  4336. switch (band) {
  4337. case 1: /* 2.4GHz band */
  4338. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4339. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4340. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4341. break;
  4342. case 2: /* 4.9GHz band */
  4343. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4344. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4345. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4346. break;
  4347. case 3: /* 5.2GHz band */
  4348. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4349. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4350. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4351. break;
  4352. case 4: /* 5.5GHz band */
  4353. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4354. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4355. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4356. break;
  4357. case 5: /* 5.7GHz band */
  4358. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4359. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4360. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4361. break;
  4362. case 6: /* 2.4GHz FAT channels */
  4363. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4364. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4365. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4366. break;
  4367. case 7: /* 5 GHz FAT channels */
  4368. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4369. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4370. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4371. break;
  4372. default:
  4373. BUG();
  4374. return;
  4375. }
  4376. }
  4377. /**
  4378. * iwl4965_get_channel_info - Find driver's private channel info
  4379. *
  4380. * Based on band and channel number.
  4381. */
  4382. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4383. enum ieee80211_band band, u16 channel)
  4384. {
  4385. int i;
  4386. switch (band) {
  4387. case IEEE80211_BAND_5GHZ:
  4388. for (i = 14; i < priv->channel_count; i++) {
  4389. if (priv->channel_info[i].channel == channel)
  4390. return &priv->channel_info[i];
  4391. }
  4392. break;
  4393. case IEEE80211_BAND_2GHZ:
  4394. if (channel >= 1 && channel <= 14)
  4395. return &priv->channel_info[channel - 1];
  4396. break;
  4397. default:
  4398. BUG();
  4399. }
  4400. return NULL;
  4401. }
  4402. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4403. ? # x " " : "")
  4404. /**
  4405. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4406. */
  4407. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4408. {
  4409. int eeprom_ch_count = 0;
  4410. const u8 *eeprom_ch_index = NULL;
  4411. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4412. int band, ch;
  4413. struct iwl4965_channel_info *ch_info;
  4414. if (priv->channel_count) {
  4415. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4416. return 0;
  4417. }
  4418. if (priv->eeprom.version < 0x2f) {
  4419. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4420. priv->eeprom.version);
  4421. return -EINVAL;
  4422. }
  4423. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4424. priv->channel_count =
  4425. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4426. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4427. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4428. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4429. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4430. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4431. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4432. priv->channel_count, GFP_KERNEL);
  4433. if (!priv->channel_info) {
  4434. IWL_ERROR("Could not allocate channel_info\n");
  4435. priv->channel_count = 0;
  4436. return -ENOMEM;
  4437. }
  4438. ch_info = priv->channel_info;
  4439. /* Loop through the 5 EEPROM bands adding them in order to the
  4440. * channel map we maintain (that contains additional information than
  4441. * what just in the EEPROM) */
  4442. for (band = 1; band <= 5; band++) {
  4443. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4444. &eeprom_ch_info, &eeprom_ch_index);
  4445. /* Loop through each band adding each of the channels */
  4446. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4447. ch_info->channel = eeprom_ch_index[ch];
  4448. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  4449. IEEE80211_BAND_5GHZ;
  4450. /* permanently store EEPROM's channel regulatory flags
  4451. * and max power in channel info database. */
  4452. ch_info->eeprom = eeprom_ch_info[ch];
  4453. /* Copy the run-time flags so they are there even on
  4454. * invalid channels */
  4455. ch_info->flags = eeprom_ch_info[ch].flags;
  4456. if (!(is_channel_valid(ch_info))) {
  4457. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4458. "No traffic\n",
  4459. ch_info->channel,
  4460. ch_info->flags,
  4461. is_channel_a_band(ch_info) ?
  4462. "5.2" : "2.4");
  4463. ch_info++;
  4464. continue;
  4465. }
  4466. /* Initialize regulatory-based run-time data */
  4467. ch_info->max_power_avg = ch_info->curr_txpow =
  4468. eeprom_ch_info[ch].max_power_avg;
  4469. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4470. ch_info->min_power = 0;
  4471. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x"
  4472. " %ddBm): Ad-Hoc %ssupported\n",
  4473. ch_info->channel,
  4474. is_channel_a_band(ch_info) ?
  4475. "5.2" : "2.4",
  4476. CHECK_AND_PRINT(VALID),
  4477. CHECK_AND_PRINT(IBSS),
  4478. CHECK_AND_PRINT(ACTIVE),
  4479. CHECK_AND_PRINT(RADAR),
  4480. CHECK_AND_PRINT(WIDE),
  4481. CHECK_AND_PRINT(NARROW),
  4482. CHECK_AND_PRINT(DFS),
  4483. eeprom_ch_info[ch].flags,
  4484. eeprom_ch_info[ch].max_power_avg,
  4485. ((eeprom_ch_info[ch].
  4486. flags & EEPROM_CHANNEL_IBSS)
  4487. && !(eeprom_ch_info[ch].
  4488. flags & EEPROM_CHANNEL_RADAR))
  4489. ? "" : "not ");
  4490. /* Set the user_txpower_limit to the highest power
  4491. * supported by any channel */
  4492. if (eeprom_ch_info[ch].max_power_avg >
  4493. priv->user_txpower_limit)
  4494. priv->user_txpower_limit =
  4495. eeprom_ch_info[ch].max_power_avg;
  4496. ch_info++;
  4497. }
  4498. }
  4499. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4500. for (band = 6; band <= 7; band++) {
  4501. enum ieee80211_band ieeeband;
  4502. u8 fat_extension_chan;
  4503. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4504. &eeprom_ch_info, &eeprom_ch_index);
  4505. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4506. ieeeband = (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  4507. /* Loop through each band adding each of the channels */
  4508. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4509. if ((band == 6) &&
  4510. ((eeprom_ch_index[ch] == 5) ||
  4511. (eeprom_ch_index[ch] == 6) ||
  4512. (eeprom_ch_index[ch] == 7)))
  4513. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4514. else
  4515. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4516. /* Set up driver's info for lower half */
  4517. iwl4965_set_fat_chan_info(priv, ieeeband,
  4518. eeprom_ch_index[ch],
  4519. &(eeprom_ch_info[ch]),
  4520. fat_extension_chan);
  4521. /* Set up driver's info for upper half */
  4522. iwl4965_set_fat_chan_info(priv, ieeeband,
  4523. (eeprom_ch_index[ch] + 4),
  4524. &(eeprom_ch_info[ch]),
  4525. HT_IE_EXT_CHANNEL_BELOW);
  4526. }
  4527. }
  4528. return 0;
  4529. }
  4530. /*
  4531. * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
  4532. */
  4533. static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
  4534. {
  4535. kfree(priv->channel_info);
  4536. priv->channel_count = 0;
  4537. }
  4538. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4539. * sending probe req. This should be set long enough to hear probe responses
  4540. * from more than one AP. */
  4541. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4542. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4543. /* For faster active scanning, scan will move to the next channel if fewer than
  4544. * PLCP_QUIET_THRESH packets are heard on this channel within
  4545. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4546. * time if it's a quiet channel (nothing responded to our probe, and there's
  4547. * no other traffic).
  4548. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4549. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4550. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4551. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4552. * Must be set longer than active dwell time.
  4553. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4554. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4555. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4556. #define IWL_PASSIVE_DWELL_BASE (100)
  4557. #define IWL_CHANNEL_TUNE_TIME 5
  4558. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv,
  4559. enum ieee80211_band band)
  4560. {
  4561. if (band == IEEE80211_BAND_5GHZ)
  4562. return IWL_ACTIVE_DWELL_TIME_52;
  4563. else
  4564. return IWL_ACTIVE_DWELL_TIME_24;
  4565. }
  4566. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv,
  4567. enum ieee80211_band band)
  4568. {
  4569. u16 active = iwl4965_get_active_dwell_time(priv, band);
  4570. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  4571. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4572. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4573. if (iwl4965_is_associated(priv)) {
  4574. /* If we're associated, we clamp the maximum passive
  4575. * dwell time to be 98% of the beacon interval (minus
  4576. * 2 * channel tune time) */
  4577. passive = priv->beacon_int;
  4578. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4579. passive = IWL_PASSIVE_DWELL_BASE;
  4580. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4581. }
  4582. if (passive <= active)
  4583. passive = active + 1;
  4584. return passive;
  4585. }
  4586. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv,
  4587. enum ieee80211_band band,
  4588. u8 is_active, u8 direct_mask,
  4589. struct iwl4965_scan_channel *scan_ch)
  4590. {
  4591. const struct ieee80211_channel *channels = NULL;
  4592. const struct ieee80211_supported_band *sband;
  4593. const struct iwl4965_channel_info *ch_info;
  4594. u16 passive_dwell = 0;
  4595. u16 active_dwell = 0;
  4596. int added, i;
  4597. sband = iwl4965_get_hw_mode(priv, band);
  4598. if (!sband)
  4599. return 0;
  4600. channels = sband->channels;
  4601. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4602. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4603. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4604. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4605. le16_to_cpu(priv->active_rxon.channel)) {
  4606. if (iwl4965_is_associated(priv)) {
  4607. IWL_DEBUG_SCAN
  4608. ("Skipping current channel %d\n",
  4609. le16_to_cpu(priv->active_rxon.channel));
  4610. continue;
  4611. }
  4612. } else if (priv->only_active_channel)
  4613. continue;
  4614. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4615. ch_info = iwl4965_get_channel_info(priv, band,
  4616. scan_ch->channel);
  4617. if (!is_channel_valid(ch_info)) {
  4618. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4619. scan_ch->channel);
  4620. continue;
  4621. }
  4622. if (!is_active || is_channel_passive(ch_info) ||
  4623. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4624. scan_ch->type = 0; /* passive */
  4625. else
  4626. scan_ch->type = 1; /* active */
  4627. if (scan_ch->type & 1)
  4628. scan_ch->type |= (direct_mask << 1);
  4629. if (is_channel_narrow(ch_info))
  4630. scan_ch->type |= (1 << 7);
  4631. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4632. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4633. /* Set txpower levels to defaults */
  4634. scan_ch->tpc.dsp_atten = 110;
  4635. /* scan_pwr_info->tpc.dsp_atten; */
  4636. /*scan_pwr_info->tpc.tx_gain; */
  4637. if (band == IEEE80211_BAND_5GHZ)
  4638. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4639. else {
  4640. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4641. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4642. * power level:
  4643. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4644. */
  4645. }
  4646. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4647. scan_ch->channel,
  4648. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4649. (scan_ch->type & 1) ?
  4650. active_dwell : passive_dwell);
  4651. scan_ch++;
  4652. added++;
  4653. }
  4654. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4655. return added;
  4656. }
  4657. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4658. struct ieee80211_rate *rates)
  4659. {
  4660. int i;
  4661. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4662. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4663. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4664. rates[i].hw_value_short = i;
  4665. rates[i].flags = 0;
  4666. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4667. /*
  4668. * If CCK != 1M then set short preamble rate flag.
  4669. */
  4670. rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
  4671. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4672. }
  4673. }
  4674. }
  4675. /**
  4676. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4677. */
  4678. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4679. {
  4680. struct iwl4965_channel_info *ch;
  4681. struct ieee80211_supported_band *sband;
  4682. struct ieee80211_channel *channels;
  4683. struct ieee80211_channel *geo_ch;
  4684. struct ieee80211_rate *rates;
  4685. int i = 0;
  4686. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4687. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4688. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4689. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4690. return 0;
  4691. }
  4692. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4693. priv->channel_count, GFP_KERNEL);
  4694. if (!channels)
  4695. return -ENOMEM;
  4696. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4697. GFP_KERNEL);
  4698. if (!rates) {
  4699. kfree(channels);
  4700. return -ENOMEM;
  4701. }
  4702. /* 5.2GHz channels start after the 2.4GHz channels */
  4703. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4704. sband->channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4705. /* just OFDM */
  4706. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4707. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4708. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_5GHZ);
  4709. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4710. sband->channels = channels;
  4711. /* OFDM & CCK */
  4712. sband->bitrates = rates;
  4713. sband->n_bitrates = IWL_RATE_COUNT;
  4714. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_2GHZ);
  4715. priv->ieee_channels = channels;
  4716. priv->ieee_rates = rates;
  4717. iwl4965_init_hw_rates(priv, rates);
  4718. for (i = 0; i < priv->channel_count; i++) {
  4719. ch = &priv->channel_info[i];
  4720. /* FIXME: might be removed if scan is OK */
  4721. if (!is_channel_valid(ch))
  4722. continue;
  4723. if (is_channel_a_band(ch))
  4724. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4725. else
  4726. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4727. geo_ch = &sband->channels[sband->n_channels++];
  4728. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4729. geo_ch->max_power = ch->max_power_avg;
  4730. geo_ch->max_antenna_gain = 0xff;
  4731. geo_ch->hw_value = ch->channel;
  4732. if (is_channel_valid(ch)) {
  4733. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4734. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4735. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4736. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4737. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4738. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4739. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4740. priv->max_channel_txpower_limit =
  4741. ch->max_power_avg;
  4742. } else {
  4743. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4744. }
  4745. /* Save flags for reg domain usage */
  4746. geo_ch->orig_flags = geo_ch->flags;
  4747. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4748. ch->channel, geo_ch->center_freq,
  4749. is_channel_a_band(ch) ? "5.2" : "2.4",
  4750. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4751. "restricted" : "valid",
  4752. geo_ch->flags);
  4753. }
  4754. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  4755. priv->cfg->sku & IWL_SKU_A) {
  4756. printk(KERN_INFO DRV_NAME
  4757. ": Incorrectly detected BG card as ABG. Please send "
  4758. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4759. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4760. priv->cfg->sku &= ~IWL_SKU_A;
  4761. }
  4762. printk(KERN_INFO DRV_NAME
  4763. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4764. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4765. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4766. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
  4767. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
  4768. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4769. return 0;
  4770. }
  4771. /*
  4772. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4773. */
  4774. static void iwl4965_free_geos(struct iwl4965_priv *priv)
  4775. {
  4776. kfree(priv->ieee_channels);
  4777. kfree(priv->ieee_rates);
  4778. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4779. }
  4780. /******************************************************************************
  4781. *
  4782. * uCode download functions
  4783. *
  4784. ******************************************************************************/
  4785. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  4786. {
  4787. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4788. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4789. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4790. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4791. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4792. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4793. }
  4794. /**
  4795. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4796. * looking at all data.
  4797. */
  4798. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
  4799. u32 len)
  4800. {
  4801. u32 val;
  4802. u32 save_len = len;
  4803. int rc = 0;
  4804. u32 errcnt;
  4805. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4806. rc = iwl4965_grab_nic_access(priv);
  4807. if (rc)
  4808. return rc;
  4809. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4810. errcnt = 0;
  4811. for (; len > 0; len -= sizeof(u32), image++) {
  4812. /* read data comes through single port, auto-incr addr */
  4813. /* NOTE: Use the debugless read so we don't flood kernel log
  4814. * if IWL_DL_IO is set */
  4815. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4816. if (val != le32_to_cpu(*image)) {
  4817. IWL_ERROR("uCode INST section is invalid at "
  4818. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4819. save_len - len, val, le32_to_cpu(*image));
  4820. rc = -EIO;
  4821. errcnt++;
  4822. if (errcnt >= 20)
  4823. break;
  4824. }
  4825. }
  4826. iwl4965_release_nic_access(priv);
  4827. if (!errcnt)
  4828. IWL_DEBUG_INFO
  4829. ("ucode image in INSTRUCTION memory is good\n");
  4830. return rc;
  4831. }
  4832. /**
  4833. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4834. * using sample data 100 bytes apart. If these sample points are good,
  4835. * it's a pretty good bet that everything between them is good, too.
  4836. */
  4837. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  4838. {
  4839. u32 val;
  4840. int rc = 0;
  4841. u32 errcnt = 0;
  4842. u32 i;
  4843. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4844. rc = iwl4965_grab_nic_access(priv);
  4845. if (rc)
  4846. return rc;
  4847. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4848. /* read data comes through single port, auto-incr addr */
  4849. /* NOTE: Use the debugless read so we don't flood kernel log
  4850. * if IWL_DL_IO is set */
  4851. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4852. i + RTC_INST_LOWER_BOUND);
  4853. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4854. if (val != le32_to_cpu(*image)) {
  4855. #if 0 /* Enable this if you want to see details */
  4856. IWL_ERROR("uCode INST section is invalid at "
  4857. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4858. i, val, *image);
  4859. #endif
  4860. rc = -EIO;
  4861. errcnt++;
  4862. if (errcnt >= 3)
  4863. break;
  4864. }
  4865. }
  4866. iwl4965_release_nic_access(priv);
  4867. return rc;
  4868. }
  4869. /**
  4870. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4871. * and verify its contents
  4872. */
  4873. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  4874. {
  4875. __le32 *image;
  4876. u32 len;
  4877. int rc = 0;
  4878. /* Try bootstrap */
  4879. image = (__le32 *)priv->ucode_boot.v_addr;
  4880. len = priv->ucode_boot.len;
  4881. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4882. if (rc == 0) {
  4883. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4884. return 0;
  4885. }
  4886. /* Try initialize */
  4887. image = (__le32 *)priv->ucode_init.v_addr;
  4888. len = priv->ucode_init.len;
  4889. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4890. if (rc == 0) {
  4891. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4892. return 0;
  4893. }
  4894. /* Try runtime/protocol */
  4895. image = (__le32 *)priv->ucode_code.v_addr;
  4896. len = priv->ucode_code.len;
  4897. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4898. if (rc == 0) {
  4899. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4900. return 0;
  4901. }
  4902. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4903. /* Since nothing seems to match, show first several data entries in
  4904. * instruction SRAM, so maybe visual inspection will give a clue.
  4905. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4906. image = (__le32 *)priv->ucode_boot.v_addr;
  4907. len = priv->ucode_boot.len;
  4908. rc = iwl4965_verify_inst_full(priv, image, len);
  4909. return rc;
  4910. }
  4911. /* check contents of special bootstrap uCode SRAM */
  4912. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  4913. {
  4914. __le32 *image = priv->ucode_boot.v_addr;
  4915. u32 len = priv->ucode_boot.len;
  4916. u32 reg;
  4917. u32 val;
  4918. IWL_DEBUG_INFO("Begin verify bsm\n");
  4919. /* verify BSM SRAM contents */
  4920. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  4921. for (reg = BSM_SRAM_LOWER_BOUND;
  4922. reg < BSM_SRAM_LOWER_BOUND + len;
  4923. reg += sizeof(u32), image ++) {
  4924. val = iwl4965_read_prph(priv, reg);
  4925. if (val != le32_to_cpu(*image)) {
  4926. IWL_ERROR("BSM uCode verification failed at "
  4927. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4928. BSM_SRAM_LOWER_BOUND,
  4929. reg - BSM_SRAM_LOWER_BOUND, len,
  4930. val, le32_to_cpu(*image));
  4931. return -EIO;
  4932. }
  4933. }
  4934. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4935. return 0;
  4936. }
  4937. /**
  4938. * iwl4965_load_bsm - Load bootstrap instructions
  4939. *
  4940. * BSM operation:
  4941. *
  4942. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4943. * in special SRAM that does not power down during RFKILL. When powering back
  4944. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4945. * the bootstrap program into the on-board processor, and starts it.
  4946. *
  4947. * The bootstrap program loads (via DMA) instructions and data for a new
  4948. * program from host DRAM locations indicated by the host driver in the
  4949. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4950. * automatically.
  4951. *
  4952. * When initializing the NIC, the host driver points the BSM to the
  4953. * "initialize" uCode image. This uCode sets up some internal data, then
  4954. * notifies host via "initialize alive" that it is complete.
  4955. *
  4956. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4957. * normal runtime uCode instructions and a backup uCode data cache buffer
  4958. * (filled initially with starting data values for the on-board processor),
  4959. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4960. * which begins normal operation.
  4961. *
  4962. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4963. * the backup data cache in DRAM before SRAM is powered down.
  4964. *
  4965. * When powering back up, the BSM loads the bootstrap program. This reloads
  4966. * the runtime uCode instructions and the backup data cache into SRAM,
  4967. * and re-launches the runtime uCode from where it left off.
  4968. */
  4969. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  4970. {
  4971. __le32 *image = priv->ucode_boot.v_addr;
  4972. u32 len = priv->ucode_boot.len;
  4973. dma_addr_t pinst;
  4974. dma_addr_t pdata;
  4975. u32 inst_len;
  4976. u32 data_len;
  4977. int rc;
  4978. int i;
  4979. u32 done;
  4980. u32 reg_offset;
  4981. IWL_DEBUG_INFO("Begin load bsm\n");
  4982. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4983. if (len > IWL_MAX_BSM_SIZE)
  4984. return -EINVAL;
  4985. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4986. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  4987. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  4988. * after the "initialize" uCode has run, to point to
  4989. * runtime/protocol instructions and backup data cache. */
  4990. pinst = priv->ucode_init.p_addr >> 4;
  4991. pdata = priv->ucode_init_data.p_addr >> 4;
  4992. inst_len = priv->ucode_init.len;
  4993. data_len = priv->ucode_init_data.len;
  4994. rc = iwl4965_grab_nic_access(priv);
  4995. if (rc)
  4996. return rc;
  4997. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4998. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4999. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5000. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5001. /* Fill BSM memory with bootstrap instructions */
  5002. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5003. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5004. reg_offset += sizeof(u32), image++)
  5005. _iwl4965_write_prph(priv, reg_offset,
  5006. le32_to_cpu(*image));
  5007. rc = iwl4965_verify_bsm(priv);
  5008. if (rc) {
  5009. iwl4965_release_nic_access(priv);
  5010. return rc;
  5011. }
  5012. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5013. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5014. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  5015. RTC_INST_LOWER_BOUND);
  5016. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5017. /* Load bootstrap code into instruction SRAM now,
  5018. * to prepare to load "initialize" uCode */
  5019. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5020. BSM_WR_CTRL_REG_BIT_START);
  5021. /* Wait for load of bootstrap uCode to finish */
  5022. for (i = 0; i < 100; i++) {
  5023. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  5024. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5025. break;
  5026. udelay(10);
  5027. }
  5028. if (i < 100)
  5029. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5030. else {
  5031. IWL_ERROR("BSM write did not complete!\n");
  5032. return -EIO;
  5033. }
  5034. /* Enable future boot loads whenever power management unit triggers it
  5035. * (e.g. when powering back up after power-save shutdown) */
  5036. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5037. BSM_WR_CTRL_REG_BIT_START_EN);
  5038. iwl4965_release_nic_access(priv);
  5039. return 0;
  5040. }
  5041. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  5042. {
  5043. /* Remove all resets to allow NIC to operate */
  5044. iwl4965_write32(priv, CSR_RESET, 0);
  5045. }
  5046. /**
  5047. * iwl4965_read_ucode - Read uCode images from disk file.
  5048. *
  5049. * Copy into buffers for card to fetch via bus-mastering
  5050. */
  5051. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  5052. {
  5053. struct iwl4965_ucode *ucode;
  5054. int ret;
  5055. const struct firmware *ucode_raw;
  5056. const char *name = priv->cfg->fw_name;
  5057. u8 *src;
  5058. size_t len;
  5059. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5060. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5061. * request_firmware() is synchronous, file is in memory on return. */
  5062. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5063. if (ret < 0) {
  5064. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  5065. name, ret);
  5066. goto error;
  5067. }
  5068. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5069. name, ucode_raw->size);
  5070. /* Make sure that we got at least our header! */
  5071. if (ucode_raw->size < sizeof(*ucode)) {
  5072. IWL_ERROR("File size way too small!\n");
  5073. ret = -EINVAL;
  5074. goto err_release;
  5075. }
  5076. /* Data from ucode file: header followed by uCode images */
  5077. ucode = (void *)ucode_raw->data;
  5078. ver = le32_to_cpu(ucode->ver);
  5079. inst_size = le32_to_cpu(ucode->inst_size);
  5080. data_size = le32_to_cpu(ucode->data_size);
  5081. init_size = le32_to_cpu(ucode->init_size);
  5082. init_data_size = le32_to_cpu(ucode->init_data_size);
  5083. boot_size = le32_to_cpu(ucode->boot_size);
  5084. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5085. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5086. inst_size);
  5087. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5088. data_size);
  5089. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5090. init_size);
  5091. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5092. init_data_size);
  5093. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5094. boot_size);
  5095. /* Verify size of file vs. image size info in file's header */
  5096. if (ucode_raw->size < sizeof(*ucode) +
  5097. inst_size + data_size + init_size +
  5098. init_data_size + boot_size) {
  5099. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5100. (int)ucode_raw->size);
  5101. ret = -EINVAL;
  5102. goto err_release;
  5103. }
  5104. /* Verify that uCode images will fit in card's SRAM */
  5105. if (inst_size > IWL_MAX_INST_SIZE) {
  5106. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5107. inst_size);
  5108. ret = -EINVAL;
  5109. goto err_release;
  5110. }
  5111. if (data_size > IWL_MAX_DATA_SIZE) {
  5112. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5113. data_size);
  5114. ret = -EINVAL;
  5115. goto err_release;
  5116. }
  5117. if (init_size > IWL_MAX_INST_SIZE) {
  5118. IWL_DEBUG_INFO
  5119. ("uCode init instr len %d too large to fit in\n",
  5120. init_size);
  5121. ret = -EINVAL;
  5122. goto err_release;
  5123. }
  5124. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5125. IWL_DEBUG_INFO
  5126. ("uCode init data len %d too large to fit in\n",
  5127. init_data_size);
  5128. ret = -EINVAL;
  5129. goto err_release;
  5130. }
  5131. if (boot_size > IWL_MAX_BSM_SIZE) {
  5132. IWL_DEBUG_INFO
  5133. ("uCode boot instr len %d too large to fit in\n",
  5134. boot_size);
  5135. ret = -EINVAL;
  5136. goto err_release;
  5137. }
  5138. /* Allocate ucode buffers for card's bus-master loading ... */
  5139. /* Runtime instructions and 2 copies of data:
  5140. * 1) unmodified from disk
  5141. * 2) backup cache for save/restore during power-downs */
  5142. priv->ucode_code.len = inst_size;
  5143. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5144. priv->ucode_data.len = data_size;
  5145. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5146. priv->ucode_data_backup.len = data_size;
  5147. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5148. /* Initialization instructions and data */
  5149. if (init_size && init_data_size) {
  5150. priv->ucode_init.len = init_size;
  5151. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5152. priv->ucode_init_data.len = init_data_size;
  5153. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5154. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5155. goto err_pci_alloc;
  5156. }
  5157. /* Bootstrap (instructions only, no data) */
  5158. if (boot_size) {
  5159. priv->ucode_boot.len = boot_size;
  5160. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5161. if (!priv->ucode_boot.v_addr)
  5162. goto err_pci_alloc;
  5163. }
  5164. /* Copy images into buffers for card's bus-master reads ... */
  5165. /* Runtime instructions (first block of data in file) */
  5166. src = &ucode->data[0];
  5167. len = priv->ucode_code.len;
  5168. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5169. memcpy(priv->ucode_code.v_addr, src, len);
  5170. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5171. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5172. /* Runtime data (2nd block)
  5173. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5174. src = &ucode->data[inst_size];
  5175. len = priv->ucode_data.len;
  5176. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5177. memcpy(priv->ucode_data.v_addr, src, len);
  5178. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5179. /* Initialization instructions (3rd block) */
  5180. if (init_size) {
  5181. src = &ucode->data[inst_size + data_size];
  5182. len = priv->ucode_init.len;
  5183. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5184. len);
  5185. memcpy(priv->ucode_init.v_addr, src, len);
  5186. }
  5187. /* Initialization data (4th block) */
  5188. if (init_data_size) {
  5189. src = &ucode->data[inst_size + data_size + init_size];
  5190. len = priv->ucode_init_data.len;
  5191. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5192. len);
  5193. memcpy(priv->ucode_init_data.v_addr, src, len);
  5194. }
  5195. /* Bootstrap instructions (5th block) */
  5196. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5197. len = priv->ucode_boot.len;
  5198. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5199. memcpy(priv->ucode_boot.v_addr, src, len);
  5200. /* We have our copies now, allow OS release its copies */
  5201. release_firmware(ucode_raw);
  5202. return 0;
  5203. err_pci_alloc:
  5204. IWL_ERROR("failed to allocate pci memory\n");
  5205. ret = -ENOMEM;
  5206. iwl4965_dealloc_ucode_pci(priv);
  5207. err_release:
  5208. release_firmware(ucode_raw);
  5209. error:
  5210. return ret;
  5211. }
  5212. /**
  5213. * iwl4965_set_ucode_ptrs - Set uCode address location
  5214. *
  5215. * Tell initialization uCode where to find runtime uCode.
  5216. *
  5217. * BSM registers initially contain pointers to initialization uCode.
  5218. * We need to replace them to load runtime uCode inst and data,
  5219. * and to save runtime data when powering down.
  5220. */
  5221. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5222. {
  5223. dma_addr_t pinst;
  5224. dma_addr_t pdata;
  5225. int rc = 0;
  5226. unsigned long flags;
  5227. /* bits 35:4 for 4965 */
  5228. pinst = priv->ucode_code.p_addr >> 4;
  5229. pdata = priv->ucode_data_backup.p_addr >> 4;
  5230. spin_lock_irqsave(&priv->lock, flags);
  5231. rc = iwl4965_grab_nic_access(priv);
  5232. if (rc) {
  5233. spin_unlock_irqrestore(&priv->lock, flags);
  5234. return rc;
  5235. }
  5236. /* Tell bootstrap uCode where to find image to load */
  5237. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5238. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5239. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5240. priv->ucode_data.len);
  5241. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5242. * that all new ptr/size info is in place */
  5243. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5244. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5245. iwl4965_release_nic_access(priv);
  5246. spin_unlock_irqrestore(&priv->lock, flags);
  5247. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5248. return rc;
  5249. }
  5250. /**
  5251. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5252. *
  5253. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5254. *
  5255. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5256. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5257. * (3945 does not contain this data).
  5258. *
  5259. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5260. */
  5261. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5262. {
  5263. /* Check alive response for "valid" sign from uCode */
  5264. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5265. /* We had an error bringing up the hardware, so take it
  5266. * all the way back down so we can try again */
  5267. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5268. goto restart;
  5269. }
  5270. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5271. * This is a paranoid check, because we would not have gotten the
  5272. * "initialize" alive if code weren't properly loaded. */
  5273. if (iwl4965_verify_ucode(priv)) {
  5274. /* Runtime instruction load was bad;
  5275. * take it all the way back down so we can try again */
  5276. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5277. goto restart;
  5278. }
  5279. /* Calculate temperature */
  5280. priv->temperature = iwl4965_get_temperature(priv);
  5281. /* Send pointers to protocol/runtime uCode image ... init code will
  5282. * load and launch runtime uCode, which will send us another "Alive"
  5283. * notification. */
  5284. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5285. if (iwl4965_set_ucode_ptrs(priv)) {
  5286. /* Runtime instruction load won't happen;
  5287. * take it all the way back down so we can try again */
  5288. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5289. goto restart;
  5290. }
  5291. return;
  5292. restart:
  5293. queue_work(priv->workqueue, &priv->restart);
  5294. }
  5295. /**
  5296. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5297. * from protocol/runtime uCode (initialization uCode's
  5298. * Alive gets handled by iwl4965_init_alive_start()).
  5299. */
  5300. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5301. {
  5302. int rc = 0;
  5303. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5304. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5305. /* We had an error bringing up the hardware, so take it
  5306. * all the way back down so we can try again */
  5307. IWL_DEBUG_INFO("Alive failed.\n");
  5308. goto restart;
  5309. }
  5310. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5311. * This is a paranoid check, because we would not have gotten the
  5312. * "runtime" alive if code weren't properly loaded. */
  5313. if (iwl4965_verify_ucode(priv)) {
  5314. /* Runtime instruction load was bad;
  5315. * take it all the way back down so we can try again */
  5316. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5317. goto restart;
  5318. }
  5319. iwl4965_clear_stations_table(priv);
  5320. rc = iwl4965_alive_notify(priv);
  5321. if (rc) {
  5322. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5323. rc);
  5324. goto restart;
  5325. }
  5326. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5327. set_bit(STATUS_ALIVE, &priv->status);
  5328. /* Clear out the uCode error bit if it is set */
  5329. clear_bit(STATUS_FW_ERROR, &priv->status);
  5330. if (iwl4965_is_rfkill(priv))
  5331. return;
  5332. ieee80211_start_queues(priv->hw);
  5333. priv->active_rate = priv->rates_mask;
  5334. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5335. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5336. if (iwl4965_is_associated(priv)) {
  5337. struct iwl4965_rxon_cmd *active_rxon =
  5338. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5339. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5340. sizeof(priv->staging_rxon));
  5341. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5342. } else {
  5343. /* Initialize our rx_config data */
  5344. iwl4965_connection_init_rx_config(priv);
  5345. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5346. }
  5347. /* Configure Bluetooth device coexistence support */
  5348. iwl4965_send_bt_config(priv);
  5349. /* Configure the adapter for unassociated operation */
  5350. iwl4965_commit_rxon(priv);
  5351. /* At this point, the NIC is initialized and operational */
  5352. priv->notif_missed_beacons = 0;
  5353. set_bit(STATUS_READY, &priv->status);
  5354. iwl4965_rf_kill_ct_config(priv);
  5355. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5356. wake_up_interruptible(&priv->wait_command_queue);
  5357. if (priv->error_recovering)
  5358. iwl4965_error_recovery(priv);
  5359. return;
  5360. restart:
  5361. queue_work(priv->workqueue, &priv->restart);
  5362. }
  5363. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5364. static void __iwl4965_down(struct iwl4965_priv *priv)
  5365. {
  5366. unsigned long flags;
  5367. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5368. struct ieee80211_conf *conf = NULL;
  5369. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5370. conf = ieee80211_get_hw_conf(priv->hw);
  5371. if (!exit_pending)
  5372. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5373. iwl4965_clear_stations_table(priv);
  5374. /* Unblock any waiting calls */
  5375. wake_up_interruptible_all(&priv->wait_command_queue);
  5376. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5377. * exiting the module */
  5378. if (!exit_pending)
  5379. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5380. /* stop and reset the on-board processor */
  5381. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5382. /* tell the device to stop sending interrupts */
  5383. iwl4965_disable_interrupts(priv);
  5384. if (priv->mac80211_registered)
  5385. ieee80211_stop_queues(priv->hw);
  5386. /* If we have not previously called iwl4965_init() then
  5387. * clear all bits but the RF Kill and SUSPEND bits and return */
  5388. if (!iwl4965_is_init(priv)) {
  5389. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5390. STATUS_RF_KILL_HW |
  5391. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5392. STATUS_RF_KILL_SW |
  5393. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5394. STATUS_GEO_CONFIGURED |
  5395. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5396. STATUS_IN_SUSPEND;
  5397. goto exit;
  5398. }
  5399. /* ...otherwise clear out all the status bits but the RF Kill and
  5400. * SUSPEND bits and continue taking the NIC down. */
  5401. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5402. STATUS_RF_KILL_HW |
  5403. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5404. STATUS_RF_KILL_SW |
  5405. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5406. STATUS_GEO_CONFIGURED |
  5407. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5408. STATUS_IN_SUSPEND |
  5409. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5410. STATUS_FW_ERROR;
  5411. spin_lock_irqsave(&priv->lock, flags);
  5412. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5413. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5414. spin_unlock_irqrestore(&priv->lock, flags);
  5415. iwl4965_hw_txq_ctx_stop(priv);
  5416. iwl4965_hw_rxq_stop(priv);
  5417. spin_lock_irqsave(&priv->lock, flags);
  5418. if (!iwl4965_grab_nic_access(priv)) {
  5419. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5420. APMG_CLK_VAL_DMA_CLK_RQT);
  5421. iwl4965_release_nic_access(priv);
  5422. }
  5423. spin_unlock_irqrestore(&priv->lock, flags);
  5424. udelay(5);
  5425. iwl4965_hw_nic_stop_master(priv);
  5426. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5427. iwl4965_hw_nic_reset(priv);
  5428. exit:
  5429. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5430. if (priv->ibss_beacon)
  5431. dev_kfree_skb(priv->ibss_beacon);
  5432. priv->ibss_beacon = NULL;
  5433. /* clear out any free frames */
  5434. iwl4965_clear_free_frames(priv);
  5435. }
  5436. static void iwl4965_down(struct iwl4965_priv *priv)
  5437. {
  5438. mutex_lock(&priv->mutex);
  5439. __iwl4965_down(priv);
  5440. mutex_unlock(&priv->mutex);
  5441. iwl4965_cancel_deferred_work(priv);
  5442. }
  5443. #define MAX_HW_RESTARTS 5
  5444. static int __iwl4965_up(struct iwl4965_priv *priv)
  5445. {
  5446. int rc, i;
  5447. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5448. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5449. return -EIO;
  5450. }
  5451. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5452. IWL_WARNING("Radio disabled by SW RF kill (module "
  5453. "parameter)\n");
  5454. return -ENODEV;
  5455. }
  5456. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5457. IWL_ERROR("ucode not available for device bringup\n");
  5458. return -EIO;
  5459. }
  5460. /* If platform's RF_KILL switch is NOT set to KILL */
  5461. if (iwl4965_read32(priv, CSR_GP_CNTRL) &
  5462. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  5463. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5464. else {
  5465. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5466. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  5467. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5468. return -ENODEV;
  5469. }
  5470. }
  5471. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5472. rc = iwl4965_hw_nic_init(priv);
  5473. if (rc) {
  5474. IWL_ERROR("Unable to int nic\n");
  5475. return rc;
  5476. }
  5477. /* make sure rfkill handshake bits are cleared */
  5478. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5479. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5480. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5481. /* clear (again), then enable host interrupts */
  5482. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5483. iwl4965_enable_interrupts(priv);
  5484. /* really make sure rfkill handshake bits are cleared */
  5485. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5486. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5487. /* Copy original ucode data image from disk into backup cache.
  5488. * This will be used to initialize the on-board processor's
  5489. * data SRAM for a clean start when the runtime program first loads. */
  5490. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5491. priv->ucode_data.len);
  5492. /* We return success when we resume from suspend and rf_kill is on. */
  5493. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  5494. return 0;
  5495. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5496. iwl4965_clear_stations_table(priv);
  5497. /* load bootstrap state machine,
  5498. * load bootstrap program into processor's memory,
  5499. * prepare to load the "initialize" uCode */
  5500. rc = iwl4965_load_bsm(priv);
  5501. if (rc) {
  5502. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5503. continue;
  5504. }
  5505. /* start card; "initialize" will load runtime ucode */
  5506. iwl4965_nic_start(priv);
  5507. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5508. return 0;
  5509. }
  5510. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5511. __iwl4965_down(priv);
  5512. /* tried to restart and config the device for as long as our
  5513. * patience could withstand */
  5514. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5515. return -EIO;
  5516. }
  5517. /*****************************************************************************
  5518. *
  5519. * Workqueue callbacks
  5520. *
  5521. *****************************************************************************/
  5522. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5523. {
  5524. struct iwl4965_priv *priv =
  5525. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5526. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5527. return;
  5528. mutex_lock(&priv->mutex);
  5529. iwl4965_init_alive_start(priv);
  5530. mutex_unlock(&priv->mutex);
  5531. }
  5532. static void iwl4965_bg_alive_start(struct work_struct *data)
  5533. {
  5534. struct iwl4965_priv *priv =
  5535. container_of(data, struct iwl4965_priv, alive_start.work);
  5536. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5537. return;
  5538. mutex_lock(&priv->mutex);
  5539. iwl4965_alive_start(priv);
  5540. mutex_unlock(&priv->mutex);
  5541. }
  5542. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5543. {
  5544. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5545. wake_up_interruptible(&priv->wait_command_queue);
  5546. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5547. return;
  5548. mutex_lock(&priv->mutex);
  5549. if (!iwl4965_is_rfkill(priv)) {
  5550. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5551. "HW and/or SW RF Kill no longer active, restarting "
  5552. "device\n");
  5553. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5554. queue_work(priv->workqueue, &priv->restart);
  5555. } else {
  5556. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5557. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5558. "disabled by SW switch\n");
  5559. else
  5560. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5561. "Kill switch must be turned off for "
  5562. "wireless networking to work.\n");
  5563. }
  5564. mutex_unlock(&priv->mutex);
  5565. }
  5566. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5567. static void iwl4965_bg_scan_check(struct work_struct *data)
  5568. {
  5569. struct iwl4965_priv *priv =
  5570. container_of(data, struct iwl4965_priv, scan_check.work);
  5571. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5572. return;
  5573. mutex_lock(&priv->mutex);
  5574. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5575. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5576. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5577. "Scan completion watchdog resetting adapter (%dms)\n",
  5578. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5579. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5580. iwl4965_send_scan_abort(priv);
  5581. }
  5582. mutex_unlock(&priv->mutex);
  5583. }
  5584. static void iwl4965_bg_request_scan(struct work_struct *data)
  5585. {
  5586. struct iwl4965_priv *priv =
  5587. container_of(data, struct iwl4965_priv, request_scan);
  5588. struct iwl4965_host_cmd cmd = {
  5589. .id = REPLY_SCAN_CMD,
  5590. .len = sizeof(struct iwl4965_scan_cmd),
  5591. .meta.flags = CMD_SIZE_HUGE,
  5592. };
  5593. int rc = 0;
  5594. struct iwl4965_scan_cmd *scan;
  5595. struct ieee80211_conf *conf = NULL;
  5596. u16 cmd_len;
  5597. enum ieee80211_band band;
  5598. u8 direct_mask;
  5599. conf = ieee80211_get_hw_conf(priv->hw);
  5600. mutex_lock(&priv->mutex);
  5601. if (!iwl4965_is_ready(priv)) {
  5602. IWL_WARNING("request scan called when driver not ready.\n");
  5603. goto done;
  5604. }
  5605. /* Make sure the scan wasn't cancelled before this queued work
  5606. * was given the chance to run... */
  5607. if (!test_bit(STATUS_SCANNING, &priv->status))
  5608. goto done;
  5609. /* This should never be called or scheduled if there is currently
  5610. * a scan active in the hardware. */
  5611. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5612. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5613. "Ignoring second request.\n");
  5614. rc = -EIO;
  5615. goto done;
  5616. }
  5617. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5618. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5619. goto done;
  5620. }
  5621. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5622. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5623. goto done;
  5624. }
  5625. if (iwl4965_is_rfkill(priv)) {
  5626. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5627. goto done;
  5628. }
  5629. if (!test_bit(STATUS_READY, &priv->status)) {
  5630. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5631. goto done;
  5632. }
  5633. if (!priv->scan_bands) {
  5634. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5635. goto done;
  5636. }
  5637. if (!priv->scan) {
  5638. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5639. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5640. if (!priv->scan) {
  5641. rc = -ENOMEM;
  5642. goto done;
  5643. }
  5644. }
  5645. scan = priv->scan;
  5646. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5647. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5648. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5649. if (iwl4965_is_associated(priv)) {
  5650. u16 interval = 0;
  5651. u32 extra;
  5652. u32 suspend_time = 100;
  5653. u32 scan_suspend_time = 100;
  5654. unsigned long flags;
  5655. IWL_DEBUG_INFO("Scanning while associated...\n");
  5656. spin_lock_irqsave(&priv->lock, flags);
  5657. interval = priv->beacon_int;
  5658. spin_unlock_irqrestore(&priv->lock, flags);
  5659. scan->suspend_time = 0;
  5660. scan->max_out_time = cpu_to_le32(200 * 1024);
  5661. if (!interval)
  5662. interval = suspend_time;
  5663. extra = (suspend_time / interval) << 22;
  5664. scan_suspend_time = (extra |
  5665. ((suspend_time % interval) * 1024));
  5666. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5667. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5668. scan_suspend_time, interval);
  5669. }
  5670. /* We should add the ability for user to lock to PASSIVE ONLY */
  5671. if (priv->one_direct_scan) {
  5672. IWL_DEBUG_SCAN
  5673. ("Kicking off one direct scan for '%s'\n",
  5674. iwl4965_escape_essid(priv->direct_ssid,
  5675. priv->direct_ssid_len));
  5676. scan->direct_scan[0].id = WLAN_EID_SSID;
  5677. scan->direct_scan[0].len = priv->direct_ssid_len;
  5678. memcpy(scan->direct_scan[0].ssid,
  5679. priv->direct_ssid, priv->direct_ssid_len);
  5680. direct_mask = 1;
  5681. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5682. scan->direct_scan[0].id = WLAN_EID_SSID;
  5683. scan->direct_scan[0].len = priv->essid_len;
  5684. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5685. direct_mask = 1;
  5686. } else
  5687. direct_mask = 0;
  5688. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5689. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5690. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5691. switch (priv->scan_bands) {
  5692. case 2:
  5693. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5694. scan->tx_cmd.rate_n_flags =
  5695. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5696. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5697. scan->good_CRC_th = 0;
  5698. band = IEEE80211_BAND_2GHZ;
  5699. break;
  5700. case 1:
  5701. scan->tx_cmd.rate_n_flags =
  5702. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5703. RATE_MCS_ANT_B_MSK);
  5704. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5705. band = IEEE80211_BAND_5GHZ;
  5706. break;
  5707. default:
  5708. IWL_WARNING("Invalid scan band count\n");
  5709. goto done;
  5710. }
  5711. /* We don't build a direct scan probe request; the uCode will do
  5712. * that based on the direct_mask added to each channel entry */
  5713. cmd_len = iwl4965_fill_probe_req(priv, band,
  5714. (struct ieee80211_mgmt *)scan->data,
  5715. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  5716. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  5717. /* select Rx chains */
  5718. /* Force use of chains B and C (0x6) for scan Rx.
  5719. * Avoid A (0x1) because of its off-channel reception on A-band.
  5720. * MIMO is not used here, but value is required to make uCode happy. */
  5721. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5722. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5723. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5724. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5725. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5726. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5727. if (direct_mask)
  5728. IWL_DEBUG_SCAN
  5729. ("Initiating direct scan for %s.\n",
  5730. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5731. else
  5732. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5733. scan->channel_count =
  5734. iwl4965_get_channels_for_scan(
  5735. priv, band, 1, /* active */
  5736. direct_mask,
  5737. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5738. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5739. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5740. cmd.data = scan;
  5741. scan->len = cpu_to_le16(cmd.len);
  5742. set_bit(STATUS_SCAN_HW, &priv->status);
  5743. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5744. if (rc)
  5745. goto done;
  5746. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5747. IWL_SCAN_CHECK_WATCHDOG);
  5748. mutex_unlock(&priv->mutex);
  5749. return;
  5750. done:
  5751. /* inform mac80211 scan aborted */
  5752. queue_work(priv->workqueue, &priv->scan_completed);
  5753. mutex_unlock(&priv->mutex);
  5754. }
  5755. static void iwl4965_bg_up(struct work_struct *data)
  5756. {
  5757. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  5758. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5759. return;
  5760. mutex_lock(&priv->mutex);
  5761. __iwl4965_up(priv);
  5762. mutex_unlock(&priv->mutex);
  5763. }
  5764. static void iwl4965_bg_restart(struct work_struct *data)
  5765. {
  5766. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  5767. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5768. return;
  5769. iwl4965_down(priv);
  5770. queue_work(priv->workqueue, &priv->up);
  5771. }
  5772. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5773. {
  5774. struct iwl4965_priv *priv =
  5775. container_of(data, struct iwl4965_priv, rx_replenish);
  5776. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5777. return;
  5778. mutex_lock(&priv->mutex);
  5779. iwl4965_rx_replenish(priv);
  5780. mutex_unlock(&priv->mutex);
  5781. }
  5782. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5783. static void iwl4965_bg_post_associate(struct work_struct *data)
  5784. {
  5785. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  5786. post_associate.work);
  5787. int rc = 0;
  5788. struct ieee80211_conf *conf = NULL;
  5789. DECLARE_MAC_BUF(mac);
  5790. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5791. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5792. return;
  5793. }
  5794. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5795. priv->assoc_id,
  5796. print_mac(mac, priv->active_rxon.bssid_addr));
  5797. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5798. return;
  5799. mutex_lock(&priv->mutex);
  5800. if (!priv->vif || !priv->is_open) {
  5801. mutex_unlock(&priv->mutex);
  5802. return;
  5803. }
  5804. iwl4965_scan_cancel_timeout(priv, 200);
  5805. conf = ieee80211_get_hw_conf(priv->hw);
  5806. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5807. iwl4965_commit_rxon(priv);
  5808. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5809. iwl4965_setup_rxon_timing(priv);
  5810. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5811. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5812. if (rc)
  5813. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5814. "Attempting to continue.\n");
  5815. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5816. #ifdef CONFIG_IWL4965_HT
  5817. if (priv->current_ht_config.is_ht)
  5818. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5819. #endif /* CONFIG_IWL4965_HT*/
  5820. iwl4965_set_rxon_chain(priv);
  5821. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5822. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5823. priv->assoc_id, priv->beacon_int);
  5824. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5825. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5826. else
  5827. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5828. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5829. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5830. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5831. else
  5832. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5833. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5834. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5835. }
  5836. iwl4965_commit_rxon(priv);
  5837. switch (priv->iw_mode) {
  5838. case IEEE80211_IF_TYPE_STA:
  5839. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5840. break;
  5841. case IEEE80211_IF_TYPE_IBSS:
  5842. /* clear out the station table */
  5843. iwl4965_clear_stations_table(priv);
  5844. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5845. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5846. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5847. iwl4965_send_beacon_cmd(priv);
  5848. break;
  5849. default:
  5850. IWL_ERROR("%s Should not be called in %d mode\n",
  5851. __FUNCTION__, priv->iw_mode);
  5852. break;
  5853. }
  5854. iwl4965_sequence_reset(priv);
  5855. #ifdef CONFIG_IWL4965_SENSITIVITY
  5856. /* Enable Rx differential gain and sensitivity calibrations */
  5857. iwl4965_chain_noise_reset(priv);
  5858. priv->start_calib = 1;
  5859. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5860. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5861. priv->assoc_station_added = 1;
  5862. iwl4965_activate_qos(priv, 0);
  5863. /* we have just associated, don't start scan too early */
  5864. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5865. mutex_unlock(&priv->mutex);
  5866. }
  5867. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5868. {
  5869. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  5870. if (!iwl4965_is_ready(priv))
  5871. return;
  5872. mutex_lock(&priv->mutex);
  5873. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5874. iwl4965_send_scan_abort(priv);
  5875. mutex_unlock(&priv->mutex);
  5876. }
  5877. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5878. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5879. {
  5880. struct iwl4965_priv *priv =
  5881. container_of(work, struct iwl4965_priv, scan_completed);
  5882. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5883. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5884. return;
  5885. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5886. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5887. ieee80211_scan_completed(priv->hw);
  5888. /* Since setting the TXPOWER may have been deferred while
  5889. * performing the scan, fire one off */
  5890. mutex_lock(&priv->mutex);
  5891. iwl4965_hw_reg_send_txpower(priv);
  5892. mutex_unlock(&priv->mutex);
  5893. }
  5894. /*****************************************************************************
  5895. *
  5896. * mac80211 entry point functions
  5897. *
  5898. *****************************************************************************/
  5899. #define UCODE_READY_TIMEOUT (2 * HZ)
  5900. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5901. {
  5902. struct iwl4965_priv *priv = hw->priv;
  5903. int ret;
  5904. IWL_DEBUG_MAC80211("enter\n");
  5905. if (pci_enable_device(priv->pci_dev)) {
  5906. IWL_ERROR("Fail to pci_enable_device\n");
  5907. return -ENODEV;
  5908. }
  5909. pci_restore_state(priv->pci_dev);
  5910. pci_enable_msi(priv->pci_dev);
  5911. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5912. DRV_NAME, priv);
  5913. if (ret) {
  5914. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5915. goto out_disable_msi;
  5916. }
  5917. /* we should be verifying the device is ready to be opened */
  5918. mutex_lock(&priv->mutex);
  5919. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5920. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5921. * ucode filename and max sizes are card-specific. */
  5922. if (!priv->ucode_code.len) {
  5923. ret = iwl4965_read_ucode(priv);
  5924. if (ret) {
  5925. IWL_ERROR("Could not read microcode: %d\n", ret);
  5926. mutex_unlock(&priv->mutex);
  5927. goto out_release_irq;
  5928. }
  5929. }
  5930. ret = __iwl4965_up(priv);
  5931. mutex_unlock(&priv->mutex);
  5932. if (ret)
  5933. goto out_release_irq;
  5934. IWL_DEBUG_INFO("Start UP work done.\n");
  5935. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5936. return 0;
  5937. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5938. * mac80211 will not be run successfully. */
  5939. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5940. test_bit(STATUS_READY, &priv->status),
  5941. UCODE_READY_TIMEOUT);
  5942. if (!ret) {
  5943. if (!test_bit(STATUS_READY, &priv->status)) {
  5944. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5945. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5946. ret = -ETIMEDOUT;
  5947. goto out_release_irq;
  5948. }
  5949. }
  5950. priv->is_open = 1;
  5951. IWL_DEBUG_MAC80211("leave\n");
  5952. return 0;
  5953. out_release_irq:
  5954. free_irq(priv->pci_dev->irq, priv);
  5955. out_disable_msi:
  5956. pci_disable_msi(priv->pci_dev);
  5957. pci_disable_device(priv->pci_dev);
  5958. priv->is_open = 0;
  5959. IWL_DEBUG_MAC80211("leave - failed\n");
  5960. return ret;
  5961. }
  5962. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5963. {
  5964. struct iwl4965_priv *priv = hw->priv;
  5965. IWL_DEBUG_MAC80211("enter\n");
  5966. if (!priv->is_open) {
  5967. IWL_DEBUG_MAC80211("leave - skip\n");
  5968. return;
  5969. }
  5970. priv->is_open = 0;
  5971. if (iwl4965_is_ready_rf(priv)) {
  5972. /* stop mac, cancel any scan request and clear
  5973. * RXON_FILTER_ASSOC_MSK BIT
  5974. */
  5975. mutex_lock(&priv->mutex);
  5976. iwl4965_scan_cancel_timeout(priv, 100);
  5977. cancel_delayed_work(&priv->post_associate);
  5978. mutex_unlock(&priv->mutex);
  5979. }
  5980. iwl4965_down(priv);
  5981. flush_workqueue(priv->workqueue);
  5982. free_irq(priv->pci_dev->irq, priv);
  5983. pci_disable_msi(priv->pci_dev);
  5984. pci_save_state(priv->pci_dev);
  5985. pci_disable_device(priv->pci_dev);
  5986. IWL_DEBUG_MAC80211("leave\n");
  5987. }
  5988. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5989. struct ieee80211_tx_control *ctl)
  5990. {
  5991. struct iwl4965_priv *priv = hw->priv;
  5992. IWL_DEBUG_MAC80211("enter\n");
  5993. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5994. IWL_DEBUG_MAC80211("leave - monitor\n");
  5995. return -1;
  5996. }
  5997. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5998. ctl->tx_rate->bitrate);
  5999. if (iwl4965_tx_skb(priv, skb, ctl))
  6000. dev_kfree_skb_any(skb);
  6001. IWL_DEBUG_MAC80211("leave\n");
  6002. return 0;
  6003. }
  6004. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  6005. struct ieee80211_if_init_conf *conf)
  6006. {
  6007. struct iwl4965_priv *priv = hw->priv;
  6008. unsigned long flags;
  6009. DECLARE_MAC_BUF(mac);
  6010. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  6011. if (priv->vif) {
  6012. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  6013. return -EOPNOTSUPP;
  6014. }
  6015. spin_lock_irqsave(&priv->lock, flags);
  6016. priv->vif = conf->vif;
  6017. spin_unlock_irqrestore(&priv->lock, flags);
  6018. mutex_lock(&priv->mutex);
  6019. if (conf->mac_addr) {
  6020. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  6021. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  6022. }
  6023. if (iwl4965_is_ready(priv))
  6024. iwl4965_set_mode(priv, conf->type);
  6025. mutex_unlock(&priv->mutex);
  6026. IWL_DEBUG_MAC80211("leave\n");
  6027. return 0;
  6028. }
  6029. /**
  6030. * iwl4965_mac_config - mac80211 config callback
  6031. *
  6032. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6033. * be set inappropriately and the driver currently sets the hardware up to
  6034. * use it whenever needed.
  6035. */
  6036. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6037. {
  6038. struct iwl4965_priv *priv = hw->priv;
  6039. const struct iwl4965_channel_info *ch_info;
  6040. unsigned long flags;
  6041. int ret = 0;
  6042. mutex_lock(&priv->mutex);
  6043. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  6044. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  6045. if (!iwl4965_is_ready(priv)) {
  6046. IWL_DEBUG_MAC80211("leave - not ready\n");
  6047. ret = -EIO;
  6048. goto out;
  6049. }
  6050. if (unlikely(!iwl4965_param_disable_hw_scan &&
  6051. test_bit(STATUS_SCANNING, &priv->status))) {
  6052. IWL_DEBUG_MAC80211("leave - scanning\n");
  6053. set_bit(STATUS_CONF_PENDING, &priv->status);
  6054. mutex_unlock(&priv->mutex);
  6055. return 0;
  6056. }
  6057. spin_lock_irqsave(&priv->lock, flags);
  6058. ch_info = iwl4965_get_channel_info(priv, conf->channel->band,
  6059. ieee80211_frequency_to_channel(conf->channel->center_freq));
  6060. if (!is_channel_valid(ch_info)) {
  6061. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6062. spin_unlock_irqrestore(&priv->lock, flags);
  6063. ret = -EINVAL;
  6064. goto out;
  6065. }
  6066. #ifdef CONFIG_IWL4965_HT
  6067. /* if we are switching from ht to 2.4 clear flags
  6068. * from any ht related info since 2.4 does not
  6069. * support ht */
  6070. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  6071. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6072. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6073. #endif
  6074. )
  6075. priv->staging_rxon.flags = 0;
  6076. #endif /* CONFIG_IWL4965_HT */
  6077. iwl4965_set_rxon_channel(priv, conf->channel->band,
  6078. ieee80211_frequency_to_channel(conf->channel->center_freq));
  6079. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  6080. /* The list of supported rates and rate mask can be different
  6081. * for each band; since the band may have changed, reset
  6082. * the rate mask to what mac80211 lists */
  6083. iwl4965_set_rate(priv);
  6084. spin_unlock_irqrestore(&priv->lock, flags);
  6085. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6086. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6087. iwl4965_hw_channel_switch(priv, conf->channel);
  6088. goto out;
  6089. }
  6090. #endif
  6091. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6092. if (!conf->radio_enabled) {
  6093. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6094. goto out;
  6095. }
  6096. if (iwl4965_is_rfkill(priv)) {
  6097. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6098. ret = -EIO;
  6099. goto out;
  6100. }
  6101. iwl4965_set_rate(priv);
  6102. if (memcmp(&priv->active_rxon,
  6103. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6104. iwl4965_commit_rxon(priv);
  6105. else
  6106. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6107. IWL_DEBUG_MAC80211("leave\n");
  6108. out:
  6109. clear_bit(STATUS_CONF_PENDING, &priv->status);
  6110. mutex_unlock(&priv->mutex);
  6111. return ret;
  6112. }
  6113. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6114. {
  6115. int rc = 0;
  6116. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6117. return;
  6118. /* The following should be done only at AP bring up */
  6119. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6120. /* RXON - unassoc (to set timing command) */
  6121. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6122. iwl4965_commit_rxon(priv);
  6123. /* RXON Timing */
  6124. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6125. iwl4965_setup_rxon_timing(priv);
  6126. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6127. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6128. if (rc)
  6129. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6130. "Attempting to continue.\n");
  6131. iwl4965_set_rxon_chain(priv);
  6132. /* FIXME: what should be the assoc_id for AP? */
  6133. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6134. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6135. priv->staging_rxon.flags |=
  6136. RXON_FLG_SHORT_PREAMBLE_MSK;
  6137. else
  6138. priv->staging_rxon.flags &=
  6139. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6140. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6141. if (priv->assoc_capability &
  6142. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6143. priv->staging_rxon.flags |=
  6144. RXON_FLG_SHORT_SLOT_MSK;
  6145. else
  6146. priv->staging_rxon.flags &=
  6147. ~RXON_FLG_SHORT_SLOT_MSK;
  6148. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6149. priv->staging_rxon.flags &=
  6150. ~RXON_FLG_SHORT_SLOT_MSK;
  6151. }
  6152. /* restore RXON assoc */
  6153. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6154. iwl4965_commit_rxon(priv);
  6155. iwl4965_activate_qos(priv, 1);
  6156. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6157. }
  6158. iwl4965_send_beacon_cmd(priv);
  6159. /* FIXME - we need to add code here to detect a totally new
  6160. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6161. * clear sta table, add BCAST sta... */
  6162. }
  6163. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  6164. struct ieee80211_vif *vif,
  6165. struct ieee80211_if_conf *conf)
  6166. {
  6167. struct iwl4965_priv *priv = hw->priv;
  6168. DECLARE_MAC_BUF(mac);
  6169. unsigned long flags;
  6170. int rc;
  6171. if (conf == NULL)
  6172. return -EIO;
  6173. if (priv->vif != vif) {
  6174. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  6175. mutex_unlock(&priv->mutex);
  6176. return 0;
  6177. }
  6178. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6179. (!conf->beacon || !conf->ssid_len)) {
  6180. IWL_DEBUG_MAC80211
  6181. ("Leaving in AP mode because HostAPD is not ready.\n");
  6182. return 0;
  6183. }
  6184. if (!iwl4965_is_alive(priv))
  6185. return -EAGAIN;
  6186. mutex_lock(&priv->mutex);
  6187. if (conf->bssid)
  6188. IWL_DEBUG_MAC80211("bssid: %s\n",
  6189. print_mac(mac, conf->bssid));
  6190. /*
  6191. * very dubious code was here; the probe filtering flag is never set:
  6192. *
  6193. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6194. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6195. */
  6196. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6197. if (!conf->bssid) {
  6198. conf->bssid = priv->mac_addr;
  6199. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6200. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6201. print_mac(mac, conf->bssid));
  6202. }
  6203. if (priv->ibss_beacon)
  6204. dev_kfree_skb(priv->ibss_beacon);
  6205. priv->ibss_beacon = conf->beacon;
  6206. }
  6207. if (iwl4965_is_rfkill(priv))
  6208. goto done;
  6209. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6210. !is_multicast_ether_addr(conf->bssid)) {
  6211. /* If there is currently a HW scan going on in the background
  6212. * then we need to cancel it else the RXON below will fail. */
  6213. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6214. IWL_WARNING("Aborted scan still in progress "
  6215. "after 100ms\n");
  6216. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6217. mutex_unlock(&priv->mutex);
  6218. return -EAGAIN;
  6219. }
  6220. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6221. /* TODO: Audit driver for usage of these members and see
  6222. * if mac80211 deprecates them (priv->bssid looks like it
  6223. * shouldn't be there, but I haven't scanned the IBSS code
  6224. * to verify) - jpk */
  6225. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6226. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6227. iwl4965_config_ap(priv);
  6228. else {
  6229. rc = iwl4965_commit_rxon(priv);
  6230. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6231. iwl4965_rxon_add_station(
  6232. priv, priv->active_rxon.bssid_addr, 1);
  6233. }
  6234. } else {
  6235. iwl4965_scan_cancel_timeout(priv, 100);
  6236. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6237. iwl4965_commit_rxon(priv);
  6238. }
  6239. done:
  6240. spin_lock_irqsave(&priv->lock, flags);
  6241. if (!conf->ssid_len)
  6242. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6243. else
  6244. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6245. priv->essid_len = conf->ssid_len;
  6246. spin_unlock_irqrestore(&priv->lock, flags);
  6247. IWL_DEBUG_MAC80211("leave\n");
  6248. mutex_unlock(&priv->mutex);
  6249. return 0;
  6250. }
  6251. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6252. unsigned int changed_flags,
  6253. unsigned int *total_flags,
  6254. int mc_count, struct dev_addr_list *mc_list)
  6255. {
  6256. /*
  6257. * XXX: dummy
  6258. * see also iwl4965_connection_init_rx_config
  6259. */
  6260. *total_flags = 0;
  6261. }
  6262. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6263. struct ieee80211_if_init_conf *conf)
  6264. {
  6265. struct iwl4965_priv *priv = hw->priv;
  6266. IWL_DEBUG_MAC80211("enter\n");
  6267. mutex_lock(&priv->mutex);
  6268. if (iwl4965_is_ready_rf(priv)) {
  6269. iwl4965_scan_cancel_timeout(priv, 100);
  6270. cancel_delayed_work(&priv->post_associate);
  6271. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6272. iwl4965_commit_rxon(priv);
  6273. }
  6274. if (priv->vif == conf->vif) {
  6275. priv->vif = NULL;
  6276. memset(priv->bssid, 0, ETH_ALEN);
  6277. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6278. priv->essid_len = 0;
  6279. }
  6280. mutex_unlock(&priv->mutex);
  6281. IWL_DEBUG_MAC80211("leave\n");
  6282. }
  6283. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  6284. struct ieee80211_vif *vif,
  6285. struct ieee80211_bss_conf *bss_conf,
  6286. u32 changes)
  6287. {
  6288. struct iwl4965_priv *priv = hw->priv;
  6289. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  6290. if (bss_conf->use_short_preamble)
  6291. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6292. else
  6293. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6294. }
  6295. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  6296. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  6297. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6298. else
  6299. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6300. }
  6301. if (changes & BSS_CHANGED_ASSOC) {
  6302. /*
  6303. * TODO:
  6304. * do stuff instead of sniffing assoc resp
  6305. */
  6306. }
  6307. if (iwl4965_is_associated(priv))
  6308. iwl4965_send_rxon_assoc(priv);
  6309. }
  6310. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6311. {
  6312. int rc = 0;
  6313. unsigned long flags;
  6314. struct iwl4965_priv *priv = hw->priv;
  6315. IWL_DEBUG_MAC80211("enter\n");
  6316. mutex_lock(&priv->mutex);
  6317. spin_lock_irqsave(&priv->lock, flags);
  6318. if (!iwl4965_is_ready_rf(priv)) {
  6319. rc = -EIO;
  6320. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6321. goto out_unlock;
  6322. }
  6323. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6324. rc = -EIO;
  6325. IWL_ERROR("ERROR: APs don't scan\n");
  6326. goto out_unlock;
  6327. }
  6328. /* we don't schedule scan within next_scan_jiffies period */
  6329. if (priv->next_scan_jiffies &&
  6330. time_after(priv->next_scan_jiffies, jiffies)) {
  6331. rc = -EAGAIN;
  6332. goto out_unlock;
  6333. }
  6334. /* if we just finished scan ask for delay */
  6335. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6336. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6337. rc = -EAGAIN;
  6338. goto out_unlock;
  6339. }
  6340. if (len) {
  6341. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6342. iwl4965_escape_essid(ssid, len), (int)len);
  6343. priv->one_direct_scan = 1;
  6344. priv->direct_ssid_len = (u8)
  6345. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6346. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6347. } else
  6348. priv->one_direct_scan = 0;
  6349. rc = iwl4965_scan_initiate(priv);
  6350. IWL_DEBUG_MAC80211("leave\n");
  6351. out_unlock:
  6352. spin_unlock_irqrestore(&priv->lock, flags);
  6353. mutex_unlock(&priv->mutex);
  6354. return rc;
  6355. }
  6356. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6357. const u8 *local_addr, const u8 *addr,
  6358. struct ieee80211_key_conf *key)
  6359. {
  6360. struct iwl4965_priv *priv = hw->priv;
  6361. DECLARE_MAC_BUF(mac);
  6362. int rc = 0;
  6363. u8 sta_id;
  6364. IWL_DEBUG_MAC80211("enter\n");
  6365. if (!iwl4965_param_hwcrypto) {
  6366. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6367. return -EOPNOTSUPP;
  6368. }
  6369. if (is_zero_ether_addr(addr))
  6370. /* only support pairwise keys */
  6371. return -EOPNOTSUPP;
  6372. sta_id = iwl4965_hw_find_station(priv, addr);
  6373. if (sta_id == IWL_INVALID_STATION) {
  6374. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6375. print_mac(mac, addr));
  6376. return -EINVAL;
  6377. }
  6378. mutex_lock(&priv->mutex);
  6379. iwl4965_scan_cancel_timeout(priv, 100);
  6380. switch (cmd) {
  6381. case SET_KEY:
  6382. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6383. if (!rc) {
  6384. iwl4965_set_rxon_hwcrypto(priv, 1);
  6385. iwl4965_commit_rxon(priv);
  6386. key->hw_key_idx = sta_id;
  6387. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6388. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6389. }
  6390. break;
  6391. case DISABLE_KEY:
  6392. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6393. if (!rc) {
  6394. iwl4965_set_rxon_hwcrypto(priv, 0);
  6395. iwl4965_commit_rxon(priv);
  6396. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6397. }
  6398. break;
  6399. default:
  6400. rc = -EINVAL;
  6401. }
  6402. IWL_DEBUG_MAC80211("leave\n");
  6403. mutex_unlock(&priv->mutex);
  6404. return rc;
  6405. }
  6406. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6407. const struct ieee80211_tx_queue_params *params)
  6408. {
  6409. struct iwl4965_priv *priv = hw->priv;
  6410. unsigned long flags;
  6411. int q;
  6412. IWL_DEBUG_MAC80211("enter\n");
  6413. if (!iwl4965_is_ready_rf(priv)) {
  6414. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6415. return -EIO;
  6416. }
  6417. if (queue >= AC_NUM) {
  6418. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6419. return 0;
  6420. }
  6421. if (!priv->qos_data.qos_enable) {
  6422. priv->qos_data.qos_active = 0;
  6423. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6424. return 0;
  6425. }
  6426. q = AC_NUM - 1 - queue;
  6427. spin_lock_irqsave(&priv->lock, flags);
  6428. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6429. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6430. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6431. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6432. cpu_to_le16((params->txop * 32));
  6433. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6434. priv->qos_data.qos_active = 1;
  6435. spin_unlock_irqrestore(&priv->lock, flags);
  6436. mutex_lock(&priv->mutex);
  6437. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6438. iwl4965_activate_qos(priv, 1);
  6439. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6440. iwl4965_activate_qos(priv, 0);
  6441. mutex_unlock(&priv->mutex);
  6442. IWL_DEBUG_MAC80211("leave\n");
  6443. return 0;
  6444. }
  6445. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6446. struct ieee80211_tx_queue_stats *stats)
  6447. {
  6448. struct iwl4965_priv *priv = hw->priv;
  6449. int i, avail;
  6450. struct iwl4965_tx_queue *txq;
  6451. struct iwl4965_queue *q;
  6452. unsigned long flags;
  6453. IWL_DEBUG_MAC80211("enter\n");
  6454. if (!iwl4965_is_ready_rf(priv)) {
  6455. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6456. return -EIO;
  6457. }
  6458. spin_lock_irqsave(&priv->lock, flags);
  6459. for (i = 0; i < AC_NUM; i++) {
  6460. txq = &priv->txq[i];
  6461. q = &txq->q;
  6462. avail = iwl4965_queue_space(q);
  6463. stats->data[i].len = q->n_window - avail;
  6464. stats->data[i].limit = q->n_window - q->high_mark;
  6465. stats->data[i].count = q->n_window;
  6466. }
  6467. spin_unlock_irqrestore(&priv->lock, flags);
  6468. IWL_DEBUG_MAC80211("leave\n");
  6469. return 0;
  6470. }
  6471. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6472. struct ieee80211_low_level_stats *stats)
  6473. {
  6474. IWL_DEBUG_MAC80211("enter\n");
  6475. IWL_DEBUG_MAC80211("leave\n");
  6476. return 0;
  6477. }
  6478. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6479. {
  6480. IWL_DEBUG_MAC80211("enter\n");
  6481. IWL_DEBUG_MAC80211("leave\n");
  6482. return 0;
  6483. }
  6484. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6485. {
  6486. struct iwl4965_priv *priv = hw->priv;
  6487. unsigned long flags;
  6488. mutex_lock(&priv->mutex);
  6489. IWL_DEBUG_MAC80211("enter\n");
  6490. priv->lq_mngr.lq_ready = 0;
  6491. #ifdef CONFIG_IWL4965_HT
  6492. spin_lock_irqsave(&priv->lock, flags);
  6493. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6494. spin_unlock_irqrestore(&priv->lock, flags);
  6495. #endif /* CONFIG_IWL4965_HT */
  6496. iwl4965_reset_qos(priv);
  6497. cancel_delayed_work(&priv->post_associate);
  6498. spin_lock_irqsave(&priv->lock, flags);
  6499. priv->assoc_id = 0;
  6500. priv->assoc_capability = 0;
  6501. priv->call_post_assoc_from_beacon = 0;
  6502. priv->assoc_station_added = 0;
  6503. /* new association get rid of ibss beacon skb */
  6504. if (priv->ibss_beacon)
  6505. dev_kfree_skb(priv->ibss_beacon);
  6506. priv->ibss_beacon = NULL;
  6507. priv->beacon_int = priv->hw->conf.beacon_int;
  6508. priv->timestamp1 = 0;
  6509. priv->timestamp0 = 0;
  6510. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6511. priv->beacon_int = 0;
  6512. spin_unlock_irqrestore(&priv->lock, flags);
  6513. if (!iwl4965_is_ready_rf(priv)) {
  6514. IWL_DEBUG_MAC80211("leave - not ready\n");
  6515. mutex_unlock(&priv->mutex);
  6516. return;
  6517. }
  6518. /* we are restarting association process
  6519. * clear RXON_FILTER_ASSOC_MSK bit
  6520. */
  6521. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6522. iwl4965_scan_cancel_timeout(priv, 100);
  6523. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6524. iwl4965_commit_rxon(priv);
  6525. }
  6526. /* Per mac80211.h: This is only used in IBSS mode... */
  6527. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6528. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6529. mutex_unlock(&priv->mutex);
  6530. return;
  6531. }
  6532. priv->only_active_channel = 0;
  6533. iwl4965_set_rate(priv);
  6534. mutex_unlock(&priv->mutex);
  6535. IWL_DEBUG_MAC80211("leave\n");
  6536. }
  6537. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6538. struct ieee80211_tx_control *control)
  6539. {
  6540. struct iwl4965_priv *priv = hw->priv;
  6541. unsigned long flags;
  6542. mutex_lock(&priv->mutex);
  6543. IWL_DEBUG_MAC80211("enter\n");
  6544. if (!iwl4965_is_ready_rf(priv)) {
  6545. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6546. mutex_unlock(&priv->mutex);
  6547. return -EIO;
  6548. }
  6549. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6550. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6551. mutex_unlock(&priv->mutex);
  6552. return -EIO;
  6553. }
  6554. spin_lock_irqsave(&priv->lock, flags);
  6555. if (priv->ibss_beacon)
  6556. dev_kfree_skb(priv->ibss_beacon);
  6557. priv->ibss_beacon = skb;
  6558. priv->assoc_id = 0;
  6559. IWL_DEBUG_MAC80211("leave\n");
  6560. spin_unlock_irqrestore(&priv->lock, flags);
  6561. iwl4965_reset_qos(priv);
  6562. queue_work(priv->workqueue, &priv->post_associate.work);
  6563. mutex_unlock(&priv->mutex);
  6564. return 0;
  6565. }
  6566. #ifdef CONFIG_IWL4965_HT
  6567. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6568. struct iwl4965_priv *priv)
  6569. {
  6570. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6571. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6572. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6573. IWL_DEBUG_MAC80211("enter: \n");
  6574. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6575. iwl_conf->is_ht = 0;
  6576. return;
  6577. }
  6578. iwl_conf->is_ht = 1;
  6579. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6580. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6581. iwl_conf->sgf |= 0x1;
  6582. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6583. iwl_conf->sgf |= 0x2;
  6584. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6585. iwl_conf->max_amsdu_size =
  6586. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6587. iwl_conf->supported_chan_width =
  6588. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6589. iwl_conf->extension_chan_offset =
  6590. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6591. /* If no above or below channel supplied disable FAT channel */
  6592. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  6593. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  6594. iwl_conf->supported_chan_width = 0;
  6595. iwl_conf->tx_mimo_ps_mode =
  6596. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6597. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6598. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6599. iwl_conf->tx_chan_width =
  6600. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6601. iwl_conf->ht_protection =
  6602. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6603. iwl_conf->non_GF_STA_present =
  6604. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6605. IWL_DEBUG_MAC80211("control channel %d\n",
  6606. iwl_conf->control_channel);
  6607. IWL_DEBUG_MAC80211("leave\n");
  6608. }
  6609. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6610. struct ieee80211_conf *conf)
  6611. {
  6612. struct iwl4965_priv *priv = hw->priv;
  6613. IWL_DEBUG_MAC80211("enter: \n");
  6614. iwl4965_ht_info_fill(conf, priv);
  6615. iwl4965_set_rxon_chain(priv);
  6616. if (priv && priv->assoc_id &&
  6617. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6618. unsigned long flags;
  6619. spin_lock_irqsave(&priv->lock, flags);
  6620. if (priv->beacon_int)
  6621. queue_work(priv->workqueue, &priv->post_associate.work);
  6622. else
  6623. priv->call_post_assoc_from_beacon = 1;
  6624. spin_unlock_irqrestore(&priv->lock, flags);
  6625. }
  6626. IWL_DEBUG_MAC80211("leave:\n");
  6627. return 0;
  6628. }
  6629. #endif /*CONFIG_IWL4965_HT*/
  6630. /*****************************************************************************
  6631. *
  6632. * sysfs attributes
  6633. *
  6634. *****************************************************************************/
  6635. #ifdef CONFIG_IWL4965_DEBUG
  6636. /*
  6637. * The following adds a new attribute to the sysfs representation
  6638. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6639. * used for controlling the debug level.
  6640. *
  6641. * See the level definitions in iwl for details.
  6642. */
  6643. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6644. {
  6645. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  6646. }
  6647. static ssize_t store_debug_level(struct device_driver *d,
  6648. const char *buf, size_t count)
  6649. {
  6650. char *p = (char *)buf;
  6651. u32 val;
  6652. val = simple_strtoul(p, &p, 0);
  6653. if (p == buf)
  6654. printk(KERN_INFO DRV_NAME
  6655. ": %s is not in hex or decimal form.\n", buf);
  6656. else
  6657. iwl4965_debug_level = val;
  6658. return strnlen(buf, count);
  6659. }
  6660. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6661. show_debug_level, store_debug_level);
  6662. #endif /* CONFIG_IWL4965_DEBUG */
  6663. static ssize_t show_rf_kill(struct device *d,
  6664. struct device_attribute *attr, char *buf)
  6665. {
  6666. /*
  6667. * 0 - RF kill not enabled
  6668. * 1 - SW based RF kill active (sysfs)
  6669. * 2 - HW based RF kill active
  6670. * 3 - Both HW and SW based RF kill active
  6671. */
  6672. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6673. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6674. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6675. return sprintf(buf, "%i\n", val);
  6676. }
  6677. static ssize_t store_rf_kill(struct device *d,
  6678. struct device_attribute *attr,
  6679. const char *buf, size_t count)
  6680. {
  6681. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6682. mutex_lock(&priv->mutex);
  6683. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6684. mutex_unlock(&priv->mutex);
  6685. return count;
  6686. }
  6687. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6688. static ssize_t show_temperature(struct device *d,
  6689. struct device_attribute *attr, char *buf)
  6690. {
  6691. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6692. if (!iwl4965_is_alive(priv))
  6693. return -EAGAIN;
  6694. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6695. }
  6696. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6697. static ssize_t show_rs_window(struct device *d,
  6698. struct device_attribute *attr,
  6699. char *buf)
  6700. {
  6701. struct iwl4965_priv *priv = d->driver_data;
  6702. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6703. }
  6704. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6705. static ssize_t show_tx_power(struct device *d,
  6706. struct device_attribute *attr, char *buf)
  6707. {
  6708. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6709. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6710. }
  6711. static ssize_t store_tx_power(struct device *d,
  6712. struct device_attribute *attr,
  6713. const char *buf, size_t count)
  6714. {
  6715. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6716. char *p = (char *)buf;
  6717. u32 val;
  6718. val = simple_strtoul(p, &p, 10);
  6719. if (p == buf)
  6720. printk(KERN_INFO DRV_NAME
  6721. ": %s is not in decimal form.\n", buf);
  6722. else
  6723. iwl4965_hw_reg_set_txpower(priv, val);
  6724. return count;
  6725. }
  6726. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6727. static ssize_t show_flags(struct device *d,
  6728. struct device_attribute *attr, char *buf)
  6729. {
  6730. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6731. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6732. }
  6733. static ssize_t store_flags(struct device *d,
  6734. struct device_attribute *attr,
  6735. const char *buf, size_t count)
  6736. {
  6737. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6738. u32 flags = simple_strtoul(buf, NULL, 0);
  6739. mutex_lock(&priv->mutex);
  6740. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6741. /* Cancel any currently running scans... */
  6742. if (iwl4965_scan_cancel_timeout(priv, 100))
  6743. IWL_WARNING("Could not cancel scan.\n");
  6744. else {
  6745. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6746. flags);
  6747. priv->staging_rxon.flags = cpu_to_le32(flags);
  6748. iwl4965_commit_rxon(priv);
  6749. }
  6750. }
  6751. mutex_unlock(&priv->mutex);
  6752. return count;
  6753. }
  6754. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6755. static ssize_t show_filter_flags(struct device *d,
  6756. struct device_attribute *attr, char *buf)
  6757. {
  6758. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6759. return sprintf(buf, "0x%04X\n",
  6760. le32_to_cpu(priv->active_rxon.filter_flags));
  6761. }
  6762. static ssize_t store_filter_flags(struct device *d,
  6763. struct device_attribute *attr,
  6764. const char *buf, size_t count)
  6765. {
  6766. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6767. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6768. mutex_lock(&priv->mutex);
  6769. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6770. /* Cancel any currently running scans... */
  6771. if (iwl4965_scan_cancel_timeout(priv, 100))
  6772. IWL_WARNING("Could not cancel scan.\n");
  6773. else {
  6774. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6775. "0x%04X\n", filter_flags);
  6776. priv->staging_rxon.filter_flags =
  6777. cpu_to_le32(filter_flags);
  6778. iwl4965_commit_rxon(priv);
  6779. }
  6780. }
  6781. mutex_unlock(&priv->mutex);
  6782. return count;
  6783. }
  6784. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6785. store_filter_flags);
  6786. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6787. static ssize_t show_measurement(struct device *d,
  6788. struct device_attribute *attr, char *buf)
  6789. {
  6790. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6791. struct iwl4965_spectrum_notification measure_report;
  6792. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6793. u8 *data = (u8 *) & measure_report;
  6794. unsigned long flags;
  6795. spin_lock_irqsave(&priv->lock, flags);
  6796. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6797. spin_unlock_irqrestore(&priv->lock, flags);
  6798. return 0;
  6799. }
  6800. memcpy(&measure_report, &priv->measure_report, size);
  6801. priv->measurement_status = 0;
  6802. spin_unlock_irqrestore(&priv->lock, flags);
  6803. while (size && (PAGE_SIZE - len)) {
  6804. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6805. PAGE_SIZE - len, 1);
  6806. len = strlen(buf);
  6807. if (PAGE_SIZE - len)
  6808. buf[len++] = '\n';
  6809. ofs += 16;
  6810. size -= min(size, 16U);
  6811. }
  6812. return len;
  6813. }
  6814. static ssize_t store_measurement(struct device *d,
  6815. struct device_attribute *attr,
  6816. const char *buf, size_t count)
  6817. {
  6818. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6819. struct ieee80211_measurement_params params = {
  6820. .channel = le16_to_cpu(priv->active_rxon.channel),
  6821. .start_time = cpu_to_le64(priv->last_tsf),
  6822. .duration = cpu_to_le16(1),
  6823. };
  6824. u8 type = IWL_MEASURE_BASIC;
  6825. u8 buffer[32];
  6826. u8 channel;
  6827. if (count) {
  6828. char *p = buffer;
  6829. strncpy(buffer, buf, min(sizeof(buffer), count));
  6830. channel = simple_strtoul(p, NULL, 0);
  6831. if (channel)
  6832. params.channel = channel;
  6833. p = buffer;
  6834. while (*p && *p != ' ')
  6835. p++;
  6836. if (*p)
  6837. type = simple_strtoul(p + 1, NULL, 0);
  6838. }
  6839. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6840. "channel %d (for '%s')\n", type, params.channel, buf);
  6841. iwl4965_get_measurement(priv, &params, type);
  6842. return count;
  6843. }
  6844. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6845. show_measurement, store_measurement);
  6846. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6847. static ssize_t store_retry_rate(struct device *d,
  6848. struct device_attribute *attr,
  6849. const char *buf, size_t count)
  6850. {
  6851. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6852. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6853. if (priv->retry_rate <= 0)
  6854. priv->retry_rate = 1;
  6855. return count;
  6856. }
  6857. static ssize_t show_retry_rate(struct device *d,
  6858. struct device_attribute *attr, char *buf)
  6859. {
  6860. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6861. return sprintf(buf, "%d", priv->retry_rate);
  6862. }
  6863. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6864. store_retry_rate);
  6865. static ssize_t store_power_level(struct device *d,
  6866. struct device_attribute *attr,
  6867. const char *buf, size_t count)
  6868. {
  6869. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6870. int rc;
  6871. int mode;
  6872. mode = simple_strtoul(buf, NULL, 0);
  6873. mutex_lock(&priv->mutex);
  6874. if (!iwl4965_is_ready(priv)) {
  6875. rc = -EAGAIN;
  6876. goto out;
  6877. }
  6878. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6879. mode = IWL_POWER_AC;
  6880. else
  6881. mode |= IWL_POWER_ENABLED;
  6882. if (mode != priv->power_mode) {
  6883. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6884. if (rc) {
  6885. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6886. goto out;
  6887. }
  6888. priv->power_mode = mode;
  6889. }
  6890. rc = count;
  6891. out:
  6892. mutex_unlock(&priv->mutex);
  6893. return rc;
  6894. }
  6895. #define MAX_WX_STRING 80
  6896. /* Values are in microsecond */
  6897. static const s32 timeout_duration[] = {
  6898. 350000,
  6899. 250000,
  6900. 75000,
  6901. 37000,
  6902. 25000,
  6903. };
  6904. static const s32 period_duration[] = {
  6905. 400000,
  6906. 700000,
  6907. 1000000,
  6908. 1000000,
  6909. 1000000
  6910. };
  6911. static ssize_t show_power_level(struct device *d,
  6912. struct device_attribute *attr, char *buf)
  6913. {
  6914. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6915. int level = IWL_POWER_LEVEL(priv->power_mode);
  6916. char *p = buf;
  6917. p += sprintf(p, "%d ", level);
  6918. switch (level) {
  6919. case IWL_POWER_MODE_CAM:
  6920. case IWL_POWER_AC:
  6921. p += sprintf(p, "(AC)");
  6922. break;
  6923. case IWL_POWER_BATTERY:
  6924. p += sprintf(p, "(BATTERY)");
  6925. break;
  6926. default:
  6927. p += sprintf(p,
  6928. "(Timeout %dms, Period %dms)",
  6929. timeout_duration[level - 1] / 1000,
  6930. period_duration[level - 1] / 1000);
  6931. }
  6932. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6933. p += sprintf(p, " OFF\n");
  6934. else
  6935. p += sprintf(p, " \n");
  6936. return (p - buf + 1);
  6937. }
  6938. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6939. store_power_level);
  6940. static ssize_t show_channels(struct device *d,
  6941. struct device_attribute *attr, char *buf)
  6942. {
  6943. /* all this shit doesn't belong into sysfs anyway */
  6944. return 0;
  6945. }
  6946. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6947. static ssize_t show_statistics(struct device *d,
  6948. struct device_attribute *attr, char *buf)
  6949. {
  6950. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6951. u32 size = sizeof(struct iwl4965_notif_statistics);
  6952. u32 len = 0, ofs = 0;
  6953. u8 *data = (u8 *) & priv->statistics;
  6954. int rc = 0;
  6955. if (!iwl4965_is_alive(priv))
  6956. return -EAGAIN;
  6957. mutex_lock(&priv->mutex);
  6958. rc = iwl4965_send_statistics_request(priv);
  6959. mutex_unlock(&priv->mutex);
  6960. if (rc) {
  6961. len = sprintf(buf,
  6962. "Error sending statistics request: 0x%08X\n", rc);
  6963. return len;
  6964. }
  6965. while (size && (PAGE_SIZE - len)) {
  6966. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6967. PAGE_SIZE - len, 1);
  6968. len = strlen(buf);
  6969. if (PAGE_SIZE - len)
  6970. buf[len++] = '\n';
  6971. ofs += 16;
  6972. size -= min(size, 16U);
  6973. }
  6974. return len;
  6975. }
  6976. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6977. static ssize_t show_antenna(struct device *d,
  6978. struct device_attribute *attr, char *buf)
  6979. {
  6980. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6981. if (!iwl4965_is_alive(priv))
  6982. return -EAGAIN;
  6983. return sprintf(buf, "%d\n", priv->antenna);
  6984. }
  6985. static ssize_t store_antenna(struct device *d,
  6986. struct device_attribute *attr,
  6987. const char *buf, size_t count)
  6988. {
  6989. int ant;
  6990. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6991. if (count == 0)
  6992. return 0;
  6993. if (sscanf(buf, "%1i", &ant) != 1) {
  6994. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6995. return count;
  6996. }
  6997. if ((ant >= 0) && (ant <= 2)) {
  6998. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6999. priv->antenna = (enum iwl4965_antenna)ant;
  7000. } else
  7001. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7002. return count;
  7003. }
  7004. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7005. static ssize_t show_status(struct device *d,
  7006. struct device_attribute *attr, char *buf)
  7007. {
  7008. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7009. if (!iwl4965_is_alive(priv))
  7010. return -EAGAIN;
  7011. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7012. }
  7013. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7014. static ssize_t dump_error_log(struct device *d,
  7015. struct device_attribute *attr,
  7016. const char *buf, size_t count)
  7017. {
  7018. char *p = (char *)buf;
  7019. if (p[0] == '1')
  7020. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  7021. return strnlen(buf, count);
  7022. }
  7023. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7024. static ssize_t dump_event_log(struct device *d,
  7025. struct device_attribute *attr,
  7026. const char *buf, size_t count)
  7027. {
  7028. char *p = (char *)buf;
  7029. if (p[0] == '1')
  7030. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  7031. return strnlen(buf, count);
  7032. }
  7033. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7034. /*****************************************************************************
  7035. *
  7036. * driver setup and teardown
  7037. *
  7038. *****************************************************************************/
  7039. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  7040. {
  7041. priv->workqueue = create_workqueue(DRV_NAME);
  7042. init_waitqueue_head(&priv->wait_command_queue);
  7043. INIT_WORK(&priv->up, iwl4965_bg_up);
  7044. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  7045. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  7046. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  7047. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  7048. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  7049. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  7050. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  7051. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  7052. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  7053. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  7054. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  7055. iwl4965_hw_setup_deferred_work(priv);
  7056. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7057. iwl4965_irq_tasklet, (unsigned long)priv);
  7058. }
  7059. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  7060. {
  7061. iwl4965_hw_cancel_deferred_work(priv);
  7062. cancel_delayed_work_sync(&priv->init_alive_start);
  7063. cancel_delayed_work(&priv->scan_check);
  7064. cancel_delayed_work(&priv->alive_start);
  7065. cancel_delayed_work(&priv->post_associate);
  7066. cancel_work_sync(&priv->beacon_update);
  7067. }
  7068. static struct attribute *iwl4965_sysfs_entries[] = {
  7069. &dev_attr_antenna.attr,
  7070. &dev_attr_channels.attr,
  7071. &dev_attr_dump_errors.attr,
  7072. &dev_attr_dump_events.attr,
  7073. &dev_attr_flags.attr,
  7074. &dev_attr_filter_flags.attr,
  7075. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7076. &dev_attr_measurement.attr,
  7077. #endif
  7078. &dev_attr_power_level.attr,
  7079. &dev_attr_retry_rate.attr,
  7080. &dev_attr_rf_kill.attr,
  7081. &dev_attr_rs_window.attr,
  7082. &dev_attr_statistics.attr,
  7083. &dev_attr_status.attr,
  7084. &dev_attr_temperature.attr,
  7085. &dev_attr_tx_power.attr,
  7086. NULL
  7087. };
  7088. static struct attribute_group iwl4965_attribute_group = {
  7089. .name = NULL, /* put in device directory */
  7090. .attrs = iwl4965_sysfs_entries,
  7091. };
  7092. static struct ieee80211_ops iwl4965_hw_ops = {
  7093. .tx = iwl4965_mac_tx,
  7094. .start = iwl4965_mac_start,
  7095. .stop = iwl4965_mac_stop,
  7096. .add_interface = iwl4965_mac_add_interface,
  7097. .remove_interface = iwl4965_mac_remove_interface,
  7098. .config = iwl4965_mac_config,
  7099. .config_interface = iwl4965_mac_config_interface,
  7100. .configure_filter = iwl4965_configure_filter,
  7101. .set_key = iwl4965_mac_set_key,
  7102. .get_stats = iwl4965_mac_get_stats,
  7103. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7104. .conf_tx = iwl4965_mac_conf_tx,
  7105. .get_tsf = iwl4965_mac_get_tsf,
  7106. .reset_tsf = iwl4965_mac_reset_tsf,
  7107. .beacon_update = iwl4965_mac_beacon_update,
  7108. .bss_info_changed = iwl4965_bss_info_changed,
  7109. #ifdef CONFIG_IWL4965_HT
  7110. .conf_ht = iwl4965_mac_conf_ht,
  7111. .ampdu_action = iwl4965_mac_ampdu_action,
  7112. #endif /* CONFIG_IWL4965_HT */
  7113. .hw_scan = iwl4965_mac_hw_scan
  7114. };
  7115. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7116. {
  7117. int err = 0;
  7118. struct iwl4965_priv *priv;
  7119. struct ieee80211_hw *hw;
  7120. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  7121. int i;
  7122. DECLARE_MAC_BUF(mac);
  7123. /* Disabling hardware scan means that mac80211 will perform scans
  7124. * "the hard way", rather than using device's scan. */
  7125. if (iwl4965_param_disable_hw_scan) {
  7126. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7127. iwl4965_hw_ops.hw_scan = NULL;
  7128. }
  7129. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7130. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7131. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7132. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7133. err = -EINVAL;
  7134. goto out;
  7135. }
  7136. /* mac80211 allocates memory for this device instance, including
  7137. * space for this driver's private structure */
  7138. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7139. if (hw == NULL) {
  7140. IWL_ERROR("Can not allocate network device\n");
  7141. err = -ENOMEM;
  7142. goto out;
  7143. }
  7144. SET_IEEE80211_DEV(hw, &pdev->dev);
  7145. hw->rate_control_algorithm = "iwl-4965-rs";
  7146. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7147. priv = hw->priv;
  7148. priv->hw = hw;
  7149. priv->cfg = cfg;
  7150. priv->pci_dev = pdev;
  7151. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7152. #ifdef CONFIG_IWL4965_DEBUG
  7153. iwl4965_debug_level = iwl4965_param_debug;
  7154. atomic_set(&priv->restrict_refcnt, 0);
  7155. #endif
  7156. priv->retry_rate = 1;
  7157. priv->ibss_beacon = NULL;
  7158. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7159. * the range of signal quality values that we'll provide.
  7160. * Negative values for level/noise indicate that we'll provide dBm.
  7161. * For WE, at least, non-0 values here *enable* display of values
  7162. * in app (iwconfig). */
  7163. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7164. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7165. hw->max_signal = 100; /* link quality indication (%) */
  7166. /* Tell mac80211 our Tx characteristics */
  7167. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7168. /* Default value; 4 EDCA QOS priorities */
  7169. hw->queues = 4;
  7170. #ifdef CONFIG_IWL4965_HT
  7171. /* Enhanced value; more queues, to support 11n aggregation */
  7172. hw->queues = 16;
  7173. #endif /* CONFIG_IWL4965_HT */
  7174. spin_lock_init(&priv->lock);
  7175. spin_lock_init(&priv->power_data.lock);
  7176. spin_lock_init(&priv->sta_lock);
  7177. spin_lock_init(&priv->hcmd_lock);
  7178. spin_lock_init(&priv->lq_mngr.lock);
  7179. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7180. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7181. INIT_LIST_HEAD(&priv->free_frames);
  7182. mutex_init(&priv->mutex);
  7183. if (pci_enable_device(pdev)) {
  7184. err = -ENODEV;
  7185. goto out_ieee80211_free_hw;
  7186. }
  7187. pci_set_master(pdev);
  7188. /* Clear the driver's (not device's) station table */
  7189. iwl4965_clear_stations_table(priv);
  7190. priv->data_retry_limit = -1;
  7191. priv->ieee_channels = NULL;
  7192. priv->ieee_rates = NULL;
  7193. priv->band = IEEE80211_BAND_2GHZ;
  7194. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7195. if (!err)
  7196. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7197. if (err) {
  7198. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7199. goto out_pci_disable_device;
  7200. }
  7201. pci_set_drvdata(pdev, priv);
  7202. err = pci_request_regions(pdev, DRV_NAME);
  7203. if (err)
  7204. goto out_pci_disable_device;
  7205. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7206. * PCI Tx retries from interfering with C3 CPU state */
  7207. pci_write_config_byte(pdev, 0x41, 0x00);
  7208. priv->hw_base = pci_iomap(pdev, 0, 0);
  7209. if (!priv->hw_base) {
  7210. err = -ENODEV;
  7211. goto out_pci_release_regions;
  7212. }
  7213. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7214. (unsigned long long) pci_resource_len(pdev, 0));
  7215. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7216. /* Initialize module parameter values here */
  7217. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7218. if (iwl4965_param_disable) {
  7219. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7220. IWL_DEBUG_INFO("Radio disabled.\n");
  7221. }
  7222. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7223. priv->ps_mode = 0;
  7224. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7225. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7226. priv->ps_mode = IWL_MIMO_PS_NONE;
  7227. /* Choose which receivers/antennas to use */
  7228. iwl4965_set_rxon_chain(priv);
  7229. printk(KERN_INFO DRV_NAME
  7230. ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
  7231. /* Device-specific setup */
  7232. if (iwl4965_hw_set_hw_setting(priv)) {
  7233. IWL_ERROR("failed to set hw settings\n");
  7234. goto out_iounmap;
  7235. }
  7236. if (iwl4965_param_qos_enable)
  7237. priv->qos_data.qos_enable = 1;
  7238. iwl4965_reset_qos(priv);
  7239. priv->qos_data.qos_active = 0;
  7240. priv->qos_data.qos_cap.val = 0;
  7241. iwl4965_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  7242. iwl4965_setup_deferred_work(priv);
  7243. iwl4965_setup_rx_handlers(priv);
  7244. priv->rates_mask = IWL_RATES_MASK;
  7245. /* If power management is turned on, default to AC mode */
  7246. priv->power_mode = IWL_POWER_AC;
  7247. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7248. iwl4965_disable_interrupts(priv);
  7249. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7250. if (err) {
  7251. IWL_ERROR("failed to create sysfs device attributes\n");
  7252. goto out_release_irq;
  7253. }
  7254. /* nic init */
  7255. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  7256. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  7257. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  7258. err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  7259. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  7260. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  7261. if (err < 0) {
  7262. IWL_DEBUG_INFO("Failed to init the card\n");
  7263. goto out_remove_sysfs;
  7264. }
  7265. /* Read the EEPROM */
  7266. err = iwl4965_eeprom_init(priv);
  7267. if (err) {
  7268. IWL_ERROR("Unable to init EEPROM\n");
  7269. goto out_remove_sysfs;
  7270. }
  7271. /* MAC Address location in EEPROM same for 3945/4965 */
  7272. get_eeprom_mac(priv, priv->mac_addr);
  7273. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  7274. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  7275. err = iwl4965_init_channel_map(priv);
  7276. if (err) {
  7277. IWL_ERROR("initializing regulatory failed: %d\n", err);
  7278. goto out_remove_sysfs;
  7279. }
  7280. err = iwl4965_init_geos(priv);
  7281. if (err) {
  7282. IWL_ERROR("initializing geos failed: %d\n", err);
  7283. goto out_free_channel_map;
  7284. }
  7285. iwl4965_rate_control_register(priv->hw);
  7286. err = ieee80211_register_hw(priv->hw);
  7287. if (err) {
  7288. IWL_ERROR("Failed to register network device (error %d)\n", err);
  7289. goto out_free_geos;
  7290. }
  7291. priv->hw->conf.beacon_int = 100;
  7292. priv->mac80211_registered = 1;
  7293. pci_save_state(pdev);
  7294. pci_disable_device(pdev);
  7295. return 0;
  7296. out_free_geos:
  7297. iwl4965_free_geos(priv);
  7298. out_free_channel_map:
  7299. iwl4965_free_channel_map(priv);
  7300. out_remove_sysfs:
  7301. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7302. out_release_irq:
  7303. destroy_workqueue(priv->workqueue);
  7304. priv->workqueue = NULL;
  7305. iwl4965_unset_hw_setting(priv);
  7306. out_iounmap:
  7307. pci_iounmap(pdev, priv->hw_base);
  7308. out_pci_release_regions:
  7309. pci_release_regions(pdev);
  7310. out_pci_disable_device:
  7311. pci_disable_device(pdev);
  7312. pci_set_drvdata(pdev, NULL);
  7313. out_ieee80211_free_hw:
  7314. ieee80211_free_hw(priv->hw);
  7315. out:
  7316. return err;
  7317. }
  7318. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7319. {
  7320. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7321. struct list_head *p, *q;
  7322. int i;
  7323. if (!priv)
  7324. return;
  7325. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7326. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7327. iwl4965_down(priv);
  7328. /* Free MAC hash list for ADHOC */
  7329. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7330. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7331. list_del(p);
  7332. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7333. }
  7334. }
  7335. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7336. iwl4965_dealloc_ucode_pci(priv);
  7337. if (priv->rxq.bd)
  7338. iwl4965_rx_queue_free(priv, &priv->rxq);
  7339. iwl4965_hw_txq_ctx_free(priv);
  7340. iwl4965_unset_hw_setting(priv);
  7341. iwl4965_clear_stations_table(priv);
  7342. if (priv->mac80211_registered) {
  7343. ieee80211_unregister_hw(priv->hw);
  7344. iwl4965_rate_control_unregister(priv->hw);
  7345. }
  7346. /*netif_stop_queue(dev); */
  7347. flush_workqueue(priv->workqueue);
  7348. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7349. * priv->workqueue... so we can't take down the workqueue
  7350. * until now... */
  7351. destroy_workqueue(priv->workqueue);
  7352. priv->workqueue = NULL;
  7353. pci_iounmap(pdev, priv->hw_base);
  7354. pci_release_regions(pdev);
  7355. pci_disable_device(pdev);
  7356. pci_set_drvdata(pdev, NULL);
  7357. iwl4965_free_channel_map(priv);
  7358. iwl4965_free_geos(priv);
  7359. if (priv->ibss_beacon)
  7360. dev_kfree_skb(priv->ibss_beacon);
  7361. ieee80211_free_hw(priv->hw);
  7362. }
  7363. #ifdef CONFIG_PM
  7364. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7365. {
  7366. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7367. if (priv->is_open) {
  7368. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7369. iwl4965_mac_stop(priv->hw);
  7370. priv->is_open = 1;
  7371. }
  7372. pci_set_power_state(pdev, PCI_D3hot);
  7373. return 0;
  7374. }
  7375. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7376. {
  7377. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7378. pci_set_power_state(pdev, PCI_D0);
  7379. if (priv->is_open)
  7380. iwl4965_mac_start(priv->hw);
  7381. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7382. return 0;
  7383. }
  7384. #endif /* CONFIG_PM */
  7385. /*****************************************************************************
  7386. *
  7387. * driver and module entry point
  7388. *
  7389. *****************************************************************************/
  7390. static struct pci_driver iwl4965_driver = {
  7391. .name = DRV_NAME,
  7392. .id_table = iwl4965_hw_card_ids,
  7393. .probe = iwl4965_pci_probe,
  7394. .remove = __devexit_p(iwl4965_pci_remove),
  7395. #ifdef CONFIG_PM
  7396. .suspend = iwl4965_pci_suspend,
  7397. .resume = iwl4965_pci_resume,
  7398. #endif
  7399. };
  7400. static int __init iwl4965_init(void)
  7401. {
  7402. int ret;
  7403. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7404. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7405. ret = pci_register_driver(&iwl4965_driver);
  7406. if (ret) {
  7407. IWL_ERROR("Unable to initialize PCI module\n");
  7408. return ret;
  7409. }
  7410. #ifdef CONFIG_IWL4965_DEBUG
  7411. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7412. if (ret) {
  7413. IWL_ERROR("Unable to create driver sysfs file\n");
  7414. pci_unregister_driver(&iwl4965_driver);
  7415. return ret;
  7416. }
  7417. #endif
  7418. return ret;
  7419. }
  7420. static void __exit iwl4965_exit(void)
  7421. {
  7422. #ifdef CONFIG_IWL4965_DEBUG
  7423. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7424. #endif
  7425. pci_unregister_driver(&iwl4965_driver);
  7426. }
  7427. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7428. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7429. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7430. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7431. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7432. MODULE_PARM_DESC(hwcrypto,
  7433. "using hardware crypto engine (default 0 [software])\n");
  7434. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7435. MODULE_PARM_DESC(debug, "debug output mask");
  7436. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7437. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7438. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7439. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7440. /* QoS */
  7441. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7442. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7443. module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
  7444. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  7445. module_exit(iwl4965_exit);
  7446. module_init(iwl4965_init);