i2s.c 30 KB

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  1. /* sound/soc/samsung/i2s.c
  2. *
  3. * ALSA SoC Audio Layer - Samsung I2S Controller driver
  4. *
  5. * Copyright (c) 2010 Samsung Electronics Co. Ltd.
  6. * Jaswinder Singh <jassisinghbrar@gmail.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/slab.h>
  14. #include <linux/clk.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/of.h>
  18. #include <linux/of_gpio.h>
  19. #include <linux/pm_runtime.h>
  20. #include <sound/soc.h>
  21. #include <sound/pcm_params.h>
  22. #include <mach/dma.h>
  23. #include <linux/platform_data/asoc-s3c.h>
  24. #include "dma.h"
  25. #include "idma.h"
  26. #include "i2s.h"
  27. #include "i2s-regs.h"
  28. #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  29. enum samsung_dai_type {
  30. TYPE_PRI,
  31. TYPE_SEC,
  32. };
  33. struct samsung_i2s_dai_data {
  34. int dai_type;
  35. };
  36. struct i2s_dai {
  37. /* Platform device for this DAI */
  38. struct platform_device *pdev;
  39. /* IOREMAP'd SFRs */
  40. void __iomem *addr;
  41. /* Physical base address of SFRs */
  42. u32 base;
  43. /* Rate of RCLK source clock */
  44. unsigned long rclk_srcrate;
  45. /* Frame Clock */
  46. unsigned frmclk;
  47. /*
  48. * Specifically requested RCLK,BCLK by MACHINE Driver.
  49. * 0 indicates CPU driver is free to choose any value.
  50. */
  51. unsigned rfs, bfs;
  52. /* I2S Controller's core clock */
  53. struct clk *clk;
  54. /* Clock for generating I2S signals */
  55. struct clk *op_clk;
  56. /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  57. struct i2s_dai *pri_dai;
  58. /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  59. struct i2s_dai *sec_dai;
  60. #define DAI_OPENED (1 << 0) /* Dai is opened */
  61. #define DAI_MANAGER (1 << 1) /* Dai is the manager */
  62. unsigned mode;
  63. /* Driver for this DAI */
  64. struct snd_soc_dai_driver i2s_dai_drv;
  65. /* DMA parameters */
  66. struct s3c_dma_params dma_playback;
  67. struct s3c_dma_params dma_capture;
  68. struct s3c_dma_params idma_playback;
  69. u32 quirks;
  70. u32 suspend_i2smod;
  71. u32 suspend_i2scon;
  72. u32 suspend_i2spsr;
  73. unsigned long gpios[7]; /* i2s gpio line numbers */
  74. };
  75. /* Lock for cross i/f checks */
  76. static DEFINE_SPINLOCK(lock);
  77. /* If this is the 'overlay' stereo DAI */
  78. static inline bool is_secondary(struct i2s_dai *i2s)
  79. {
  80. return i2s->pri_dai ? true : false;
  81. }
  82. /* If operating in SoC-Slave mode */
  83. static inline bool is_slave(struct i2s_dai *i2s)
  84. {
  85. return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false;
  86. }
  87. /* If this interface of the controller is transmitting data */
  88. static inline bool tx_active(struct i2s_dai *i2s)
  89. {
  90. u32 active;
  91. if (!i2s)
  92. return false;
  93. active = readl(i2s->addr + I2SCON);
  94. if (is_secondary(i2s))
  95. active &= CON_TXSDMA_ACTIVE;
  96. else
  97. active &= CON_TXDMA_ACTIVE;
  98. return active ? true : false;
  99. }
  100. /* If the other interface of the controller is transmitting data */
  101. static inline bool other_tx_active(struct i2s_dai *i2s)
  102. {
  103. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  104. return tx_active(other);
  105. }
  106. /* If any interface of the controller is transmitting data */
  107. static inline bool any_tx_active(struct i2s_dai *i2s)
  108. {
  109. return tx_active(i2s) || other_tx_active(i2s);
  110. }
  111. /* If this interface of the controller is receiving data */
  112. static inline bool rx_active(struct i2s_dai *i2s)
  113. {
  114. u32 active;
  115. if (!i2s)
  116. return false;
  117. active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
  118. return active ? true : false;
  119. }
  120. /* If the other interface of the controller is receiving data */
  121. static inline bool other_rx_active(struct i2s_dai *i2s)
  122. {
  123. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  124. return rx_active(other);
  125. }
  126. /* If any interface of the controller is receiving data */
  127. static inline bool any_rx_active(struct i2s_dai *i2s)
  128. {
  129. return rx_active(i2s) || other_rx_active(i2s);
  130. }
  131. /* If the other DAI is transmitting or receiving data */
  132. static inline bool other_active(struct i2s_dai *i2s)
  133. {
  134. return other_rx_active(i2s) || other_tx_active(i2s);
  135. }
  136. /* If this DAI is transmitting or receiving data */
  137. static inline bool this_active(struct i2s_dai *i2s)
  138. {
  139. return tx_active(i2s) || rx_active(i2s);
  140. }
  141. /* If the controller is active anyway */
  142. static inline bool any_active(struct i2s_dai *i2s)
  143. {
  144. return this_active(i2s) || other_active(i2s);
  145. }
  146. static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
  147. {
  148. return snd_soc_dai_get_drvdata(dai);
  149. }
  150. static inline bool is_opened(struct i2s_dai *i2s)
  151. {
  152. if (i2s && (i2s->mode & DAI_OPENED))
  153. return true;
  154. else
  155. return false;
  156. }
  157. static inline bool is_manager(struct i2s_dai *i2s)
  158. {
  159. if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
  160. return true;
  161. else
  162. return false;
  163. }
  164. /* Read RCLK of I2S (in multiples of LRCLK) */
  165. static inline unsigned get_rfs(struct i2s_dai *i2s)
  166. {
  167. u32 rfs = (readl(i2s->addr + I2SMOD) >> 3) & 0x3;
  168. switch (rfs) {
  169. case 3: return 768;
  170. case 2: return 384;
  171. case 1: return 512;
  172. default: return 256;
  173. }
  174. }
  175. /* Write RCLK of I2S (in multiples of LRCLK) */
  176. static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
  177. {
  178. u32 mod = readl(i2s->addr + I2SMOD);
  179. mod &= ~MOD_RCLK_MASK;
  180. switch (rfs) {
  181. case 768:
  182. mod |= MOD_RCLK_768FS;
  183. break;
  184. case 512:
  185. mod |= MOD_RCLK_512FS;
  186. break;
  187. case 384:
  188. mod |= MOD_RCLK_384FS;
  189. break;
  190. default:
  191. mod |= MOD_RCLK_256FS;
  192. break;
  193. }
  194. writel(mod, i2s->addr + I2SMOD);
  195. }
  196. /* Read Bit-Clock of I2S (in multiples of LRCLK) */
  197. static inline unsigned get_bfs(struct i2s_dai *i2s)
  198. {
  199. u32 bfs = (readl(i2s->addr + I2SMOD) >> 1) & 0x3;
  200. switch (bfs) {
  201. case 3: return 24;
  202. case 2: return 16;
  203. case 1: return 48;
  204. default: return 32;
  205. }
  206. }
  207. /* Write Bit-Clock of I2S (in multiples of LRCLK) */
  208. static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
  209. {
  210. u32 mod = readl(i2s->addr + I2SMOD);
  211. mod &= ~MOD_BCLK_MASK;
  212. switch (bfs) {
  213. case 48:
  214. mod |= MOD_BCLK_48FS;
  215. break;
  216. case 32:
  217. mod |= MOD_BCLK_32FS;
  218. break;
  219. case 24:
  220. mod |= MOD_BCLK_24FS;
  221. break;
  222. case 16:
  223. mod |= MOD_BCLK_16FS;
  224. break;
  225. default:
  226. dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
  227. return;
  228. }
  229. writel(mod, i2s->addr + I2SMOD);
  230. }
  231. /* Sample-Size */
  232. static inline int get_blc(struct i2s_dai *i2s)
  233. {
  234. int blc = readl(i2s->addr + I2SMOD);
  235. blc = (blc >> 13) & 0x3;
  236. switch (blc) {
  237. case 2: return 24;
  238. case 1: return 8;
  239. default: return 16;
  240. }
  241. }
  242. /* TX Channel Control */
  243. static void i2s_txctrl(struct i2s_dai *i2s, int on)
  244. {
  245. void __iomem *addr = i2s->addr;
  246. u32 con = readl(addr + I2SCON);
  247. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  248. if (on) {
  249. con |= CON_ACTIVE;
  250. con &= ~CON_TXCH_PAUSE;
  251. if (is_secondary(i2s)) {
  252. con |= CON_TXSDMA_ACTIVE;
  253. con &= ~CON_TXSDMA_PAUSE;
  254. } else {
  255. con |= CON_TXDMA_ACTIVE;
  256. con &= ~CON_TXDMA_PAUSE;
  257. }
  258. if (any_rx_active(i2s))
  259. mod |= MOD_TXRX;
  260. else
  261. mod |= MOD_TXONLY;
  262. } else {
  263. if (is_secondary(i2s)) {
  264. con |= CON_TXSDMA_PAUSE;
  265. con &= ~CON_TXSDMA_ACTIVE;
  266. } else {
  267. con |= CON_TXDMA_PAUSE;
  268. con &= ~CON_TXDMA_ACTIVE;
  269. }
  270. if (other_tx_active(i2s)) {
  271. writel(con, addr + I2SCON);
  272. return;
  273. }
  274. con |= CON_TXCH_PAUSE;
  275. if (any_rx_active(i2s))
  276. mod |= MOD_RXONLY;
  277. else
  278. con &= ~CON_ACTIVE;
  279. }
  280. writel(mod, addr + I2SMOD);
  281. writel(con, addr + I2SCON);
  282. }
  283. /* RX Channel Control */
  284. static void i2s_rxctrl(struct i2s_dai *i2s, int on)
  285. {
  286. void __iomem *addr = i2s->addr;
  287. u32 con = readl(addr + I2SCON);
  288. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  289. if (on) {
  290. con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
  291. con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
  292. if (any_tx_active(i2s))
  293. mod |= MOD_TXRX;
  294. else
  295. mod |= MOD_RXONLY;
  296. } else {
  297. con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
  298. con &= ~CON_RXDMA_ACTIVE;
  299. if (any_tx_active(i2s))
  300. mod |= MOD_TXONLY;
  301. else
  302. con &= ~CON_ACTIVE;
  303. }
  304. writel(mod, addr + I2SMOD);
  305. writel(con, addr + I2SCON);
  306. }
  307. /* Flush FIFO of an interface */
  308. static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
  309. {
  310. void __iomem *fic;
  311. u32 val;
  312. if (!i2s)
  313. return;
  314. if (is_secondary(i2s))
  315. fic = i2s->addr + I2SFICS;
  316. else
  317. fic = i2s->addr + I2SFIC;
  318. /* Flush the FIFO */
  319. writel(readl(fic) | flush, fic);
  320. /* Be patient */
  321. val = msecs_to_loops(1) / 1000; /* 1 usec */
  322. while (--val)
  323. cpu_relax();
  324. writel(readl(fic) & ~flush, fic);
  325. }
  326. static int i2s_set_sysclk(struct snd_soc_dai *dai,
  327. int clk_id, unsigned int rfs, int dir)
  328. {
  329. struct i2s_dai *i2s = to_info(dai);
  330. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  331. u32 mod = readl(i2s->addr + I2SMOD);
  332. switch (clk_id) {
  333. case SAMSUNG_I2S_CDCLK:
  334. /* Shouldn't matter in GATING(CLOCK_IN) mode */
  335. if (dir == SND_SOC_CLOCK_IN)
  336. rfs = 0;
  337. if ((rfs && other->rfs && (other->rfs != rfs)) ||
  338. (any_active(i2s) &&
  339. (((dir == SND_SOC_CLOCK_IN)
  340. && !(mod & MOD_CDCLKCON)) ||
  341. ((dir == SND_SOC_CLOCK_OUT)
  342. && (mod & MOD_CDCLKCON))))) {
  343. dev_err(&i2s->pdev->dev,
  344. "%s:%d Other DAI busy\n", __func__, __LINE__);
  345. return -EAGAIN;
  346. }
  347. if (dir == SND_SOC_CLOCK_IN)
  348. mod |= MOD_CDCLKCON;
  349. else
  350. mod &= ~MOD_CDCLKCON;
  351. i2s->rfs = rfs;
  352. break;
  353. case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
  354. case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
  355. if ((i2s->quirks & QUIRK_NO_MUXPSR)
  356. || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
  357. clk_id = 0;
  358. else
  359. clk_id = 1;
  360. if (!any_active(i2s)) {
  361. if (i2s->op_clk) {
  362. if ((clk_id && !(mod & MOD_IMS_SYSMUX)) ||
  363. (!clk_id && (mod & MOD_IMS_SYSMUX))) {
  364. clk_disable_unprepare(i2s->op_clk);
  365. clk_put(i2s->op_clk);
  366. } else {
  367. i2s->rclk_srcrate =
  368. clk_get_rate(i2s->op_clk);
  369. return 0;
  370. }
  371. }
  372. if (clk_id)
  373. i2s->op_clk = clk_get(&i2s->pdev->dev,
  374. "i2s_opclk1");
  375. else
  376. i2s->op_clk = clk_get(&i2s->pdev->dev,
  377. "i2s_opclk0");
  378. clk_prepare_enable(i2s->op_clk);
  379. i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
  380. /* Over-ride the other's */
  381. if (other) {
  382. other->op_clk = i2s->op_clk;
  383. other->rclk_srcrate = i2s->rclk_srcrate;
  384. }
  385. } else if ((!clk_id && (mod & MOD_IMS_SYSMUX))
  386. || (clk_id && !(mod & MOD_IMS_SYSMUX))) {
  387. dev_err(&i2s->pdev->dev,
  388. "%s:%d Other DAI busy\n", __func__, __LINE__);
  389. return -EAGAIN;
  390. } else {
  391. /* Call can't be on the active DAI */
  392. i2s->op_clk = other->op_clk;
  393. i2s->rclk_srcrate = other->rclk_srcrate;
  394. return 0;
  395. }
  396. if (clk_id == 0)
  397. mod &= ~MOD_IMS_SYSMUX;
  398. else
  399. mod |= MOD_IMS_SYSMUX;
  400. break;
  401. default:
  402. dev_err(&i2s->pdev->dev, "We don't serve that!\n");
  403. return -EINVAL;
  404. }
  405. writel(mod, i2s->addr + I2SMOD);
  406. return 0;
  407. }
  408. static int i2s_set_fmt(struct snd_soc_dai *dai,
  409. unsigned int fmt)
  410. {
  411. struct i2s_dai *i2s = to_info(dai);
  412. u32 mod = readl(i2s->addr + I2SMOD);
  413. u32 tmp = 0;
  414. /* Format is priority */
  415. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  416. case SND_SOC_DAIFMT_RIGHT_J:
  417. tmp |= MOD_LR_RLOW;
  418. tmp |= MOD_SDF_MSB;
  419. break;
  420. case SND_SOC_DAIFMT_LEFT_J:
  421. tmp |= MOD_LR_RLOW;
  422. tmp |= MOD_SDF_LSB;
  423. break;
  424. case SND_SOC_DAIFMT_I2S:
  425. tmp |= MOD_SDF_IIS;
  426. break;
  427. default:
  428. dev_err(&i2s->pdev->dev, "Format not supported\n");
  429. return -EINVAL;
  430. }
  431. /*
  432. * INV flag is relative to the FORMAT flag - if set it simply
  433. * flips the polarity specified by the Standard
  434. */
  435. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  436. case SND_SOC_DAIFMT_NB_NF:
  437. break;
  438. case SND_SOC_DAIFMT_NB_IF:
  439. if (tmp & MOD_LR_RLOW)
  440. tmp &= ~MOD_LR_RLOW;
  441. else
  442. tmp |= MOD_LR_RLOW;
  443. break;
  444. default:
  445. dev_err(&i2s->pdev->dev, "Polarity not supported\n");
  446. return -EINVAL;
  447. }
  448. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  449. case SND_SOC_DAIFMT_CBM_CFM:
  450. tmp |= MOD_SLAVE;
  451. break;
  452. case SND_SOC_DAIFMT_CBS_CFS:
  453. /* Set default source clock in Master mode */
  454. if (i2s->rclk_srcrate == 0)
  455. i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
  456. 0, SND_SOC_CLOCK_IN);
  457. break;
  458. default:
  459. dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
  460. return -EINVAL;
  461. }
  462. if (any_active(i2s) &&
  463. ((mod & (MOD_SDF_MASK | MOD_LR_RLOW
  464. | MOD_SLAVE)) != tmp)) {
  465. dev_err(&i2s->pdev->dev,
  466. "%s:%d Other DAI busy\n", __func__, __LINE__);
  467. return -EAGAIN;
  468. }
  469. mod &= ~(MOD_SDF_MASK | MOD_LR_RLOW | MOD_SLAVE);
  470. mod |= tmp;
  471. writel(mod, i2s->addr + I2SMOD);
  472. return 0;
  473. }
  474. static int i2s_hw_params(struct snd_pcm_substream *substream,
  475. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  476. {
  477. struct i2s_dai *i2s = to_info(dai);
  478. u32 mod = readl(i2s->addr + I2SMOD);
  479. if (!is_secondary(i2s))
  480. mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
  481. switch (params_channels(params)) {
  482. case 6:
  483. mod |= MOD_DC2_EN;
  484. case 4:
  485. mod |= MOD_DC1_EN;
  486. break;
  487. case 2:
  488. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  489. i2s->dma_playback.dma_size = 4;
  490. else
  491. i2s->dma_capture.dma_size = 4;
  492. break;
  493. case 1:
  494. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  495. i2s->dma_playback.dma_size = 2;
  496. else
  497. i2s->dma_capture.dma_size = 2;
  498. break;
  499. default:
  500. dev_err(&i2s->pdev->dev, "%d channels not supported\n",
  501. params_channels(params));
  502. return -EINVAL;
  503. }
  504. if (is_secondary(i2s))
  505. mod &= ~MOD_BLCS_MASK;
  506. else
  507. mod &= ~MOD_BLCP_MASK;
  508. if (is_manager(i2s))
  509. mod &= ~MOD_BLC_MASK;
  510. switch (params_format(params)) {
  511. case SNDRV_PCM_FORMAT_S8:
  512. if (is_secondary(i2s))
  513. mod |= MOD_BLCS_8BIT;
  514. else
  515. mod |= MOD_BLCP_8BIT;
  516. if (is_manager(i2s))
  517. mod |= MOD_BLC_8BIT;
  518. break;
  519. case SNDRV_PCM_FORMAT_S16_LE:
  520. if (is_secondary(i2s))
  521. mod |= MOD_BLCS_16BIT;
  522. else
  523. mod |= MOD_BLCP_16BIT;
  524. if (is_manager(i2s))
  525. mod |= MOD_BLC_16BIT;
  526. break;
  527. case SNDRV_PCM_FORMAT_S24_LE:
  528. if (is_secondary(i2s))
  529. mod |= MOD_BLCS_24BIT;
  530. else
  531. mod |= MOD_BLCP_24BIT;
  532. if (is_manager(i2s))
  533. mod |= MOD_BLC_24BIT;
  534. break;
  535. default:
  536. dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
  537. params_format(params));
  538. return -EINVAL;
  539. }
  540. writel(mod, i2s->addr + I2SMOD);
  541. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  542. snd_soc_dai_set_dma_data(dai, substream,
  543. (void *)&i2s->dma_playback);
  544. else
  545. snd_soc_dai_set_dma_data(dai, substream,
  546. (void *)&i2s->dma_capture);
  547. i2s->frmclk = params_rate(params);
  548. return 0;
  549. }
  550. /* We set constraints on the substream acc to the version of I2S */
  551. static int i2s_startup(struct snd_pcm_substream *substream,
  552. struct snd_soc_dai *dai)
  553. {
  554. struct i2s_dai *i2s = to_info(dai);
  555. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  556. unsigned long flags;
  557. spin_lock_irqsave(&lock, flags);
  558. i2s->mode |= DAI_OPENED;
  559. if (is_manager(other))
  560. i2s->mode &= ~DAI_MANAGER;
  561. else
  562. i2s->mode |= DAI_MANAGER;
  563. /* Enforce set_sysclk in Master mode */
  564. i2s->rclk_srcrate = 0;
  565. if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
  566. writel(CON_RSTCLR, i2s->addr + I2SCON);
  567. spin_unlock_irqrestore(&lock, flags);
  568. return 0;
  569. }
  570. static void i2s_shutdown(struct snd_pcm_substream *substream,
  571. struct snd_soc_dai *dai)
  572. {
  573. struct i2s_dai *i2s = to_info(dai);
  574. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  575. unsigned long flags;
  576. spin_lock_irqsave(&lock, flags);
  577. i2s->mode &= ~DAI_OPENED;
  578. i2s->mode &= ~DAI_MANAGER;
  579. if (is_opened(other))
  580. other->mode |= DAI_MANAGER;
  581. /* Reset any constraint on RFS and BFS */
  582. i2s->rfs = 0;
  583. i2s->bfs = 0;
  584. spin_unlock_irqrestore(&lock, flags);
  585. /* Gate CDCLK by default */
  586. if (!is_opened(other))
  587. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  588. 0, SND_SOC_CLOCK_IN);
  589. }
  590. static int config_setup(struct i2s_dai *i2s)
  591. {
  592. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  593. unsigned rfs, bfs, blc;
  594. u32 psr;
  595. blc = get_blc(i2s);
  596. bfs = i2s->bfs;
  597. if (!bfs && other)
  598. bfs = other->bfs;
  599. /* Select least possible multiple(2) if no constraint set */
  600. if (!bfs)
  601. bfs = blc * 2;
  602. rfs = i2s->rfs;
  603. if (!rfs && other)
  604. rfs = other->rfs;
  605. if ((rfs == 256 || rfs == 512) && (blc == 24)) {
  606. dev_err(&i2s->pdev->dev,
  607. "%d-RFS not supported for 24-blc\n", rfs);
  608. return -EINVAL;
  609. }
  610. if (!rfs) {
  611. if (bfs == 16 || bfs == 32)
  612. rfs = 256;
  613. else
  614. rfs = 384;
  615. }
  616. /* If already setup and running */
  617. if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
  618. dev_err(&i2s->pdev->dev,
  619. "%s:%d Other DAI busy\n", __func__, __LINE__);
  620. return -EAGAIN;
  621. }
  622. /* Don't bother RFS, BFS & PSR in Slave mode */
  623. if (is_slave(i2s))
  624. return 0;
  625. set_bfs(i2s, bfs);
  626. set_rfs(i2s, rfs);
  627. if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
  628. psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
  629. writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
  630. dev_dbg(&i2s->pdev->dev,
  631. "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
  632. i2s->rclk_srcrate, psr, rfs, bfs);
  633. }
  634. return 0;
  635. }
  636. static int i2s_trigger(struct snd_pcm_substream *substream,
  637. int cmd, struct snd_soc_dai *dai)
  638. {
  639. int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
  640. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  641. struct i2s_dai *i2s = to_info(rtd->cpu_dai);
  642. unsigned long flags;
  643. switch (cmd) {
  644. case SNDRV_PCM_TRIGGER_START:
  645. case SNDRV_PCM_TRIGGER_RESUME:
  646. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  647. local_irq_save(flags);
  648. if (config_setup(i2s)) {
  649. local_irq_restore(flags);
  650. return -EINVAL;
  651. }
  652. if (capture)
  653. i2s_rxctrl(i2s, 1);
  654. else
  655. i2s_txctrl(i2s, 1);
  656. local_irq_restore(flags);
  657. break;
  658. case SNDRV_PCM_TRIGGER_STOP:
  659. case SNDRV_PCM_TRIGGER_SUSPEND:
  660. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  661. local_irq_save(flags);
  662. if (capture) {
  663. i2s_rxctrl(i2s, 0);
  664. i2s_fifo(i2s, FIC_RXFLUSH);
  665. } else {
  666. i2s_txctrl(i2s, 0);
  667. i2s_fifo(i2s, FIC_TXFLUSH);
  668. }
  669. local_irq_restore(flags);
  670. break;
  671. }
  672. return 0;
  673. }
  674. static int i2s_set_clkdiv(struct snd_soc_dai *dai,
  675. int div_id, int div)
  676. {
  677. struct i2s_dai *i2s = to_info(dai);
  678. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  679. switch (div_id) {
  680. case SAMSUNG_I2S_DIV_BCLK:
  681. if ((any_active(i2s) && div && (get_bfs(i2s) != div))
  682. || (other && other->bfs && (other->bfs != div))) {
  683. dev_err(&i2s->pdev->dev,
  684. "%s:%d Other DAI busy\n", __func__, __LINE__);
  685. return -EAGAIN;
  686. }
  687. i2s->bfs = div;
  688. break;
  689. default:
  690. dev_err(&i2s->pdev->dev,
  691. "Invalid clock divider(%d)\n", div_id);
  692. return -EINVAL;
  693. }
  694. return 0;
  695. }
  696. static snd_pcm_sframes_t
  697. i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
  698. {
  699. struct i2s_dai *i2s = to_info(dai);
  700. u32 reg = readl(i2s->addr + I2SFIC);
  701. snd_pcm_sframes_t delay;
  702. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  703. delay = FIC_RXCOUNT(reg);
  704. else if (is_secondary(i2s))
  705. delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
  706. else
  707. delay = FIC_TXCOUNT(reg);
  708. return delay;
  709. }
  710. #ifdef CONFIG_PM
  711. static int i2s_suspend(struct snd_soc_dai *dai)
  712. {
  713. struct i2s_dai *i2s = to_info(dai);
  714. if (dai->active) {
  715. i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
  716. i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
  717. i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
  718. }
  719. return 0;
  720. }
  721. static int i2s_resume(struct snd_soc_dai *dai)
  722. {
  723. struct i2s_dai *i2s = to_info(dai);
  724. if (dai->active) {
  725. writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
  726. writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
  727. writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
  728. }
  729. return 0;
  730. }
  731. #else
  732. #define i2s_suspend NULL
  733. #define i2s_resume NULL
  734. #endif
  735. static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
  736. {
  737. struct i2s_dai *i2s = to_info(dai);
  738. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  739. if (other && other->clk) /* If this is probe on secondary */
  740. goto probe_exit;
  741. i2s->addr = ioremap(i2s->base, 0x100);
  742. if (i2s->addr == NULL) {
  743. dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
  744. return -ENXIO;
  745. }
  746. i2s->clk = clk_get(&i2s->pdev->dev, "iis");
  747. if (IS_ERR(i2s->clk)) {
  748. dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
  749. iounmap(i2s->addr);
  750. return -ENOENT;
  751. }
  752. clk_prepare_enable(i2s->clk);
  753. if (other) {
  754. other->addr = i2s->addr;
  755. other->clk = i2s->clk;
  756. }
  757. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  758. writel(CON_RSTCLR, i2s->addr + I2SCON);
  759. if (i2s->quirks & QUIRK_SEC_DAI)
  760. idma_reg_addr_init(i2s->addr,
  761. i2s->sec_dai->idma_playback.dma_addr);
  762. probe_exit:
  763. /* Reset any constraint on RFS and BFS */
  764. i2s->rfs = 0;
  765. i2s->bfs = 0;
  766. i2s_txctrl(i2s, 0);
  767. i2s_rxctrl(i2s, 0);
  768. i2s_fifo(i2s, FIC_TXFLUSH);
  769. i2s_fifo(other, FIC_TXFLUSH);
  770. i2s_fifo(i2s, FIC_RXFLUSH);
  771. /* Gate CDCLK by default */
  772. if (!is_opened(other))
  773. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  774. 0, SND_SOC_CLOCK_IN);
  775. return 0;
  776. }
  777. static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
  778. {
  779. struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
  780. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  781. if (!other || !other->clk) {
  782. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  783. writel(0, i2s->addr + I2SCON);
  784. clk_disable_unprepare(i2s->clk);
  785. clk_put(i2s->clk);
  786. iounmap(i2s->addr);
  787. }
  788. i2s->clk = NULL;
  789. return 0;
  790. }
  791. static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
  792. .trigger = i2s_trigger,
  793. .hw_params = i2s_hw_params,
  794. .set_fmt = i2s_set_fmt,
  795. .set_clkdiv = i2s_set_clkdiv,
  796. .set_sysclk = i2s_set_sysclk,
  797. .startup = i2s_startup,
  798. .shutdown = i2s_shutdown,
  799. .delay = i2s_delay,
  800. };
  801. static const struct snd_soc_component_driver samsung_i2s_component = {
  802. .name = "samsung-i2s",
  803. };
  804. #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
  805. #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
  806. SNDRV_PCM_FMTBIT_S16_LE | \
  807. SNDRV_PCM_FMTBIT_S24_LE)
  808. static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
  809. {
  810. struct i2s_dai *i2s;
  811. int ret;
  812. i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
  813. if (i2s == NULL)
  814. return NULL;
  815. i2s->pdev = pdev;
  816. i2s->pri_dai = NULL;
  817. i2s->sec_dai = NULL;
  818. i2s->i2s_dai_drv.symmetric_rates = 1;
  819. i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
  820. i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
  821. i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
  822. i2s->i2s_dai_drv.suspend = i2s_suspend;
  823. i2s->i2s_dai_drv.resume = i2s_resume;
  824. i2s->i2s_dai_drv.playback.channels_min = 2;
  825. i2s->i2s_dai_drv.playback.channels_max = 2;
  826. i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
  827. i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
  828. if (!sec) {
  829. i2s->i2s_dai_drv.capture.channels_min = 1;
  830. i2s->i2s_dai_drv.capture.channels_max = 2;
  831. i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
  832. i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
  833. dev_set_drvdata(&i2s->pdev->dev, i2s);
  834. } else { /* Create a new platform_device for Secondary */
  835. i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
  836. if (IS_ERR(i2s->pdev))
  837. return NULL;
  838. platform_set_drvdata(i2s->pdev, i2s);
  839. ret = platform_device_add(i2s->pdev);
  840. if (ret < 0)
  841. return NULL;
  842. }
  843. return i2s;
  844. }
  845. #ifdef CONFIG_OF
  846. static int samsung_i2s_parse_dt_gpio(struct i2s_dai *i2s)
  847. {
  848. struct device *dev = &i2s->pdev->dev;
  849. int index, gpio, ret;
  850. for (index = 0; index < 7; index++) {
  851. gpio = of_get_gpio(dev->of_node, index);
  852. if (!gpio_is_valid(gpio)) {
  853. dev_err(dev, "invalid gpio[%d]: %d\n", index, gpio);
  854. goto free_gpio;
  855. }
  856. ret = gpio_request(gpio, dev_name(dev));
  857. if (ret) {
  858. dev_err(dev, "gpio [%d] request failed\n", gpio);
  859. goto free_gpio;
  860. }
  861. i2s->gpios[index] = gpio;
  862. }
  863. return 0;
  864. free_gpio:
  865. while (--index >= 0)
  866. gpio_free(i2s->gpios[index]);
  867. return -EINVAL;
  868. }
  869. static void samsung_i2s_dt_gpio_free(struct i2s_dai *i2s)
  870. {
  871. unsigned int index;
  872. for (index = 0; index < 7; index++)
  873. gpio_free(i2s->gpios[index]);
  874. }
  875. #else
  876. static int samsung_i2s_parse_dt_gpio(struct i2s_dai *dai)
  877. {
  878. return -EINVAL;
  879. }
  880. static void samsung_i2s_dt_gpio_free(struct i2s_dai *dai)
  881. {
  882. }
  883. #endif
  884. static const struct of_device_id exynos_i2s_match[];
  885. static inline int samsung_i2s_get_driver_data(struct platform_device *pdev)
  886. {
  887. #ifdef CONFIG_OF
  888. struct samsung_i2s_dai_data *data;
  889. if (pdev->dev.of_node) {
  890. const struct of_device_id *match;
  891. match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
  892. data = (struct samsung_i2s_dai_data *) match->data;
  893. return data->dai_type;
  894. } else
  895. #endif
  896. return platform_get_device_id(pdev)->driver_data;
  897. }
  898. #ifdef CONFIG_PM_RUNTIME
  899. static int i2s_runtime_suspend(struct device *dev)
  900. {
  901. struct i2s_dai *i2s = dev_get_drvdata(dev);
  902. clk_disable_unprepare(i2s->clk);
  903. return 0;
  904. }
  905. static int i2s_runtime_resume(struct device *dev)
  906. {
  907. struct i2s_dai *i2s = dev_get_drvdata(dev);
  908. clk_prepare_enable(i2s->clk);
  909. return 0;
  910. }
  911. #endif /* CONFIG_PM_RUNTIME */
  912. static int samsung_i2s_probe(struct platform_device *pdev)
  913. {
  914. struct i2s_dai *pri_dai, *sec_dai = NULL;
  915. struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
  916. struct samsung_i2s *i2s_cfg = NULL;
  917. struct resource *res;
  918. u32 regs_base, quirks = 0, idma_addr = 0;
  919. struct device_node *np = pdev->dev.of_node;
  920. enum samsung_dai_type samsung_dai_type;
  921. int ret = 0;
  922. /* Call during Seconday interface registration */
  923. samsung_dai_type = samsung_i2s_get_driver_data(pdev);
  924. if (samsung_dai_type == TYPE_SEC) {
  925. sec_dai = dev_get_drvdata(&pdev->dev);
  926. if (!sec_dai) {
  927. dev_err(&pdev->dev, "Unable to get drvdata\n");
  928. return -EFAULT;
  929. }
  930. snd_soc_register_component(&sec_dai->pdev->dev,
  931. &samsung_i2s_component,
  932. &sec_dai->i2s_dai_drv, 1);
  933. asoc_dma_platform_register(&pdev->dev);
  934. return 0;
  935. }
  936. pri_dai = i2s_alloc_dai(pdev, false);
  937. if (!pri_dai) {
  938. dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
  939. return -ENOMEM;
  940. }
  941. if (!np) {
  942. res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  943. if (!res) {
  944. dev_err(&pdev->dev,
  945. "Unable to get I2S-TX dma resource\n");
  946. return -ENXIO;
  947. }
  948. pri_dai->dma_playback.channel = res->start;
  949. res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  950. if (!res) {
  951. dev_err(&pdev->dev,
  952. "Unable to get I2S-RX dma resource\n");
  953. return -ENXIO;
  954. }
  955. pri_dai->dma_capture.channel = res->start;
  956. if (i2s_pdata == NULL) {
  957. dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
  958. return -EINVAL;
  959. }
  960. if (&i2s_pdata->type)
  961. i2s_cfg = &i2s_pdata->type.i2s;
  962. if (i2s_cfg) {
  963. quirks = i2s_cfg->quirks;
  964. idma_addr = i2s_cfg->idma_addr;
  965. }
  966. } else {
  967. if (of_find_property(np, "samsung,supports-6ch", NULL))
  968. quirks |= QUIRK_PRI_6CHAN;
  969. if (of_find_property(np, "samsung,supports-secdai", NULL))
  970. quirks |= QUIRK_SEC_DAI;
  971. if (of_find_property(np, "samsung,supports-rstclr", NULL))
  972. quirks |= QUIRK_NEED_RSTCLR;
  973. if (of_property_read_u32(np, "samsung,idma-addr",
  974. &idma_addr)) {
  975. if (quirks & QUIRK_SEC_DAI) {
  976. dev_err(&pdev->dev, "idma address is not"\
  977. "specified");
  978. return -EINVAL;
  979. }
  980. }
  981. }
  982. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  983. if (!res) {
  984. dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
  985. return -ENXIO;
  986. }
  987. if (!request_mem_region(res->start, resource_size(res),
  988. "samsung-i2s")) {
  989. dev_err(&pdev->dev, "Unable to request SFR region\n");
  990. return -EBUSY;
  991. }
  992. regs_base = res->start;
  993. pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
  994. pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
  995. pri_dai->dma_playback.client =
  996. (struct s3c2410_dma_client *)&pri_dai->dma_playback;
  997. pri_dai->dma_playback.ch_name = "tx";
  998. pri_dai->dma_capture.client =
  999. (struct s3c2410_dma_client *)&pri_dai->dma_capture;
  1000. pri_dai->dma_capture.ch_name = "rx";
  1001. pri_dai->dma_playback.dma_size = 4;
  1002. pri_dai->dma_capture.dma_size = 4;
  1003. pri_dai->base = regs_base;
  1004. pri_dai->quirks = quirks;
  1005. if (quirks & QUIRK_PRI_6CHAN)
  1006. pri_dai->i2s_dai_drv.playback.channels_max = 6;
  1007. if (quirks & QUIRK_SEC_DAI) {
  1008. sec_dai = i2s_alloc_dai(pdev, true);
  1009. if (!sec_dai) {
  1010. dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
  1011. ret = -ENOMEM;
  1012. goto err;
  1013. }
  1014. sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
  1015. sec_dai->dma_playback.client =
  1016. (struct s3c2410_dma_client *)&sec_dai->dma_playback;
  1017. sec_dai->dma_playback.ch_name = "tx-sec";
  1018. if (!np) {
  1019. res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
  1020. if (res)
  1021. sec_dai->dma_playback.channel = res->start;
  1022. }
  1023. sec_dai->dma_playback.dma_size = 4;
  1024. sec_dai->base = regs_base;
  1025. sec_dai->quirks = quirks;
  1026. sec_dai->idma_playback.dma_addr = idma_addr;
  1027. sec_dai->pri_dai = pri_dai;
  1028. pri_dai->sec_dai = sec_dai;
  1029. }
  1030. if (np) {
  1031. if (samsung_i2s_parse_dt_gpio(pri_dai)) {
  1032. dev_err(&pdev->dev, "Unable to configure gpio\n");
  1033. ret = -EINVAL;
  1034. goto err;
  1035. }
  1036. } else {
  1037. if (i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
  1038. dev_err(&pdev->dev, "Unable to configure gpio\n");
  1039. ret = -EINVAL;
  1040. goto err;
  1041. }
  1042. }
  1043. snd_soc_register_component(&pri_dai->pdev->dev, &samsung_i2s_component,
  1044. &pri_dai->i2s_dai_drv, 1);
  1045. pm_runtime_enable(&pdev->dev);
  1046. asoc_dma_platform_register(&pdev->dev);
  1047. return 0;
  1048. err:
  1049. release_mem_region(regs_base, resource_size(res));
  1050. return ret;
  1051. }
  1052. static int samsung_i2s_remove(struct platform_device *pdev)
  1053. {
  1054. struct i2s_dai *i2s, *other;
  1055. struct resource *res;
  1056. struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
  1057. i2s = dev_get_drvdata(&pdev->dev);
  1058. other = i2s->pri_dai ? : i2s->sec_dai;
  1059. if (!i2s_pdata->cfg_gpio && pdev->dev.of_node)
  1060. samsung_i2s_dt_gpio_free(i2s->pri_dai);
  1061. if (other) {
  1062. other->pri_dai = NULL;
  1063. other->sec_dai = NULL;
  1064. } else {
  1065. pm_runtime_disable(&pdev->dev);
  1066. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1067. if (res)
  1068. release_mem_region(res->start, resource_size(res));
  1069. }
  1070. i2s->pri_dai = NULL;
  1071. i2s->sec_dai = NULL;
  1072. asoc_dma_platform_unregister(&pdev->dev);
  1073. snd_soc_unregister_component(&pdev->dev);
  1074. return 0;
  1075. }
  1076. static struct platform_device_id samsung_i2s_driver_ids[] = {
  1077. {
  1078. .name = "samsung-i2s",
  1079. .driver_data = TYPE_PRI,
  1080. }, {
  1081. .name = "samsung-i2s-sec",
  1082. .driver_data = TYPE_SEC,
  1083. },
  1084. {},
  1085. };
  1086. MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
  1087. #ifdef CONFIG_OF
  1088. static struct samsung_i2s_dai_data samsung_i2s_dai_data_array[] = {
  1089. [TYPE_PRI] = { TYPE_PRI },
  1090. [TYPE_SEC] = { TYPE_SEC },
  1091. };
  1092. static const struct of_device_id exynos_i2s_match[] = {
  1093. { .compatible = "samsung,i2s-v5",
  1094. .data = &samsung_i2s_dai_data_array[TYPE_PRI],
  1095. },
  1096. {},
  1097. };
  1098. MODULE_DEVICE_TABLE(of, exynos_i2s_match);
  1099. #endif
  1100. static const struct dev_pm_ops samsung_i2s_pm = {
  1101. SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
  1102. i2s_runtime_resume, NULL)
  1103. };
  1104. static struct platform_driver samsung_i2s_driver = {
  1105. .probe = samsung_i2s_probe,
  1106. .remove = samsung_i2s_remove,
  1107. .id_table = samsung_i2s_driver_ids,
  1108. .driver = {
  1109. .name = "samsung-i2s",
  1110. .owner = THIS_MODULE,
  1111. .of_match_table = of_match_ptr(exynos_i2s_match),
  1112. .pm = &samsung_i2s_pm,
  1113. },
  1114. };
  1115. module_platform_driver(samsung_i2s_driver);
  1116. /* Module information */
  1117. MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
  1118. MODULE_DESCRIPTION("Samsung I2S Interface");
  1119. MODULE_ALIAS("platform:samsung-i2s");
  1120. MODULE_LICENSE("GPL");