qlcnic_ethtool.c 27 KB

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  1. /*
  2. * Copyright (C) 2009 - QLogic Corporation.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called "COPYING".
  22. *
  23. */
  24. #include <linux/types.h>
  25. #include <linux/delay.h>
  26. #include <linux/pci.h>
  27. #include <linux/io.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/ethtool.h>
  30. #include "qlcnic.h"
  31. struct qlcnic_stats {
  32. char stat_string[ETH_GSTRING_LEN];
  33. int sizeof_stat;
  34. int stat_offset;
  35. };
  36. #define QLC_SIZEOF(m) FIELD_SIZEOF(struct qlcnic_adapter, m)
  37. #define QLC_OFF(m) offsetof(struct qlcnic_adapter, m)
  38. static const struct qlcnic_stats qlcnic_gstrings_stats[] = {
  39. {"xmit_called",
  40. QLC_SIZEOF(stats.xmitcalled), QLC_OFF(stats.xmitcalled)},
  41. {"xmit_finished",
  42. QLC_SIZEOF(stats.xmitfinished), QLC_OFF(stats.xmitfinished)},
  43. {"rx_dropped",
  44. QLC_SIZEOF(stats.rxdropped), QLC_OFF(stats.rxdropped)},
  45. {"tx_dropped",
  46. QLC_SIZEOF(stats.txdropped), QLC_OFF(stats.txdropped)},
  47. {"csummed",
  48. QLC_SIZEOF(stats.csummed), QLC_OFF(stats.csummed)},
  49. {"rx_pkts",
  50. QLC_SIZEOF(stats.rx_pkts), QLC_OFF(stats.rx_pkts)},
  51. {"lro_pkts",
  52. QLC_SIZEOF(stats.lro_pkts), QLC_OFF(stats.lro_pkts)},
  53. {"rx_bytes",
  54. QLC_SIZEOF(stats.rxbytes), QLC_OFF(stats.rxbytes)},
  55. {"tx_bytes",
  56. QLC_SIZEOF(stats.txbytes), QLC_OFF(stats.txbytes)},
  57. {"lrobytes",
  58. QLC_SIZEOF(stats.lrobytes), QLC_OFF(stats.lrobytes)},
  59. {"lso_frames",
  60. QLC_SIZEOF(stats.lso_frames), QLC_OFF(stats.lso_frames)},
  61. {"xmit_on",
  62. QLC_SIZEOF(stats.xmit_on), QLC_OFF(stats.xmit_on)},
  63. {"xmit_off",
  64. QLC_SIZEOF(stats.xmit_off), QLC_OFF(stats.xmit_off)},
  65. {"skb_alloc_failure", QLC_SIZEOF(stats.skb_alloc_failure),
  66. QLC_OFF(stats.skb_alloc_failure)},
  67. {"null skb",
  68. QLC_SIZEOF(stats.null_skb), QLC_OFF(stats.null_skb)},
  69. {"null rxbuf",
  70. QLC_SIZEOF(stats.null_rxbuf), QLC_OFF(stats.null_rxbuf)},
  71. {"rx dma map error", QLC_SIZEOF(stats.rx_dma_map_error),
  72. QLC_OFF(stats.rx_dma_map_error)},
  73. {"tx dma map error", QLC_SIZEOF(stats.tx_dma_map_error),
  74. QLC_OFF(stats.tx_dma_map_error)},
  75. };
  76. #define QLCNIC_STATS_LEN ARRAY_SIZE(qlcnic_gstrings_stats)
  77. static const char qlcnic_gstrings_test[][ETH_GSTRING_LEN] = {
  78. "Register_Test_on_offline",
  79. "Link_Test_on_offline",
  80. "Interrupt_Test_offline",
  81. "Loopback_Test_offline"
  82. };
  83. #define QLCNIC_TEST_LEN ARRAY_SIZE(qlcnic_gstrings_test)
  84. #define QLCNIC_RING_REGS_COUNT 20
  85. #define QLCNIC_RING_REGS_LEN (QLCNIC_RING_REGS_COUNT * sizeof(u32))
  86. #define QLCNIC_MAX_EEPROM_LEN 1024
  87. static const u32 diag_registers[] = {
  88. CRB_CMDPEG_STATE,
  89. CRB_RCVPEG_STATE,
  90. CRB_XG_STATE_P3,
  91. CRB_FW_CAPABILITIES_1,
  92. ISR_INT_STATE_REG,
  93. QLCNIC_CRB_DEV_REF_COUNT,
  94. QLCNIC_CRB_DEV_STATE,
  95. QLCNIC_CRB_DRV_STATE,
  96. QLCNIC_CRB_DRV_SCRATCH,
  97. QLCNIC_CRB_DEV_PARTITION_INFO,
  98. QLCNIC_CRB_DRV_IDC_VER,
  99. QLCNIC_PEG_ALIVE_COUNTER,
  100. QLCNIC_PEG_HALT_STATUS1,
  101. QLCNIC_PEG_HALT_STATUS2,
  102. QLCNIC_CRB_PEG_NET_0+0x3c,
  103. QLCNIC_CRB_PEG_NET_1+0x3c,
  104. QLCNIC_CRB_PEG_NET_2+0x3c,
  105. QLCNIC_CRB_PEG_NET_4+0x3c,
  106. -1
  107. };
  108. static int qlcnic_get_regs_len(struct net_device *dev)
  109. {
  110. return sizeof(diag_registers) + QLCNIC_RING_REGS_LEN;
  111. }
  112. static int qlcnic_get_eeprom_len(struct net_device *dev)
  113. {
  114. return QLCNIC_FLASH_TOTAL_SIZE;
  115. }
  116. static void
  117. qlcnic_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
  118. {
  119. struct qlcnic_adapter *adapter = netdev_priv(dev);
  120. u32 fw_major, fw_minor, fw_build;
  121. fw_major = QLCRD32(adapter, QLCNIC_FW_VERSION_MAJOR);
  122. fw_minor = QLCRD32(adapter, QLCNIC_FW_VERSION_MINOR);
  123. fw_build = QLCRD32(adapter, QLCNIC_FW_VERSION_SUB);
  124. sprintf(drvinfo->fw_version, "%d.%d.%d", fw_major, fw_minor, fw_build);
  125. strlcpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  126. strlcpy(drvinfo->driver, qlcnic_driver_name, 32);
  127. strlcpy(drvinfo->version, QLCNIC_LINUX_VERSIONID, 32);
  128. }
  129. static int
  130. qlcnic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  131. {
  132. struct qlcnic_adapter *adapter = netdev_priv(dev);
  133. int check_sfp_module = 0;
  134. u16 pcifn = adapter->ahw.pci_func;
  135. /* read which mode */
  136. if (adapter->ahw.port_type == QLCNIC_GBE) {
  137. ecmd->supported = (SUPPORTED_10baseT_Half |
  138. SUPPORTED_10baseT_Full |
  139. SUPPORTED_100baseT_Half |
  140. SUPPORTED_100baseT_Full |
  141. SUPPORTED_1000baseT_Half |
  142. SUPPORTED_1000baseT_Full);
  143. ecmd->advertising = (ADVERTISED_100baseT_Half |
  144. ADVERTISED_100baseT_Full |
  145. ADVERTISED_1000baseT_Half |
  146. ADVERTISED_1000baseT_Full);
  147. ecmd->speed = adapter->link_speed;
  148. ecmd->duplex = adapter->link_duplex;
  149. ecmd->autoneg = adapter->link_autoneg;
  150. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  151. u32 val;
  152. val = QLCRD32(adapter, QLCNIC_PORT_MODE_ADDR);
  153. if (val == QLCNIC_PORT_MODE_802_3_AP) {
  154. ecmd->supported = SUPPORTED_1000baseT_Full;
  155. ecmd->advertising = ADVERTISED_1000baseT_Full;
  156. } else {
  157. ecmd->supported = SUPPORTED_10000baseT_Full;
  158. ecmd->advertising = ADVERTISED_10000baseT_Full;
  159. }
  160. if (netif_running(dev) && adapter->has_link_events) {
  161. ecmd->speed = adapter->link_speed;
  162. ecmd->autoneg = adapter->link_autoneg;
  163. ecmd->duplex = adapter->link_duplex;
  164. goto skip;
  165. }
  166. val = QLCRD32(adapter, P3_LINK_SPEED_REG(pcifn));
  167. ecmd->speed = P3_LINK_SPEED_MHZ *
  168. P3_LINK_SPEED_VAL(pcifn, val);
  169. ecmd->duplex = DUPLEX_FULL;
  170. ecmd->autoneg = AUTONEG_DISABLE;
  171. } else
  172. return -EIO;
  173. skip:
  174. ecmd->phy_address = adapter->physical_port;
  175. ecmd->transceiver = XCVR_EXTERNAL;
  176. switch (adapter->ahw.board_type) {
  177. case QLCNIC_BRDTYPE_P3_REF_QG:
  178. case QLCNIC_BRDTYPE_P3_4_GB:
  179. case QLCNIC_BRDTYPE_P3_4_GB_MM:
  180. ecmd->supported |= SUPPORTED_Autoneg;
  181. ecmd->advertising |= ADVERTISED_Autoneg;
  182. case QLCNIC_BRDTYPE_P3_10G_CX4:
  183. case QLCNIC_BRDTYPE_P3_10G_CX4_LP:
  184. case QLCNIC_BRDTYPE_P3_10000_BASE_T:
  185. ecmd->supported |= SUPPORTED_TP;
  186. ecmd->advertising |= ADVERTISED_TP;
  187. ecmd->port = PORT_TP;
  188. ecmd->autoneg = adapter->link_autoneg;
  189. break;
  190. case QLCNIC_BRDTYPE_P3_IMEZ:
  191. case QLCNIC_BRDTYPE_P3_XG_LOM:
  192. case QLCNIC_BRDTYPE_P3_HMEZ:
  193. ecmd->supported |= SUPPORTED_MII;
  194. ecmd->advertising |= ADVERTISED_MII;
  195. ecmd->port = PORT_MII;
  196. ecmd->autoneg = AUTONEG_DISABLE;
  197. break;
  198. case QLCNIC_BRDTYPE_P3_10G_SFP_PLUS:
  199. case QLCNIC_BRDTYPE_P3_10G_SFP_CT:
  200. case QLCNIC_BRDTYPE_P3_10G_SFP_QT:
  201. ecmd->advertising |= ADVERTISED_TP;
  202. ecmd->supported |= SUPPORTED_TP;
  203. check_sfp_module = netif_running(dev) &&
  204. adapter->has_link_events;
  205. case QLCNIC_BRDTYPE_P3_10G_XFP:
  206. ecmd->supported |= SUPPORTED_FIBRE;
  207. ecmd->advertising |= ADVERTISED_FIBRE;
  208. ecmd->port = PORT_FIBRE;
  209. ecmd->autoneg = AUTONEG_DISABLE;
  210. break;
  211. case QLCNIC_BRDTYPE_P3_10G_TP:
  212. if (adapter->ahw.port_type == QLCNIC_XGBE) {
  213. ecmd->autoneg = AUTONEG_DISABLE;
  214. ecmd->supported |= (SUPPORTED_FIBRE | SUPPORTED_TP);
  215. ecmd->advertising |=
  216. (ADVERTISED_FIBRE | ADVERTISED_TP);
  217. ecmd->port = PORT_FIBRE;
  218. check_sfp_module = netif_running(dev) &&
  219. adapter->has_link_events;
  220. } else {
  221. ecmd->autoneg = AUTONEG_ENABLE;
  222. ecmd->supported |= (SUPPORTED_TP | SUPPORTED_Autoneg);
  223. ecmd->advertising |=
  224. (ADVERTISED_TP | ADVERTISED_Autoneg);
  225. ecmd->port = PORT_TP;
  226. }
  227. break;
  228. default:
  229. dev_err(&adapter->pdev->dev, "Unsupported board model %d\n",
  230. adapter->ahw.board_type);
  231. return -EIO;
  232. }
  233. if (check_sfp_module) {
  234. switch (adapter->module_type) {
  235. case LINKEVENT_MODULE_OPTICAL_UNKNOWN:
  236. case LINKEVENT_MODULE_OPTICAL_SRLR:
  237. case LINKEVENT_MODULE_OPTICAL_LRM:
  238. case LINKEVENT_MODULE_OPTICAL_SFP_1G:
  239. ecmd->port = PORT_FIBRE;
  240. break;
  241. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE:
  242. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN:
  243. case LINKEVENT_MODULE_TWINAX:
  244. ecmd->port = PORT_TP;
  245. break;
  246. default:
  247. ecmd->port = PORT_OTHER;
  248. }
  249. }
  250. return 0;
  251. }
  252. static int
  253. qlcnic_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  254. {
  255. struct qlcnic_adapter *adapter = netdev_priv(dev);
  256. __u32 status;
  257. /* read which mode */
  258. if (adapter->ahw.port_type == QLCNIC_GBE) {
  259. /* autonegotiation */
  260. if (qlcnic_fw_cmd_set_phy(adapter,
  261. QLCNIC_NIU_GB_MII_MGMT_ADDR_AUTONEG,
  262. ecmd->autoneg) != 0)
  263. return -EIO;
  264. else
  265. adapter->link_autoneg = ecmd->autoneg;
  266. if (qlcnic_fw_cmd_query_phy(adapter,
  267. QLCNIC_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
  268. &status) != 0)
  269. return -EIO;
  270. switch (ecmd->speed) {
  271. case SPEED_10:
  272. qlcnic_set_phy_speed(status, 0);
  273. break;
  274. case SPEED_100:
  275. qlcnic_set_phy_speed(status, 1);
  276. break;
  277. case SPEED_1000:
  278. qlcnic_set_phy_speed(status, 2);
  279. break;
  280. }
  281. if (ecmd->duplex == DUPLEX_HALF)
  282. qlcnic_clear_phy_duplex(status);
  283. if (ecmd->duplex == DUPLEX_FULL)
  284. qlcnic_set_phy_duplex(status);
  285. if (qlcnic_fw_cmd_set_phy(adapter,
  286. QLCNIC_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
  287. *((int *)&status)) != 0)
  288. return -EIO;
  289. else {
  290. adapter->link_speed = ecmd->speed;
  291. adapter->link_duplex = ecmd->duplex;
  292. }
  293. } else
  294. return -EOPNOTSUPP;
  295. if (!netif_running(dev))
  296. return 0;
  297. dev->netdev_ops->ndo_stop(dev);
  298. return dev->netdev_ops->ndo_open(dev);
  299. }
  300. static void
  301. qlcnic_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
  302. {
  303. struct qlcnic_adapter *adapter = netdev_priv(dev);
  304. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  305. struct qlcnic_host_sds_ring *sds_ring;
  306. u32 *regs_buff = p;
  307. int ring, i = 0;
  308. memset(p, 0, qlcnic_get_regs_len(dev));
  309. regs->version = (1 << 24) | (adapter->ahw.revision_id << 16) |
  310. (adapter->pdev)->device;
  311. for (i = 0; diag_registers[i] != -1; i++)
  312. regs_buff[i] = QLCRD32(adapter, diag_registers[i]);
  313. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  314. return;
  315. regs_buff[i++] = 0xFFEFCDAB; /* Marker btw regs and ring count*/
  316. regs_buff[i++] = 1; /* No. of tx ring */
  317. regs_buff[i++] = le32_to_cpu(*(adapter->tx_ring->hw_consumer));
  318. regs_buff[i++] = readl(adapter->tx_ring->crb_cmd_producer);
  319. regs_buff[i++] = 2; /* No. of rx ring */
  320. regs_buff[i++] = readl(recv_ctx->rds_rings[0].crb_rcv_producer);
  321. regs_buff[i++] = readl(recv_ctx->rds_rings[1].crb_rcv_producer);
  322. regs_buff[i++] = adapter->max_sds_rings;
  323. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  324. sds_ring = &(recv_ctx->sds_rings[ring]);
  325. regs_buff[i++] = readl(sds_ring->crb_sts_consumer);
  326. }
  327. }
  328. static u32 qlcnic_test_link(struct net_device *dev)
  329. {
  330. struct qlcnic_adapter *adapter = netdev_priv(dev);
  331. u32 val;
  332. val = QLCRD32(adapter, CRB_XG_STATE_P3);
  333. val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val);
  334. return (val == XG_LINK_UP_P3) ? 0 : 1;
  335. }
  336. static int
  337. qlcnic_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
  338. u8 *bytes)
  339. {
  340. struct qlcnic_adapter *adapter = netdev_priv(dev);
  341. int offset;
  342. int ret;
  343. if (eeprom->len == 0)
  344. return -EINVAL;
  345. eeprom->magic = (adapter->pdev)->vendor |
  346. ((adapter->pdev)->device << 16);
  347. offset = eeprom->offset;
  348. ret = qlcnic_rom_fast_read_words(adapter, offset, bytes,
  349. eeprom->len);
  350. if (ret < 0)
  351. return ret;
  352. return 0;
  353. }
  354. static void
  355. qlcnic_get_ringparam(struct net_device *dev,
  356. struct ethtool_ringparam *ring)
  357. {
  358. struct qlcnic_adapter *adapter = netdev_priv(dev);
  359. ring->rx_pending = adapter->num_rxd;
  360. ring->rx_jumbo_pending = adapter->num_jumbo_rxd;
  361. ring->rx_jumbo_pending += adapter->num_lro_rxd;
  362. ring->tx_pending = adapter->num_txd;
  363. if (adapter->ahw.port_type == QLCNIC_GBE) {
  364. ring->rx_max_pending = MAX_RCV_DESCRIPTORS_1G;
  365. ring->rx_jumbo_max_pending = MAX_JUMBO_RCV_DESCRIPTORS_1G;
  366. } else {
  367. ring->rx_max_pending = MAX_RCV_DESCRIPTORS_10G;
  368. ring->rx_jumbo_max_pending = MAX_JUMBO_RCV_DESCRIPTORS_10G;
  369. }
  370. ring->tx_max_pending = MAX_CMD_DESCRIPTORS;
  371. ring->rx_mini_max_pending = 0;
  372. ring->rx_mini_pending = 0;
  373. }
  374. static u32
  375. qlcnic_validate_ringparam(u32 val, u32 min, u32 max, char *r_name)
  376. {
  377. u32 num_desc;
  378. num_desc = max(val, min);
  379. num_desc = min(num_desc, max);
  380. num_desc = roundup_pow_of_two(num_desc);
  381. if (val != num_desc) {
  382. printk(KERN_INFO "%s: setting %s ring size %d instead of %d\n",
  383. qlcnic_driver_name, r_name, num_desc, val);
  384. }
  385. return num_desc;
  386. }
  387. static int
  388. qlcnic_set_ringparam(struct net_device *dev,
  389. struct ethtool_ringparam *ring)
  390. {
  391. struct qlcnic_adapter *adapter = netdev_priv(dev);
  392. u16 max_rcv_desc = MAX_RCV_DESCRIPTORS_10G;
  393. u16 max_jumbo_desc = MAX_JUMBO_RCV_DESCRIPTORS_10G;
  394. u16 num_rxd, num_jumbo_rxd, num_txd;
  395. if (ring->rx_mini_pending)
  396. return -EOPNOTSUPP;
  397. if (adapter->ahw.port_type == QLCNIC_GBE) {
  398. max_rcv_desc = MAX_RCV_DESCRIPTORS_1G;
  399. max_jumbo_desc = MAX_JUMBO_RCV_DESCRIPTORS_10G;
  400. }
  401. num_rxd = qlcnic_validate_ringparam(ring->rx_pending,
  402. MIN_RCV_DESCRIPTORS, max_rcv_desc, "rx");
  403. num_jumbo_rxd = qlcnic_validate_ringparam(ring->rx_jumbo_pending,
  404. MIN_JUMBO_DESCRIPTORS, max_jumbo_desc, "rx jumbo");
  405. num_txd = qlcnic_validate_ringparam(ring->tx_pending,
  406. MIN_CMD_DESCRIPTORS, MAX_CMD_DESCRIPTORS, "tx");
  407. if (num_rxd == adapter->num_rxd && num_txd == adapter->num_txd &&
  408. num_jumbo_rxd == adapter->num_jumbo_rxd)
  409. return 0;
  410. adapter->num_rxd = num_rxd;
  411. adapter->num_jumbo_rxd = num_jumbo_rxd;
  412. adapter->num_txd = num_txd;
  413. return qlcnic_reset_context(adapter);
  414. }
  415. static void
  416. qlcnic_get_pauseparam(struct net_device *netdev,
  417. struct ethtool_pauseparam *pause)
  418. {
  419. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  420. int port = adapter->physical_port;
  421. __u32 val;
  422. if (adapter->ahw.port_type == QLCNIC_GBE) {
  423. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  424. return;
  425. /* get flow control settings */
  426. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  427. pause->rx_pause = qlcnic_gb_get_rx_flowctl(val);
  428. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  429. switch (port) {
  430. case 0:
  431. pause->tx_pause = !(qlcnic_gb_get_gb0_mask(val));
  432. break;
  433. case 1:
  434. pause->tx_pause = !(qlcnic_gb_get_gb1_mask(val));
  435. break;
  436. case 2:
  437. pause->tx_pause = !(qlcnic_gb_get_gb2_mask(val));
  438. break;
  439. case 3:
  440. default:
  441. pause->tx_pause = !(qlcnic_gb_get_gb3_mask(val));
  442. break;
  443. }
  444. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  445. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  446. return;
  447. pause->rx_pause = 1;
  448. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  449. if (port == 0)
  450. pause->tx_pause = !(qlcnic_xg_get_xg0_mask(val));
  451. else
  452. pause->tx_pause = !(qlcnic_xg_get_xg1_mask(val));
  453. } else {
  454. dev_err(&netdev->dev, "Unknown board type: %x\n",
  455. adapter->ahw.port_type);
  456. }
  457. }
  458. static int
  459. qlcnic_set_pauseparam(struct net_device *netdev,
  460. struct ethtool_pauseparam *pause)
  461. {
  462. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  463. int port = adapter->physical_port;
  464. __u32 val;
  465. /* read mode */
  466. if (adapter->ahw.port_type == QLCNIC_GBE) {
  467. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  468. return -EIO;
  469. /* set flow control */
  470. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  471. if (pause->rx_pause)
  472. qlcnic_gb_rx_flowctl(val);
  473. else
  474. qlcnic_gb_unset_rx_flowctl(val);
  475. QLCWR32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port),
  476. val);
  477. /* set autoneg */
  478. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  479. switch (port) {
  480. case 0:
  481. if (pause->tx_pause)
  482. qlcnic_gb_unset_gb0_mask(val);
  483. else
  484. qlcnic_gb_set_gb0_mask(val);
  485. break;
  486. case 1:
  487. if (pause->tx_pause)
  488. qlcnic_gb_unset_gb1_mask(val);
  489. else
  490. qlcnic_gb_set_gb1_mask(val);
  491. break;
  492. case 2:
  493. if (pause->tx_pause)
  494. qlcnic_gb_unset_gb2_mask(val);
  495. else
  496. qlcnic_gb_set_gb2_mask(val);
  497. break;
  498. case 3:
  499. default:
  500. if (pause->tx_pause)
  501. qlcnic_gb_unset_gb3_mask(val);
  502. else
  503. qlcnic_gb_set_gb3_mask(val);
  504. break;
  505. }
  506. QLCWR32(adapter, QLCNIC_NIU_GB_PAUSE_CTL, val);
  507. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  508. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  509. return -EIO;
  510. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  511. if (port == 0) {
  512. if (pause->tx_pause)
  513. qlcnic_xg_unset_xg0_mask(val);
  514. else
  515. qlcnic_xg_set_xg0_mask(val);
  516. } else {
  517. if (pause->tx_pause)
  518. qlcnic_xg_unset_xg1_mask(val);
  519. else
  520. qlcnic_xg_set_xg1_mask(val);
  521. }
  522. QLCWR32(adapter, QLCNIC_NIU_XG_PAUSE_CTL, val);
  523. } else {
  524. dev_err(&netdev->dev, "Unknown board type: %x\n",
  525. adapter->ahw.port_type);
  526. }
  527. return 0;
  528. }
  529. static int qlcnic_reg_test(struct net_device *dev)
  530. {
  531. struct qlcnic_adapter *adapter = netdev_priv(dev);
  532. u32 data_read;
  533. data_read = QLCRD32(adapter, QLCNIC_PCIX_PH_REG(0));
  534. if ((data_read & 0xffff) != adapter->pdev->vendor)
  535. return 1;
  536. return 0;
  537. }
  538. static int qlcnic_get_sset_count(struct net_device *dev, int sset)
  539. {
  540. switch (sset) {
  541. case ETH_SS_TEST:
  542. return QLCNIC_TEST_LEN;
  543. case ETH_SS_STATS:
  544. return QLCNIC_STATS_LEN;
  545. default:
  546. return -EOPNOTSUPP;
  547. }
  548. }
  549. #define QLC_ILB_PKT_SIZE 64
  550. static void qlcnic_create_loopback_buff(unsigned char *data)
  551. {
  552. unsigned char random_data[] = {0xa8, 0x06, 0x45, 0x00};
  553. memset(data, 0x4e, QLC_ILB_PKT_SIZE);
  554. memset(data, 0xff, 12);
  555. memcpy(data + 12, random_data, sizeof(random_data));
  556. }
  557. int qlcnic_check_loopback_buff(unsigned char *data)
  558. {
  559. unsigned char buff[QLC_ILB_PKT_SIZE];
  560. qlcnic_create_loopback_buff(buff);
  561. return memcmp(data, buff, QLC_ILB_PKT_SIZE);
  562. }
  563. static int qlcnic_do_ilb_test(struct qlcnic_adapter *adapter)
  564. {
  565. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  566. struct qlcnic_host_sds_ring *sds_ring = &recv_ctx->sds_rings[0];
  567. struct sk_buff *skb;
  568. int i;
  569. for (i = 0; i < 16; i++) {
  570. skb = dev_alloc_skb(QLC_ILB_PKT_SIZE);
  571. qlcnic_create_loopback_buff(skb->data);
  572. skb_put(skb, QLC_ILB_PKT_SIZE);
  573. adapter->diag_cnt = 0;
  574. qlcnic_xmit_frame(skb, adapter->netdev);
  575. msleep(5);
  576. qlcnic_process_rcv_ring_diag(sds_ring);
  577. dev_kfree_skb_any(skb);
  578. if (!adapter->diag_cnt)
  579. return -1;
  580. }
  581. return 0;
  582. }
  583. static int qlcnic_loopback_test(struct net_device *netdev)
  584. {
  585. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  586. int max_sds_rings = adapter->max_sds_rings;
  587. int ret;
  588. if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  589. return -EIO;
  590. ret = qlcnic_diag_alloc_res(netdev, QLCNIC_LOOPBACK_TEST);
  591. if (ret)
  592. goto clear_it;
  593. ret = qlcnic_set_ilb_mode(adapter);
  594. if (ret)
  595. goto done;
  596. ret = qlcnic_do_ilb_test(adapter);
  597. qlcnic_clear_ilb_mode(adapter);
  598. done:
  599. qlcnic_diag_free_res(netdev, max_sds_rings);
  600. clear_it:
  601. adapter->max_sds_rings = max_sds_rings;
  602. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  603. return ret;
  604. }
  605. static int qlcnic_irq_test(struct net_device *netdev)
  606. {
  607. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  608. int max_sds_rings = adapter->max_sds_rings;
  609. int ret;
  610. if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  611. return -EIO;
  612. ret = qlcnic_diag_alloc_res(netdev, QLCNIC_INTERRUPT_TEST);
  613. if (ret)
  614. goto clear_it;
  615. adapter->diag_cnt = 0;
  616. ret = qlcnic_issue_cmd(adapter, adapter->ahw.pci_func,
  617. QLCHAL_VERSION, adapter->portnum, 0, 0, 0x00000011);
  618. if (ret)
  619. goto done;
  620. msleep(10);
  621. ret = !adapter->diag_cnt;
  622. done:
  623. qlcnic_diag_free_res(netdev, max_sds_rings);
  624. clear_it:
  625. adapter->max_sds_rings = max_sds_rings;
  626. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  627. return ret;
  628. }
  629. static void
  630. qlcnic_diag_test(struct net_device *dev, struct ethtool_test *eth_test,
  631. u64 *data)
  632. {
  633. memset(data, 0, sizeof(u64) * QLCNIC_TEST_LEN);
  634. if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
  635. data[2] = qlcnic_irq_test(dev);
  636. if (data[2])
  637. eth_test->flags |= ETH_TEST_FL_FAILED;
  638. data[3] = qlcnic_loopback_test(dev);
  639. if (data[3])
  640. eth_test->flags |= ETH_TEST_FL_FAILED;
  641. }
  642. data[0] = qlcnic_reg_test(dev);
  643. if (data[0])
  644. eth_test->flags |= ETH_TEST_FL_FAILED;
  645. /* link test */
  646. data[1] = (u64) qlcnic_test_link(dev);
  647. if (data[1])
  648. eth_test->flags |= ETH_TEST_FL_FAILED;
  649. }
  650. static void
  651. qlcnic_get_strings(struct net_device *dev, u32 stringset, u8 * data)
  652. {
  653. int index;
  654. switch (stringset) {
  655. case ETH_SS_TEST:
  656. memcpy(data, *qlcnic_gstrings_test,
  657. QLCNIC_TEST_LEN * ETH_GSTRING_LEN);
  658. break;
  659. case ETH_SS_STATS:
  660. for (index = 0; index < QLCNIC_STATS_LEN; index++) {
  661. memcpy(data + index * ETH_GSTRING_LEN,
  662. qlcnic_gstrings_stats[index].stat_string,
  663. ETH_GSTRING_LEN);
  664. }
  665. break;
  666. }
  667. }
  668. static void
  669. qlcnic_get_ethtool_stats(struct net_device *dev,
  670. struct ethtool_stats *stats, u64 * data)
  671. {
  672. struct qlcnic_adapter *adapter = netdev_priv(dev);
  673. int index;
  674. for (index = 0; index < QLCNIC_STATS_LEN; index++) {
  675. char *p =
  676. (char *)adapter +
  677. qlcnic_gstrings_stats[index].stat_offset;
  678. data[index] =
  679. (qlcnic_gstrings_stats[index].sizeof_stat ==
  680. sizeof(u64)) ? *(u64 *)p:(*(u32 *)p);
  681. }
  682. }
  683. static u32 qlcnic_get_tx_csum(struct net_device *dev)
  684. {
  685. return dev->features & NETIF_F_IP_CSUM;
  686. }
  687. static u32 qlcnic_get_rx_csum(struct net_device *dev)
  688. {
  689. struct qlcnic_adapter *adapter = netdev_priv(dev);
  690. return adapter->rx_csum;
  691. }
  692. static int qlcnic_set_rx_csum(struct net_device *dev, u32 data)
  693. {
  694. struct qlcnic_adapter *adapter = netdev_priv(dev);
  695. adapter->rx_csum = !!data;
  696. return 0;
  697. }
  698. static u32 qlcnic_get_tso(struct net_device *dev)
  699. {
  700. return (dev->features & (NETIF_F_TSO | NETIF_F_TSO6)) != 0;
  701. }
  702. static int qlcnic_set_tso(struct net_device *dev, u32 data)
  703. {
  704. if (data)
  705. dev->features |= (NETIF_F_TSO | NETIF_F_TSO6);
  706. else
  707. dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
  708. return 0;
  709. }
  710. static int qlcnic_blink_led(struct net_device *dev, u32 val)
  711. {
  712. struct qlcnic_adapter *adapter = netdev_priv(dev);
  713. int ret;
  714. ret = qlcnic_config_led(adapter, 1, 0xf);
  715. if (ret) {
  716. dev_err(&adapter->pdev->dev,
  717. "Failed to set LED blink state.\n");
  718. return ret;
  719. }
  720. msleep_interruptible(val * 1000);
  721. ret = qlcnic_config_led(adapter, 0, 0xf);
  722. if (ret) {
  723. dev_err(&adapter->pdev->dev,
  724. "Failed to reset LED blink state.\n");
  725. return ret;
  726. }
  727. return 0;
  728. }
  729. static void
  730. qlcnic_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  731. {
  732. struct qlcnic_adapter *adapter = netdev_priv(dev);
  733. u32 wol_cfg;
  734. wol->supported = 0;
  735. wol->wolopts = 0;
  736. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  737. if (wol_cfg & (1UL << adapter->portnum))
  738. wol->supported |= WAKE_MAGIC;
  739. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  740. if (wol_cfg & (1UL << adapter->portnum))
  741. wol->wolopts |= WAKE_MAGIC;
  742. }
  743. static int
  744. qlcnic_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  745. {
  746. struct qlcnic_adapter *adapter = netdev_priv(dev);
  747. u32 wol_cfg;
  748. if (wol->wolopts & ~WAKE_MAGIC)
  749. return -EOPNOTSUPP;
  750. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  751. if (!(wol_cfg & (1 << adapter->portnum)))
  752. return -EOPNOTSUPP;
  753. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  754. if (wol->wolopts & WAKE_MAGIC)
  755. wol_cfg |= 1UL << adapter->portnum;
  756. else
  757. wol_cfg &= ~(1UL << adapter->portnum);
  758. QLCWR32(adapter, QLCNIC_WOL_CONFIG, wol_cfg);
  759. return 0;
  760. }
  761. /*
  762. * Set the coalescing parameters. Currently only normal is supported.
  763. * If rx_coalesce_usecs == 0 or rx_max_coalesced_frames == 0 then set the
  764. * firmware coalescing to default.
  765. */
  766. static int qlcnic_set_intr_coalesce(struct net_device *netdev,
  767. struct ethtool_coalesce *ethcoal)
  768. {
  769. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  770. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  771. return -EINVAL;
  772. /*
  773. * Return Error if unsupported values or
  774. * unsupported parameters are set.
  775. */
  776. if (ethcoal->rx_coalesce_usecs > 0xffff ||
  777. ethcoal->rx_max_coalesced_frames > 0xffff ||
  778. ethcoal->tx_coalesce_usecs > 0xffff ||
  779. ethcoal->tx_max_coalesced_frames > 0xffff ||
  780. ethcoal->rx_coalesce_usecs_irq ||
  781. ethcoal->rx_max_coalesced_frames_irq ||
  782. ethcoal->tx_coalesce_usecs_irq ||
  783. ethcoal->tx_max_coalesced_frames_irq ||
  784. ethcoal->stats_block_coalesce_usecs ||
  785. ethcoal->use_adaptive_rx_coalesce ||
  786. ethcoal->use_adaptive_tx_coalesce ||
  787. ethcoal->pkt_rate_low ||
  788. ethcoal->rx_coalesce_usecs_low ||
  789. ethcoal->rx_max_coalesced_frames_low ||
  790. ethcoal->tx_coalesce_usecs_low ||
  791. ethcoal->tx_max_coalesced_frames_low ||
  792. ethcoal->pkt_rate_high ||
  793. ethcoal->rx_coalesce_usecs_high ||
  794. ethcoal->rx_max_coalesced_frames_high ||
  795. ethcoal->tx_coalesce_usecs_high ||
  796. ethcoal->tx_max_coalesced_frames_high)
  797. return -EINVAL;
  798. if (!ethcoal->rx_coalesce_usecs ||
  799. !ethcoal->rx_max_coalesced_frames) {
  800. adapter->coal.flags = QLCNIC_INTR_DEFAULT;
  801. adapter->coal.normal.data.rx_time_us =
  802. QLCNIC_DEFAULT_INTR_COALESCE_RX_TIME_US;
  803. adapter->coal.normal.data.rx_packets =
  804. QLCNIC_DEFAULT_INTR_COALESCE_RX_PACKETS;
  805. } else {
  806. adapter->coal.flags = 0;
  807. adapter->coal.normal.data.rx_time_us =
  808. ethcoal->rx_coalesce_usecs;
  809. adapter->coal.normal.data.rx_packets =
  810. ethcoal->rx_max_coalesced_frames;
  811. }
  812. adapter->coal.normal.data.tx_time_us = ethcoal->tx_coalesce_usecs;
  813. adapter->coal.normal.data.tx_packets =
  814. ethcoal->tx_max_coalesced_frames;
  815. qlcnic_config_intr_coalesce(adapter);
  816. return 0;
  817. }
  818. static int qlcnic_get_intr_coalesce(struct net_device *netdev,
  819. struct ethtool_coalesce *ethcoal)
  820. {
  821. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  822. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  823. return -EINVAL;
  824. ethcoal->rx_coalesce_usecs = adapter->coal.normal.data.rx_time_us;
  825. ethcoal->tx_coalesce_usecs = adapter->coal.normal.data.tx_time_us;
  826. ethcoal->rx_max_coalesced_frames =
  827. adapter->coal.normal.data.rx_packets;
  828. ethcoal->tx_max_coalesced_frames =
  829. adapter->coal.normal.data.tx_packets;
  830. return 0;
  831. }
  832. static int qlcnic_set_flags(struct net_device *netdev, u32 data)
  833. {
  834. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  835. int hw_lro;
  836. if (!(adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO))
  837. return -EINVAL;
  838. ethtool_op_set_flags(netdev, data);
  839. hw_lro = (data & ETH_FLAG_LRO) ? QLCNIC_LRO_ENABLED : 0;
  840. if (qlcnic_config_hw_lro(adapter, hw_lro))
  841. return -EIO;
  842. if ((hw_lro == 0) && qlcnic_send_lro_cleanup(adapter))
  843. return -EIO;
  844. return 0;
  845. }
  846. static u32 qlcnic_get_msglevel(struct net_device *netdev)
  847. {
  848. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  849. return adapter->msg_enable;
  850. }
  851. static void qlcnic_set_msglevel(struct net_device *netdev, u32 msglvl)
  852. {
  853. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  854. adapter->msg_enable = msglvl;
  855. }
  856. const struct ethtool_ops qlcnic_ethtool_ops = {
  857. .get_settings = qlcnic_get_settings,
  858. .set_settings = qlcnic_set_settings,
  859. .get_drvinfo = qlcnic_get_drvinfo,
  860. .get_regs_len = qlcnic_get_regs_len,
  861. .get_regs = qlcnic_get_regs,
  862. .get_link = ethtool_op_get_link,
  863. .get_eeprom_len = qlcnic_get_eeprom_len,
  864. .get_eeprom = qlcnic_get_eeprom,
  865. .get_ringparam = qlcnic_get_ringparam,
  866. .set_ringparam = qlcnic_set_ringparam,
  867. .get_pauseparam = qlcnic_get_pauseparam,
  868. .set_pauseparam = qlcnic_set_pauseparam,
  869. .get_tx_csum = qlcnic_get_tx_csum,
  870. .set_tx_csum = ethtool_op_set_tx_csum,
  871. .set_sg = ethtool_op_set_sg,
  872. .get_tso = qlcnic_get_tso,
  873. .set_tso = qlcnic_set_tso,
  874. .get_wol = qlcnic_get_wol,
  875. .set_wol = qlcnic_set_wol,
  876. .self_test = qlcnic_diag_test,
  877. .get_strings = qlcnic_get_strings,
  878. .get_ethtool_stats = qlcnic_get_ethtool_stats,
  879. .get_sset_count = qlcnic_get_sset_count,
  880. .get_rx_csum = qlcnic_get_rx_csum,
  881. .set_rx_csum = qlcnic_set_rx_csum,
  882. .get_coalesce = qlcnic_get_intr_coalesce,
  883. .set_coalesce = qlcnic_set_intr_coalesce,
  884. .get_flags = ethtool_op_get_flags,
  885. .set_flags = qlcnic_set_flags,
  886. .phys_id = qlcnic_blink_led,
  887. .set_msglevel = qlcnic_set_msglevel,
  888. .get_msglevel = qlcnic_get_msglevel,
  889. };