arcmsr_hba.c 44 KB

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  1. /*
  2. *******************************************************************************
  3. ** O.S : Linux
  4. ** FILE NAME : arcmsr_hba.c
  5. ** BY : Erich Chen
  6. ** Description: SCSI RAID Device Driver for
  7. ** ARECA RAID Host adapter
  8. *******************************************************************************
  9. ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved
  10. **
  11. ** Web site: www.areca.com.tw
  12. ** E-mail: erich@areca.com.tw
  13. **
  14. ** This program is free software; you can redistribute it and/or modify
  15. ** it under the terms of the GNU General Public License version 2 as
  16. ** published by the Free Software Foundation.
  17. ** This program is distributed in the hope that it will be useful,
  18. ** but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. ** GNU General Public License for more details.
  21. *******************************************************************************
  22. ** Redistribution and use in source and binary forms, with or without
  23. ** modification, are permitted provided that the following conditions
  24. ** are met:
  25. ** 1. Redistributions of source code must retain the above copyright
  26. ** notice, this list of conditions and the following disclaimer.
  27. ** 2. Redistributions in binary form must reproduce the above copyright
  28. ** notice, this list of conditions and the following disclaimer in the
  29. ** documentation and/or other materials provided with the distribution.
  30. ** 3. The name of the author may not be used to endorse or promote products
  31. ** derived from this software without specific prior written permission.
  32. **
  33. ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  34. ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  35. ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  36. ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  37. ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
  38. ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  39. ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
  40. ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  41. ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
  42. ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  43. *******************************************************************************
  44. ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
  45. ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
  46. *******************************************************************************
  47. */
  48. #include <linux/module.h>
  49. #include <linux/reboot.h>
  50. #include <linux/spinlock.h>
  51. #include <linux/pci_ids.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/moduleparam.h>
  54. #include <linux/errno.h>
  55. #include <linux/types.h>
  56. #include <linux/delay.h>
  57. #include <linux/dma-mapping.h>
  58. #include <linux/timer.h>
  59. #include <linux/pci.h>
  60. #include <asm/dma.h>
  61. #include <asm/io.h>
  62. #include <asm/system.h>
  63. #include <asm/uaccess.h>
  64. #include <scsi/scsi_host.h>
  65. #include <scsi/scsi.h>
  66. #include <scsi/scsi_cmnd.h>
  67. #include <scsi/scsi_tcq.h>
  68. #include <scsi/scsi_device.h>
  69. #include <scsi/scsi_transport.h>
  70. #include <scsi/scsicam.h>
  71. #include "arcmsr.h"
  72. MODULE_AUTHOR("Erich Chen <erich@areca.com.tw>");
  73. MODULE_DESCRIPTION("ARECA (ARC11xx/12xx) SATA RAID HOST Adapter");
  74. MODULE_LICENSE("Dual BSD/GPL");
  75. MODULE_VERSION(ARCMSR_DRIVER_VERSION);
  76. static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, struct scsi_cmnd *cmd);
  77. static int arcmsr_abort(struct scsi_cmnd *);
  78. static int arcmsr_bus_reset(struct scsi_cmnd *);
  79. static int arcmsr_bios_param(struct scsi_device *sdev,
  80. struct block_device *bdev, sector_t capacity, int *info);
  81. static int arcmsr_queue_command(struct scsi_cmnd * cmd,
  82. void (*done) (struct scsi_cmnd *));
  83. static int arcmsr_probe(struct pci_dev *pdev,
  84. const struct pci_device_id *id);
  85. static void arcmsr_remove(struct pci_dev *pdev);
  86. static void arcmsr_shutdown(struct pci_dev *pdev);
  87. static void arcmsr_iop_init(struct AdapterControlBlock *acb);
  88. static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
  89. static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
  90. static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb);
  91. static uint8_t arcmsr_wait_msgint_ready(struct AdapterControlBlock *acb);
  92. static const char *arcmsr_info(struct Scsi_Host *);
  93. static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
  94. static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth)
  95. {
  96. if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
  97. queue_depth = ARCMSR_MAX_CMD_PERLUN;
  98. scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth);
  99. return queue_depth;
  100. }
  101. static struct scsi_host_template arcmsr_scsi_host_template = {
  102. .module = THIS_MODULE,
  103. .name = "ARCMSR ARECA SATA RAID HOST Adapter" ARCMSR_DRIVER_VERSION,
  104. .info = arcmsr_info,
  105. .queuecommand = arcmsr_queue_command,
  106. .eh_abort_handler = arcmsr_abort,
  107. .eh_bus_reset_handler = arcmsr_bus_reset,
  108. .bios_param = arcmsr_bios_param,
  109. .change_queue_depth = arcmsr_adjust_disk_queue_depth,
  110. .can_queue = ARCMSR_MAX_OUTSTANDING_CMD,
  111. .this_id = ARCMSR_SCSI_INITIATOR_ID,
  112. .sg_tablesize = ARCMSR_MAX_SG_ENTRIES,
  113. .max_sectors = ARCMSR_MAX_XFER_SECTORS,
  114. .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
  115. .use_clustering = ENABLE_CLUSTERING,
  116. .shost_attrs = arcmsr_host_attrs,
  117. };
  118. static struct pci_device_id arcmsr_device_id_table[] = {
  119. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)},
  120. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)},
  121. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)},
  122. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)},
  123. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)},
  124. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)},
  125. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)},
  126. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)},
  127. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)},
  128. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)},
  129. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)},
  130. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)},
  131. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
  132. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
  133. {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
  134. {0, 0}, /* Terminating entry */
  135. };
  136. MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
  137. static struct pci_driver arcmsr_pci_driver = {
  138. .name = "arcmsr",
  139. .id_table = arcmsr_device_id_table,
  140. .probe = arcmsr_probe,
  141. .remove = arcmsr_remove,
  142. .shutdown = arcmsr_shutdown
  143. };
  144. static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
  145. {
  146. irqreturn_t handle_state;
  147. struct AdapterControlBlock *acb;
  148. unsigned long flags;
  149. acb = (struct AdapterControlBlock *)dev_id;
  150. spin_lock_irqsave(acb->host->host_lock, flags);
  151. handle_state = arcmsr_interrupt(acb);
  152. spin_unlock_irqrestore(acb->host->host_lock, flags);
  153. return handle_state;
  154. }
  155. static int arcmsr_bios_param(struct scsi_device *sdev,
  156. struct block_device *bdev, sector_t capacity, int *geom)
  157. {
  158. int ret, heads, sectors, cylinders, total_capacity;
  159. unsigned char *buffer;/* return copy of block device's partition table */
  160. buffer = scsi_bios_ptable(bdev);
  161. if (buffer) {
  162. ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
  163. kfree(buffer);
  164. if (ret != -1)
  165. return ret;
  166. }
  167. total_capacity = capacity;
  168. heads = 64;
  169. sectors = 32;
  170. cylinders = total_capacity / (heads * sectors);
  171. if (cylinders > 1024) {
  172. heads = 255;
  173. sectors = 63;
  174. cylinders = total_capacity / (heads * sectors);
  175. }
  176. geom[0] = heads;
  177. geom[1] = sectors;
  178. geom[2] = cylinders;
  179. return 0;
  180. }
  181. static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
  182. {
  183. struct pci_dev *pdev = acb->pdev;
  184. struct MessageUnit __iomem *reg = acb->pmu;
  185. u32 ccb_phyaddr_hi32;
  186. void *dma_coherent;
  187. dma_addr_t dma_coherent_handle, dma_addr;
  188. struct CommandControlBlock *ccb_tmp;
  189. int i, j;
  190. dma_coherent = dma_alloc_coherent(&pdev->dev,
  191. ARCMSR_MAX_FREECCB_NUM *
  192. sizeof (struct CommandControlBlock) + 0x20,
  193. &dma_coherent_handle, GFP_KERNEL);
  194. if (!dma_coherent)
  195. return -ENOMEM;
  196. acb->dma_coherent = dma_coherent;
  197. acb->dma_coherent_handle = dma_coherent_handle;
  198. if (((unsigned long)dma_coherent & 0x1F)) {
  199. dma_coherent = dma_coherent +
  200. (0x20 - ((unsigned long)dma_coherent & 0x1F));
  201. dma_coherent_handle = dma_coherent_handle +
  202. (0x20 - ((unsigned long)dma_coherent_handle & 0x1F));
  203. }
  204. dma_addr = dma_coherent_handle;
  205. ccb_tmp = (struct CommandControlBlock *)dma_coherent;
  206. for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
  207. ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5;
  208. ccb_tmp->acb = acb;
  209. acb->pccb_pool[i] = ccb_tmp;
  210. list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
  211. dma_addr = dma_addr + sizeof (struct CommandControlBlock);
  212. ccb_tmp++;
  213. }
  214. acb->vir2phy_offset = (unsigned long)ccb_tmp -
  215. (unsigned long)dma_addr;
  216. for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
  217. for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
  218. acb->devstate[i][j] = ARECA_RAID_GOOD;
  219. /*
  220. ** here we need to tell iop 331 our ccb_tmp.HighPart
  221. ** if ccb_tmp.HighPart is not zero
  222. */
  223. ccb_phyaddr_hi32 = (uint32_t) ((dma_coherent_handle >> 16) >> 16);
  224. if (ccb_phyaddr_hi32 != 0) {
  225. writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->message_rwbuffer[0]);
  226. writel(ccb_phyaddr_hi32, &reg->message_rwbuffer[1]);
  227. writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
  228. if (arcmsr_wait_msgint_ready(acb))
  229. printk(KERN_NOTICE "arcmsr%d: "
  230. "'set ccb high part physical address' timeout\n",
  231. acb->host->host_no);
  232. }
  233. writel(readl(&reg->outbound_intmask) |
  234. ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE,
  235. &reg->outbound_intmask);
  236. return 0;
  237. }
  238. static int arcmsr_probe(struct pci_dev *pdev,
  239. const struct pci_device_id *id)
  240. {
  241. struct Scsi_Host *host;
  242. struct AdapterControlBlock *acb;
  243. uint8_t bus, dev_fun;
  244. int error;
  245. error = pci_enable_device(pdev);
  246. if (error)
  247. goto out;
  248. pci_set_master(pdev);
  249. host = scsi_host_alloc(&arcmsr_scsi_host_template,
  250. sizeof(struct AdapterControlBlock));
  251. if (!host) {
  252. error = -ENOMEM;
  253. goto out_disable_device;
  254. }
  255. acb = (struct AdapterControlBlock *)host->hostdata;
  256. memset(acb, 0, sizeof (struct AdapterControlBlock));
  257. error = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  258. if (error) {
  259. error = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  260. if (error) {
  261. printk(KERN_WARNING
  262. "scsi%d: No suitable DMA mask available\n",
  263. host->host_no);
  264. goto out_host_put;
  265. }
  266. }
  267. bus = pdev->bus->number;
  268. dev_fun = pdev->devfn;
  269. acb->host = host;
  270. acb->pdev = pdev;
  271. host->max_sectors = ARCMSR_MAX_XFER_SECTORS;
  272. host->max_lun = ARCMSR_MAX_TARGETLUN;
  273. host->max_id = ARCMSR_MAX_TARGETID;/*16:8*/
  274. host->max_cmd_len = 16; /*this is issue of 64bit LBA, over 2T byte*/
  275. host->sg_tablesize = ARCMSR_MAX_SG_ENTRIES;
  276. host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */
  277. host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
  278. host->this_id = ARCMSR_SCSI_INITIATOR_ID;
  279. host->unique_id = (bus << 8) | dev_fun;
  280. host->irq = pdev->irq;
  281. error = pci_request_regions(pdev, "arcmsr");
  282. if (error)
  283. goto out_host_put;
  284. acb->pmu = ioremap(pci_resource_start(pdev, 0),
  285. pci_resource_len(pdev, 0));
  286. if (!acb->pmu) {
  287. printk(KERN_NOTICE "arcmsr%d: memory"
  288. " mapping region fail \n", acb->host->host_no);
  289. goto out_release_regions;
  290. }
  291. acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
  292. ACB_F_MESSAGE_RQBUFFER_CLEARED |
  293. ACB_F_MESSAGE_WQBUFFER_READED);
  294. acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
  295. INIT_LIST_HEAD(&acb->ccb_free_list);
  296. error = arcmsr_alloc_ccb_pool(acb);
  297. if (error)
  298. goto out_iounmap;
  299. error = request_irq(pdev->irq, arcmsr_do_interrupt,
  300. IRQF_DISABLED | IRQF_SHARED, "arcmsr", acb);
  301. if (error)
  302. goto out_free_ccb_pool;
  303. arcmsr_iop_init(acb);
  304. pci_set_drvdata(pdev, host);
  305. error = scsi_add_host(host, &pdev->dev);
  306. if (error)
  307. goto out_free_irq;
  308. error = arcmsr_alloc_sysfs_attr(acb);
  309. if (error)
  310. goto out_free_sysfs;
  311. scsi_scan_host(host);
  312. return 0;
  313. out_free_sysfs:
  314. out_free_irq:
  315. free_irq(pdev->irq, acb);
  316. out_free_ccb_pool:
  317. arcmsr_free_ccb_pool(acb);
  318. out_iounmap:
  319. iounmap(acb->pmu);
  320. out_release_regions:
  321. pci_release_regions(pdev);
  322. out_host_put:
  323. scsi_host_put(host);
  324. out_disable_device:
  325. pci_disable_device(pdev);
  326. out:
  327. return error;
  328. }
  329. static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
  330. {
  331. struct MessageUnit __iomem *reg = acb->pmu;
  332. writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
  333. if (arcmsr_wait_msgint_ready(acb))
  334. printk(KERN_NOTICE
  335. "arcmsr%d: wait 'abort all outstanding command' timeout \n"
  336. , acb->host->host_no);
  337. }
  338. static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
  339. {
  340. struct scsi_cmnd *pcmd = ccb->pcmd;
  341. scsi_dma_unmap(pcmd);
  342. }
  343. static void arcmsr_ccb_complete(struct CommandControlBlock *ccb, int stand_flag)
  344. {
  345. struct AdapterControlBlock *acb = ccb->acb;
  346. struct scsi_cmnd *pcmd = ccb->pcmd;
  347. arcmsr_pci_unmap_dma(ccb);
  348. if (stand_flag == 1)
  349. atomic_dec(&acb->ccboutstandingcount);
  350. ccb->startdone = ARCMSR_CCB_DONE;
  351. ccb->ccb_flags = 0;
  352. list_add_tail(&ccb->list, &acb->ccb_free_list);
  353. pcmd->scsi_done(pcmd);
  354. }
  355. static void arcmsr_remove(struct pci_dev *pdev)
  356. {
  357. struct Scsi_Host *host = pci_get_drvdata(pdev);
  358. struct AdapterControlBlock *acb =
  359. (struct AdapterControlBlock *) host->hostdata;
  360. struct MessageUnit __iomem *reg = acb->pmu;
  361. int poll_count = 0;
  362. arcmsr_free_sysfs_attr(acb);
  363. scsi_remove_host(host);
  364. arcmsr_stop_adapter_bgrb(acb);
  365. arcmsr_flush_adapter_cache(acb);
  366. writel(readl(&reg->outbound_intmask) |
  367. ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE,
  368. &reg->outbound_intmask);
  369. acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
  370. acb->acb_flags &= ~ACB_F_IOP_INITED;
  371. for (poll_count = 0; poll_count < 256; poll_count++) {
  372. if (!atomic_read(&acb->ccboutstandingcount))
  373. break;
  374. arcmsr_interrupt(acb);
  375. msleep(25);
  376. }
  377. if (atomic_read(&acb->ccboutstandingcount)) {
  378. int i;
  379. arcmsr_abort_allcmd(acb);
  380. for (i = 0; i < ARCMSR_MAX_OUTSTANDING_CMD; i++)
  381. readl(&reg->outbound_queueport);
  382. for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
  383. struct CommandControlBlock *ccb = acb->pccb_pool[i];
  384. if (ccb->startdone == ARCMSR_CCB_START) {
  385. ccb->startdone = ARCMSR_CCB_ABORTED;
  386. ccb->pcmd->result = DID_ABORT << 16;
  387. arcmsr_ccb_complete(ccb, 1);
  388. }
  389. }
  390. }
  391. free_irq(pdev->irq, acb);
  392. iounmap(acb->pmu);
  393. arcmsr_free_ccb_pool(acb);
  394. pci_release_regions(pdev);
  395. scsi_host_put(host);
  396. pci_disable_device(pdev);
  397. pci_set_drvdata(pdev, NULL);
  398. }
  399. static void arcmsr_shutdown(struct pci_dev *pdev)
  400. {
  401. struct Scsi_Host *host = pci_get_drvdata(pdev);
  402. struct AdapterControlBlock *acb =
  403. (struct AdapterControlBlock *)host->hostdata;
  404. arcmsr_stop_adapter_bgrb(acb);
  405. arcmsr_flush_adapter_cache(acb);
  406. }
  407. static int arcmsr_module_init(void)
  408. {
  409. int error = 0;
  410. error = pci_register_driver(&arcmsr_pci_driver);
  411. return error;
  412. }
  413. static void arcmsr_module_exit(void)
  414. {
  415. pci_unregister_driver(&arcmsr_pci_driver);
  416. }
  417. module_init(arcmsr_module_init);
  418. module_exit(arcmsr_module_exit);
  419. static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
  420. {
  421. struct MessageUnit __iomem *reg = acb->pmu;
  422. u32 orig_mask = readl(&reg->outbound_intmask);
  423. writel(orig_mask | ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE,
  424. &reg->outbound_intmask);
  425. return orig_mask;
  426. }
  427. static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
  428. u32 orig_mask)
  429. {
  430. struct MessageUnit __iomem *reg = acb->pmu;
  431. u32 mask;
  432. mask = orig_mask & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
  433. ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE);
  434. writel(mask, &reg->outbound_intmask);
  435. }
  436. static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
  437. {
  438. struct MessageUnit __iomem *reg=acb->pmu;
  439. writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
  440. if (arcmsr_wait_msgint_ready(acb))
  441. printk(KERN_NOTICE
  442. "arcmsr%d: wait 'flush adapter cache' timeout \n"
  443. , acb->host->host_no);
  444. }
  445. static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
  446. {
  447. struct scsi_cmnd *pcmd = ccb->pcmd;
  448. struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
  449. pcmd->result = DID_OK << 16;
  450. if (sensebuffer) {
  451. int sense_data_length =
  452. sizeof (struct SENSE_DATA) < sizeof (pcmd->sense_buffer)
  453. ? sizeof (struct SENSE_DATA) : sizeof (pcmd->sense_buffer);
  454. memset(sensebuffer, 0, sizeof (pcmd->sense_buffer));
  455. memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
  456. sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
  457. sensebuffer->Valid = 1;
  458. }
  459. }
  460. static uint8_t arcmsr_wait_msgint_ready(struct AdapterControlBlock *acb)
  461. {
  462. struct MessageUnit __iomem *reg = acb->pmu;
  463. uint32_t Index;
  464. uint8_t Retries = 0x00;
  465. do {
  466. for (Index = 0; Index < 100; Index++) {
  467. if (readl(&reg->outbound_intstatus)
  468. & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
  469. writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT
  470. , &reg->outbound_intstatus);
  471. return 0x00;
  472. }
  473. msleep_interruptible(10);
  474. }/*max 1 seconds*/
  475. } while (Retries++ < 20);/*max 20 sec*/
  476. return 0xff;
  477. }
  478. static void arcmsr_build_ccb(struct AdapterControlBlock *acb,
  479. struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
  480. {
  481. struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
  482. int8_t *psge = (int8_t *)&arcmsr_cdb->u;
  483. uint32_t address_lo, address_hi;
  484. int arccdbsize = 0x30;
  485. int nseg;
  486. ccb->pcmd = pcmd;
  487. memset(arcmsr_cdb, 0, sizeof (struct ARCMSR_CDB));
  488. arcmsr_cdb->Bus = 0;
  489. arcmsr_cdb->TargetID = pcmd->device->id;
  490. arcmsr_cdb->LUN = pcmd->device->lun;
  491. arcmsr_cdb->Function = 1;
  492. arcmsr_cdb->CdbLength = (uint8_t)pcmd->cmd_len;
  493. arcmsr_cdb->Context = (unsigned long)arcmsr_cdb;
  494. memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
  495. nseg = scsi_dma_map(pcmd);
  496. BUG_ON(nseg < 0);
  497. if (nseg) {
  498. int length, i, cdb_sgcount = 0;
  499. struct scatterlist *sg;
  500. /* map stor port SG list to our iop SG List. */
  501. scsi_for_each_sg(pcmd, sg, nseg, i) {
  502. /* Get the physical address of the current data pointer */
  503. length = cpu_to_le32(sg_dma_len(sg));
  504. address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
  505. address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
  506. if (address_hi == 0) {
  507. struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
  508. pdma_sg->address = address_lo;
  509. pdma_sg->length = length;
  510. psge += sizeof (struct SG32ENTRY);
  511. arccdbsize += sizeof (struct SG32ENTRY);
  512. } else {
  513. struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
  514. pdma_sg->addresshigh = address_hi;
  515. pdma_sg->address = address_lo;
  516. pdma_sg->length = length|IS_SG64_ADDR;
  517. psge += sizeof (struct SG64ENTRY);
  518. arccdbsize += sizeof (struct SG64ENTRY);
  519. }
  520. cdb_sgcount++;
  521. }
  522. arcmsr_cdb->sgcount = (uint8_t)cdb_sgcount;
  523. arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
  524. if ( arccdbsize > 256)
  525. arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
  526. }
  527. if (pcmd->sc_data_direction == DMA_TO_DEVICE ) {
  528. arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
  529. ccb->ccb_flags |= CCB_FLAG_WRITE;
  530. }
  531. }
  532. static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
  533. {
  534. struct MessageUnit __iomem *reg = acb->pmu;
  535. uint32_t cdb_shifted_phyaddr = ccb->cdb_shifted_phyaddr;
  536. struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
  537. atomic_inc(&acb->ccboutstandingcount);
  538. ccb->startdone = ARCMSR_CCB_START;
  539. if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
  540. writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
  541. &reg->inbound_queueport);
  542. else
  543. writel(cdb_shifted_phyaddr, &reg->inbound_queueport);
  544. }
  545. void arcmsr_post_Qbuffer(struct AdapterControlBlock *acb)
  546. {
  547. struct MessageUnit __iomem *reg = acb->pmu;
  548. struct QBUFFER __iomem *pwbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
  549. uint8_t __iomem *iop_data = (uint8_t __iomem *) pwbuffer->data;
  550. int32_t allxfer_len = 0;
  551. if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
  552. acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
  553. while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex)
  554. && (allxfer_len < 124)) {
  555. writeb(acb->wqbuffer[acb->wqbuf_firstindex], iop_data);
  556. acb->wqbuf_firstindex++;
  557. acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
  558. iop_data++;
  559. allxfer_len++;
  560. }
  561. writel(allxfer_len, &pwbuffer->data_len);
  562. writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK
  563. , &reg->inbound_doorbell);
  564. }
  565. }
  566. static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
  567. {
  568. struct MessageUnit __iomem *reg = acb->pmu;
  569. acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
  570. writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
  571. if (arcmsr_wait_msgint_ready(acb))
  572. printk(KERN_NOTICE
  573. "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
  574. , acb->host->host_no);
  575. }
  576. static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
  577. {
  578. dma_free_coherent(&acb->pdev->dev,
  579. ARCMSR_MAX_FREECCB_NUM * sizeof (struct CommandControlBlock) + 0x20,
  580. acb->dma_coherent,
  581. acb->dma_coherent_handle);
  582. }
  583. static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
  584. {
  585. struct MessageUnit __iomem *reg = acb->pmu;
  586. struct CommandControlBlock *ccb;
  587. uint32_t flag_ccb, outbound_intstatus, outbound_doorbell;
  588. outbound_intstatus = readl(&reg->outbound_intstatus)
  589. & acb->outbound_int_enable;
  590. writel(outbound_intstatus, &reg->outbound_intstatus);
  591. if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
  592. outbound_doorbell = readl(&reg->outbound_doorbell);
  593. writel(outbound_doorbell, &reg->outbound_doorbell);
  594. if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
  595. struct QBUFFER __iomem * prbuffer =
  596. (struct QBUFFER __iomem *) &reg->message_rbuffer;
  597. uint8_t __iomem * iop_data = (uint8_t __iomem *)prbuffer->data;
  598. int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
  599. rqbuf_lastindex = acb->rqbuf_lastindex;
  600. rqbuf_firstindex = acb->rqbuf_firstindex;
  601. iop_len = readl(&prbuffer->data_len);
  602. my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1)
  603. &(ARCMSR_MAX_QBUFFER - 1);
  604. if (my_empty_len >= iop_len) {
  605. while (iop_len > 0) {
  606. acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
  607. acb->rqbuf_lastindex++;
  608. acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
  609. iop_data++;
  610. iop_len--;
  611. }
  612. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK,
  613. &reg->inbound_doorbell);
  614. } else
  615. acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
  616. }
  617. if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
  618. acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
  619. if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
  620. struct QBUFFER __iomem * pwbuffer =
  621. (struct QBUFFER __iomem *) &reg->message_wbuffer;
  622. uint8_t __iomem * iop_data = (uint8_t __iomem *) pwbuffer->data;
  623. int32_t allxfer_len = 0;
  624. acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
  625. while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex)
  626. && (allxfer_len < 124)) {
  627. writeb(acb->wqbuffer[acb->wqbuf_firstindex], iop_data);
  628. acb->wqbuf_firstindex++;
  629. acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
  630. iop_data++;
  631. allxfer_len++;
  632. }
  633. writel(allxfer_len, &pwbuffer->data_len);
  634. writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK,
  635. &reg->inbound_doorbell);
  636. }
  637. if (acb->wqbuf_firstindex == acb->wqbuf_lastindex)
  638. acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
  639. }
  640. }
  641. if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
  642. int id, lun;
  643. /*
  644. ****************************************************************
  645. ** areca cdb command done
  646. ****************************************************************
  647. */
  648. while (1) {
  649. if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF)
  650. break;/*chip FIFO no ccb for completion already*/
  651. /* check if command done with no error*/
  652. ccb = (struct CommandControlBlock *)(acb->vir2phy_offset +
  653. (flag_ccb << 5));
  654. if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
  655. if (ccb->startdone == ARCMSR_CCB_ABORTED) {
  656. struct scsi_cmnd *abortcmd=ccb->pcmd;
  657. if (abortcmd) {
  658. abortcmd->result |= DID_ABORT >> 16;
  659. arcmsr_ccb_complete(ccb, 1);
  660. printk(KERN_NOTICE
  661. "arcmsr%d: ccb='0x%p' isr got aborted command \n"
  662. , acb->host->host_no, ccb);
  663. }
  664. continue;
  665. }
  666. printk(KERN_NOTICE
  667. "arcmsr%d: isr get an illegal ccb command done acb='0x%p'"
  668. "ccb='0x%p' ccbacb='0x%p' startdone = 0x%x"
  669. " ccboutstandingcount=%d \n"
  670. , acb->host->host_no
  671. , acb
  672. , ccb
  673. , ccb->acb
  674. , ccb->startdone
  675. , atomic_read(&acb->ccboutstandingcount));
  676. continue;
  677. }
  678. id = ccb->pcmd->device->id;
  679. lun = ccb->pcmd->device->lun;
  680. if (!(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR)) {
  681. if (acb->devstate[id][lun] == ARECA_RAID_GONE)
  682. acb->devstate[id][lun] = ARECA_RAID_GOOD;
  683. ccb->pcmd->result = DID_OK << 16;
  684. arcmsr_ccb_complete(ccb, 1);
  685. } else {
  686. switch(ccb->arcmsr_cdb.DeviceStatus) {
  687. case ARCMSR_DEV_SELECT_TIMEOUT: {
  688. acb->devstate[id][lun] = ARECA_RAID_GONE;
  689. ccb->pcmd->result = DID_TIME_OUT << 16;
  690. arcmsr_ccb_complete(ccb, 1);
  691. }
  692. break;
  693. case ARCMSR_DEV_ABORTED:
  694. case ARCMSR_DEV_INIT_FAIL: {
  695. acb->devstate[id][lun] = ARECA_RAID_GONE;
  696. ccb->pcmd->result = DID_BAD_TARGET << 16;
  697. arcmsr_ccb_complete(ccb, 1);
  698. }
  699. break;
  700. case ARCMSR_DEV_CHECK_CONDITION: {
  701. acb->devstate[id][lun] = ARECA_RAID_GOOD;
  702. arcmsr_report_sense_info(ccb);
  703. arcmsr_ccb_complete(ccb, 1);
  704. }
  705. break;
  706. default:
  707. printk(KERN_NOTICE
  708. "arcmsr%d: scsi id=%d lun=%d"
  709. " isr get command error done,"
  710. "but got unknown DeviceStatus = 0x%x \n"
  711. , acb->host->host_no
  712. , id
  713. , lun
  714. , ccb->arcmsr_cdb.DeviceStatus);
  715. acb->devstate[id][lun] = ARECA_RAID_GONE;
  716. ccb->pcmd->result = DID_NO_CONNECT << 16;
  717. arcmsr_ccb_complete(ccb, 1);
  718. break;
  719. }
  720. }
  721. }/*drain reply FIFO*/
  722. }
  723. if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
  724. return IRQ_NONE;
  725. return IRQ_HANDLED;
  726. }
  727. static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
  728. {
  729. if (acb) {
  730. /* stop adapter background rebuild */
  731. if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
  732. acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
  733. arcmsr_stop_adapter_bgrb(acb);
  734. arcmsr_flush_adapter_cache(acb);
  735. }
  736. }
  737. }
  738. static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, struct scsi_cmnd *cmd)
  739. {
  740. struct MessageUnit __iomem *reg = acb->pmu;
  741. struct CMD_MESSAGE_FIELD *pcmdmessagefld;
  742. int retvalue = 0, transfer_len = 0;
  743. char *buffer;
  744. struct scatterlist *sg;
  745. uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
  746. (uint32_t ) cmd->cmnd[6] << 16 |
  747. (uint32_t ) cmd->cmnd[7] << 8 |
  748. (uint32_t ) cmd->cmnd[8];
  749. /* 4 bytes: Areca io control code */
  750. sg = scsi_sglist(cmd);
  751. buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
  752. if (scsi_sg_count(cmd) > 1) {
  753. retvalue = ARCMSR_MESSAGE_FAIL;
  754. goto message_out;
  755. }
  756. transfer_len += sg->length;
  757. if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
  758. retvalue = ARCMSR_MESSAGE_FAIL;
  759. goto message_out;
  760. }
  761. pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
  762. switch(controlcode) {
  763. case ARCMSR_MESSAGE_READ_RQBUFFER: {
  764. unsigned long *ver_addr;
  765. dma_addr_t buf_handle;
  766. uint8_t *pQbuffer, *ptmpQbuffer;
  767. int32_t allxfer_len = 0;
  768. ver_addr = pci_alloc_consistent(acb->pdev, 1032, &buf_handle);
  769. if (!ver_addr) {
  770. retvalue = ARCMSR_MESSAGE_FAIL;
  771. goto message_out;
  772. }
  773. ptmpQbuffer = (uint8_t *) ver_addr;
  774. while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
  775. && (allxfer_len < 1031)) {
  776. pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
  777. memcpy(ptmpQbuffer, pQbuffer, 1);
  778. acb->rqbuf_firstindex++;
  779. acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
  780. ptmpQbuffer++;
  781. allxfer_len++;
  782. }
  783. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  784. struct QBUFFER __iomem * prbuffer = (struct QBUFFER __iomem *)
  785. &reg->message_rbuffer;
  786. uint8_t __iomem * iop_data = (uint8_t __iomem *)prbuffer->data;
  787. int32_t iop_len;
  788. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  789. iop_len = readl(&prbuffer->data_len);
  790. while (iop_len > 0) {
  791. acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
  792. acb->rqbuf_lastindex++;
  793. acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
  794. iop_data++;
  795. iop_len--;
  796. }
  797. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK,
  798. &reg->inbound_doorbell);
  799. }
  800. memcpy(pcmdmessagefld->messagedatabuffer,
  801. (uint8_t *)ver_addr, allxfer_len);
  802. pcmdmessagefld->cmdmessage.Length = allxfer_len;
  803. pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
  804. pci_free_consistent(acb->pdev, 1032, ver_addr, buf_handle);
  805. }
  806. break;
  807. case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
  808. unsigned long *ver_addr;
  809. dma_addr_t buf_handle;
  810. int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
  811. uint8_t *pQbuffer, *ptmpuserbuffer;
  812. ver_addr = pci_alloc_consistent(acb->pdev, 1032, &buf_handle);
  813. if (!ver_addr) {
  814. retvalue = ARCMSR_MESSAGE_FAIL;
  815. goto message_out;
  816. }
  817. ptmpuserbuffer = (uint8_t *)ver_addr;
  818. user_len = pcmdmessagefld->cmdmessage.Length;
  819. memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
  820. wqbuf_lastindex = acb->wqbuf_lastindex;
  821. wqbuf_firstindex = acb->wqbuf_firstindex;
  822. if (wqbuf_lastindex != wqbuf_firstindex) {
  823. struct SENSE_DATA *sensebuffer =
  824. (struct SENSE_DATA *)cmd->sense_buffer;
  825. arcmsr_post_Qbuffer(acb);
  826. /* has error report sensedata */
  827. sensebuffer->ErrorCode = 0x70;
  828. sensebuffer->SenseKey = ILLEGAL_REQUEST;
  829. sensebuffer->AdditionalSenseLength = 0x0A;
  830. sensebuffer->AdditionalSenseCode = 0x20;
  831. sensebuffer->Valid = 1;
  832. retvalue = ARCMSR_MESSAGE_FAIL;
  833. } else {
  834. my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
  835. &(ARCMSR_MAX_QBUFFER - 1);
  836. if (my_empty_len >= user_len) {
  837. while (user_len > 0) {
  838. pQbuffer =
  839. &acb->wqbuffer[acb->wqbuf_lastindex];
  840. memcpy(pQbuffer, ptmpuserbuffer, 1);
  841. acb->wqbuf_lastindex++;
  842. acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
  843. ptmpuserbuffer++;
  844. user_len--;
  845. }
  846. if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
  847. acb->acb_flags &=
  848. ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
  849. arcmsr_post_Qbuffer(acb);
  850. }
  851. } else {
  852. /* has error report sensedata */
  853. struct SENSE_DATA *sensebuffer =
  854. (struct SENSE_DATA *)cmd->sense_buffer;
  855. sensebuffer->ErrorCode = 0x70;
  856. sensebuffer->SenseKey = ILLEGAL_REQUEST;
  857. sensebuffer->AdditionalSenseLength = 0x0A;
  858. sensebuffer->AdditionalSenseCode = 0x20;
  859. sensebuffer->Valid = 1;
  860. retvalue = ARCMSR_MESSAGE_FAIL;
  861. }
  862. }
  863. pci_free_consistent(acb->pdev, 1032, ver_addr, buf_handle);
  864. }
  865. break;
  866. case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
  867. uint8_t *pQbuffer = acb->rqbuffer;
  868. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  869. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  870. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK,
  871. &reg->inbound_doorbell);
  872. }
  873. acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
  874. acb->rqbuf_firstindex = 0;
  875. acb->rqbuf_lastindex = 0;
  876. memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
  877. pcmdmessagefld->cmdmessage.ReturnCode =
  878. ARCMSR_MESSAGE_RETURNCODE_OK;
  879. }
  880. break;
  881. case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
  882. uint8_t *pQbuffer = acb->wqbuffer;
  883. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  884. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  885. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK
  886. , &reg->inbound_doorbell);
  887. }
  888. acb->acb_flags |=
  889. (ACB_F_MESSAGE_WQBUFFER_CLEARED |
  890. ACB_F_MESSAGE_WQBUFFER_READED);
  891. acb->wqbuf_firstindex = 0;
  892. acb->wqbuf_lastindex = 0;
  893. memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
  894. pcmdmessagefld->cmdmessage.ReturnCode =
  895. ARCMSR_MESSAGE_RETURNCODE_OK;
  896. }
  897. break;
  898. case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
  899. uint8_t *pQbuffer;
  900. if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
  901. acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
  902. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK
  903. , &reg->inbound_doorbell);
  904. }
  905. acb->acb_flags |=
  906. (ACB_F_MESSAGE_WQBUFFER_CLEARED
  907. | ACB_F_MESSAGE_RQBUFFER_CLEARED
  908. | ACB_F_MESSAGE_WQBUFFER_READED);
  909. acb->rqbuf_firstindex = 0;
  910. acb->rqbuf_lastindex = 0;
  911. acb->wqbuf_firstindex = 0;
  912. acb->wqbuf_lastindex = 0;
  913. pQbuffer = acb->rqbuffer;
  914. memset(pQbuffer, 0, sizeof (struct QBUFFER));
  915. pQbuffer = acb->wqbuffer;
  916. memset(pQbuffer, 0, sizeof (struct QBUFFER));
  917. pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
  918. }
  919. break;
  920. case ARCMSR_MESSAGE_RETURN_CODE_3F: {
  921. pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F;
  922. }
  923. break;
  924. case ARCMSR_MESSAGE_SAY_HELLO: {
  925. int8_t * hello_string = "Hello! I am ARCMSR";
  926. memcpy(pcmdmessagefld->messagedatabuffer, hello_string
  927. , (int16_t)strlen(hello_string));
  928. pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
  929. }
  930. break;
  931. case ARCMSR_MESSAGE_SAY_GOODBYE:
  932. arcmsr_iop_parking(acb);
  933. break;
  934. case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
  935. arcmsr_flush_adapter_cache(acb);
  936. break;
  937. default:
  938. retvalue = ARCMSR_MESSAGE_FAIL;
  939. }
  940. message_out:
  941. sg = scsi_sglist(cmd);
  942. kunmap_atomic(buffer - sg->offset, KM_IRQ0);
  943. return retvalue;
  944. }
  945. static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
  946. {
  947. struct list_head *head = &acb->ccb_free_list;
  948. struct CommandControlBlock *ccb = NULL;
  949. if (!list_empty(head)) {
  950. ccb = list_entry(head->next, struct CommandControlBlock, list);
  951. list_del(head->next);
  952. }
  953. return ccb;
  954. }
  955. static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
  956. struct scsi_cmnd *cmd)
  957. {
  958. switch (cmd->cmnd[0]) {
  959. case INQUIRY: {
  960. unsigned char inqdata[36];
  961. char *buffer;
  962. struct scatterlist *sg;
  963. if (cmd->device->lun) {
  964. cmd->result = (DID_TIME_OUT << 16);
  965. cmd->scsi_done(cmd);
  966. return;
  967. }
  968. inqdata[0] = TYPE_PROCESSOR;
  969. /* Periph Qualifier & Periph Dev Type */
  970. inqdata[1] = 0;
  971. /* rem media bit & Dev Type Modifier */
  972. inqdata[2] = 0;
  973. /* ISO,ECMA,& ANSI versions */
  974. inqdata[4] = 31;
  975. /* length of additional data */
  976. strncpy(&inqdata[8], "Areca ", 8);
  977. /* Vendor Identification */
  978. strncpy(&inqdata[16], "RAID controller ", 16);
  979. /* Product Identification */
  980. strncpy(&inqdata[32], "R001", 4); /* Product Revision */
  981. sg = scsi_sglist(cmd);
  982. buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
  983. memcpy(buffer, inqdata, sizeof(inqdata));
  984. sg = scsi_sglist(cmd);
  985. kunmap_atomic(buffer - sg->offset, KM_IRQ0);
  986. cmd->scsi_done(cmd);
  987. }
  988. break;
  989. case WRITE_BUFFER:
  990. case READ_BUFFER: {
  991. if (arcmsr_iop_message_xfer(acb, cmd))
  992. cmd->result = (DID_ERROR << 16);
  993. cmd->scsi_done(cmd);
  994. }
  995. break;
  996. default:
  997. cmd->scsi_done(cmd);
  998. }
  999. }
  1000. static int arcmsr_queue_command(struct scsi_cmnd *cmd,
  1001. void (* done)(struct scsi_cmnd *))
  1002. {
  1003. struct Scsi_Host *host = cmd->device->host;
  1004. struct AdapterControlBlock *acb =
  1005. (struct AdapterControlBlock *) host->hostdata;
  1006. struct CommandControlBlock *ccb;
  1007. int target = cmd->device->id;
  1008. int lun = cmd->device->lun;
  1009. cmd->scsi_done = done;
  1010. cmd->host_scribble = NULL;
  1011. cmd->result = 0;
  1012. if (acb->acb_flags & ACB_F_BUS_RESET) {
  1013. printk(KERN_NOTICE "arcmsr%d: bus reset"
  1014. " and return busy \n"
  1015. , acb->host->host_no);
  1016. return SCSI_MLQUEUE_HOST_BUSY;
  1017. }
  1018. if(target == 16) {
  1019. /* virtual device for iop message transfer */
  1020. arcmsr_handle_virtual_command(acb, cmd);
  1021. return 0;
  1022. }
  1023. if (acb->devstate[target][lun] == ARECA_RAID_GONE) {
  1024. uint8_t block_cmd;
  1025. block_cmd = cmd->cmnd[0] & 0x0f;
  1026. if (block_cmd == 0x08 || block_cmd == 0x0a) {
  1027. printk(KERN_NOTICE
  1028. "arcmsr%d: block 'read/write'"
  1029. "command with gone raid volume"
  1030. " Cmd=%2x, TargetId=%d, Lun=%d \n"
  1031. , acb->host->host_no
  1032. , cmd->cmnd[0]
  1033. , target, lun);
  1034. cmd->result = (DID_NO_CONNECT << 16);
  1035. cmd->scsi_done(cmd);
  1036. return 0;
  1037. }
  1038. }
  1039. if (atomic_read(&acb->ccboutstandingcount) >=
  1040. ARCMSR_MAX_OUTSTANDING_CMD)
  1041. return SCSI_MLQUEUE_HOST_BUSY;
  1042. ccb = arcmsr_get_freeccb(acb);
  1043. if (!ccb)
  1044. return SCSI_MLQUEUE_HOST_BUSY;
  1045. arcmsr_build_ccb(acb, ccb, cmd);
  1046. arcmsr_post_ccb(acb, ccb);
  1047. return 0;
  1048. }
  1049. static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
  1050. {
  1051. struct MessageUnit __iomem *reg = acb->pmu;
  1052. char *acb_firm_model = acb->firm_model;
  1053. char *acb_firm_version = acb->firm_version;
  1054. char __iomem *iop_firm_model = (char __iomem *) &reg->message_rwbuffer[15];
  1055. char __iomem *iop_firm_version = (char __iomem *) &reg->message_rwbuffer[17];
  1056. int count;
  1057. writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
  1058. if (arcmsr_wait_msgint_ready(acb))
  1059. printk(KERN_NOTICE
  1060. "arcmsr%d: wait "
  1061. "'get adapter firmware miscellaneous data' timeout \n"
  1062. , acb->host->host_no);
  1063. count = 8;
  1064. while (count) {
  1065. *acb_firm_model = readb(iop_firm_model);
  1066. acb_firm_model++;
  1067. iop_firm_model++;
  1068. count--;
  1069. }
  1070. count = 16;
  1071. while (count) {
  1072. *acb_firm_version = readb(iop_firm_version);
  1073. acb_firm_version++;
  1074. iop_firm_version++;
  1075. count--;
  1076. }
  1077. printk(KERN_INFO
  1078. "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n"
  1079. , acb->host->host_no
  1080. , acb->firm_version);
  1081. acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
  1082. acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
  1083. acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
  1084. acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
  1085. }
  1086. static void arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
  1087. struct CommandControlBlock *poll_ccb)
  1088. {
  1089. struct MessageUnit __iomem *reg = acb->pmu;
  1090. struct CommandControlBlock *ccb;
  1091. uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
  1092. int id, lun;
  1093. polling_ccb_retry:
  1094. poll_count++;
  1095. outbound_intstatus = readl(&reg->outbound_intstatus)
  1096. & acb->outbound_int_enable;
  1097. writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
  1098. while (1) {
  1099. if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
  1100. if (poll_ccb_done)
  1101. break;
  1102. else {
  1103. msleep(25);
  1104. if (poll_count > 100)
  1105. break;
  1106. goto polling_ccb_retry;
  1107. }
  1108. }
  1109. ccb = (struct CommandControlBlock *)
  1110. (acb->vir2phy_offset + (flag_ccb << 5));
  1111. if ((ccb->acb != acb) ||
  1112. (ccb->startdone != ARCMSR_CCB_START)) {
  1113. if ((ccb->startdone == ARCMSR_CCB_ABORTED) ||
  1114. (ccb == poll_ccb)) {
  1115. printk(KERN_NOTICE
  1116. "arcmsr%d: scsi id=%d lun=%d ccb='0x%p'"
  1117. " poll command abort successfully \n"
  1118. , acb->host->host_no
  1119. , ccb->pcmd->device->id
  1120. , ccb->pcmd->device->lun
  1121. , ccb);
  1122. ccb->pcmd->result = DID_ABORT << 16;
  1123. arcmsr_ccb_complete(ccb, 1);
  1124. poll_ccb_done = 1;
  1125. continue;
  1126. }
  1127. printk(KERN_NOTICE
  1128. "arcmsr%d: polling get an illegal ccb"
  1129. " command done ccb='0x%p'"
  1130. "ccboutstandingcount=%d \n"
  1131. , acb->host->host_no
  1132. , ccb
  1133. , atomic_read(&acb->ccboutstandingcount));
  1134. continue;
  1135. }
  1136. id = ccb->pcmd->device->id;
  1137. lun = ccb->pcmd->device->lun;
  1138. if (!(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR)) {
  1139. if (acb->devstate[id][lun] == ARECA_RAID_GONE)
  1140. acb->devstate[id][lun] = ARECA_RAID_GOOD;
  1141. ccb->pcmd->result = DID_OK << 16;
  1142. arcmsr_ccb_complete(ccb, 1);
  1143. } else {
  1144. switch(ccb->arcmsr_cdb.DeviceStatus) {
  1145. case ARCMSR_DEV_SELECT_TIMEOUT: {
  1146. acb->devstate[id][lun] = ARECA_RAID_GONE;
  1147. ccb->pcmd->result = DID_TIME_OUT << 16;
  1148. arcmsr_ccb_complete(ccb, 1);
  1149. }
  1150. break;
  1151. case ARCMSR_DEV_ABORTED:
  1152. case ARCMSR_DEV_INIT_FAIL: {
  1153. acb->devstate[id][lun] = ARECA_RAID_GONE;
  1154. ccb->pcmd->result = DID_BAD_TARGET << 16;
  1155. arcmsr_ccb_complete(ccb, 1);
  1156. }
  1157. break;
  1158. case ARCMSR_DEV_CHECK_CONDITION: {
  1159. acb->devstate[id][lun] = ARECA_RAID_GOOD;
  1160. arcmsr_report_sense_info(ccb);
  1161. arcmsr_ccb_complete(ccb, 1);
  1162. }
  1163. break;
  1164. default:
  1165. printk(KERN_NOTICE
  1166. "arcmsr%d: scsi id=%d lun=%d"
  1167. " polling and getting command error done"
  1168. "but got unknown DeviceStatus = 0x%x \n"
  1169. , acb->host->host_no
  1170. , id
  1171. , lun
  1172. , ccb->arcmsr_cdb.DeviceStatus);
  1173. acb->devstate[id][lun] = ARECA_RAID_GONE;
  1174. ccb->pcmd->result = DID_BAD_TARGET << 16;
  1175. arcmsr_ccb_complete(ccb, 1);
  1176. break;
  1177. }
  1178. }
  1179. }
  1180. }
  1181. static void arcmsr_iop_init(struct AdapterControlBlock *acb)
  1182. {
  1183. struct MessageUnit __iomem *reg = acb->pmu;
  1184. uint32_t intmask_org, mask, outbound_doorbell, firmware_state = 0;
  1185. do {
  1186. firmware_state = readl(&reg->outbound_msgaddr1);
  1187. } while (!(firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK));
  1188. intmask_org = readl(&reg->outbound_intmask)
  1189. | ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE;
  1190. arcmsr_get_firmware_spec(acb);
  1191. acb->acb_flags |= ACB_F_MSG_START_BGRB;
  1192. writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
  1193. if (arcmsr_wait_msgint_ready(acb)) {
  1194. printk(KERN_NOTICE "arcmsr%d: "
  1195. "wait 'start adapter background rebulid' timeout\n",
  1196. acb->host->host_no);
  1197. }
  1198. outbound_doorbell = readl(&reg->outbound_doorbell);
  1199. writel(outbound_doorbell, &reg->outbound_doorbell);
  1200. writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
  1201. mask = ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE
  1202. | ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE);
  1203. writel(intmask_org & mask, &reg->outbound_intmask);
  1204. acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
  1205. acb->acb_flags |= ACB_F_IOP_INITED;
  1206. }
  1207. static void arcmsr_iop_reset(struct AdapterControlBlock *acb)
  1208. {
  1209. struct MessageUnit __iomem *reg = acb->pmu;
  1210. struct CommandControlBlock *ccb;
  1211. uint32_t intmask_org;
  1212. int i = 0;
  1213. if (atomic_read(&acb->ccboutstandingcount) != 0) {
  1214. /* talk to iop 331 outstanding command aborted */
  1215. arcmsr_abort_allcmd(acb);
  1216. /* wait for 3 sec for all command aborted*/
  1217. msleep_interruptible(3000);
  1218. /* disable all outbound interrupt */
  1219. intmask_org = arcmsr_disable_outbound_ints(acb);
  1220. /* clear all outbound posted Q */
  1221. for (i = 0; i < ARCMSR_MAX_OUTSTANDING_CMD; i++)
  1222. readl(&reg->outbound_queueport);
  1223. for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
  1224. ccb = acb->pccb_pool[i];
  1225. if ((ccb->startdone == ARCMSR_CCB_START) ||
  1226. (ccb->startdone == ARCMSR_CCB_ABORTED)) {
  1227. ccb->startdone = ARCMSR_CCB_ABORTED;
  1228. ccb->pcmd->result = DID_ABORT << 16;
  1229. arcmsr_ccb_complete(ccb, 1);
  1230. }
  1231. }
  1232. /* enable all outbound interrupt */
  1233. arcmsr_enable_outbound_ints(acb, intmask_org);
  1234. }
  1235. atomic_set(&acb->ccboutstandingcount, 0);
  1236. }
  1237. static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
  1238. {
  1239. struct AdapterControlBlock *acb =
  1240. (struct AdapterControlBlock *)cmd->device->host->hostdata;
  1241. int i;
  1242. acb->num_resets++;
  1243. acb->acb_flags |= ACB_F_BUS_RESET;
  1244. for (i = 0; i < 400; i++) {
  1245. if (!atomic_read(&acb->ccboutstandingcount))
  1246. break;
  1247. arcmsr_interrupt(acb);
  1248. msleep(25);
  1249. }
  1250. arcmsr_iop_reset(acb);
  1251. acb->acb_flags &= ~ACB_F_BUS_RESET;
  1252. return SUCCESS;
  1253. }
  1254. static void arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
  1255. struct CommandControlBlock *ccb)
  1256. {
  1257. u32 intmask;
  1258. ccb->startdone = ARCMSR_CCB_ABORTED;
  1259. /*
  1260. ** Wait for 3 sec for all command done.
  1261. */
  1262. msleep_interruptible(3000);
  1263. intmask = arcmsr_disable_outbound_ints(acb);
  1264. arcmsr_polling_ccbdone(acb, ccb);
  1265. arcmsr_enable_outbound_ints(acb, intmask);
  1266. }
  1267. static int arcmsr_abort(struct scsi_cmnd *cmd)
  1268. {
  1269. struct AdapterControlBlock *acb =
  1270. (struct AdapterControlBlock *)cmd->device->host->hostdata;
  1271. int i = 0;
  1272. printk(KERN_NOTICE
  1273. "arcmsr%d: abort device command of scsi id=%d lun=%d \n",
  1274. acb->host->host_no, cmd->device->id, cmd->device->lun);
  1275. acb->num_aborts++;
  1276. /*
  1277. ************************************************
  1278. ** the all interrupt service routine is locked
  1279. ** we need to handle it as soon as possible and exit
  1280. ************************************************
  1281. */
  1282. if (!atomic_read(&acb->ccboutstandingcount))
  1283. return SUCCESS;
  1284. for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
  1285. struct CommandControlBlock *ccb = acb->pccb_pool[i];
  1286. if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
  1287. arcmsr_abort_one_cmd(acb, ccb);
  1288. break;
  1289. }
  1290. }
  1291. return SUCCESS;
  1292. }
  1293. static const char *arcmsr_info(struct Scsi_Host *host)
  1294. {
  1295. struct AdapterControlBlock *acb =
  1296. (struct AdapterControlBlock *) host->hostdata;
  1297. static char buf[256];
  1298. char *type;
  1299. int raid6 = 1;
  1300. switch (acb->pdev->device) {
  1301. case PCI_DEVICE_ID_ARECA_1110:
  1302. case PCI_DEVICE_ID_ARECA_1210:
  1303. raid6 = 0;
  1304. /*FALLTHRU*/
  1305. case PCI_DEVICE_ID_ARECA_1120:
  1306. case PCI_DEVICE_ID_ARECA_1130:
  1307. case PCI_DEVICE_ID_ARECA_1160:
  1308. case PCI_DEVICE_ID_ARECA_1170:
  1309. case PCI_DEVICE_ID_ARECA_1220:
  1310. case PCI_DEVICE_ID_ARECA_1230:
  1311. case PCI_DEVICE_ID_ARECA_1260:
  1312. case PCI_DEVICE_ID_ARECA_1270:
  1313. case PCI_DEVICE_ID_ARECA_1280:
  1314. type = "SATA";
  1315. break;
  1316. case PCI_DEVICE_ID_ARECA_1380:
  1317. case PCI_DEVICE_ID_ARECA_1381:
  1318. case PCI_DEVICE_ID_ARECA_1680:
  1319. case PCI_DEVICE_ID_ARECA_1681:
  1320. type = "SAS";
  1321. break;
  1322. default:
  1323. type = "X-TYPE";
  1324. break;
  1325. }
  1326. sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
  1327. type, raid6 ? "( RAID6 capable)" : "",
  1328. ARCMSR_DRIVER_VERSION);
  1329. return buf;
  1330. }