sh_intc.h 2.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105
  1. #ifndef __SH_INTC_H
  2. #define __SH_INTC_H
  3. #include <linux/ioport.h>
  4. typedef unsigned char intc_enum;
  5. struct intc_vect {
  6. intc_enum enum_id;
  7. unsigned short vect;
  8. };
  9. #define INTC_VECT(enum_id, vect) { enum_id, vect }
  10. #define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
  11. struct intc_group {
  12. intc_enum enum_id;
  13. intc_enum enum_ids[32];
  14. };
  15. #define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
  16. struct intc_mask_reg {
  17. unsigned long set_reg, clr_reg, reg_width;
  18. intc_enum enum_ids[32];
  19. #ifdef CONFIG_SMP
  20. unsigned long smp;
  21. #endif
  22. };
  23. struct intc_prio_reg {
  24. unsigned long set_reg, clr_reg, reg_width, field_width;
  25. intc_enum enum_ids[16];
  26. #ifdef CONFIG_SMP
  27. unsigned long smp;
  28. #endif
  29. };
  30. struct intc_sense_reg {
  31. unsigned long reg, reg_width, field_width;
  32. intc_enum enum_ids[16];
  33. };
  34. #ifdef CONFIG_SMP
  35. #define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
  36. #else
  37. #define INTC_SMP(stride, nr)
  38. #endif
  39. struct intc_hw_desc {
  40. struct intc_vect *vectors;
  41. unsigned int nr_vectors;
  42. struct intc_group *groups;
  43. unsigned int nr_groups;
  44. struct intc_mask_reg *mask_regs;
  45. unsigned int nr_mask_regs;
  46. struct intc_prio_reg *prio_regs;
  47. unsigned int nr_prio_regs;
  48. struct intc_sense_reg *sense_regs;
  49. unsigned int nr_sense_regs;
  50. struct intc_mask_reg *ack_regs;
  51. unsigned int nr_ack_regs;
  52. };
  53. #define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
  54. #define INTC_HW_DESC(vectors, groups, mask_regs, \
  55. prio_regs, sense_regs, ack_regs) \
  56. { \
  57. _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
  58. _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
  59. _INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs), \
  60. }
  61. struct intc_desc {
  62. char *name;
  63. struct resource *resource;
  64. unsigned int num_resources;
  65. intc_enum force_enable;
  66. intc_enum force_disable;
  67. struct intc_hw_desc hw;
  68. };
  69. #define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
  70. mask_regs, prio_regs, sense_regs) \
  71. struct intc_desc symbol __initdata = { \
  72. .name = chipname, \
  73. .hw = INTC_HW_DESC(vectors, groups, mask_regs, \
  74. prio_regs, sense_regs, NULL), \
  75. }
  76. #define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
  77. mask_regs, prio_regs, sense_regs, ack_regs) \
  78. struct intc_desc symbol __initdata = { \
  79. .name = chipname, \
  80. .hw = INTC_HW_DESC(vectors, groups, mask_regs, \
  81. prio_regs, sense_regs, ack_regs), \
  82. }
  83. int __init register_intc_controller(struct intc_desc *desc);
  84. int intc_set_priority(unsigned int irq, unsigned int prio);
  85. int reserve_irq_vector(unsigned int irq);
  86. void reserve_irq_legacy(void);
  87. #endif /* __SH_INTC_H */