genx2apic_phys.c 5.1 KB

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  1. #include <linux/threads.h>
  2. #include <linux/cpumask.h>
  3. #include <linux/string.h>
  4. #include <linux/kernel.h>
  5. #include <linux/ctype.h>
  6. #include <linux/init.h>
  7. #include <linux/dmar.h>
  8. #include <asm/smp.h>
  9. #include <asm/ipi.h>
  10. #include <asm/genapic.h>
  11. static int x2apic_phys;
  12. static int set_x2apic_phys_mode(char *arg)
  13. {
  14. x2apic_phys = 1;
  15. return 0;
  16. }
  17. early_param("x2apic_phys", set_x2apic_phys_mode);
  18. static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  19. {
  20. if (cpu_has_x2apic && x2apic_phys)
  21. return 1;
  22. return 0;
  23. }
  24. /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */
  25. static const struct cpumask *x2apic_target_cpus(void)
  26. {
  27. return cpumask_of(0);
  28. }
  29. static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
  30. {
  31. cpumask_clear(retmask);
  32. cpumask_set_cpu(cpu, retmask);
  33. }
  34. static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
  35. unsigned int dest)
  36. {
  37. unsigned long cfg;
  38. cfg = __prepare_ICR(0, vector, dest);
  39. /*
  40. * send the IPI.
  41. */
  42. x2apic_icr_write(cfg, apicid);
  43. }
  44. static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
  45. {
  46. unsigned long flags;
  47. unsigned long query_cpu;
  48. local_irq_save(flags);
  49. for_each_cpu(query_cpu, mask) {
  50. __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
  51. vector, APIC_DEST_PHYSICAL);
  52. }
  53. local_irq_restore(flags);
  54. }
  55. static void x2apic_send_IPI_mask_allbutself(const struct cpumask *mask,
  56. int vector)
  57. {
  58. unsigned long flags;
  59. unsigned long query_cpu;
  60. unsigned long this_cpu = smp_processor_id();
  61. local_irq_save(flags);
  62. for_each_cpu(query_cpu, mask) {
  63. if (query_cpu != this_cpu)
  64. __x2apic_send_IPI_dest(
  65. per_cpu(x86_cpu_to_apicid, query_cpu),
  66. vector, APIC_DEST_PHYSICAL);
  67. }
  68. local_irq_restore(flags);
  69. }
  70. static void x2apic_send_IPI_allbutself(int vector)
  71. {
  72. unsigned long flags;
  73. unsigned long query_cpu;
  74. unsigned long this_cpu = smp_processor_id();
  75. local_irq_save(flags);
  76. for_each_online_cpu(query_cpu)
  77. if (query_cpu != this_cpu)
  78. __x2apic_send_IPI_dest(
  79. per_cpu(x86_cpu_to_apicid, query_cpu),
  80. vector, APIC_DEST_PHYSICAL);
  81. local_irq_restore(flags);
  82. }
  83. static void x2apic_send_IPI_all(int vector)
  84. {
  85. x2apic_send_IPI_mask(cpu_online_mask, vector);
  86. }
  87. static int x2apic_apic_id_registered(void)
  88. {
  89. return 1;
  90. }
  91. static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
  92. {
  93. /*
  94. * We're using fixed IRQ delivery, can only return one phys APIC ID.
  95. * May as well be the first.
  96. */
  97. int cpu = cpumask_first(cpumask);
  98. if ((unsigned)cpu < nr_cpu_ids)
  99. return per_cpu(x86_cpu_to_apicid, cpu);
  100. else
  101. return BAD_APICID;
  102. }
  103. static unsigned int
  104. x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
  105. const struct cpumask *andmask)
  106. {
  107. int cpu;
  108. /*
  109. * We're using fixed IRQ delivery, can only return one phys APIC ID.
  110. * May as well be the first.
  111. */
  112. for_each_cpu_and(cpu, cpumask, andmask) {
  113. if (cpumask_test_cpu(cpu, cpu_online_mask))
  114. break;
  115. }
  116. if (cpu < nr_cpu_ids)
  117. return per_cpu(x86_cpu_to_apicid, cpu);
  118. return BAD_APICID;
  119. }
  120. static unsigned int x2apic_phys_get_apic_id(unsigned long x)
  121. {
  122. unsigned int id;
  123. id = x;
  124. return id;
  125. }
  126. static unsigned long set_apic_id(unsigned int id)
  127. {
  128. unsigned long x;
  129. x = id;
  130. return x;
  131. }
  132. static int x2apic_phys_pkg_id(int initial_apicid, int index_msb)
  133. {
  134. return current_cpu_data.initial_apicid >> index_msb;
  135. }
  136. static void x2apic_send_IPI_self(int vector)
  137. {
  138. apic_write(APIC_SELF_IPI, vector);
  139. }
  140. static void init_x2apic_ldr(void)
  141. {
  142. return;
  143. }
  144. struct genapic apic_x2apic_phys = {
  145. .name = "physical x2apic",
  146. .probe = NULL,
  147. .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
  148. .apic_id_registered = x2apic_apic_id_registered,
  149. .irq_delivery_mode = dest_Fixed,
  150. .irq_dest_mode = 0, /* physical */
  151. .target_cpus = x2apic_target_cpus,
  152. .disable_esr = 0,
  153. .dest_logical = 0,
  154. .check_apicid_used = NULL,
  155. .check_apicid_present = NULL,
  156. .vector_allocation_domain = x2apic_vector_allocation_domain,
  157. .init_apic_ldr = init_x2apic_ldr,
  158. .ioapic_phys_id_map = NULL,
  159. .setup_apic_routing = NULL,
  160. .multi_timer_check = NULL,
  161. .apicid_to_node = NULL,
  162. .cpu_to_logical_apicid = NULL,
  163. .cpu_present_to_apicid = default_cpu_present_to_apicid,
  164. .apicid_to_cpu_present = NULL,
  165. .setup_portio_remap = NULL,
  166. .check_phys_apicid_present = default_check_phys_apicid_present,
  167. .enable_apic_mode = NULL,
  168. .phys_pkg_id = x2apic_phys_pkg_id,
  169. .mps_oem_check = NULL,
  170. .get_apic_id = x2apic_phys_get_apic_id,
  171. .set_apic_id = set_apic_id,
  172. .apic_id_mask = 0xFFFFFFFFu,
  173. .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
  174. .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
  175. .send_IPI_mask = x2apic_send_IPI_mask,
  176. .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
  177. .send_IPI_allbutself = x2apic_send_IPI_allbutself,
  178. .send_IPI_all = x2apic_send_IPI_all,
  179. .send_IPI_self = x2apic_send_IPI_self,
  180. .wakeup_cpu = NULL,
  181. .trampoline_phys_low = 0,
  182. .trampoline_phys_high = 0,
  183. .wait_for_init_deassert = NULL,
  184. .smp_callin_clear_local_apic = NULL,
  185. .store_NMI_vector = NULL,
  186. .restore_NMI_vector = NULL,
  187. .inquire_remote_apic = NULL,
  188. };