ymfpci_main.c 72 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Routines for control of YMF724/740/744/754 chips
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. *
  19. */
  20. #include <sound/driver.h>
  21. #include <linux/delay.h>
  22. #include <linux/firmware.h>
  23. #include <linux/init.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/pci.h>
  26. #include <linux/sched.h>
  27. #include <linux/slab.h>
  28. #include <linux/vmalloc.h>
  29. #include <sound/core.h>
  30. #include <sound/control.h>
  31. #include <sound/info.h>
  32. #include <sound/tlv.h>
  33. #include <sound/ymfpci.h>
  34. #include <sound/asoundef.h>
  35. #include <sound/mpu401.h>
  36. #include <asm/io.h>
  37. #include <asm/byteorder.h>
  38. /*
  39. * common I/O routines
  40. */
  41. static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
  42. static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
  43. {
  44. return readb(chip->reg_area_virt + offset);
  45. }
  46. static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
  47. {
  48. writeb(val, chip->reg_area_virt + offset);
  49. }
  50. static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
  51. {
  52. return readw(chip->reg_area_virt + offset);
  53. }
  54. static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
  55. {
  56. writew(val, chip->reg_area_virt + offset);
  57. }
  58. static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
  59. {
  60. return readl(chip->reg_area_virt + offset);
  61. }
  62. static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
  63. {
  64. writel(val, chip->reg_area_virt + offset);
  65. }
  66. static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
  67. {
  68. unsigned long end_time;
  69. u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
  70. end_time = jiffies + msecs_to_jiffies(750);
  71. do {
  72. if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
  73. return 0;
  74. set_current_state(TASK_UNINTERRUPTIBLE);
  75. schedule_timeout_uninterruptible(1);
  76. } while (time_before(jiffies, end_time));
  77. snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
  78. return -EBUSY;
  79. }
  80. static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
  81. {
  82. struct snd_ymfpci *chip = ac97->private_data;
  83. u32 cmd;
  84. snd_ymfpci_codec_ready(chip, 0);
  85. cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
  86. snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
  87. }
  88. static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
  89. {
  90. struct snd_ymfpci *chip = ac97->private_data;
  91. if (snd_ymfpci_codec_ready(chip, 0))
  92. return ~0;
  93. snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
  94. if (snd_ymfpci_codec_ready(chip, 0))
  95. return ~0;
  96. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
  97. int i;
  98. for (i = 0; i < 600; i++)
  99. snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
  100. }
  101. return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
  102. }
  103. /*
  104. * Misc routines
  105. */
  106. static u32 snd_ymfpci_calc_delta(u32 rate)
  107. {
  108. switch (rate) {
  109. case 8000: return 0x02aaab00;
  110. case 11025: return 0x03accd00;
  111. case 16000: return 0x05555500;
  112. case 22050: return 0x07599a00;
  113. case 32000: return 0x0aaaab00;
  114. case 44100: return 0x0eb33300;
  115. default: return ((rate << 16) / 375) << 5;
  116. }
  117. }
  118. static u32 def_rate[8] = {
  119. 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
  120. };
  121. static u32 snd_ymfpci_calc_lpfK(u32 rate)
  122. {
  123. u32 i;
  124. static u32 val[8] = {
  125. 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
  126. 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
  127. };
  128. if (rate == 44100)
  129. return 0x40000000; /* FIXME: What's the right value? */
  130. for (i = 0; i < 8; i++)
  131. if (rate <= def_rate[i])
  132. return val[i];
  133. return val[0];
  134. }
  135. static u32 snd_ymfpci_calc_lpfQ(u32 rate)
  136. {
  137. u32 i;
  138. static u32 val[8] = {
  139. 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
  140. 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
  141. };
  142. if (rate == 44100)
  143. return 0x370A0000;
  144. for (i = 0; i < 8; i++)
  145. if (rate <= def_rate[i])
  146. return val[i];
  147. return val[0];
  148. }
  149. static void snd_ymfpci_pcm_441_volume_set(struct snd_ymfpci_pcm *ypcm)
  150. {
  151. unsigned int value;
  152. struct snd_ymfpci_pcm_mixer *mixer;
  153. mixer = &ypcm->chip->pcm_mixer[ypcm->substream->number];
  154. value = min_t(unsigned int, mixer->left, 0x7fff) >> 1;
  155. value |= (min_t(unsigned int, mixer->right, 0x7fff) >> 1) << 16;
  156. snd_ymfpci_writel(ypcm->chip, YDSXGR_BUF441OUTVOL, value);
  157. }
  158. /*
  159. * Hardware start management
  160. */
  161. static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
  162. {
  163. unsigned long flags;
  164. spin_lock_irqsave(&chip->reg_lock, flags);
  165. if (chip->start_count++ > 0)
  166. goto __end;
  167. snd_ymfpci_writel(chip, YDSXGR_MODE,
  168. snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
  169. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
  170. __end:
  171. spin_unlock_irqrestore(&chip->reg_lock, flags);
  172. }
  173. static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
  174. {
  175. unsigned long flags;
  176. long timeout = 1000;
  177. spin_lock_irqsave(&chip->reg_lock, flags);
  178. if (--chip->start_count > 0)
  179. goto __end;
  180. snd_ymfpci_writel(chip, YDSXGR_MODE,
  181. snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
  182. while (timeout-- > 0) {
  183. if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
  184. break;
  185. }
  186. if (atomic_read(&chip->interrupt_sleep_count)) {
  187. atomic_set(&chip->interrupt_sleep_count, 0);
  188. wake_up(&chip->interrupt_sleep);
  189. }
  190. __end:
  191. spin_unlock_irqrestore(&chip->reg_lock, flags);
  192. }
  193. /*
  194. * Playback voice management
  195. */
  196. static int voice_alloc(struct snd_ymfpci *chip,
  197. enum snd_ymfpci_voice_type type, int pair,
  198. struct snd_ymfpci_voice **rvoice)
  199. {
  200. struct snd_ymfpci_voice *voice, *voice2;
  201. int idx;
  202. *rvoice = NULL;
  203. for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
  204. voice = &chip->voices[idx];
  205. voice2 = pair ? &chip->voices[idx+1] : NULL;
  206. if (voice->use || (voice2 && voice2->use))
  207. continue;
  208. voice->use = 1;
  209. if (voice2)
  210. voice2->use = 1;
  211. switch (type) {
  212. case YMFPCI_PCM:
  213. voice->pcm = 1;
  214. if (voice2)
  215. voice2->pcm = 1;
  216. break;
  217. case YMFPCI_SYNTH:
  218. voice->synth = 1;
  219. break;
  220. case YMFPCI_MIDI:
  221. voice->midi = 1;
  222. break;
  223. }
  224. snd_ymfpci_hw_start(chip);
  225. if (voice2)
  226. snd_ymfpci_hw_start(chip);
  227. *rvoice = voice;
  228. return 0;
  229. }
  230. return -ENOMEM;
  231. }
  232. static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
  233. enum snd_ymfpci_voice_type type, int pair,
  234. struct snd_ymfpci_voice **rvoice)
  235. {
  236. unsigned long flags;
  237. int result;
  238. snd_assert(rvoice != NULL, return -EINVAL);
  239. snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL);
  240. spin_lock_irqsave(&chip->voice_lock, flags);
  241. for (;;) {
  242. result = voice_alloc(chip, type, pair, rvoice);
  243. if (result == 0 || type != YMFPCI_PCM)
  244. break;
  245. /* TODO: synth/midi voice deallocation */
  246. break;
  247. }
  248. spin_unlock_irqrestore(&chip->voice_lock, flags);
  249. return result;
  250. }
  251. static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
  252. {
  253. unsigned long flags;
  254. snd_assert(pvoice != NULL, return -EINVAL);
  255. snd_ymfpci_hw_stop(chip);
  256. spin_lock_irqsave(&chip->voice_lock, flags);
  257. if (pvoice->number == chip->src441_used) {
  258. chip->src441_used = -1;
  259. pvoice->ypcm->use_441_slot = 0;
  260. }
  261. pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
  262. pvoice->ypcm = NULL;
  263. pvoice->interrupt = NULL;
  264. spin_unlock_irqrestore(&chip->voice_lock, flags);
  265. return 0;
  266. }
  267. /*
  268. * PCM part
  269. */
  270. static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
  271. {
  272. struct snd_ymfpci_pcm *ypcm;
  273. u32 pos, delta;
  274. if ((ypcm = voice->ypcm) == NULL)
  275. return;
  276. if (ypcm->substream == NULL)
  277. return;
  278. spin_lock(&chip->reg_lock);
  279. if (ypcm->running) {
  280. pos = le32_to_cpu(voice->bank[chip->active_bank].start);
  281. if (pos < ypcm->last_pos)
  282. delta = pos + (ypcm->buffer_size - ypcm->last_pos);
  283. else
  284. delta = pos - ypcm->last_pos;
  285. ypcm->period_pos += delta;
  286. ypcm->last_pos = pos;
  287. if (ypcm->period_pos >= ypcm->period_size) {
  288. // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
  289. ypcm->period_pos %= ypcm->period_size;
  290. spin_unlock(&chip->reg_lock);
  291. snd_pcm_period_elapsed(ypcm->substream);
  292. spin_lock(&chip->reg_lock);
  293. }
  294. if (unlikely(ypcm->update_pcm_vol)) {
  295. unsigned int subs = ypcm->substream->number;
  296. unsigned int next_bank = 1 - chip->active_bank;
  297. struct snd_ymfpci_playback_bank *bank;
  298. u32 volume;
  299. bank = &voice->bank[next_bank];
  300. volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
  301. bank->left_gain_end = volume;
  302. if (ypcm->output_rear)
  303. bank->eff2_gain_end = volume;
  304. if (ypcm->voices[1])
  305. bank = &ypcm->voices[1]->bank[next_bank];
  306. volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
  307. bank->right_gain_end = volume;
  308. if (ypcm->output_rear)
  309. bank->eff3_gain_end = volume;
  310. ypcm->update_pcm_vol--;
  311. }
  312. }
  313. spin_unlock(&chip->reg_lock);
  314. }
  315. static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
  316. {
  317. struct snd_pcm_runtime *runtime = substream->runtime;
  318. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  319. struct snd_ymfpci *chip = ypcm->chip;
  320. u32 pos, delta;
  321. spin_lock(&chip->reg_lock);
  322. if (ypcm->running) {
  323. pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
  324. if (pos < ypcm->last_pos)
  325. delta = pos + (ypcm->buffer_size - ypcm->last_pos);
  326. else
  327. delta = pos - ypcm->last_pos;
  328. ypcm->period_pos += delta;
  329. ypcm->last_pos = pos;
  330. if (ypcm->period_pos >= ypcm->period_size) {
  331. ypcm->period_pos %= ypcm->period_size;
  332. // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
  333. spin_unlock(&chip->reg_lock);
  334. snd_pcm_period_elapsed(substream);
  335. spin_lock(&chip->reg_lock);
  336. }
  337. }
  338. spin_unlock(&chip->reg_lock);
  339. }
  340. static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
  341. int cmd)
  342. {
  343. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  344. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  345. int result = 0;
  346. spin_lock(&chip->reg_lock);
  347. if (ypcm->voices[0] == NULL) {
  348. result = -EINVAL;
  349. goto __unlock;
  350. }
  351. switch (cmd) {
  352. case SNDRV_PCM_TRIGGER_START:
  353. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  354. case SNDRV_PCM_TRIGGER_RESUME:
  355. chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
  356. if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
  357. chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
  358. ypcm->running = 1;
  359. break;
  360. case SNDRV_PCM_TRIGGER_STOP:
  361. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  362. case SNDRV_PCM_TRIGGER_SUSPEND:
  363. chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
  364. if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
  365. chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
  366. ypcm->running = 0;
  367. break;
  368. default:
  369. result = -EINVAL;
  370. break;
  371. }
  372. __unlock:
  373. spin_unlock(&chip->reg_lock);
  374. return result;
  375. }
  376. static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
  377. int cmd)
  378. {
  379. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  380. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  381. int result = 0;
  382. u32 tmp;
  383. spin_lock(&chip->reg_lock);
  384. switch (cmd) {
  385. case SNDRV_PCM_TRIGGER_START:
  386. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  387. case SNDRV_PCM_TRIGGER_RESUME:
  388. tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
  389. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
  390. ypcm->running = 1;
  391. break;
  392. case SNDRV_PCM_TRIGGER_STOP:
  393. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  394. case SNDRV_PCM_TRIGGER_SUSPEND:
  395. tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
  396. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
  397. ypcm->running = 0;
  398. break;
  399. default:
  400. result = -EINVAL;
  401. break;
  402. }
  403. spin_unlock(&chip->reg_lock);
  404. return result;
  405. }
  406. static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
  407. {
  408. int err;
  409. if (ypcm->voices[1] != NULL && voices < 2) {
  410. snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
  411. ypcm->voices[1] = NULL;
  412. }
  413. if (voices == 1 && ypcm->voices[0] != NULL)
  414. return 0; /* already allocated */
  415. if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
  416. return 0; /* already allocated */
  417. if (voices > 1) {
  418. if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
  419. snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
  420. ypcm->voices[0] = NULL;
  421. }
  422. }
  423. err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
  424. if (err < 0)
  425. return err;
  426. ypcm->voices[0]->ypcm = ypcm;
  427. ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
  428. if (voices > 1) {
  429. ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
  430. ypcm->voices[1]->ypcm = ypcm;
  431. }
  432. return 0;
  433. }
  434. static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
  435. struct snd_pcm_runtime *runtime,
  436. int has_pcm_volume)
  437. {
  438. struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
  439. u32 format;
  440. u32 delta = snd_ymfpci_calc_delta(runtime->rate);
  441. u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
  442. u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
  443. struct snd_ymfpci_playback_bank *bank;
  444. unsigned int nbank;
  445. u32 vol_left, vol_right;
  446. u8 use_left, use_right;
  447. unsigned long flags;
  448. snd_assert(voice != NULL, return);
  449. if (runtime->channels == 1) {
  450. use_left = 1;
  451. use_right = 1;
  452. } else {
  453. use_left = (voiceidx & 1) == 0;
  454. use_right = !use_left;
  455. }
  456. if (has_pcm_volume) {
  457. vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
  458. [ypcm->substream->number].left << 15);
  459. vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
  460. [ypcm->substream->number].right << 15);
  461. } else {
  462. vol_left = cpu_to_le32(0x40000000);
  463. vol_right = cpu_to_le32(0x40000000);
  464. }
  465. spin_lock_irqsave(&ypcm->chip->voice_lock, flags);
  466. format = runtime->channels == 2 ? 0x00010000 : 0;
  467. if (snd_pcm_format_width(runtime->format) == 8)
  468. format |= 0x80000000;
  469. else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
  470. runtime->rate == 44100 && runtime->channels == 2 &&
  471. voiceidx == 0 && (ypcm->chip->src441_used == -1 ||
  472. ypcm->chip->src441_used == voice->number)) {
  473. ypcm->chip->src441_used = voice->number;
  474. ypcm->use_441_slot = 1;
  475. format |= 0x10000000;
  476. snd_ymfpci_pcm_441_volume_set(ypcm);
  477. }
  478. if (ypcm->chip->src441_used == voice->number &&
  479. (format & 0x10000000) == 0) {
  480. ypcm->chip->src441_used = -1;
  481. ypcm->use_441_slot = 0;
  482. }
  483. if (runtime->channels == 2 && (voiceidx & 1) != 0)
  484. format |= 1;
  485. spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags);
  486. for (nbank = 0; nbank < 2; nbank++) {
  487. bank = &voice->bank[nbank];
  488. memset(bank, 0, sizeof(*bank));
  489. bank->format = cpu_to_le32(format);
  490. bank->base = cpu_to_le32(runtime->dma_addr);
  491. bank->loop_end = cpu_to_le32(ypcm->buffer_size);
  492. bank->lpfQ = cpu_to_le32(lpfQ);
  493. bank->delta =
  494. bank->delta_end = cpu_to_le32(delta);
  495. bank->lpfK =
  496. bank->lpfK_end = cpu_to_le32(lpfK);
  497. bank->eg_gain =
  498. bank->eg_gain_end = cpu_to_le32(0x40000000);
  499. if (ypcm->output_front) {
  500. if (use_left) {
  501. bank->left_gain =
  502. bank->left_gain_end = vol_left;
  503. }
  504. if (use_right) {
  505. bank->right_gain =
  506. bank->right_gain_end = vol_right;
  507. }
  508. }
  509. if (ypcm->output_rear) {
  510. if (!ypcm->swap_rear) {
  511. if (use_left) {
  512. bank->eff2_gain =
  513. bank->eff2_gain_end = vol_left;
  514. }
  515. if (use_right) {
  516. bank->eff3_gain =
  517. bank->eff3_gain_end = vol_right;
  518. }
  519. } else {
  520. /* The SPDIF out channels seem to be swapped, so we have
  521. * to swap them here, too. The rear analog out channels
  522. * will be wrong, but otherwise AC3 would not work.
  523. */
  524. if (use_left) {
  525. bank->eff3_gain =
  526. bank->eff3_gain_end = vol_left;
  527. }
  528. if (use_right) {
  529. bank->eff2_gain =
  530. bank->eff2_gain_end = vol_right;
  531. }
  532. }
  533. }
  534. }
  535. }
  536. static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
  537. {
  538. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  539. 4096, &chip->ac3_tmp_base) < 0)
  540. return -ENOMEM;
  541. chip->bank_effect[3][0]->base =
  542. chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
  543. chip->bank_effect[3][0]->loop_end =
  544. chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
  545. chip->bank_effect[4][0]->base =
  546. chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
  547. chip->bank_effect[4][0]->loop_end =
  548. chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
  549. spin_lock_irq(&chip->reg_lock);
  550. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
  551. snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
  552. spin_unlock_irq(&chip->reg_lock);
  553. return 0;
  554. }
  555. static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
  556. {
  557. spin_lock_irq(&chip->reg_lock);
  558. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
  559. snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
  560. spin_unlock_irq(&chip->reg_lock);
  561. // snd_ymfpci_irq_wait(chip);
  562. if (chip->ac3_tmp_base.area) {
  563. snd_dma_free_pages(&chip->ac3_tmp_base);
  564. chip->ac3_tmp_base.area = NULL;
  565. }
  566. return 0;
  567. }
  568. static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
  569. struct snd_pcm_hw_params *hw_params)
  570. {
  571. struct snd_pcm_runtime *runtime = substream->runtime;
  572. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  573. int err;
  574. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  575. return err;
  576. if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
  577. return err;
  578. return 0;
  579. }
  580. static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
  581. {
  582. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  583. struct snd_pcm_runtime *runtime = substream->runtime;
  584. struct snd_ymfpci_pcm *ypcm;
  585. if (runtime->private_data == NULL)
  586. return 0;
  587. ypcm = runtime->private_data;
  588. /* wait, until the PCI operations are not finished */
  589. snd_ymfpci_irq_wait(chip);
  590. snd_pcm_lib_free_pages(substream);
  591. if (ypcm->voices[1]) {
  592. snd_ymfpci_voice_free(chip, ypcm->voices[1]);
  593. ypcm->voices[1] = NULL;
  594. }
  595. if (ypcm->voices[0]) {
  596. snd_ymfpci_voice_free(chip, ypcm->voices[0]);
  597. ypcm->voices[0] = NULL;
  598. }
  599. return 0;
  600. }
  601. static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
  602. {
  603. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  604. struct snd_pcm_runtime *runtime = substream->runtime;
  605. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  606. unsigned int nvoice;
  607. ypcm->period_size = runtime->period_size;
  608. ypcm->buffer_size = runtime->buffer_size;
  609. ypcm->period_pos = 0;
  610. ypcm->last_pos = 0;
  611. for (nvoice = 0; nvoice < runtime->channels; nvoice++)
  612. snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
  613. substream->pcm == chip->pcm);
  614. return 0;
  615. }
  616. static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
  617. struct snd_pcm_hw_params *hw_params)
  618. {
  619. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  620. }
  621. static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
  622. {
  623. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  624. /* wait, until the PCI operations are not finished */
  625. snd_ymfpci_irq_wait(chip);
  626. return snd_pcm_lib_free_pages(substream);
  627. }
  628. static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
  629. {
  630. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  631. struct snd_pcm_runtime *runtime = substream->runtime;
  632. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  633. struct snd_ymfpci_capture_bank * bank;
  634. int nbank;
  635. u32 rate, format;
  636. ypcm->period_size = runtime->period_size;
  637. ypcm->buffer_size = runtime->buffer_size;
  638. ypcm->period_pos = 0;
  639. ypcm->last_pos = 0;
  640. ypcm->shift = 0;
  641. rate = ((48000 * 4096) / runtime->rate) - 1;
  642. format = 0;
  643. if (runtime->channels == 2) {
  644. format |= 2;
  645. ypcm->shift++;
  646. }
  647. if (snd_pcm_format_width(runtime->format) == 8)
  648. format |= 1;
  649. else
  650. ypcm->shift++;
  651. switch (ypcm->capture_bank_number) {
  652. case 0:
  653. snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
  654. snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
  655. break;
  656. case 1:
  657. snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
  658. snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
  659. break;
  660. }
  661. for (nbank = 0; nbank < 2; nbank++) {
  662. bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
  663. bank->base = cpu_to_le32(runtime->dma_addr);
  664. bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
  665. bank->start = 0;
  666. bank->num_of_loops = 0;
  667. }
  668. return 0;
  669. }
  670. static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
  671. {
  672. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  673. struct snd_pcm_runtime *runtime = substream->runtime;
  674. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  675. struct snd_ymfpci_voice *voice = ypcm->voices[0];
  676. if (!(ypcm->running && voice))
  677. return 0;
  678. return le32_to_cpu(voice->bank[chip->active_bank].start);
  679. }
  680. static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
  681. {
  682. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  683. struct snd_pcm_runtime *runtime = substream->runtime;
  684. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  685. if (!ypcm->running)
  686. return 0;
  687. return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
  688. }
  689. static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
  690. {
  691. wait_queue_t wait;
  692. int loops = 4;
  693. while (loops-- > 0) {
  694. if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
  695. continue;
  696. init_waitqueue_entry(&wait, current);
  697. add_wait_queue(&chip->interrupt_sleep, &wait);
  698. atomic_inc(&chip->interrupt_sleep_count);
  699. schedule_timeout_uninterruptible(msecs_to_jiffies(50));
  700. remove_wait_queue(&chip->interrupt_sleep, &wait);
  701. }
  702. }
  703. static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
  704. {
  705. struct snd_ymfpci *chip = dev_id;
  706. u32 status, nvoice, mode;
  707. struct snd_ymfpci_voice *voice;
  708. status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
  709. if (status & 0x80000000) {
  710. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
  711. spin_lock(&chip->voice_lock);
  712. for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
  713. voice = &chip->voices[nvoice];
  714. if (voice->interrupt)
  715. voice->interrupt(chip, voice);
  716. }
  717. for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
  718. if (chip->capture_substream[nvoice])
  719. snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
  720. }
  721. #if 0
  722. for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
  723. if (chip->effect_substream[nvoice])
  724. snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
  725. }
  726. #endif
  727. spin_unlock(&chip->voice_lock);
  728. spin_lock(&chip->reg_lock);
  729. snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
  730. mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
  731. snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
  732. spin_unlock(&chip->reg_lock);
  733. if (atomic_read(&chip->interrupt_sleep_count)) {
  734. atomic_set(&chip->interrupt_sleep_count, 0);
  735. wake_up(&chip->interrupt_sleep);
  736. }
  737. }
  738. status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
  739. if (status & 1) {
  740. if (chip->timer)
  741. snd_timer_interrupt(chip->timer, chip->timer->sticks);
  742. }
  743. snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
  744. if (chip->rawmidi)
  745. snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
  746. return IRQ_HANDLED;
  747. }
  748. static struct snd_pcm_hardware snd_ymfpci_playback =
  749. {
  750. .info = (SNDRV_PCM_INFO_MMAP |
  751. SNDRV_PCM_INFO_MMAP_VALID |
  752. SNDRV_PCM_INFO_INTERLEAVED |
  753. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  754. SNDRV_PCM_INFO_PAUSE |
  755. SNDRV_PCM_INFO_RESUME),
  756. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  757. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  758. .rate_min = 8000,
  759. .rate_max = 48000,
  760. .channels_min = 1,
  761. .channels_max = 2,
  762. .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
  763. .period_bytes_min = 64,
  764. .period_bytes_max = 256 * 1024, /* FIXME: enough? */
  765. .periods_min = 3,
  766. .periods_max = 1024,
  767. .fifo_size = 0,
  768. };
  769. static struct snd_pcm_hardware snd_ymfpci_capture =
  770. {
  771. .info = (SNDRV_PCM_INFO_MMAP |
  772. SNDRV_PCM_INFO_MMAP_VALID |
  773. SNDRV_PCM_INFO_INTERLEAVED |
  774. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  775. SNDRV_PCM_INFO_PAUSE |
  776. SNDRV_PCM_INFO_RESUME),
  777. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  778. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  779. .rate_min = 8000,
  780. .rate_max = 48000,
  781. .channels_min = 1,
  782. .channels_max = 2,
  783. .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
  784. .period_bytes_min = 64,
  785. .period_bytes_max = 256 * 1024, /* FIXME: enough? */
  786. .periods_min = 3,
  787. .periods_max = 1024,
  788. .fifo_size = 0,
  789. };
  790. static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
  791. {
  792. kfree(runtime->private_data);
  793. }
  794. static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
  795. {
  796. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  797. struct snd_pcm_runtime *runtime = substream->runtime;
  798. struct snd_ymfpci_pcm *ypcm;
  799. ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
  800. if (ypcm == NULL)
  801. return -ENOMEM;
  802. ypcm->chip = chip;
  803. ypcm->type = PLAYBACK_VOICE;
  804. ypcm->substream = substream;
  805. runtime->hw = snd_ymfpci_playback;
  806. runtime->private_data = ypcm;
  807. runtime->private_free = snd_ymfpci_pcm_free_substream;
  808. /* FIXME? True value is 256/48 = 5.33333 ms */
  809. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
  810. return 0;
  811. }
  812. /* call with spinlock held */
  813. static void ymfpci_open_extension(struct snd_ymfpci *chip)
  814. {
  815. if (! chip->rear_opened) {
  816. if (! chip->spdif_opened) /* set AC3 */
  817. snd_ymfpci_writel(chip, YDSXGR_MODE,
  818. snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
  819. /* enable second codec (4CHEN) */
  820. snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
  821. (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
  822. }
  823. }
  824. /* call with spinlock held */
  825. static void ymfpci_close_extension(struct snd_ymfpci *chip)
  826. {
  827. if (! chip->rear_opened) {
  828. if (! chip->spdif_opened)
  829. snd_ymfpci_writel(chip, YDSXGR_MODE,
  830. snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
  831. snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
  832. (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
  833. }
  834. }
  835. static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
  836. {
  837. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  838. struct snd_pcm_runtime *runtime = substream->runtime;
  839. struct snd_ymfpci_pcm *ypcm;
  840. struct snd_kcontrol *kctl;
  841. int err;
  842. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  843. return err;
  844. ypcm = runtime->private_data;
  845. ypcm->output_front = 1;
  846. ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
  847. ypcm->swap_rear = 0;
  848. spin_lock_irq(&chip->reg_lock);
  849. if (ypcm->output_rear) {
  850. ymfpci_open_extension(chip);
  851. chip->rear_opened++;
  852. }
  853. spin_unlock_irq(&chip->reg_lock);
  854. kctl = chip->pcm_mixer[substream->number].ctl;
  855. kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  856. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
  857. return 0;
  858. }
  859. static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
  860. {
  861. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  862. struct snd_pcm_runtime *runtime = substream->runtime;
  863. struct snd_ymfpci_pcm *ypcm;
  864. int err;
  865. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  866. return err;
  867. ypcm = runtime->private_data;
  868. ypcm->output_front = 0;
  869. ypcm->output_rear = 1;
  870. ypcm->swap_rear = 1;
  871. spin_lock_irq(&chip->reg_lock);
  872. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
  873. snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
  874. ymfpci_open_extension(chip);
  875. chip->spdif_pcm_bits = chip->spdif_bits;
  876. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
  877. chip->spdif_opened++;
  878. spin_unlock_irq(&chip->reg_lock);
  879. chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  880. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  881. SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
  882. return 0;
  883. }
  884. static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
  885. {
  886. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  887. struct snd_pcm_runtime *runtime = substream->runtime;
  888. struct snd_ymfpci_pcm *ypcm;
  889. int err;
  890. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  891. return err;
  892. ypcm = runtime->private_data;
  893. ypcm->output_front = 0;
  894. ypcm->output_rear = 1;
  895. ypcm->swap_rear = 0;
  896. spin_lock_irq(&chip->reg_lock);
  897. ymfpci_open_extension(chip);
  898. chip->rear_opened++;
  899. spin_unlock_irq(&chip->reg_lock);
  900. return 0;
  901. }
  902. static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
  903. u32 capture_bank_number)
  904. {
  905. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  906. struct snd_pcm_runtime *runtime = substream->runtime;
  907. struct snd_ymfpci_pcm *ypcm;
  908. ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
  909. if (ypcm == NULL)
  910. return -ENOMEM;
  911. ypcm->chip = chip;
  912. ypcm->type = capture_bank_number + CAPTURE_REC;
  913. ypcm->substream = substream;
  914. ypcm->capture_bank_number = capture_bank_number;
  915. chip->capture_substream[capture_bank_number] = substream;
  916. runtime->hw = snd_ymfpci_capture;
  917. /* FIXME? True value is 256/48 = 5.33333 ms */
  918. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
  919. runtime->private_data = ypcm;
  920. runtime->private_free = snd_ymfpci_pcm_free_substream;
  921. snd_ymfpci_hw_start(chip);
  922. return 0;
  923. }
  924. static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
  925. {
  926. return snd_ymfpci_capture_open(substream, 0);
  927. }
  928. static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
  929. {
  930. return snd_ymfpci_capture_open(substream, 1);
  931. }
  932. static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
  933. {
  934. return 0;
  935. }
  936. static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
  937. {
  938. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  939. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  940. struct snd_kcontrol *kctl;
  941. spin_lock_irq(&chip->reg_lock);
  942. if (ypcm->output_rear && chip->rear_opened > 0) {
  943. chip->rear_opened--;
  944. ymfpci_close_extension(chip);
  945. }
  946. spin_unlock_irq(&chip->reg_lock);
  947. kctl = chip->pcm_mixer[substream->number].ctl;
  948. kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  949. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
  950. return snd_ymfpci_playback_close_1(substream);
  951. }
  952. static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
  953. {
  954. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  955. spin_lock_irq(&chip->reg_lock);
  956. chip->spdif_opened = 0;
  957. ymfpci_close_extension(chip);
  958. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
  959. snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
  960. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  961. spin_unlock_irq(&chip->reg_lock);
  962. chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  963. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  964. SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
  965. return snd_ymfpci_playback_close_1(substream);
  966. }
  967. static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
  968. {
  969. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  970. spin_lock_irq(&chip->reg_lock);
  971. if (chip->rear_opened > 0) {
  972. chip->rear_opened--;
  973. ymfpci_close_extension(chip);
  974. }
  975. spin_unlock_irq(&chip->reg_lock);
  976. return snd_ymfpci_playback_close_1(substream);
  977. }
  978. static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
  979. {
  980. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  981. struct snd_pcm_runtime *runtime = substream->runtime;
  982. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  983. if (ypcm != NULL) {
  984. chip->capture_substream[ypcm->capture_bank_number] = NULL;
  985. snd_ymfpci_hw_stop(chip);
  986. }
  987. return 0;
  988. }
  989. static struct snd_pcm_ops snd_ymfpci_playback_ops = {
  990. .open = snd_ymfpci_playback_open,
  991. .close = snd_ymfpci_playback_close,
  992. .ioctl = snd_pcm_lib_ioctl,
  993. .hw_params = snd_ymfpci_playback_hw_params,
  994. .hw_free = snd_ymfpci_playback_hw_free,
  995. .prepare = snd_ymfpci_playback_prepare,
  996. .trigger = snd_ymfpci_playback_trigger,
  997. .pointer = snd_ymfpci_playback_pointer,
  998. };
  999. static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
  1000. .open = snd_ymfpci_capture_rec_open,
  1001. .close = snd_ymfpci_capture_close,
  1002. .ioctl = snd_pcm_lib_ioctl,
  1003. .hw_params = snd_ymfpci_capture_hw_params,
  1004. .hw_free = snd_ymfpci_capture_hw_free,
  1005. .prepare = snd_ymfpci_capture_prepare,
  1006. .trigger = snd_ymfpci_capture_trigger,
  1007. .pointer = snd_ymfpci_capture_pointer,
  1008. };
  1009. int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1010. {
  1011. struct snd_pcm *pcm;
  1012. int err;
  1013. if (rpcm)
  1014. *rpcm = NULL;
  1015. if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
  1016. return err;
  1017. pcm->private_data = chip;
  1018. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
  1019. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
  1020. /* global setup */
  1021. pcm->info_flags = 0;
  1022. strcpy(pcm->name, "YMFPCI");
  1023. chip->pcm = pcm;
  1024. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1025. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1026. if (rpcm)
  1027. *rpcm = pcm;
  1028. return 0;
  1029. }
  1030. static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
  1031. .open = snd_ymfpci_capture_ac97_open,
  1032. .close = snd_ymfpci_capture_close,
  1033. .ioctl = snd_pcm_lib_ioctl,
  1034. .hw_params = snd_ymfpci_capture_hw_params,
  1035. .hw_free = snd_ymfpci_capture_hw_free,
  1036. .prepare = snd_ymfpci_capture_prepare,
  1037. .trigger = snd_ymfpci_capture_trigger,
  1038. .pointer = snd_ymfpci_capture_pointer,
  1039. };
  1040. int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1041. {
  1042. struct snd_pcm *pcm;
  1043. int err;
  1044. if (rpcm)
  1045. *rpcm = NULL;
  1046. if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
  1047. return err;
  1048. pcm->private_data = chip;
  1049. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
  1050. /* global setup */
  1051. pcm->info_flags = 0;
  1052. sprintf(pcm->name, "YMFPCI - %s",
  1053. chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
  1054. chip->pcm2 = pcm;
  1055. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1056. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1057. if (rpcm)
  1058. *rpcm = pcm;
  1059. return 0;
  1060. }
  1061. static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
  1062. .open = snd_ymfpci_playback_spdif_open,
  1063. .close = snd_ymfpci_playback_spdif_close,
  1064. .ioctl = snd_pcm_lib_ioctl,
  1065. .hw_params = snd_ymfpci_playback_hw_params,
  1066. .hw_free = snd_ymfpci_playback_hw_free,
  1067. .prepare = snd_ymfpci_playback_prepare,
  1068. .trigger = snd_ymfpci_playback_trigger,
  1069. .pointer = snd_ymfpci_playback_pointer,
  1070. };
  1071. int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1072. {
  1073. struct snd_pcm *pcm;
  1074. int err;
  1075. if (rpcm)
  1076. *rpcm = NULL;
  1077. if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
  1078. return err;
  1079. pcm->private_data = chip;
  1080. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
  1081. /* global setup */
  1082. pcm->info_flags = 0;
  1083. strcpy(pcm->name, "YMFPCI - IEC958");
  1084. chip->pcm_spdif = pcm;
  1085. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1086. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1087. if (rpcm)
  1088. *rpcm = pcm;
  1089. return 0;
  1090. }
  1091. static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
  1092. .open = snd_ymfpci_playback_4ch_open,
  1093. .close = snd_ymfpci_playback_4ch_close,
  1094. .ioctl = snd_pcm_lib_ioctl,
  1095. .hw_params = snd_ymfpci_playback_hw_params,
  1096. .hw_free = snd_ymfpci_playback_hw_free,
  1097. .prepare = snd_ymfpci_playback_prepare,
  1098. .trigger = snd_ymfpci_playback_trigger,
  1099. .pointer = snd_ymfpci_playback_pointer,
  1100. };
  1101. int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1102. {
  1103. struct snd_pcm *pcm;
  1104. int err;
  1105. if (rpcm)
  1106. *rpcm = NULL;
  1107. if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
  1108. return err;
  1109. pcm->private_data = chip;
  1110. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
  1111. /* global setup */
  1112. pcm->info_flags = 0;
  1113. strcpy(pcm->name, "YMFPCI - Rear PCM");
  1114. chip->pcm_4ch = pcm;
  1115. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1116. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1117. if (rpcm)
  1118. *rpcm = pcm;
  1119. return 0;
  1120. }
  1121. static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1122. {
  1123. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1124. uinfo->count = 1;
  1125. return 0;
  1126. }
  1127. static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
  1128. struct snd_ctl_elem_value *ucontrol)
  1129. {
  1130. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1131. spin_lock_irq(&chip->reg_lock);
  1132. ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
  1133. ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
  1134. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
  1135. spin_unlock_irq(&chip->reg_lock);
  1136. return 0;
  1137. }
  1138. static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
  1139. struct snd_ctl_elem_value *ucontrol)
  1140. {
  1141. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1142. unsigned int val;
  1143. int change;
  1144. val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
  1145. (ucontrol->value.iec958.status[1] << 8);
  1146. spin_lock_irq(&chip->reg_lock);
  1147. change = chip->spdif_bits != val;
  1148. chip->spdif_bits = val;
  1149. if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
  1150. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  1151. spin_unlock_irq(&chip->reg_lock);
  1152. return change;
  1153. }
  1154. static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata =
  1155. {
  1156. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1157. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1158. .info = snd_ymfpci_spdif_default_info,
  1159. .get = snd_ymfpci_spdif_default_get,
  1160. .put = snd_ymfpci_spdif_default_put
  1161. };
  1162. static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1163. {
  1164. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1165. uinfo->count = 1;
  1166. return 0;
  1167. }
  1168. static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
  1169. struct snd_ctl_elem_value *ucontrol)
  1170. {
  1171. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1172. spin_lock_irq(&chip->reg_lock);
  1173. ucontrol->value.iec958.status[0] = 0x3e;
  1174. ucontrol->value.iec958.status[1] = 0xff;
  1175. spin_unlock_irq(&chip->reg_lock);
  1176. return 0;
  1177. }
  1178. static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata =
  1179. {
  1180. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1181. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1182. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1183. .info = snd_ymfpci_spdif_mask_info,
  1184. .get = snd_ymfpci_spdif_mask_get,
  1185. };
  1186. static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1187. {
  1188. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1189. uinfo->count = 1;
  1190. return 0;
  1191. }
  1192. static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
  1193. struct snd_ctl_elem_value *ucontrol)
  1194. {
  1195. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1196. spin_lock_irq(&chip->reg_lock);
  1197. ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
  1198. ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
  1199. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
  1200. spin_unlock_irq(&chip->reg_lock);
  1201. return 0;
  1202. }
  1203. static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
  1204. struct snd_ctl_elem_value *ucontrol)
  1205. {
  1206. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1207. unsigned int val;
  1208. int change;
  1209. val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
  1210. (ucontrol->value.iec958.status[1] << 8);
  1211. spin_lock_irq(&chip->reg_lock);
  1212. change = chip->spdif_pcm_bits != val;
  1213. chip->spdif_pcm_bits = val;
  1214. if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
  1215. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
  1216. spin_unlock_irq(&chip->reg_lock);
  1217. return change;
  1218. }
  1219. static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata =
  1220. {
  1221. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1222. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1223. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  1224. .info = snd_ymfpci_spdif_stream_info,
  1225. .get = snd_ymfpci_spdif_stream_get,
  1226. .put = snd_ymfpci_spdif_stream_put
  1227. };
  1228. static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
  1229. {
  1230. static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
  1231. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1232. info->count = 1;
  1233. info->value.enumerated.items = 3;
  1234. if (info->value.enumerated.item > 2)
  1235. info->value.enumerated.item = 2;
  1236. strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
  1237. return 0;
  1238. }
  1239. static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
  1240. {
  1241. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1242. u16 reg;
  1243. spin_lock_irq(&chip->reg_lock);
  1244. reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1245. spin_unlock_irq(&chip->reg_lock);
  1246. if (!(reg & 0x100))
  1247. value->value.enumerated.item[0] = 0;
  1248. else
  1249. value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
  1250. return 0;
  1251. }
  1252. static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
  1253. {
  1254. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1255. u16 reg, old_reg;
  1256. spin_lock_irq(&chip->reg_lock);
  1257. old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1258. if (value->value.enumerated.item[0] == 0)
  1259. reg = old_reg & ~0x100;
  1260. else
  1261. reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
  1262. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
  1263. spin_unlock_irq(&chip->reg_lock);
  1264. return reg != old_reg;
  1265. }
  1266. static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = {
  1267. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
  1268. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1269. .name = "Direct Recording Source",
  1270. .info = snd_ymfpci_drec_source_info,
  1271. .get = snd_ymfpci_drec_source_get,
  1272. .put = snd_ymfpci_drec_source_put
  1273. };
  1274. /*
  1275. * Mixer controls
  1276. */
  1277. #define YMFPCI_SINGLE(xname, xindex, reg, shift) \
  1278. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1279. .info = snd_ymfpci_info_single, \
  1280. .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
  1281. .private_value = ((reg) | ((shift) << 16)) }
  1282. static int snd_ymfpci_info_single(struct snd_kcontrol *kcontrol,
  1283. struct snd_ctl_elem_info *uinfo)
  1284. {
  1285. int reg = kcontrol->private_value & 0xffff;
  1286. switch (reg) {
  1287. case YDSXGR_SPDIFOUTCTRL: break;
  1288. case YDSXGR_SPDIFINCTRL: break;
  1289. default: return -EINVAL;
  1290. }
  1291. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1292. uinfo->count = 1;
  1293. uinfo->value.integer.min = 0;
  1294. uinfo->value.integer.max = 1;
  1295. return 0;
  1296. }
  1297. static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
  1298. struct snd_ctl_elem_value *ucontrol)
  1299. {
  1300. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1301. int reg = kcontrol->private_value & 0xffff;
  1302. unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
  1303. unsigned int mask = 1;
  1304. switch (reg) {
  1305. case YDSXGR_SPDIFOUTCTRL: break;
  1306. case YDSXGR_SPDIFINCTRL: break;
  1307. default: return -EINVAL;
  1308. }
  1309. ucontrol->value.integer.value[0] =
  1310. (snd_ymfpci_readl(chip, reg) >> shift) & mask;
  1311. return 0;
  1312. }
  1313. static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
  1314. struct snd_ctl_elem_value *ucontrol)
  1315. {
  1316. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1317. int reg = kcontrol->private_value & 0xffff;
  1318. unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
  1319. unsigned int mask = 1;
  1320. int change;
  1321. unsigned int val, oval;
  1322. switch (reg) {
  1323. case YDSXGR_SPDIFOUTCTRL: break;
  1324. case YDSXGR_SPDIFINCTRL: break;
  1325. default: return -EINVAL;
  1326. }
  1327. val = (ucontrol->value.integer.value[0] & mask);
  1328. val <<= shift;
  1329. spin_lock_irq(&chip->reg_lock);
  1330. oval = snd_ymfpci_readl(chip, reg);
  1331. val = (oval & ~(mask << shift)) | val;
  1332. change = val != oval;
  1333. snd_ymfpci_writel(chip, reg, val);
  1334. spin_unlock_irq(&chip->reg_lock);
  1335. return change;
  1336. }
  1337. static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
  1338. #define YMFPCI_DOUBLE(xname, xindex, reg) \
  1339. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1340. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  1341. .info = snd_ymfpci_info_double, \
  1342. .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
  1343. .private_value = reg, \
  1344. .tlv = { .p = db_scale_native } }
  1345. static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1346. {
  1347. unsigned int reg = kcontrol->private_value;
  1348. if (reg < 0x80 || reg >= 0xc0)
  1349. return -EINVAL;
  1350. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1351. uinfo->count = 2;
  1352. uinfo->value.integer.min = 0;
  1353. uinfo->value.integer.max = 16383;
  1354. return 0;
  1355. }
  1356. static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1357. {
  1358. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1359. unsigned int reg = kcontrol->private_value;
  1360. unsigned int shift_left = 0, shift_right = 16, mask = 16383;
  1361. unsigned int val;
  1362. if (reg < 0x80 || reg >= 0xc0)
  1363. return -EINVAL;
  1364. spin_lock_irq(&chip->reg_lock);
  1365. val = snd_ymfpci_readl(chip, reg);
  1366. spin_unlock_irq(&chip->reg_lock);
  1367. ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
  1368. ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
  1369. return 0;
  1370. }
  1371. static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1372. {
  1373. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1374. unsigned int reg = kcontrol->private_value;
  1375. unsigned int shift_left = 0, shift_right = 16, mask = 16383;
  1376. int change;
  1377. unsigned int val1, val2, oval;
  1378. if (reg < 0x80 || reg >= 0xc0)
  1379. return -EINVAL;
  1380. val1 = ucontrol->value.integer.value[0] & mask;
  1381. val2 = ucontrol->value.integer.value[1] & mask;
  1382. val1 <<= shift_left;
  1383. val2 <<= shift_right;
  1384. spin_lock_irq(&chip->reg_lock);
  1385. oval = snd_ymfpci_readl(chip, reg);
  1386. val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  1387. change = val1 != oval;
  1388. snd_ymfpci_writel(chip, reg, val1);
  1389. spin_unlock_irq(&chip->reg_lock);
  1390. return change;
  1391. }
  1392. /*
  1393. * 4ch duplication
  1394. */
  1395. static int snd_ymfpci_info_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1396. {
  1397. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1398. uinfo->count = 1;
  1399. uinfo->value.integer.min = 0;
  1400. uinfo->value.integer.max = 1;
  1401. return 0;
  1402. }
  1403. static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1404. {
  1405. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1406. ucontrol->value.integer.value[0] = chip->mode_dup4ch;
  1407. return 0;
  1408. }
  1409. static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1410. {
  1411. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1412. int change;
  1413. change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
  1414. if (change)
  1415. chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
  1416. return change;
  1417. }
  1418. static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = {
  1419. YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL),
  1420. YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
  1421. YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
  1422. YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
  1423. YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
  1424. YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
  1425. YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
  1426. YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
  1427. YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
  1428. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
  1429. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
  1430. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
  1431. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
  1432. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
  1433. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
  1434. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
  1435. {
  1436. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1437. .name = "4ch Duplication",
  1438. .info = snd_ymfpci_info_dup4ch,
  1439. .get = snd_ymfpci_get_dup4ch,
  1440. .put = snd_ymfpci_put_dup4ch,
  1441. },
  1442. };
  1443. /*
  1444. * GPIO
  1445. */
  1446. static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
  1447. {
  1448. u16 reg, mode;
  1449. unsigned long flags;
  1450. spin_lock_irqsave(&chip->reg_lock, flags);
  1451. reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
  1452. reg &= ~(1 << (pin + 8));
  1453. reg |= (1 << pin);
  1454. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
  1455. /* set the level mode for input line */
  1456. mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
  1457. mode &= ~(3 << (pin * 2));
  1458. snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
  1459. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
  1460. mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
  1461. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1462. return (mode >> pin) & 1;
  1463. }
  1464. static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
  1465. {
  1466. u16 reg;
  1467. unsigned long flags;
  1468. spin_lock_irqsave(&chip->reg_lock, flags);
  1469. reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
  1470. reg &= ~(1 << pin);
  1471. reg &= ~(1 << (pin + 8));
  1472. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
  1473. snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
  1474. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
  1475. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1476. return 0;
  1477. }
  1478. static int snd_ymfpci_gpio_sw_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1479. {
  1480. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1481. uinfo->count = 1;
  1482. uinfo->value.integer.min = 0;
  1483. uinfo->value.integer.max = 1;
  1484. return 0;
  1485. }
  1486. static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1487. {
  1488. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1489. int pin = (int)kcontrol->private_value;
  1490. ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
  1491. return 0;
  1492. }
  1493. static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1494. {
  1495. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1496. int pin = (int)kcontrol->private_value;
  1497. if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
  1498. snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
  1499. ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
  1500. return 1;
  1501. }
  1502. return 0;
  1503. }
  1504. static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = {
  1505. .name = "Shared Rear/Line-In Switch",
  1506. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1507. .info = snd_ymfpci_gpio_sw_info,
  1508. .get = snd_ymfpci_gpio_sw_get,
  1509. .put = snd_ymfpci_gpio_sw_put,
  1510. .private_value = 2,
  1511. };
  1512. /*
  1513. * PCM voice volume
  1514. */
  1515. static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
  1516. struct snd_ctl_elem_info *uinfo)
  1517. {
  1518. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1519. uinfo->count = 2;
  1520. uinfo->value.integer.min = 0;
  1521. uinfo->value.integer.max = 0x8000;
  1522. return 0;
  1523. }
  1524. static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
  1525. struct snd_ctl_elem_value *ucontrol)
  1526. {
  1527. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1528. unsigned int subs = kcontrol->id.subdevice;
  1529. ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
  1530. ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
  1531. return 0;
  1532. }
  1533. static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
  1534. struct snd_ctl_elem_value *ucontrol)
  1535. {
  1536. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1537. unsigned int subs = kcontrol->id.subdevice;
  1538. struct snd_pcm_substream *substream;
  1539. unsigned long flags;
  1540. if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
  1541. ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
  1542. chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
  1543. chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
  1544. substream = (struct snd_pcm_substream *)kcontrol->private_value;
  1545. spin_lock_irqsave(&chip->voice_lock, flags);
  1546. if (substream->runtime && substream->runtime->private_data) {
  1547. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  1548. if (!ypcm->use_441_slot)
  1549. ypcm->update_pcm_vol = 2;
  1550. else
  1551. snd_ymfpci_pcm_441_volume_set(ypcm);
  1552. }
  1553. spin_unlock_irqrestore(&chip->voice_lock, flags);
  1554. return 1;
  1555. }
  1556. return 0;
  1557. }
  1558. static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = {
  1559. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1560. .name = "PCM Playback Volume",
  1561. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1562. SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1563. .info = snd_ymfpci_pcm_vol_info,
  1564. .get = snd_ymfpci_pcm_vol_get,
  1565. .put = snd_ymfpci_pcm_vol_put,
  1566. };
  1567. /*
  1568. * Mixer routines
  1569. */
  1570. static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
  1571. {
  1572. struct snd_ymfpci *chip = bus->private_data;
  1573. chip->ac97_bus = NULL;
  1574. }
  1575. static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
  1576. {
  1577. struct snd_ymfpci *chip = ac97->private_data;
  1578. chip->ac97 = NULL;
  1579. }
  1580. int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
  1581. {
  1582. struct snd_ac97_template ac97;
  1583. struct snd_kcontrol *kctl;
  1584. struct snd_pcm_substream *substream;
  1585. unsigned int idx;
  1586. int err;
  1587. static struct snd_ac97_bus_ops ops = {
  1588. .write = snd_ymfpci_codec_write,
  1589. .read = snd_ymfpci_codec_read,
  1590. };
  1591. if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
  1592. return err;
  1593. chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
  1594. chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
  1595. memset(&ac97, 0, sizeof(ac97));
  1596. ac97.private_data = chip;
  1597. ac97.private_free = snd_ymfpci_mixer_free_ac97;
  1598. if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
  1599. return err;
  1600. /* to be sure */
  1601. snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
  1602. AC97_EA_VRA|AC97_EA_VRM, 0);
  1603. for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
  1604. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
  1605. return err;
  1606. }
  1607. /* add S/PDIF control */
  1608. snd_assert(chip->pcm_spdif != NULL, return -EIO);
  1609. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
  1610. return err;
  1611. kctl->id.device = chip->pcm_spdif->device;
  1612. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
  1613. return err;
  1614. kctl->id.device = chip->pcm_spdif->device;
  1615. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
  1616. return err;
  1617. kctl->id.device = chip->pcm_spdif->device;
  1618. chip->spdif_pcm_ctl = kctl;
  1619. /* direct recording source */
  1620. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
  1621. (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
  1622. return err;
  1623. /*
  1624. * shared rear/line-in
  1625. */
  1626. if (rear_switch) {
  1627. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
  1628. return err;
  1629. }
  1630. /* per-voice volume */
  1631. substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
  1632. for (idx = 0; idx < 32; ++idx) {
  1633. kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
  1634. if (!kctl)
  1635. return -ENOMEM;
  1636. kctl->id.device = chip->pcm->device;
  1637. kctl->id.subdevice = idx;
  1638. kctl->private_value = (unsigned long)substream;
  1639. if ((err = snd_ctl_add(chip->card, kctl)) < 0)
  1640. return err;
  1641. chip->pcm_mixer[idx].left = 0x8000;
  1642. chip->pcm_mixer[idx].right = 0x8000;
  1643. chip->pcm_mixer[idx].ctl = kctl;
  1644. substream = substream->next;
  1645. }
  1646. return 0;
  1647. }
  1648. /*
  1649. * timer
  1650. */
  1651. static int snd_ymfpci_timer_start(struct snd_timer *timer)
  1652. {
  1653. struct snd_ymfpci *chip;
  1654. unsigned long flags;
  1655. unsigned int count;
  1656. chip = snd_timer_chip(timer);
  1657. count = (timer->sticks << 1) - 1;
  1658. spin_lock_irqsave(&chip->reg_lock, flags);
  1659. snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
  1660. snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
  1661. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1662. return 0;
  1663. }
  1664. static int snd_ymfpci_timer_stop(struct snd_timer *timer)
  1665. {
  1666. struct snd_ymfpci *chip;
  1667. unsigned long flags;
  1668. chip = snd_timer_chip(timer);
  1669. spin_lock_irqsave(&chip->reg_lock, flags);
  1670. snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
  1671. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1672. return 0;
  1673. }
  1674. static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
  1675. unsigned long *num, unsigned long *den)
  1676. {
  1677. *num = 1;
  1678. *den = 48000;
  1679. return 0;
  1680. }
  1681. static struct snd_timer_hardware snd_ymfpci_timer_hw = {
  1682. .flags = SNDRV_TIMER_HW_AUTO,
  1683. .resolution = 20833, /* 1/fs = 20.8333...us */
  1684. .ticks = 0x8000,
  1685. .start = snd_ymfpci_timer_start,
  1686. .stop = snd_ymfpci_timer_stop,
  1687. .precise_resolution = snd_ymfpci_timer_precise_resolution,
  1688. };
  1689. int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
  1690. {
  1691. struct snd_timer *timer = NULL;
  1692. struct snd_timer_id tid;
  1693. int err;
  1694. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  1695. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  1696. tid.card = chip->card->number;
  1697. tid.device = device;
  1698. tid.subdevice = 0;
  1699. if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
  1700. strcpy(timer->name, "YMFPCI timer");
  1701. timer->private_data = chip;
  1702. timer->hw = snd_ymfpci_timer_hw;
  1703. }
  1704. chip->timer = timer;
  1705. return err;
  1706. }
  1707. /*
  1708. * proc interface
  1709. */
  1710. static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
  1711. struct snd_info_buffer *buffer)
  1712. {
  1713. struct snd_ymfpci *chip = entry->private_data;
  1714. int i;
  1715. snd_iprintf(buffer, "YMFPCI\n\n");
  1716. for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
  1717. snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
  1718. }
  1719. static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
  1720. {
  1721. struct snd_info_entry *entry;
  1722. if (! snd_card_proc_new(card, "ymfpci", &entry))
  1723. snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read);
  1724. return 0;
  1725. }
  1726. /*
  1727. * initialization routines
  1728. */
  1729. static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
  1730. {
  1731. u8 cmd;
  1732. pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
  1733. #if 0 // force to reset
  1734. if (cmd & 0x03) {
  1735. #endif
  1736. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
  1737. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
  1738. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
  1739. pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
  1740. pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
  1741. #if 0
  1742. }
  1743. #endif
  1744. }
  1745. static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
  1746. {
  1747. snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
  1748. }
  1749. static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
  1750. {
  1751. u32 val;
  1752. int timeout = 1000;
  1753. val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
  1754. if (val)
  1755. snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
  1756. while (timeout-- > 0) {
  1757. val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
  1758. if ((val & 0x00000002) == 0)
  1759. break;
  1760. }
  1761. }
  1762. #ifdef CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL
  1763. #include "ymfpci_image.h"
  1764. static struct firmware snd_ymfpci_dsp_microcode = {
  1765. .size = YDSXG_DSPLENGTH,
  1766. .data = (u8 *)DspInst,
  1767. };
  1768. static struct firmware snd_ymfpci_controller_microcode = {
  1769. .size = YDSXG_CTRLLENGTH,
  1770. .data = (u8 *)CntrlInst,
  1771. };
  1772. static struct firmware snd_ymfpci_controller_1e_microcode = {
  1773. .size = YDSXG_CTRLLENGTH,
  1774. .data = (u8 *)CntrlInst1E,
  1775. };
  1776. #endif
  1777. #ifdef CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL
  1778. static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
  1779. {
  1780. chip->dsp_microcode = &snd_ymfpci_dsp_microcode;
  1781. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
  1782. chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
  1783. chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
  1784. chip->device_id == PCI_DEVICE_ID_YAMAHA_754)
  1785. chip->controller_microcode =
  1786. &snd_ymfpci_controller_1e_microcode;
  1787. else
  1788. chip->controller_microcode =
  1789. &snd_ymfpci_controller_microcode;
  1790. return 0;
  1791. }
  1792. #else /* use fw_loader */
  1793. #ifdef __LITTLE_ENDIAN
  1794. static inline void snd_ymfpci_convert_from_le(const struct firmware *fw) { }
  1795. #else
  1796. static void snd_ymfpci_convert_from_le(const struct firmware *fw)
  1797. {
  1798. int i;
  1799. u32 *data = (u32 *)fw->data;
  1800. for (i = 0; i < fw->size / 4; ++i)
  1801. le32_to_cpus(&data[i]);
  1802. }
  1803. #endif
  1804. static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
  1805. {
  1806. int err, is_1e;
  1807. const char *name;
  1808. err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
  1809. &chip->pci->dev);
  1810. if (err >= 0) {
  1811. if (chip->dsp_microcode->size == YDSXG_DSPLENGTH)
  1812. snd_ymfpci_convert_from_le(chip->dsp_microcode);
  1813. else {
  1814. snd_printk(KERN_ERR "DSP microcode has wrong size\n");
  1815. err = -EINVAL;
  1816. }
  1817. }
  1818. if (err < 0)
  1819. return err;
  1820. is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
  1821. chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
  1822. chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
  1823. chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
  1824. name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
  1825. err = request_firmware(&chip->controller_microcode, name,
  1826. &chip->pci->dev);
  1827. if (err >= 0) {
  1828. if (chip->controller_microcode->size == YDSXG_CTRLLENGTH)
  1829. snd_ymfpci_convert_from_le(chip->controller_microcode);
  1830. else {
  1831. snd_printk(KERN_ERR "controller microcode"
  1832. " has wrong size\n");
  1833. err = -EINVAL;
  1834. }
  1835. }
  1836. if (err < 0)
  1837. return err;
  1838. return 0;
  1839. }
  1840. MODULE_FIRMWARE("yamaha/ds1_dsp.fw");
  1841. MODULE_FIRMWARE("yamaha/ds1_ctrl.fw");
  1842. MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw");
  1843. #endif
  1844. static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
  1845. {
  1846. int i;
  1847. u16 ctrl;
  1848. u32 *inst;
  1849. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
  1850. snd_ymfpci_disable_dsp(chip);
  1851. snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
  1852. snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
  1853. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
  1854. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
  1855. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
  1856. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
  1857. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
  1858. ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1859. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
  1860. /* setup DSP instruction code */
  1861. inst = (u32 *)chip->dsp_microcode->data;
  1862. for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
  1863. snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), inst[i]);
  1864. /* setup control instruction code */
  1865. inst = (u32 *)chip->controller_microcode->data;
  1866. for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
  1867. snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]);
  1868. snd_ymfpci_enable_dsp(chip);
  1869. }
  1870. static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip)
  1871. {
  1872. long size, playback_ctrl_size;
  1873. int voice, bank, reg;
  1874. u8 *ptr;
  1875. dma_addr_t ptr_addr;
  1876. playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
  1877. chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
  1878. chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
  1879. chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
  1880. chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
  1881. size = ALIGN(playback_ctrl_size, 0x100) +
  1882. ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
  1883. ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
  1884. ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
  1885. chip->work_size;
  1886. /* work_ptr must be aligned to 256 bytes, but it's already
  1887. covered with the kernel page allocation mechanism */
  1888. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  1889. size, &chip->work_ptr) < 0)
  1890. return -ENOMEM;
  1891. ptr = chip->work_ptr.area;
  1892. ptr_addr = chip->work_ptr.addr;
  1893. memset(ptr, 0, size); /* for sure */
  1894. chip->bank_base_playback = ptr;
  1895. chip->bank_base_playback_addr = ptr_addr;
  1896. chip->ctrl_playback = (u32 *)ptr;
  1897. chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
  1898. ptr += ALIGN(playback_ctrl_size, 0x100);
  1899. ptr_addr += ALIGN(playback_ctrl_size, 0x100);
  1900. for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
  1901. chip->voices[voice].number = voice;
  1902. chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
  1903. chip->voices[voice].bank_addr = ptr_addr;
  1904. for (bank = 0; bank < 2; bank++) {
  1905. chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
  1906. ptr += chip->bank_size_playback;
  1907. ptr_addr += chip->bank_size_playback;
  1908. }
  1909. }
  1910. ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
  1911. ptr_addr = ALIGN(ptr_addr, 0x100);
  1912. chip->bank_base_capture = ptr;
  1913. chip->bank_base_capture_addr = ptr_addr;
  1914. for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
  1915. for (bank = 0; bank < 2; bank++) {
  1916. chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
  1917. ptr += chip->bank_size_capture;
  1918. ptr_addr += chip->bank_size_capture;
  1919. }
  1920. ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
  1921. ptr_addr = ALIGN(ptr_addr, 0x100);
  1922. chip->bank_base_effect = ptr;
  1923. chip->bank_base_effect_addr = ptr_addr;
  1924. for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
  1925. for (bank = 0; bank < 2; bank++) {
  1926. chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
  1927. ptr += chip->bank_size_effect;
  1928. ptr_addr += chip->bank_size_effect;
  1929. }
  1930. ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
  1931. ptr_addr = ALIGN(ptr_addr, 0x100);
  1932. chip->work_base = ptr;
  1933. chip->work_base_addr = ptr_addr;
  1934. snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, );
  1935. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
  1936. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
  1937. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
  1938. snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
  1939. snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
  1940. /* S/PDIF output initialization */
  1941. chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
  1942. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
  1943. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  1944. /* S/PDIF input initialization */
  1945. snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
  1946. /* digital mixer setup */
  1947. for (reg = 0x80; reg < 0xc0; reg += 4)
  1948. snd_ymfpci_writel(chip, reg, 0);
  1949. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
  1950. snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
  1951. snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
  1952. snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
  1953. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
  1954. snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
  1955. snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
  1956. return 0;
  1957. }
  1958. static int snd_ymfpci_free(struct snd_ymfpci *chip)
  1959. {
  1960. u16 ctrl;
  1961. snd_assert(chip != NULL, return -EINVAL);
  1962. if (chip->res_reg_area) { /* don't touch busy hardware */
  1963. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
  1964. snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
  1965. snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
  1966. snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
  1967. snd_ymfpci_disable_dsp(chip);
  1968. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
  1969. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
  1970. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
  1971. snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
  1972. snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
  1973. ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1974. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
  1975. }
  1976. snd_ymfpci_ac3_done(chip);
  1977. /* Set PCI device to D3 state */
  1978. #if 0
  1979. /* FIXME: temporarily disabled, otherwise we cannot fire up
  1980. * the chip again unless reboot. ACPI bug?
  1981. */
  1982. pci_set_power_state(chip->pci, 3);
  1983. #endif
  1984. #ifdef CONFIG_PM
  1985. vfree(chip->saved_regs);
  1986. #endif
  1987. release_and_free_resource(chip->mpu_res);
  1988. release_and_free_resource(chip->fm_res);
  1989. snd_ymfpci_free_gameport(chip);
  1990. if (chip->reg_area_virt)
  1991. iounmap(chip->reg_area_virt);
  1992. if (chip->work_ptr.area)
  1993. snd_dma_free_pages(&chip->work_ptr);
  1994. if (chip->irq >= 0)
  1995. free_irq(chip->irq, chip);
  1996. release_and_free_resource(chip->res_reg_area);
  1997. pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
  1998. pci_disable_device(chip->pci);
  1999. #ifndef CONFIG_SND_YMFPCI_FIRMWARE_IN_KERNEL
  2000. release_firmware(chip->dsp_microcode);
  2001. release_firmware(chip->controller_microcode);
  2002. #endif
  2003. kfree(chip);
  2004. return 0;
  2005. }
  2006. static int snd_ymfpci_dev_free(struct snd_device *device)
  2007. {
  2008. struct snd_ymfpci *chip = device->device_data;
  2009. return snd_ymfpci_free(chip);
  2010. }
  2011. #ifdef CONFIG_PM
  2012. static int saved_regs_index[] = {
  2013. /* spdif */
  2014. YDSXGR_SPDIFOUTCTRL,
  2015. YDSXGR_SPDIFOUTSTATUS,
  2016. YDSXGR_SPDIFINCTRL,
  2017. /* volumes */
  2018. YDSXGR_PRIADCLOOPVOL,
  2019. YDSXGR_NATIVEDACINVOL,
  2020. YDSXGR_NATIVEDACOUTVOL,
  2021. YDSXGR_BUF441OUTVOL,
  2022. YDSXGR_NATIVEADCINVOL,
  2023. YDSXGR_SPDIFLOOPVOL,
  2024. YDSXGR_SPDIFOUTVOL,
  2025. YDSXGR_ZVOUTVOL,
  2026. YDSXGR_LEGACYOUTVOL,
  2027. /* address bases */
  2028. YDSXGR_PLAYCTRLBASE,
  2029. YDSXGR_RECCTRLBASE,
  2030. YDSXGR_EFFCTRLBASE,
  2031. YDSXGR_WORKBASE,
  2032. /* capture set up */
  2033. YDSXGR_MAPOFREC,
  2034. YDSXGR_RECFORMAT,
  2035. YDSXGR_RECSLOTSR,
  2036. YDSXGR_ADCFORMAT,
  2037. YDSXGR_ADCSLOTSR,
  2038. };
  2039. #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
  2040. int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state)
  2041. {
  2042. struct snd_card *card = pci_get_drvdata(pci);
  2043. struct snd_ymfpci *chip = card->private_data;
  2044. unsigned int i;
  2045. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  2046. snd_pcm_suspend_all(chip->pcm);
  2047. snd_pcm_suspend_all(chip->pcm2);
  2048. snd_pcm_suspend_all(chip->pcm_spdif);
  2049. snd_pcm_suspend_all(chip->pcm_4ch);
  2050. snd_ac97_suspend(chip->ac97);
  2051. for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
  2052. chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
  2053. chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
  2054. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
  2055. snd_ymfpci_disable_dsp(chip);
  2056. pci_disable_device(pci);
  2057. pci_save_state(pci);
  2058. pci_set_power_state(pci, pci_choose_state(pci, state));
  2059. return 0;
  2060. }
  2061. int snd_ymfpci_resume(struct pci_dev *pci)
  2062. {
  2063. struct snd_card *card = pci_get_drvdata(pci);
  2064. struct snd_ymfpci *chip = card->private_data;
  2065. unsigned int i;
  2066. pci_set_power_state(pci, PCI_D0);
  2067. pci_restore_state(pci);
  2068. if (pci_enable_device(pci) < 0) {
  2069. printk(KERN_ERR "ymfpci: pci_enable_device failed, "
  2070. "disabling device\n");
  2071. snd_card_disconnect(card);
  2072. return -EIO;
  2073. }
  2074. pci_set_master(pci);
  2075. snd_ymfpci_aclink_reset(pci);
  2076. snd_ymfpci_codec_ready(chip, 0);
  2077. snd_ymfpci_download_image(chip);
  2078. udelay(100);
  2079. for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
  2080. snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
  2081. snd_ac97_resume(chip->ac97);
  2082. /* start hw again */
  2083. if (chip->start_count > 0) {
  2084. spin_lock_irq(&chip->reg_lock);
  2085. snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
  2086. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
  2087. spin_unlock_irq(&chip->reg_lock);
  2088. }
  2089. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  2090. return 0;
  2091. }
  2092. #endif /* CONFIG_PM */
  2093. int __devinit snd_ymfpci_create(struct snd_card *card,
  2094. struct pci_dev * pci,
  2095. unsigned short old_legacy_ctrl,
  2096. struct snd_ymfpci ** rchip)
  2097. {
  2098. struct snd_ymfpci *chip;
  2099. int err;
  2100. static struct snd_device_ops ops = {
  2101. .dev_free = snd_ymfpci_dev_free,
  2102. };
  2103. *rchip = NULL;
  2104. /* enable PCI device */
  2105. if ((err = pci_enable_device(pci)) < 0)
  2106. return err;
  2107. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  2108. if (chip == NULL) {
  2109. pci_disable_device(pci);
  2110. return -ENOMEM;
  2111. }
  2112. chip->old_legacy_ctrl = old_legacy_ctrl;
  2113. spin_lock_init(&chip->reg_lock);
  2114. spin_lock_init(&chip->voice_lock);
  2115. init_waitqueue_head(&chip->interrupt_sleep);
  2116. atomic_set(&chip->interrupt_sleep_count, 0);
  2117. chip->card = card;
  2118. chip->pci = pci;
  2119. chip->irq = -1;
  2120. chip->device_id = pci->device;
  2121. chip->rev = pci->revision;
  2122. chip->reg_area_phys = pci_resource_start(pci, 0);
  2123. chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
  2124. pci_set_master(pci);
  2125. chip->src441_used = -1;
  2126. if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
  2127. snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
  2128. snd_ymfpci_free(chip);
  2129. return -EBUSY;
  2130. }
  2131. if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
  2132. "YMFPCI", chip)) {
  2133. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2134. snd_ymfpci_free(chip);
  2135. return -EBUSY;
  2136. }
  2137. chip->irq = pci->irq;
  2138. snd_ymfpci_aclink_reset(pci);
  2139. if (snd_ymfpci_codec_ready(chip, 0) < 0) {
  2140. snd_ymfpci_free(chip);
  2141. return -EIO;
  2142. }
  2143. err = snd_ymfpci_request_firmware(chip);
  2144. if (err < 0) {
  2145. snd_printk(KERN_ERR "firmware request failed: %d\n", err);
  2146. snd_ymfpci_free(chip);
  2147. return err;
  2148. }
  2149. snd_ymfpci_download_image(chip);
  2150. udelay(100); /* seems we need a delay after downloading image.. */
  2151. if (snd_ymfpci_memalloc(chip) < 0) {
  2152. snd_ymfpci_free(chip);
  2153. return -EIO;
  2154. }
  2155. if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
  2156. snd_ymfpci_free(chip);
  2157. return err;
  2158. }
  2159. #ifdef CONFIG_PM
  2160. chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
  2161. if (chip->saved_regs == NULL) {
  2162. snd_ymfpci_free(chip);
  2163. return -ENOMEM;
  2164. }
  2165. #endif
  2166. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  2167. snd_ymfpci_free(chip);
  2168. return err;
  2169. }
  2170. snd_ymfpci_proc_init(card, chip);
  2171. snd_card_set_dev(card, &pci->dev);
  2172. *rchip = chip;
  2173. return 0;
  2174. }