atl1_main.c 68 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453
  1. /*
  2. * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
  3. * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
  4. * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
  5. *
  6. * Derived from Intel e1000 driver
  7. * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the Free
  11. * Software Foundation; either version 2 of the License, or (at your option)
  12. * any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful, but WITHOUT
  15. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  17. * more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along with
  20. * this program; if not, write to the Free Software Foundation, Inc., 59
  21. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22. *
  23. * The full GNU General Public License is included in this distribution in the
  24. * file called COPYING.
  25. *
  26. * Contact Information:
  27. * Xiong Huang <xiong_huang@attansic.com>
  28. * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
  29. * Xinzhu 302, TAIWAN, REPUBLIC OF CHINA
  30. *
  31. * Chris Snook <csnook@redhat.com>
  32. * Jay Cliburn <jcliburn@gmail.com>
  33. *
  34. * This version is adapted from the Attansic reference driver for
  35. * inclusion in the Linux kernel. It is currently under heavy development.
  36. * A very incomplete list of things that need to be dealt with:
  37. *
  38. * TODO:
  39. * Fix TSO; tx performance is horrible with TSO enabled.
  40. * Wake on LAN.
  41. * Add more ethtool functions.
  42. * Fix abstruse irq enable/disable condition described here:
  43. * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
  44. *
  45. * NEEDS TESTING:
  46. * VLAN
  47. * multicast
  48. * promiscuous mode
  49. * interrupt coalescing
  50. * SMP torture testing
  51. */
  52. #include <linux/types.h>
  53. #include <linux/netdevice.h>
  54. #include <linux/pci.h>
  55. #include <linux/spinlock.h>
  56. #include <linux/slab.h>
  57. #include <linux/string.h>
  58. #include <linux/skbuff.h>
  59. #include <linux/etherdevice.h>
  60. #include <linux/if_vlan.h>
  61. #include <linux/if_ether.h>
  62. #include <linux/irqreturn.h>
  63. #include <linux/workqueue.h>
  64. #include <linux/timer.h>
  65. #include <linux/jiffies.h>
  66. #include <linux/hardirq.h>
  67. #include <linux/interrupt.h>
  68. #include <linux/irqflags.h>
  69. #include <linux/dma-mapping.h>
  70. #include <linux/net.h>
  71. #include <linux/pm.h>
  72. #include <linux/in.h>
  73. #include <linux/ip.h>
  74. #include <linux/tcp.h>
  75. #include <linux/compiler.h>
  76. #include <linux/delay.h>
  77. #include <linux/mii.h>
  78. #include <linux/interrupt.h>
  79. #include <net/checksum.h>
  80. #include <asm/atomic.h>
  81. #include <asm/byteorder.h>
  82. #include "atl1.h"
  83. #define DRIVER_VERSION "2.0.7"
  84. char atl1_driver_name[] = "atl1";
  85. static const char atl1_driver_string[] = "Attansic L1 Ethernet Network Driver";
  86. static const char atl1_copyright[] = "Copyright(c) 2005-2006 Attansic Corporation.";
  87. char atl1_driver_version[] = DRIVER_VERSION;
  88. MODULE_AUTHOR
  89. ("Attansic Corporation <xiong_huang@attansic.com>, Chris Snook <csnook@redhat.com>, Jay Cliburn <jcliburn@gmail.com>");
  90. MODULE_DESCRIPTION("Attansic 1000M Ethernet Network Driver");
  91. MODULE_LICENSE("GPL");
  92. MODULE_VERSION(DRIVER_VERSION);
  93. /*
  94. * atl1_pci_tbl - PCI Device ID Table
  95. */
  96. static const struct pci_device_id atl1_pci_tbl[] = {
  97. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
  98. /* required last entry */
  99. {0,}
  100. };
  101. MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
  102. /*
  103. * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
  104. * @adapter: board private structure to initialize
  105. *
  106. * atl1_sw_init initializes the Adapter private data structure.
  107. * Fields are initialized based on PCI device information and
  108. * OS network device settings (MTU size).
  109. */
  110. static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
  111. {
  112. struct atl1_hw *hw = &adapter->hw;
  113. struct net_device *netdev = adapter->netdev;
  114. hw->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
  115. hw->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
  116. adapter->wol = 0;
  117. adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
  118. adapter->ict = 50000; /* 100ms */
  119. adapter->link_speed = SPEED_0; /* hardware init */
  120. adapter->link_duplex = FULL_DUPLEX;
  121. hw->phy_configured = false;
  122. hw->preamble_len = 7;
  123. hw->ipgt = 0x60;
  124. hw->min_ifg = 0x50;
  125. hw->ipgr1 = 0x40;
  126. hw->ipgr2 = 0x60;
  127. hw->max_retry = 0xf;
  128. hw->lcol = 0x37;
  129. hw->jam_ipg = 7;
  130. hw->rfd_burst = 8;
  131. hw->rrd_burst = 8;
  132. hw->rfd_fetch_gap = 1;
  133. hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
  134. hw->rx_jumbo_lkah = 1;
  135. hw->rrd_ret_timer = 16;
  136. hw->tpd_burst = 4;
  137. hw->tpd_fetch_th = 16;
  138. hw->txf_burst = 0x100;
  139. hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
  140. hw->tpd_fetch_gap = 1;
  141. hw->rcb_value = atl1_rcb_64;
  142. hw->dma_ord = atl1_dma_ord_enh;
  143. hw->dmar_block = atl1_dma_req_256;
  144. hw->dmaw_block = atl1_dma_req_256;
  145. hw->cmb_rrd = 4;
  146. hw->cmb_tpd = 4;
  147. hw->cmb_rx_timer = 1; /* about 2us */
  148. hw->cmb_tx_timer = 1; /* about 2us */
  149. hw->smb_timer = 100000; /* about 200ms */
  150. spin_lock_init(&adapter->lock);
  151. spin_lock_init(&adapter->mb_lock);
  152. return 0;
  153. }
  154. static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
  155. {
  156. struct atl1_adapter *adapter = netdev_priv(netdev);
  157. u16 result;
  158. atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
  159. return result;
  160. }
  161. static void mdio_write(struct net_device *netdev, int phy_id, int reg_num,
  162. int val)
  163. {
  164. struct atl1_adapter *adapter = netdev_priv(netdev);
  165. atl1_write_phy_reg(&adapter->hw, reg_num, val);
  166. }
  167. /*
  168. * atl1_mii_ioctl -
  169. * @netdev:
  170. * @ifreq:
  171. * @cmd:
  172. */
  173. static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  174. {
  175. struct atl1_adapter *adapter = netdev_priv(netdev);
  176. unsigned long flags;
  177. int retval;
  178. if (!netif_running(netdev))
  179. return -EINVAL;
  180. spin_lock_irqsave(&adapter->lock, flags);
  181. retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
  182. spin_unlock_irqrestore(&adapter->lock, flags);
  183. return retval;
  184. }
  185. /*
  186. * atl1_ioctl -
  187. * @netdev:
  188. * @ifreq:
  189. * @cmd:
  190. */
  191. static int atl1_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  192. {
  193. switch (cmd) {
  194. case SIOCGMIIPHY:
  195. case SIOCGMIIREG:
  196. case SIOCSMIIREG:
  197. return atl1_mii_ioctl(netdev, ifr, cmd);
  198. default:
  199. return -EOPNOTSUPP;
  200. }
  201. }
  202. /*
  203. * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
  204. * @adapter: board private structure
  205. *
  206. * Return 0 on success, negative on failure
  207. */
  208. s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
  209. {
  210. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  211. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  212. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  213. struct atl1_ring_header *ring_header = &adapter->ring_header;
  214. struct pci_dev *pdev = adapter->pdev;
  215. int size;
  216. u8 offset = 0;
  217. size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
  218. tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
  219. if (unlikely(!tpd_ring->buffer_info)) {
  220. dev_err(&pdev->dev, "kzalloc failed , size = D%d\n", size);
  221. goto err_nomem;
  222. }
  223. rfd_ring->buffer_info =
  224. (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
  225. /* real ring DMA buffer
  226. * each ring/block may need up to 8 bytes for alignment, hence the
  227. * additional 40 bytes tacked onto the end.
  228. */
  229. ring_header->size = size =
  230. sizeof(struct tx_packet_desc) * tpd_ring->count
  231. + sizeof(struct rx_free_desc) * rfd_ring->count
  232. + sizeof(struct rx_return_desc) * rrd_ring->count
  233. + sizeof(struct coals_msg_block)
  234. + sizeof(struct stats_msg_block)
  235. + 40;
  236. ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
  237. &ring_header->dma);
  238. if (unlikely(!ring_header->desc)) {
  239. dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
  240. goto err_nomem;
  241. }
  242. memset(ring_header->desc, 0, ring_header->size);
  243. /* init TPD ring */
  244. tpd_ring->dma = ring_header->dma;
  245. offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
  246. tpd_ring->dma += offset;
  247. tpd_ring->desc = (u8 *) ring_header->desc + offset;
  248. tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
  249. /* init RFD ring */
  250. rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
  251. offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
  252. rfd_ring->dma += offset;
  253. rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
  254. rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
  255. /* init RRD ring */
  256. rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
  257. offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
  258. rrd_ring->dma += offset;
  259. rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
  260. rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
  261. /* init CMB */
  262. adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
  263. offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
  264. adapter->cmb.dma += offset;
  265. adapter->cmb.cmb = (struct coals_msg_block *)
  266. ((u8 *) rrd_ring->desc + (rrd_ring->size + offset));
  267. /* init SMB */
  268. adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
  269. offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
  270. adapter->smb.dma += offset;
  271. adapter->smb.smb = (struct stats_msg_block *)
  272. ((u8 *) adapter->cmb.cmb +
  273. (sizeof(struct coals_msg_block) + offset));
  274. return ATL1_SUCCESS;
  275. err_nomem:
  276. kfree(tpd_ring->buffer_info);
  277. return -ENOMEM;
  278. }
  279. static void atl1_init_ring_ptrs(struct atl1_adapter *adapter)
  280. {
  281. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  282. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  283. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  284. atomic_set(&tpd_ring->next_to_use, 0);
  285. atomic_set(&tpd_ring->next_to_clean, 0);
  286. rfd_ring->next_to_clean = 0;
  287. atomic_set(&rfd_ring->next_to_use, 0);
  288. rrd_ring->next_to_use = 0;
  289. atomic_set(&rrd_ring->next_to_clean, 0);
  290. }
  291. /*
  292. * atl1_clean_rx_ring - Free RFD Buffers
  293. * @adapter: board private structure
  294. */
  295. static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
  296. {
  297. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  298. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  299. struct atl1_buffer *buffer_info;
  300. struct pci_dev *pdev = adapter->pdev;
  301. unsigned long size;
  302. unsigned int i;
  303. /* Free all the Rx ring sk_buffs */
  304. for (i = 0; i < rfd_ring->count; i++) {
  305. buffer_info = &rfd_ring->buffer_info[i];
  306. if (buffer_info->dma) {
  307. pci_unmap_page(pdev, buffer_info->dma,
  308. buffer_info->length, PCI_DMA_FROMDEVICE);
  309. buffer_info->dma = 0;
  310. }
  311. if (buffer_info->skb) {
  312. dev_kfree_skb(buffer_info->skb);
  313. buffer_info->skb = NULL;
  314. }
  315. }
  316. size = sizeof(struct atl1_buffer) * rfd_ring->count;
  317. memset(rfd_ring->buffer_info, 0, size);
  318. /* Zero out the descriptor ring */
  319. memset(rfd_ring->desc, 0, rfd_ring->size);
  320. rfd_ring->next_to_clean = 0;
  321. atomic_set(&rfd_ring->next_to_use, 0);
  322. rrd_ring->next_to_use = 0;
  323. atomic_set(&rrd_ring->next_to_clean, 0);
  324. }
  325. /*
  326. * atl1_clean_tx_ring - Free Tx Buffers
  327. * @adapter: board private structure
  328. */
  329. static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
  330. {
  331. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  332. struct atl1_buffer *buffer_info;
  333. struct pci_dev *pdev = adapter->pdev;
  334. unsigned long size;
  335. unsigned int i;
  336. /* Free all the Tx ring sk_buffs */
  337. for (i = 0; i < tpd_ring->count; i++) {
  338. buffer_info = &tpd_ring->buffer_info[i];
  339. if (buffer_info->dma) {
  340. pci_unmap_page(pdev, buffer_info->dma,
  341. buffer_info->length, PCI_DMA_TODEVICE);
  342. buffer_info->dma = 0;
  343. }
  344. }
  345. for (i = 0; i < tpd_ring->count; i++) {
  346. buffer_info = &tpd_ring->buffer_info[i];
  347. if (buffer_info->skb) {
  348. dev_kfree_skb_any(buffer_info->skb);
  349. buffer_info->skb = NULL;
  350. }
  351. }
  352. size = sizeof(struct atl1_buffer) * tpd_ring->count;
  353. memset(tpd_ring->buffer_info, 0, size);
  354. /* Zero out the descriptor ring */
  355. memset(tpd_ring->desc, 0, tpd_ring->size);
  356. atomic_set(&tpd_ring->next_to_use, 0);
  357. atomic_set(&tpd_ring->next_to_clean, 0);
  358. }
  359. /*
  360. * atl1_free_ring_resources - Free Tx / RX descriptor Resources
  361. * @adapter: board private structure
  362. *
  363. * Free all transmit software resources
  364. */
  365. void atl1_free_ring_resources(struct atl1_adapter *adapter)
  366. {
  367. struct pci_dev *pdev = adapter->pdev;
  368. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  369. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  370. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  371. struct atl1_ring_header *ring_header = &adapter->ring_header;
  372. atl1_clean_tx_ring(adapter);
  373. atl1_clean_rx_ring(adapter);
  374. kfree(tpd_ring->buffer_info);
  375. pci_free_consistent(pdev, ring_header->size, ring_header->desc,
  376. ring_header->dma);
  377. tpd_ring->buffer_info = NULL;
  378. tpd_ring->desc = NULL;
  379. tpd_ring->dma = 0;
  380. rfd_ring->buffer_info = NULL;
  381. rfd_ring->desc = NULL;
  382. rfd_ring->dma = 0;
  383. rrd_ring->desc = NULL;
  384. rrd_ring->dma = 0;
  385. }
  386. static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
  387. {
  388. u32 value;
  389. struct atl1_hw *hw = &adapter->hw;
  390. struct net_device *netdev = adapter->netdev;
  391. /* Config MAC CTRL Register */
  392. value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
  393. /* duplex */
  394. if (FULL_DUPLEX == adapter->link_duplex)
  395. value |= MAC_CTRL_DUPLX;
  396. /* speed */
  397. value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
  398. MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
  399. MAC_CTRL_SPEED_SHIFT);
  400. /* flow control */
  401. value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
  402. /* PAD & CRC */
  403. value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
  404. /* preamble length */
  405. value |= (((u32) adapter->hw.preamble_len
  406. & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
  407. /* vlan */
  408. if (adapter->vlgrp)
  409. value |= MAC_CTRL_RMV_VLAN;
  410. /* rx checksum
  411. if (adapter->rx_csum)
  412. value |= MAC_CTRL_RX_CHKSUM_EN;
  413. */
  414. /* filter mode */
  415. value |= MAC_CTRL_BC_EN;
  416. if (netdev->flags & IFF_PROMISC)
  417. value |= MAC_CTRL_PROMIS_EN;
  418. else if (netdev->flags & IFF_ALLMULTI)
  419. value |= MAC_CTRL_MC_ALL_EN;
  420. /* value |= MAC_CTRL_LOOPBACK; */
  421. iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
  422. }
  423. /*
  424. * atl1_set_mac - Change the Ethernet Address of the NIC
  425. * @netdev: network interface device structure
  426. * @p: pointer to an address structure
  427. *
  428. * Returns 0 on success, negative on failure
  429. */
  430. static int atl1_set_mac(struct net_device *netdev, void *p)
  431. {
  432. struct atl1_adapter *adapter = netdev_priv(netdev);
  433. struct sockaddr *addr = p;
  434. if (netif_running(netdev))
  435. return -EBUSY;
  436. if (!is_valid_ether_addr(addr->sa_data))
  437. return -EADDRNOTAVAIL;
  438. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  439. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  440. atl1_set_mac_addr(&adapter->hw);
  441. return 0;
  442. }
  443. static u32 atl1_check_link(struct atl1_adapter *adapter)
  444. {
  445. struct atl1_hw *hw = &adapter->hw;
  446. struct net_device *netdev = adapter->netdev;
  447. u32 ret_val;
  448. u16 speed, duplex, phy_data;
  449. int reconfig = 0;
  450. /* MII_BMSR must read twice */
  451. atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
  452. atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
  453. if (!(phy_data & BMSR_LSTATUS)) { /* link down */
  454. if (netif_carrier_ok(netdev)) { /* old link state: Up */
  455. dev_info(&adapter->pdev->dev, "link is down\n");
  456. adapter->link_speed = SPEED_0;
  457. netif_carrier_off(netdev);
  458. netif_stop_queue(netdev);
  459. }
  460. return ATL1_SUCCESS;
  461. }
  462. /* Link Up */
  463. ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
  464. if (ret_val)
  465. return ret_val;
  466. switch (hw->media_type) {
  467. case MEDIA_TYPE_1000M_FULL:
  468. if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
  469. reconfig = 1;
  470. break;
  471. case MEDIA_TYPE_100M_FULL:
  472. if (speed != SPEED_100 || duplex != FULL_DUPLEX)
  473. reconfig = 1;
  474. break;
  475. case MEDIA_TYPE_100M_HALF:
  476. if (speed != SPEED_100 || duplex != HALF_DUPLEX)
  477. reconfig = 1;
  478. break;
  479. case MEDIA_TYPE_10M_FULL:
  480. if (speed != SPEED_10 || duplex != FULL_DUPLEX)
  481. reconfig = 1;
  482. break;
  483. case MEDIA_TYPE_10M_HALF:
  484. if (speed != SPEED_10 || duplex != HALF_DUPLEX)
  485. reconfig = 1;
  486. break;
  487. }
  488. /* link result is our setting */
  489. if (!reconfig) {
  490. if (adapter->link_speed != speed
  491. || adapter->link_duplex != duplex) {
  492. adapter->link_speed = speed;
  493. adapter->link_duplex = duplex;
  494. atl1_setup_mac_ctrl(adapter);
  495. dev_info(&adapter->pdev->dev,
  496. "%s link is up %d Mbps %s\n",
  497. netdev->name, adapter->link_speed,
  498. adapter->link_duplex == FULL_DUPLEX ?
  499. "full duplex" : "half duplex");
  500. }
  501. if (!netif_carrier_ok(netdev)) { /* Link down -> Up */
  502. netif_carrier_on(netdev);
  503. netif_wake_queue(netdev);
  504. }
  505. return ATL1_SUCCESS;
  506. }
  507. /* change orignal link status */
  508. if (netif_carrier_ok(netdev)) {
  509. adapter->link_speed = SPEED_0;
  510. netif_carrier_off(netdev);
  511. netif_stop_queue(netdev);
  512. }
  513. if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
  514. hw->media_type != MEDIA_TYPE_1000M_FULL) {
  515. switch (hw->media_type) {
  516. case MEDIA_TYPE_100M_FULL:
  517. phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
  518. MII_CR_RESET;
  519. break;
  520. case MEDIA_TYPE_100M_HALF:
  521. phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
  522. break;
  523. case MEDIA_TYPE_10M_FULL:
  524. phy_data =
  525. MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
  526. break;
  527. default: /* MEDIA_TYPE_10M_HALF: */
  528. phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
  529. break;
  530. }
  531. atl1_write_phy_reg(hw, MII_BMCR, phy_data);
  532. return ATL1_SUCCESS;
  533. }
  534. /* auto-neg, insert timer to re-config phy */
  535. if (!adapter->phy_timer_pending) {
  536. adapter->phy_timer_pending = true;
  537. mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
  538. }
  539. return ATL1_SUCCESS;
  540. }
  541. static void atl1_check_for_link(struct atl1_adapter *adapter)
  542. {
  543. struct net_device *netdev = adapter->netdev;
  544. u16 phy_data = 0;
  545. spin_lock(&adapter->lock);
  546. adapter->phy_timer_pending = false;
  547. atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  548. atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  549. spin_unlock(&adapter->lock);
  550. /* notify upper layer link down ASAP */
  551. if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */
  552. if (netif_carrier_ok(netdev)) { /* old link state: Up */
  553. dev_info(&adapter->pdev->dev, "%s link is down\n",
  554. netdev->name);
  555. adapter->link_speed = SPEED_0;
  556. netif_carrier_off(netdev);
  557. netif_stop_queue(netdev);
  558. }
  559. }
  560. schedule_work(&adapter->link_chg_task);
  561. }
  562. /*
  563. * atl1_set_multi - Multicast and Promiscuous mode set
  564. * @netdev: network interface device structure
  565. *
  566. * The set_multi entry point is called whenever the multicast address
  567. * list or the network interface flags are updated. This routine is
  568. * responsible for configuring the hardware for proper multicast,
  569. * promiscuous mode, and all-multi behavior.
  570. */
  571. static void atl1_set_multi(struct net_device *netdev)
  572. {
  573. struct atl1_adapter *adapter = netdev_priv(netdev);
  574. struct atl1_hw *hw = &adapter->hw;
  575. struct dev_mc_list *mc_ptr;
  576. u32 rctl;
  577. u32 hash_value;
  578. /* Check for Promiscuous and All Multicast modes */
  579. rctl = ioread32(hw->hw_addr + REG_MAC_CTRL);
  580. if (netdev->flags & IFF_PROMISC)
  581. rctl |= MAC_CTRL_PROMIS_EN;
  582. else if (netdev->flags & IFF_ALLMULTI) {
  583. rctl |= MAC_CTRL_MC_ALL_EN;
  584. rctl &= ~MAC_CTRL_PROMIS_EN;
  585. } else
  586. rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
  587. iowrite32(rctl, hw->hw_addr + REG_MAC_CTRL);
  588. /* clear the old settings from the multicast hash table */
  589. iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
  590. iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
  591. /* compute mc addresses' hash value ,and put it into hash table */
  592. for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
  593. hash_value = atl1_hash_mc_addr(hw, mc_ptr->dmi_addr);
  594. atl1_hash_set(hw, hash_value);
  595. }
  596. }
  597. /*
  598. * atl1_change_mtu - Change the Maximum Transfer Unit
  599. * @netdev: network interface device structure
  600. * @new_mtu: new value for maximum frame size
  601. *
  602. * Returns 0 on success, negative on failure
  603. */
  604. static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
  605. {
  606. struct atl1_adapter *adapter = netdev_priv(netdev);
  607. int old_mtu = netdev->mtu;
  608. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
  609. if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
  610. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  611. dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
  612. return -EINVAL;
  613. }
  614. adapter->hw.max_frame_size = max_frame;
  615. adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
  616. adapter->rx_buffer_len = (max_frame + 7) & ~7;
  617. adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
  618. netdev->mtu = new_mtu;
  619. if ((old_mtu != new_mtu) && netif_running(netdev)) {
  620. atl1_down(adapter);
  621. atl1_up(adapter);
  622. }
  623. return 0;
  624. }
  625. static void set_flow_ctrl_old(struct atl1_adapter *adapter)
  626. {
  627. u32 hi, lo, value;
  628. /* RFD Flow Control */
  629. value = adapter->rfd_ring.count;
  630. hi = value / 16;
  631. if (hi < 2)
  632. hi = 2;
  633. lo = value * 7 / 8;
  634. value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
  635. ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
  636. iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
  637. /* RRD Flow Control */
  638. value = adapter->rrd_ring.count;
  639. lo = value / 16;
  640. hi = value * 7 / 8;
  641. if (lo < 2)
  642. lo = 2;
  643. value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
  644. ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
  645. iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
  646. }
  647. static void set_flow_ctrl_new(struct atl1_hw *hw)
  648. {
  649. u32 hi, lo, value;
  650. /* RXF Flow Control */
  651. value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
  652. lo = value / 16;
  653. if (lo < 192)
  654. lo = 192;
  655. hi = value * 7 / 8;
  656. if (hi < lo)
  657. hi = lo + 16;
  658. value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
  659. ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
  660. iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
  661. /* RRD Flow Control */
  662. value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
  663. lo = value / 8;
  664. hi = value * 7 / 8;
  665. if (lo < 2)
  666. lo = 2;
  667. if (hi < lo)
  668. hi = lo + 3;
  669. value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
  670. ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
  671. iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
  672. }
  673. /*
  674. * atl1_configure - Configure Transmit&Receive Unit after Reset
  675. * @adapter: board private structure
  676. *
  677. * Configure the Tx /Rx unit of the MAC after a reset.
  678. */
  679. static u32 atl1_configure(struct atl1_adapter *adapter)
  680. {
  681. struct atl1_hw *hw = &adapter->hw;
  682. u32 value;
  683. /* clear interrupt status */
  684. iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
  685. /* set MAC Address */
  686. value = (((u32) hw->mac_addr[2]) << 24) |
  687. (((u32) hw->mac_addr[3]) << 16) |
  688. (((u32) hw->mac_addr[4]) << 8) |
  689. (((u32) hw->mac_addr[5]));
  690. iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
  691. value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
  692. iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
  693. /* tx / rx ring */
  694. /* HI base address */
  695. iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
  696. hw->hw_addr + REG_DESC_BASE_ADDR_HI);
  697. /* LO base address */
  698. iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
  699. hw->hw_addr + REG_DESC_RFD_ADDR_LO);
  700. iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
  701. hw->hw_addr + REG_DESC_RRD_ADDR_LO);
  702. iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
  703. hw->hw_addr + REG_DESC_TPD_ADDR_LO);
  704. iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
  705. hw->hw_addr + REG_DESC_CMB_ADDR_LO);
  706. iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
  707. hw->hw_addr + REG_DESC_SMB_ADDR_LO);
  708. /* element count */
  709. value = adapter->rrd_ring.count;
  710. value <<= 16;
  711. value += adapter->rfd_ring.count;
  712. iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
  713. iowrite32(adapter->tpd_ring.count, hw->hw_addr +
  714. REG_DESC_TPD_RING_SIZE);
  715. /* Load Ptr */
  716. iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
  717. /* config Mailbox */
  718. value = ((atomic_read(&adapter->tpd_ring.next_to_use)
  719. & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
  720. ((atomic_read(&adapter->rrd_ring.next_to_clean)
  721. & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
  722. ((atomic_read(&adapter->rfd_ring.next_to_use)
  723. & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
  724. iowrite32(value, hw->hw_addr + REG_MAILBOX);
  725. /* config IPG/IFG */
  726. value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
  727. << MAC_IPG_IFG_IPGT_SHIFT) |
  728. (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
  729. << MAC_IPG_IFG_MIFG_SHIFT) |
  730. (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
  731. << MAC_IPG_IFG_IPGR1_SHIFT) |
  732. (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
  733. << MAC_IPG_IFG_IPGR2_SHIFT);
  734. iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
  735. /* config Half-Duplex Control */
  736. value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
  737. (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
  738. << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
  739. MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
  740. (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
  741. (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
  742. << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
  743. iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
  744. /* set Interrupt Moderator Timer */
  745. iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
  746. iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
  747. /* set Interrupt Clear Timer */
  748. iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
  749. /* set MTU, 4 : VLAN */
  750. iowrite32(hw->max_frame_size + 4, hw->hw_addr + REG_MTU);
  751. /* jumbo size & rrd retirement timer */
  752. value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
  753. << RXQ_JMBOSZ_TH_SHIFT) |
  754. (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
  755. << RXQ_JMBO_LKAH_SHIFT) |
  756. (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
  757. << RXQ_RRD_TIMER_SHIFT);
  758. iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
  759. /* Flow Control */
  760. switch (hw->dev_rev) {
  761. case 0x8001:
  762. case 0x9001:
  763. case 0x9002:
  764. case 0x9003:
  765. set_flow_ctrl_old(adapter);
  766. break;
  767. default:
  768. set_flow_ctrl_new(hw);
  769. break;
  770. }
  771. /* config TXQ */
  772. value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
  773. << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
  774. (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
  775. << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
  776. (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
  777. << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE |
  778. TXQ_CTRL_EN;
  779. iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
  780. /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
  781. value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
  782. << TX_JUMBO_TASK_TH_SHIFT) |
  783. (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
  784. << TX_TPD_MIN_IPG_SHIFT);
  785. iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
  786. /* config RXQ */
  787. value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
  788. << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
  789. (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
  790. << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
  791. (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
  792. << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) | RXQ_CTRL_CUT_THRU_EN |
  793. RXQ_CTRL_EN;
  794. iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
  795. /* config DMA Engine */
  796. value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
  797. << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
  798. ((((u32) hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
  799. << DMA_CTRL_DMAW_BURST_LEN_SHIFT) | DMA_CTRL_DMAR_EN |
  800. DMA_CTRL_DMAW_EN;
  801. value |= (u32) hw->dma_ord;
  802. if (atl1_rcb_128 == hw->rcb_value)
  803. value |= DMA_CTRL_RCB_VALUE;
  804. iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
  805. /* config CMB / SMB */
  806. value = (hw->cmb_tpd > adapter->tpd_ring.count) ?
  807. hw->cmb_tpd : adapter->tpd_ring.count;
  808. value <<= 16;
  809. value |= hw->cmb_rrd;
  810. iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
  811. value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
  812. iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
  813. iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
  814. /* --- enable CMB / SMB */
  815. value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
  816. iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
  817. value = ioread32(adapter->hw.hw_addr + REG_ISR);
  818. if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
  819. value = 1; /* config failed */
  820. else
  821. value = 0;
  822. /* clear all interrupt status */
  823. iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
  824. iowrite32(0, adapter->hw.hw_addr + REG_ISR);
  825. return value;
  826. }
  827. /*
  828. * atl1_pcie_patch - Patch for PCIE module
  829. */
  830. static void atl1_pcie_patch(struct atl1_adapter *adapter)
  831. {
  832. u32 value;
  833. /* much vendor magic here */
  834. value = 0x6500;
  835. iowrite32(value, adapter->hw.hw_addr + 0x12FC);
  836. /* pcie flow control mode change */
  837. value = ioread32(adapter->hw.hw_addr + 0x1008);
  838. value |= 0x8000;
  839. iowrite32(value, adapter->hw.hw_addr + 0x1008);
  840. }
  841. /*
  842. * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
  843. * on PCI Command register is disable.
  844. * The function enable this bit.
  845. * Brackett, 2006/03/15
  846. */
  847. static void atl1_via_workaround(struct atl1_adapter *adapter)
  848. {
  849. unsigned long value;
  850. value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
  851. if (value & PCI_COMMAND_INTX_DISABLE)
  852. value &= ~PCI_COMMAND_INTX_DISABLE;
  853. iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
  854. }
  855. /*
  856. * atl1_irq_enable - Enable default interrupt generation settings
  857. * @adapter: board private structure
  858. */
  859. static void atl1_irq_enable(struct atl1_adapter *adapter)
  860. {
  861. iowrite32(IMR_NORMAL_MASK, adapter->hw.hw_addr + REG_IMR);
  862. ioread32(adapter->hw.hw_addr + REG_IMR);
  863. }
  864. /*
  865. * atl1_irq_disable - Mask off interrupt generation on the NIC
  866. * @adapter: board private structure
  867. */
  868. static void atl1_irq_disable(struct atl1_adapter *adapter)
  869. {
  870. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  871. ioread32(adapter->hw.hw_addr + REG_IMR);
  872. synchronize_irq(adapter->pdev->irq);
  873. }
  874. static void atl1_clear_phy_int(struct atl1_adapter *adapter)
  875. {
  876. u16 phy_data;
  877. unsigned long flags;
  878. spin_lock_irqsave(&adapter->lock, flags);
  879. atl1_read_phy_reg(&adapter->hw, 19, &phy_data);
  880. spin_unlock_irqrestore(&adapter->lock, flags);
  881. }
  882. static void atl1_inc_smb(struct atl1_adapter *adapter)
  883. {
  884. struct stats_msg_block *smb = adapter->smb.smb;
  885. /* Fill out the OS statistics structure */
  886. adapter->soft_stats.rx_packets += smb->rx_ok;
  887. adapter->soft_stats.tx_packets += smb->tx_ok;
  888. adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
  889. adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
  890. adapter->soft_stats.multicast += smb->rx_mcast;
  891. adapter->soft_stats.collisions += (smb->tx_1_col + smb->tx_2_col * 2 +
  892. smb->tx_late_col + smb->tx_abort_col * adapter->hw.max_retry);
  893. /* Rx Errors */
  894. adapter->soft_stats.rx_errors += (smb->rx_frag + smb->rx_fcs_err +
  895. smb->rx_len_err + smb->rx_sz_ov + smb->rx_rxf_ov +
  896. smb->rx_rrd_ov + smb->rx_align_err);
  897. adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
  898. adapter->soft_stats.rx_length_errors += smb->rx_len_err;
  899. adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
  900. adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
  901. adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
  902. smb->rx_rxf_ov);
  903. adapter->soft_stats.rx_pause += smb->rx_pause;
  904. adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
  905. adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
  906. /* Tx Errors */
  907. adapter->soft_stats.tx_errors += (smb->tx_late_col +
  908. smb->tx_abort_col + smb->tx_underrun + smb->tx_trunc);
  909. adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
  910. adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
  911. adapter->soft_stats.tx_window_errors += smb->tx_late_col;
  912. adapter->soft_stats.excecol += smb->tx_abort_col;
  913. adapter->soft_stats.deffer += smb->tx_defer;
  914. adapter->soft_stats.scc += smb->tx_1_col;
  915. adapter->soft_stats.mcc += smb->tx_2_col;
  916. adapter->soft_stats.latecol += smb->tx_late_col;
  917. adapter->soft_stats.tx_underun += smb->tx_underrun;
  918. adapter->soft_stats.tx_trunc += smb->tx_trunc;
  919. adapter->soft_stats.tx_pause += smb->tx_pause;
  920. adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
  921. adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
  922. adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
  923. adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
  924. adapter->net_stats.multicast = adapter->soft_stats.multicast;
  925. adapter->net_stats.collisions = adapter->soft_stats.collisions;
  926. adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
  927. adapter->net_stats.rx_over_errors =
  928. adapter->soft_stats.rx_missed_errors;
  929. adapter->net_stats.rx_length_errors =
  930. adapter->soft_stats.rx_length_errors;
  931. adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
  932. adapter->net_stats.rx_frame_errors =
  933. adapter->soft_stats.rx_frame_errors;
  934. adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
  935. adapter->net_stats.rx_missed_errors =
  936. adapter->soft_stats.rx_missed_errors;
  937. adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
  938. adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
  939. adapter->net_stats.tx_aborted_errors =
  940. adapter->soft_stats.tx_aborted_errors;
  941. adapter->net_stats.tx_window_errors =
  942. adapter->soft_stats.tx_window_errors;
  943. adapter->net_stats.tx_carrier_errors =
  944. adapter->soft_stats.tx_carrier_errors;
  945. }
  946. /*
  947. * atl1_get_stats - Get System Network Statistics
  948. * @netdev: network interface device structure
  949. *
  950. * Returns the address of the device statistics structure.
  951. * The statistics are actually updated from the timer callback.
  952. */
  953. static struct net_device_stats *atl1_get_stats(struct net_device *netdev)
  954. {
  955. struct atl1_adapter *adapter = netdev_priv(netdev);
  956. return &adapter->net_stats;
  957. }
  958. static void atl1_update_mailbox(struct atl1_adapter *adapter)
  959. {
  960. unsigned long flags;
  961. u32 tpd_next_to_use;
  962. u32 rfd_next_to_use;
  963. u32 rrd_next_to_clean;
  964. u32 value;
  965. spin_lock_irqsave(&adapter->mb_lock, flags);
  966. tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
  967. rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
  968. rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
  969. value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
  970. MB_RFD_PROD_INDX_SHIFT) |
  971. ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
  972. MB_RRD_CONS_INDX_SHIFT) |
  973. ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
  974. MB_TPD_PROD_INDX_SHIFT);
  975. iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
  976. spin_unlock_irqrestore(&adapter->mb_lock, flags);
  977. }
  978. static void atl1_clean_alloc_flag(struct atl1_adapter *adapter,
  979. struct rx_return_desc *rrd, u16 offset)
  980. {
  981. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  982. while (rfd_ring->next_to_clean != (rrd->buf_indx + offset)) {
  983. rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced = 0;
  984. if (++rfd_ring->next_to_clean == rfd_ring->count) {
  985. rfd_ring->next_to_clean = 0;
  986. }
  987. }
  988. }
  989. static void atl1_update_rfd_index(struct atl1_adapter *adapter,
  990. struct rx_return_desc *rrd)
  991. {
  992. u16 num_buf;
  993. num_buf = (rrd->xsz.xsum_sz.pkt_size + adapter->rx_buffer_len - 1) /
  994. adapter->rx_buffer_len;
  995. if (rrd->num_buf == num_buf)
  996. /* clean alloc flag for bad rrd */
  997. atl1_clean_alloc_flag(adapter, rrd, num_buf);
  998. }
  999. static void atl1_rx_checksum(struct atl1_adapter *adapter,
  1000. struct rx_return_desc *rrd, struct sk_buff *skb)
  1001. {
  1002. struct pci_dev *pdev = adapter->pdev;
  1003. skb->ip_summed = CHECKSUM_NONE;
  1004. if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
  1005. if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
  1006. ERR_FLAG_CODE | ERR_FLAG_OV)) {
  1007. adapter->hw_csum_err++;
  1008. dev_printk(KERN_DEBUG, &pdev->dev,
  1009. "rx checksum error\n");
  1010. return;
  1011. }
  1012. }
  1013. /* not IPv4 */
  1014. if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
  1015. /* checksum is invalid, but it's not an IPv4 pkt, so ok */
  1016. return;
  1017. /* IPv4 packet */
  1018. if (likely(!(rrd->err_flg &
  1019. (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
  1020. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1021. adapter->hw_csum_good++;
  1022. return;
  1023. }
  1024. /* IPv4, but hardware thinks its checksum is wrong */
  1025. dev_printk(KERN_DEBUG, &pdev->dev,
  1026. "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
  1027. rrd->pkt_flg, rrd->err_flg);
  1028. skb->ip_summed = CHECKSUM_COMPLETE;
  1029. skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
  1030. adapter->hw_csum_err++;
  1031. return;
  1032. }
  1033. /*
  1034. * atl1_alloc_rx_buffers - Replace used receive buffers
  1035. * @adapter: address of board private structure
  1036. */
  1037. static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
  1038. {
  1039. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1040. struct pci_dev *pdev = adapter->pdev;
  1041. struct page *page;
  1042. unsigned long offset;
  1043. struct atl1_buffer *buffer_info, *next_info;
  1044. struct sk_buff *skb;
  1045. u16 num_alloc = 0;
  1046. u16 rfd_next_to_use, next_next;
  1047. struct rx_free_desc *rfd_desc;
  1048. next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
  1049. if (++next_next == rfd_ring->count)
  1050. next_next = 0;
  1051. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1052. next_info = &rfd_ring->buffer_info[next_next];
  1053. while (!buffer_info->alloced && !next_info->alloced) {
  1054. if (buffer_info->skb) {
  1055. buffer_info->alloced = 1;
  1056. goto next;
  1057. }
  1058. rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
  1059. skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
  1060. if (unlikely(!skb)) { /* Better luck next round */
  1061. adapter->net_stats.rx_dropped++;
  1062. break;
  1063. }
  1064. /*
  1065. * Make buffer alignment 2 beyond a 16 byte boundary
  1066. * this will result in a 16 byte aligned IP header after
  1067. * the 14 byte MAC header is removed
  1068. */
  1069. skb_reserve(skb, NET_IP_ALIGN);
  1070. buffer_info->alloced = 1;
  1071. buffer_info->skb = skb;
  1072. buffer_info->length = (u16) adapter->rx_buffer_len;
  1073. page = virt_to_page(skb->data);
  1074. offset = (unsigned long)skb->data & ~PAGE_MASK;
  1075. buffer_info->dma = pci_map_page(pdev, page, offset,
  1076. adapter->rx_buffer_len,
  1077. PCI_DMA_FROMDEVICE);
  1078. rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  1079. rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
  1080. rfd_desc->coalese = 0;
  1081. next:
  1082. rfd_next_to_use = next_next;
  1083. if (unlikely(++next_next == rfd_ring->count))
  1084. next_next = 0;
  1085. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1086. next_info = &rfd_ring->buffer_info[next_next];
  1087. num_alloc++;
  1088. }
  1089. if (num_alloc) {
  1090. /*
  1091. * Force memory writes to complete before letting h/w
  1092. * know there are new descriptors to fetch. (Only
  1093. * applicable for weak-ordered memory model archs,
  1094. * such as IA-64).
  1095. */
  1096. wmb();
  1097. atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
  1098. }
  1099. return num_alloc;
  1100. }
  1101. static void atl1_intr_rx(struct atl1_adapter *adapter)
  1102. {
  1103. int i, count;
  1104. u16 length;
  1105. u16 rrd_next_to_clean;
  1106. u32 value;
  1107. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1108. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  1109. struct atl1_buffer *buffer_info;
  1110. struct rx_return_desc *rrd;
  1111. struct sk_buff *skb;
  1112. count = 0;
  1113. rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
  1114. while (1) {
  1115. rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
  1116. i = 1;
  1117. if (likely(rrd->xsz.valid)) { /* packet valid */
  1118. chk_rrd:
  1119. /* check rrd status */
  1120. if (likely(rrd->num_buf == 1))
  1121. goto rrd_ok;
  1122. /* rrd seems to be bad */
  1123. if (unlikely(i-- > 0)) {
  1124. /* rrd may not be DMAed completely */
  1125. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  1126. "incomplete RRD DMA transfer\n");
  1127. udelay(1);
  1128. goto chk_rrd;
  1129. }
  1130. /* bad rrd */
  1131. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  1132. "bad RRD\n");
  1133. /* see if update RFD index */
  1134. if (rrd->num_buf > 1)
  1135. atl1_update_rfd_index(adapter, rrd);
  1136. /* update rrd */
  1137. rrd->xsz.valid = 0;
  1138. if (++rrd_next_to_clean == rrd_ring->count)
  1139. rrd_next_to_clean = 0;
  1140. count++;
  1141. continue;
  1142. } else { /* current rrd still not be updated */
  1143. break;
  1144. }
  1145. rrd_ok:
  1146. /* clean alloc flag for bad rrd */
  1147. atl1_clean_alloc_flag(adapter, rrd, 0);
  1148. buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
  1149. if (++rfd_ring->next_to_clean == rfd_ring->count)
  1150. rfd_ring->next_to_clean = 0;
  1151. /* update rrd next to clean */
  1152. if (++rrd_next_to_clean == rrd_ring->count)
  1153. rrd_next_to_clean = 0;
  1154. count++;
  1155. if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
  1156. if (!(rrd->err_flg &
  1157. (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
  1158. | ERR_FLAG_LEN))) {
  1159. /* packet error, don't need upstream */
  1160. buffer_info->alloced = 0;
  1161. rrd->xsz.valid = 0;
  1162. continue;
  1163. }
  1164. }
  1165. /* Good Receive */
  1166. pci_unmap_page(adapter->pdev, buffer_info->dma,
  1167. buffer_info->length, PCI_DMA_FROMDEVICE);
  1168. skb = buffer_info->skb;
  1169. length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
  1170. skb_put(skb, length - ETH_FCS_LEN);
  1171. /* Receive Checksum Offload */
  1172. atl1_rx_checksum(adapter, rrd, skb);
  1173. skb->protocol = eth_type_trans(skb, adapter->netdev);
  1174. if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
  1175. u16 vlan_tag = (rrd->vlan_tag >> 4) |
  1176. ((rrd->vlan_tag & 7) << 13) |
  1177. ((rrd->vlan_tag & 8) << 9);
  1178. vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
  1179. } else
  1180. netif_rx(skb);
  1181. /* let protocol layer free skb */
  1182. buffer_info->skb = NULL;
  1183. buffer_info->alloced = 0;
  1184. rrd->xsz.valid = 0;
  1185. adapter->netdev->last_rx = jiffies;
  1186. }
  1187. atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
  1188. atl1_alloc_rx_buffers(adapter);
  1189. /* update mailbox ? */
  1190. if (count) {
  1191. u32 tpd_next_to_use;
  1192. u32 rfd_next_to_use;
  1193. u32 rrd_next_to_clean;
  1194. spin_lock(&adapter->mb_lock);
  1195. tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
  1196. rfd_next_to_use =
  1197. atomic_read(&adapter->rfd_ring.next_to_use);
  1198. rrd_next_to_clean =
  1199. atomic_read(&adapter->rrd_ring.next_to_clean);
  1200. value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
  1201. MB_RFD_PROD_INDX_SHIFT) |
  1202. ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
  1203. MB_RRD_CONS_INDX_SHIFT) |
  1204. ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
  1205. MB_TPD_PROD_INDX_SHIFT);
  1206. iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
  1207. spin_unlock(&adapter->mb_lock);
  1208. }
  1209. }
  1210. static void atl1_intr_tx(struct atl1_adapter *adapter)
  1211. {
  1212. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1213. struct atl1_buffer *buffer_info;
  1214. u16 sw_tpd_next_to_clean;
  1215. u16 cmb_tpd_next_to_clean;
  1216. sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1217. cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
  1218. while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
  1219. struct tx_packet_desc *tpd;
  1220. tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
  1221. buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
  1222. if (buffer_info->dma) {
  1223. pci_unmap_page(adapter->pdev, buffer_info->dma,
  1224. buffer_info->length, PCI_DMA_TODEVICE);
  1225. buffer_info->dma = 0;
  1226. }
  1227. if (buffer_info->skb) {
  1228. dev_kfree_skb_irq(buffer_info->skb);
  1229. buffer_info->skb = NULL;
  1230. }
  1231. tpd->buffer_addr = 0;
  1232. tpd->desc.data = 0;
  1233. if (++sw_tpd_next_to_clean == tpd_ring->count)
  1234. sw_tpd_next_to_clean = 0;
  1235. }
  1236. atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
  1237. if (netif_queue_stopped(adapter->netdev)
  1238. && netif_carrier_ok(adapter->netdev))
  1239. netif_wake_queue(adapter->netdev);
  1240. }
  1241. static u16 atl1_tpd_avail(struct atl1_tpd_ring *tpd_ring)
  1242. {
  1243. u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1244. u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
  1245. return ((next_to_clean > next_to_use) ?
  1246. next_to_clean - next_to_use - 1 :
  1247. tpd_ring->count + next_to_clean - next_to_use - 1);
  1248. }
  1249. static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
  1250. struct tso_param *tso)
  1251. {
  1252. /* We enter this function holding a spinlock. */
  1253. u8 ipofst;
  1254. int err;
  1255. if (skb_shinfo(skb)->gso_size) {
  1256. if (skb_header_cloned(skb)) {
  1257. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1258. if (unlikely(err))
  1259. return err;
  1260. }
  1261. if (skb->protocol == ntohs(ETH_P_IP)) {
  1262. struct iphdr *iph = ip_hdr(skb);
  1263. iph->tot_len = 0;
  1264. iph->check = 0;
  1265. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  1266. iph->daddr, 0, IPPROTO_TCP, 0);
  1267. ipofst = skb_network_offset(skb);
  1268. if (ipofst != ETH_HLEN) /* 802.3 frame */
  1269. tso->tsopl |= 1 << TSO_PARAM_ETHTYPE_SHIFT;
  1270. tso->tsopl |= (iph->ihl &
  1271. CSUM_PARAM_IPHL_MASK) << CSUM_PARAM_IPHL_SHIFT;
  1272. tso->tsopl |= (tcp_hdrlen(skb) &
  1273. TSO_PARAM_TCPHDRLEN_MASK) <<
  1274. TSO_PARAM_TCPHDRLEN_SHIFT;
  1275. tso->tsopl |= (skb_shinfo(skb)->gso_size &
  1276. TSO_PARAM_MSS_MASK) << TSO_PARAM_MSS_SHIFT;
  1277. tso->tsopl |= 1 << TSO_PARAM_IPCKSUM_SHIFT;
  1278. tso->tsopl |= 1 << TSO_PARAM_TCPCKSUM_SHIFT;
  1279. tso->tsopl |= 1 << TSO_PARAM_SEGMENT_SHIFT;
  1280. return true;
  1281. }
  1282. }
  1283. return false;
  1284. }
  1285. static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
  1286. struct csum_param *csum)
  1287. {
  1288. u8 css, cso;
  1289. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1290. cso = skb_transport_offset(skb);
  1291. css = cso + skb->csum_offset;
  1292. if (unlikely(cso & 0x1)) {
  1293. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  1294. "payload offset not an even number\n");
  1295. return -1;
  1296. }
  1297. csum->csumpl |= (cso & CSUM_PARAM_PLOADOFFSET_MASK) <<
  1298. CSUM_PARAM_PLOADOFFSET_SHIFT;
  1299. csum->csumpl |= (css & CSUM_PARAM_XSUMOFFSET_MASK) <<
  1300. CSUM_PARAM_XSUMOFFSET_SHIFT;
  1301. csum->csumpl |= 1 << CSUM_PARAM_CUSTOMCKSUM_SHIFT;
  1302. return true;
  1303. }
  1304. return true;
  1305. }
  1306. static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
  1307. bool tcp_seg)
  1308. {
  1309. /* We enter this function holding a spinlock. */
  1310. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1311. struct atl1_buffer *buffer_info;
  1312. struct page *page;
  1313. int first_buf_len = skb->len;
  1314. unsigned long offset;
  1315. unsigned int nr_frags;
  1316. unsigned int f;
  1317. u16 tpd_next_to_use;
  1318. u16 proto_hdr_len;
  1319. u16 i, m, len12;
  1320. first_buf_len -= skb->data_len;
  1321. nr_frags = skb_shinfo(skb)->nr_frags;
  1322. tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
  1323. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1324. if (unlikely(buffer_info->skb))
  1325. BUG();
  1326. buffer_info->skb = NULL; /* put skb in last TPD */
  1327. if (tcp_seg) {
  1328. /* TSO/GSO */
  1329. proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1330. buffer_info->length = proto_hdr_len;
  1331. page = virt_to_page(skb->data);
  1332. offset = (unsigned long)skb->data & ~PAGE_MASK;
  1333. buffer_info->dma = pci_map_page(adapter->pdev, page,
  1334. offset, proto_hdr_len,
  1335. PCI_DMA_TODEVICE);
  1336. if (++tpd_next_to_use == tpd_ring->count)
  1337. tpd_next_to_use = 0;
  1338. if (first_buf_len > proto_hdr_len) {
  1339. len12 = first_buf_len - proto_hdr_len;
  1340. m = (len12 + ATL1_MAX_TX_BUF_LEN - 1) /
  1341. ATL1_MAX_TX_BUF_LEN;
  1342. for (i = 0; i < m; i++) {
  1343. buffer_info =
  1344. &tpd_ring->buffer_info[tpd_next_to_use];
  1345. buffer_info->skb = NULL;
  1346. buffer_info->length =
  1347. (ATL1_MAX_TX_BUF_LEN >=
  1348. len12) ? ATL1_MAX_TX_BUF_LEN : len12;
  1349. len12 -= buffer_info->length;
  1350. page = virt_to_page(skb->data +
  1351. (proto_hdr_len +
  1352. i * ATL1_MAX_TX_BUF_LEN));
  1353. offset = (unsigned long)(skb->data +
  1354. (proto_hdr_len +
  1355. i * ATL1_MAX_TX_BUF_LEN)) & ~PAGE_MASK;
  1356. buffer_info->dma = pci_map_page(adapter->pdev,
  1357. page, offset, buffer_info->length,
  1358. PCI_DMA_TODEVICE);
  1359. if (++tpd_next_to_use == tpd_ring->count)
  1360. tpd_next_to_use = 0;
  1361. }
  1362. }
  1363. } else {
  1364. /* not TSO/GSO */
  1365. buffer_info->length = first_buf_len;
  1366. page = virt_to_page(skb->data);
  1367. offset = (unsigned long)skb->data & ~PAGE_MASK;
  1368. buffer_info->dma = pci_map_page(adapter->pdev, page,
  1369. offset, first_buf_len, PCI_DMA_TODEVICE);
  1370. if (++tpd_next_to_use == tpd_ring->count)
  1371. tpd_next_to_use = 0;
  1372. }
  1373. for (f = 0; f < nr_frags; f++) {
  1374. struct skb_frag_struct *frag;
  1375. u16 lenf, i, m;
  1376. frag = &skb_shinfo(skb)->frags[f];
  1377. lenf = frag->size;
  1378. m = (lenf + ATL1_MAX_TX_BUF_LEN - 1) / ATL1_MAX_TX_BUF_LEN;
  1379. for (i = 0; i < m; i++) {
  1380. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1381. if (unlikely(buffer_info->skb))
  1382. BUG();
  1383. buffer_info->skb = NULL;
  1384. buffer_info->length = (lenf > ATL1_MAX_TX_BUF_LEN) ?
  1385. ATL1_MAX_TX_BUF_LEN : lenf;
  1386. lenf -= buffer_info->length;
  1387. buffer_info->dma = pci_map_page(adapter->pdev,
  1388. frag->page,
  1389. frag->page_offset + (i * ATL1_MAX_TX_BUF_LEN),
  1390. buffer_info->length, PCI_DMA_TODEVICE);
  1391. if (++tpd_next_to_use == tpd_ring->count)
  1392. tpd_next_to_use = 0;
  1393. }
  1394. }
  1395. /* last tpd's buffer-info */
  1396. buffer_info->skb = skb;
  1397. }
  1398. static void atl1_tx_queue(struct atl1_adapter *adapter, int count,
  1399. union tpd_descr *descr)
  1400. {
  1401. /* We enter this function holding a spinlock. */
  1402. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1403. int j;
  1404. u32 val;
  1405. struct atl1_buffer *buffer_info;
  1406. struct tx_packet_desc *tpd;
  1407. u16 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
  1408. for (j = 0; j < count; j++) {
  1409. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1410. tpd = ATL1_TPD_DESC(&adapter->tpd_ring, tpd_next_to_use);
  1411. tpd->desc.csum.csumpu = descr->csum.csumpu;
  1412. tpd->desc.csum.csumpl = descr->csum.csumpl;
  1413. tpd->desc.tso.tsopu = descr->tso.tsopu;
  1414. tpd->desc.tso.tsopl = descr->tso.tsopl;
  1415. tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1416. tpd->desc.data = descr->data;
  1417. tpd->desc.csum.csumpu |= (cpu_to_le16(buffer_info->length) &
  1418. CSUM_PARAM_BUFLEN_MASK) << CSUM_PARAM_BUFLEN_SHIFT;
  1419. val = (descr->tso.tsopl >> TSO_PARAM_SEGMENT_SHIFT) &
  1420. TSO_PARAM_SEGMENT_MASK;
  1421. if (val && !j)
  1422. tpd->desc.tso.tsopl |= 1 << TSO_PARAM_HDRFLAG_SHIFT;
  1423. if (j == (count - 1))
  1424. tpd->desc.csum.csumpl |= 1 << CSUM_PARAM_EOP_SHIFT;
  1425. if (++tpd_next_to_use == tpd_ring->count)
  1426. tpd_next_to_use = 0;
  1427. }
  1428. /*
  1429. * Force memory writes to complete before letting h/w
  1430. * know there are new descriptors to fetch. (Only
  1431. * applicable for weak-ordered memory model archs,
  1432. * such as IA-64).
  1433. */
  1434. wmb();
  1435. atomic_set(&tpd_ring->next_to_use, (int)tpd_next_to_use);
  1436. }
  1437. static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1438. {
  1439. struct atl1_adapter *adapter = netdev_priv(netdev);
  1440. int len = skb->len;
  1441. int tso;
  1442. int count = 1;
  1443. int ret_val;
  1444. u32 val;
  1445. union tpd_descr param;
  1446. u16 frag_size;
  1447. u16 vlan_tag;
  1448. unsigned long flags;
  1449. unsigned int nr_frags = 0;
  1450. unsigned int mss = 0;
  1451. unsigned int f;
  1452. unsigned int proto_hdr_len;
  1453. len -= skb->data_len;
  1454. if (unlikely(skb->len == 0)) {
  1455. dev_kfree_skb_any(skb);
  1456. return NETDEV_TX_OK;
  1457. }
  1458. param.data = 0;
  1459. param.tso.tsopu = 0;
  1460. param.tso.tsopl = 0;
  1461. param.csum.csumpu = 0;
  1462. param.csum.csumpl = 0;
  1463. /* nr_frags will be nonzero if we're doing scatter/gather (SG) */
  1464. nr_frags = skb_shinfo(skb)->nr_frags;
  1465. for (f = 0; f < nr_frags; f++) {
  1466. frag_size = skb_shinfo(skb)->frags[f].size;
  1467. if (frag_size)
  1468. count += (frag_size + ATL1_MAX_TX_BUF_LEN - 1) /
  1469. ATL1_MAX_TX_BUF_LEN;
  1470. }
  1471. /* mss will be nonzero if we're doing segment offload (TSO/GSO) */
  1472. mss = skb_shinfo(skb)->gso_size;
  1473. if (mss) {
  1474. if (skb->protocol == htons(ETH_P_IP)) {
  1475. proto_hdr_len = (skb_transport_offset(skb) +
  1476. tcp_hdrlen(skb));
  1477. if (unlikely(proto_hdr_len > len)) {
  1478. dev_kfree_skb_any(skb);
  1479. return NETDEV_TX_OK;
  1480. }
  1481. /* need additional TPD ? */
  1482. if (proto_hdr_len != len)
  1483. count += (len - proto_hdr_len +
  1484. ATL1_MAX_TX_BUF_LEN - 1) /
  1485. ATL1_MAX_TX_BUF_LEN;
  1486. }
  1487. }
  1488. if (!spin_trylock_irqsave(&adapter->lock, flags)) {
  1489. /* Can't get lock - tell upper layer to requeue */
  1490. dev_printk(KERN_DEBUG, &adapter->pdev->dev, "tx locked\n");
  1491. return NETDEV_TX_LOCKED;
  1492. }
  1493. if (atl1_tpd_avail(&adapter->tpd_ring) < count) {
  1494. /* not enough descriptors */
  1495. netif_stop_queue(netdev);
  1496. spin_unlock_irqrestore(&adapter->lock, flags);
  1497. dev_printk(KERN_DEBUG, &adapter->pdev->dev, "tx busy\n");
  1498. return NETDEV_TX_BUSY;
  1499. }
  1500. param.data = 0;
  1501. if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1502. vlan_tag = vlan_tx_tag_get(skb);
  1503. vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
  1504. ((vlan_tag >> 9) & 0x8);
  1505. param.csum.csumpl |= 1 << CSUM_PARAM_INSVLAG_SHIFT;
  1506. param.csum.csumpu |= (vlan_tag & CSUM_PARAM_VALANTAG_MASK) <<
  1507. CSUM_PARAM_VALAN_SHIFT;
  1508. }
  1509. tso = atl1_tso(adapter, skb, &param.tso);
  1510. if (tso < 0) {
  1511. spin_unlock_irqrestore(&adapter->lock, flags);
  1512. dev_kfree_skb_any(skb);
  1513. return NETDEV_TX_OK;
  1514. }
  1515. if (!tso) {
  1516. ret_val = atl1_tx_csum(adapter, skb, &param.csum);
  1517. if (ret_val < 0) {
  1518. spin_unlock_irqrestore(&adapter->lock, flags);
  1519. dev_kfree_skb_any(skb);
  1520. return NETDEV_TX_OK;
  1521. }
  1522. }
  1523. val = (param.csum.csumpl >> CSUM_PARAM_SEGMENT_SHIFT) &
  1524. CSUM_PARAM_SEGMENT_MASK;
  1525. atl1_tx_map(adapter, skb, 1 == val);
  1526. atl1_tx_queue(adapter, count, &param);
  1527. netdev->trans_start = jiffies;
  1528. spin_unlock_irqrestore(&adapter->lock, flags);
  1529. atl1_update_mailbox(adapter);
  1530. return NETDEV_TX_OK;
  1531. }
  1532. /*
  1533. * atl1_intr - Interrupt Handler
  1534. * @irq: interrupt number
  1535. * @data: pointer to a network interface device structure
  1536. * @pt_regs: CPU registers structure
  1537. */
  1538. static irqreturn_t atl1_intr(int irq, void *data)
  1539. {
  1540. struct atl1_adapter *adapter = netdev_priv(data);
  1541. u32 status;
  1542. u8 update_rx;
  1543. int max_ints = 10;
  1544. status = adapter->cmb.cmb->int_stats;
  1545. if (!status)
  1546. return IRQ_NONE;
  1547. update_rx = 0;
  1548. do {
  1549. /* clear CMB interrupt status at once */
  1550. adapter->cmb.cmb->int_stats = 0;
  1551. if (status & ISR_GPHY) /* clear phy status */
  1552. atl1_clear_phy_int(adapter);
  1553. /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
  1554. iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
  1555. /* check if SMB intr */
  1556. if (status & ISR_SMB)
  1557. atl1_inc_smb(adapter);
  1558. /* check if PCIE PHY Link down */
  1559. if (status & ISR_PHY_LINKDOWN) {
  1560. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  1561. "pcie phy link down %x\n", status);
  1562. if (netif_running(adapter->netdev)) { /* reset MAC */
  1563. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  1564. schedule_work(&adapter->pcie_dma_to_rst_task);
  1565. return IRQ_HANDLED;
  1566. }
  1567. }
  1568. /* check if DMA read/write error ? */
  1569. if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
  1570. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  1571. "pcie DMA r/w error (status = 0x%x)\n",
  1572. status);
  1573. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  1574. schedule_work(&adapter->pcie_dma_to_rst_task);
  1575. return IRQ_HANDLED;
  1576. }
  1577. /* link event */
  1578. if (status & ISR_GPHY) {
  1579. adapter->soft_stats.tx_carrier_errors++;
  1580. atl1_check_for_link(adapter);
  1581. }
  1582. /* transmit event */
  1583. if (status & ISR_CMB_TX)
  1584. atl1_intr_tx(adapter);
  1585. /* rx exception */
  1586. if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
  1587. ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
  1588. ISR_HOST_RRD_OV | ISR_CMB_RX))) {
  1589. if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
  1590. ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
  1591. ISR_HOST_RRD_OV))
  1592. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  1593. "rx exception, ISR = 0x%x\n", status);
  1594. atl1_intr_rx(adapter);
  1595. }
  1596. if (--max_ints < 0)
  1597. break;
  1598. } while ((status = adapter->cmb.cmb->int_stats));
  1599. /* re-enable Interrupt */
  1600. iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
  1601. return IRQ_HANDLED;
  1602. }
  1603. /*
  1604. * atl1_watchdog - Timer Call-back
  1605. * @data: pointer to netdev cast into an unsigned long
  1606. */
  1607. static void atl1_watchdog(unsigned long data)
  1608. {
  1609. struct atl1_adapter *adapter = (struct atl1_adapter *)data;
  1610. /* Reset the timer */
  1611. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  1612. }
  1613. /*
  1614. * atl1_phy_config - Timer Call-back
  1615. * @data: pointer to netdev cast into an unsigned long
  1616. */
  1617. static void atl1_phy_config(unsigned long data)
  1618. {
  1619. struct atl1_adapter *adapter = (struct atl1_adapter *)data;
  1620. struct atl1_hw *hw = &adapter->hw;
  1621. unsigned long flags;
  1622. spin_lock_irqsave(&adapter->lock, flags);
  1623. adapter->phy_timer_pending = false;
  1624. atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
  1625. atl1_write_phy_reg(hw, MII_AT001_CR, hw->mii_1000t_ctrl_reg);
  1626. atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
  1627. spin_unlock_irqrestore(&adapter->lock, flags);
  1628. }
  1629. /*
  1630. * atl1_tx_timeout - Respond to a Tx Hang
  1631. * @netdev: network interface device structure
  1632. */
  1633. static void atl1_tx_timeout(struct net_device *netdev)
  1634. {
  1635. struct atl1_adapter *adapter = netdev_priv(netdev);
  1636. /* Do the reset outside of interrupt context */
  1637. schedule_work(&adapter->tx_timeout_task);
  1638. }
  1639. /*
  1640. * Orphaned vendor comment left intact here:
  1641. * <vendor comment>
  1642. * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
  1643. * will assert. We do soft reset <0x1400=1> according
  1644. * with the SPEC. BUT, it seemes that PCIE or DMA
  1645. * state-machine will not be reset. DMAR_TO_INT will
  1646. * assert again and again.
  1647. * </vendor comment>
  1648. */
  1649. static void atl1_tx_timeout_task(struct work_struct *work)
  1650. {
  1651. struct atl1_adapter *adapter =
  1652. container_of(work, struct atl1_adapter, tx_timeout_task);
  1653. struct net_device *netdev = adapter->netdev;
  1654. netif_device_detach(netdev);
  1655. atl1_down(adapter);
  1656. atl1_up(adapter);
  1657. netif_device_attach(netdev);
  1658. }
  1659. /*
  1660. * atl1_link_chg_task - deal with link change event Out of interrupt context
  1661. */
  1662. static void atl1_link_chg_task(struct work_struct *work)
  1663. {
  1664. struct atl1_adapter *adapter =
  1665. container_of(work, struct atl1_adapter, link_chg_task);
  1666. unsigned long flags;
  1667. spin_lock_irqsave(&adapter->lock, flags);
  1668. atl1_check_link(adapter);
  1669. spin_unlock_irqrestore(&adapter->lock, flags);
  1670. }
  1671. static void atl1_vlan_rx_register(struct net_device *netdev,
  1672. struct vlan_group *grp)
  1673. {
  1674. struct atl1_adapter *adapter = netdev_priv(netdev);
  1675. unsigned long flags;
  1676. u32 ctrl;
  1677. spin_lock_irqsave(&adapter->lock, flags);
  1678. /* atl1_irq_disable(adapter); */
  1679. adapter->vlgrp = grp;
  1680. if (grp) {
  1681. /* enable VLAN tag insert/strip */
  1682. ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
  1683. ctrl |= MAC_CTRL_RMV_VLAN;
  1684. iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
  1685. } else {
  1686. /* disable VLAN tag insert/strip */
  1687. ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
  1688. ctrl &= ~MAC_CTRL_RMV_VLAN;
  1689. iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
  1690. }
  1691. /* atl1_irq_enable(adapter); */
  1692. spin_unlock_irqrestore(&adapter->lock, flags);
  1693. }
  1694. static void atl1_restore_vlan(struct atl1_adapter *adapter)
  1695. {
  1696. atl1_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1697. }
  1698. int atl1_reset(struct atl1_adapter *adapter)
  1699. {
  1700. int ret;
  1701. ret = atl1_reset_hw(&adapter->hw);
  1702. if (ret != ATL1_SUCCESS)
  1703. return ret;
  1704. return atl1_init_hw(&adapter->hw);
  1705. }
  1706. s32 atl1_up(struct atl1_adapter *adapter)
  1707. {
  1708. struct net_device *netdev = adapter->netdev;
  1709. int err;
  1710. int irq_flags = IRQF_SAMPLE_RANDOM;
  1711. /* hardware has been reset, we need to reload some things */
  1712. atl1_set_multi(netdev);
  1713. atl1_init_ring_ptrs(adapter);
  1714. atl1_restore_vlan(adapter);
  1715. err = atl1_alloc_rx_buffers(adapter);
  1716. if (unlikely(!err)) /* no RX BUFFER allocated */
  1717. return -ENOMEM;
  1718. if (unlikely(atl1_configure(adapter))) {
  1719. err = -EIO;
  1720. goto err_up;
  1721. }
  1722. err = pci_enable_msi(adapter->pdev);
  1723. if (err) {
  1724. dev_info(&adapter->pdev->dev,
  1725. "Unable to enable MSI: %d\n", err);
  1726. irq_flags |= IRQF_SHARED;
  1727. }
  1728. err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
  1729. netdev->name, netdev);
  1730. if (unlikely(err))
  1731. goto err_up;
  1732. mod_timer(&adapter->watchdog_timer, jiffies);
  1733. atl1_irq_enable(adapter);
  1734. atl1_check_link(adapter);
  1735. return 0;
  1736. err_up:
  1737. pci_disable_msi(adapter->pdev);
  1738. /* free rx_buffers */
  1739. atl1_clean_rx_ring(adapter);
  1740. return err;
  1741. }
  1742. void atl1_down(struct atl1_adapter *adapter)
  1743. {
  1744. struct net_device *netdev = adapter->netdev;
  1745. del_timer_sync(&adapter->watchdog_timer);
  1746. del_timer_sync(&adapter->phy_config_timer);
  1747. adapter->phy_timer_pending = false;
  1748. atl1_irq_disable(adapter);
  1749. free_irq(adapter->pdev->irq, netdev);
  1750. pci_disable_msi(adapter->pdev);
  1751. atl1_reset_hw(&adapter->hw);
  1752. adapter->cmb.cmb->int_stats = 0;
  1753. adapter->link_speed = SPEED_0;
  1754. adapter->link_duplex = -1;
  1755. netif_carrier_off(netdev);
  1756. netif_stop_queue(netdev);
  1757. atl1_clean_tx_ring(adapter);
  1758. atl1_clean_rx_ring(adapter);
  1759. }
  1760. /*
  1761. * atl1_open - Called when a network interface is made active
  1762. * @netdev: network interface device structure
  1763. *
  1764. * Returns 0 on success, negative value on failure
  1765. *
  1766. * The open entry point is called when a network interface is made
  1767. * active by the system (IFF_UP). At this point all resources needed
  1768. * for transmit and receive operations are allocated, the interrupt
  1769. * handler is registered with the OS, the watchdog timer is started,
  1770. * and the stack is notified that the interface is ready.
  1771. */
  1772. static int atl1_open(struct net_device *netdev)
  1773. {
  1774. struct atl1_adapter *adapter = netdev_priv(netdev);
  1775. int err;
  1776. /* allocate transmit descriptors */
  1777. err = atl1_setup_ring_resources(adapter);
  1778. if (err)
  1779. return err;
  1780. err = atl1_up(adapter);
  1781. if (err)
  1782. goto err_up;
  1783. return 0;
  1784. err_up:
  1785. atl1_reset(adapter);
  1786. return err;
  1787. }
  1788. /*
  1789. * atl1_close - Disables a network interface
  1790. * @netdev: network interface device structure
  1791. *
  1792. * Returns 0, this is not allowed to fail
  1793. *
  1794. * The close entry point is called when an interface is de-activated
  1795. * by the OS. The hardware is still under the drivers control, but
  1796. * needs to be disabled. A global MAC reset is issued to stop the
  1797. * hardware, and all transmit and receive resources are freed.
  1798. */
  1799. static int atl1_close(struct net_device *netdev)
  1800. {
  1801. struct atl1_adapter *adapter = netdev_priv(netdev);
  1802. atl1_down(adapter);
  1803. atl1_free_ring_resources(adapter);
  1804. return 0;
  1805. }
  1806. #ifdef CONFIG_PM
  1807. static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
  1808. {
  1809. struct net_device *netdev = pci_get_drvdata(pdev);
  1810. struct atl1_adapter *adapter = netdev_priv(netdev);
  1811. struct atl1_hw *hw = &adapter->hw;
  1812. u32 ctrl = 0;
  1813. u32 wufc = adapter->wol;
  1814. netif_device_detach(netdev);
  1815. if (netif_running(netdev))
  1816. atl1_down(adapter);
  1817. atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
  1818. atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
  1819. if (ctrl & BMSR_LSTATUS)
  1820. wufc &= ~ATL1_WUFC_LNKC;
  1821. /* reduce speed to 10/100M */
  1822. if (wufc) {
  1823. atl1_phy_enter_power_saving(hw);
  1824. /* if resume, let driver to re- setup link */
  1825. hw->phy_configured = false;
  1826. atl1_set_mac_addr(hw);
  1827. atl1_set_multi(netdev);
  1828. ctrl = 0;
  1829. /* turn on magic packet wol */
  1830. if (wufc & ATL1_WUFC_MAG)
  1831. ctrl = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
  1832. /* turn on Link change WOL */
  1833. if (wufc & ATL1_WUFC_LNKC)
  1834. ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
  1835. iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
  1836. /* turn on all-multi mode if wake on multicast is enabled */
  1837. ctrl = ioread32(hw->hw_addr + REG_MAC_CTRL);
  1838. ctrl &= ~MAC_CTRL_DBG;
  1839. ctrl &= ~MAC_CTRL_PROMIS_EN;
  1840. if (wufc & ATL1_WUFC_MC)
  1841. ctrl |= MAC_CTRL_MC_ALL_EN;
  1842. else
  1843. ctrl &= ~MAC_CTRL_MC_ALL_EN;
  1844. /* turn on broadcast mode if wake on-BC is enabled */
  1845. if (wufc & ATL1_WUFC_BC)
  1846. ctrl |= MAC_CTRL_BC_EN;
  1847. else
  1848. ctrl &= ~MAC_CTRL_BC_EN;
  1849. /* enable RX */
  1850. ctrl |= MAC_CTRL_RX_EN;
  1851. iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
  1852. pci_enable_wake(pdev, PCI_D3hot, 1);
  1853. pci_enable_wake(pdev, PCI_D3cold, 1);
  1854. } else {
  1855. iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
  1856. pci_enable_wake(pdev, PCI_D3hot, 0);
  1857. pci_enable_wake(pdev, PCI_D3cold, 0);
  1858. }
  1859. pci_save_state(pdev);
  1860. pci_disable_device(pdev);
  1861. pci_set_power_state(pdev, PCI_D3hot);
  1862. return 0;
  1863. }
  1864. static int atl1_resume(struct pci_dev *pdev)
  1865. {
  1866. struct net_device *netdev = pci_get_drvdata(pdev);
  1867. struct atl1_adapter *adapter = netdev_priv(netdev);
  1868. u32 ret_val;
  1869. pci_set_power_state(pdev, 0);
  1870. pci_restore_state(pdev);
  1871. ret_val = pci_enable_device(pdev);
  1872. pci_enable_wake(pdev, PCI_D3hot, 0);
  1873. pci_enable_wake(pdev, PCI_D3cold, 0);
  1874. iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
  1875. atl1_reset(adapter);
  1876. if (netif_running(netdev))
  1877. atl1_up(adapter);
  1878. netif_device_attach(netdev);
  1879. atl1_via_workaround(adapter);
  1880. return 0;
  1881. }
  1882. #else
  1883. #define atl1_suspend NULL
  1884. #define atl1_resume NULL
  1885. #endif
  1886. #ifdef CONFIG_NET_POLL_CONTROLLER
  1887. static void atl1_poll_controller(struct net_device *netdev)
  1888. {
  1889. disable_irq(netdev->irq);
  1890. atl1_intr(netdev->irq, netdev);
  1891. enable_irq(netdev->irq);
  1892. }
  1893. #endif
  1894. /*
  1895. * atl1_probe - Device Initialization Routine
  1896. * @pdev: PCI device information struct
  1897. * @ent: entry in atl1_pci_tbl
  1898. *
  1899. * Returns 0 on success, negative on failure
  1900. *
  1901. * atl1_probe initializes an adapter identified by a pci_dev structure.
  1902. * The OS initialization, configuring of the adapter private structure,
  1903. * and a hardware reset occur.
  1904. */
  1905. static int __devinit atl1_probe(struct pci_dev *pdev,
  1906. const struct pci_device_id *ent)
  1907. {
  1908. struct net_device *netdev;
  1909. struct atl1_adapter *adapter;
  1910. static int cards_found = 0;
  1911. bool pci_using_64 = true;
  1912. int err;
  1913. err = pci_enable_device(pdev);
  1914. if (err)
  1915. return err;
  1916. err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  1917. if (err) {
  1918. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  1919. if (err) {
  1920. dev_err(&pdev->dev, "no usable DMA configuration\n");
  1921. goto err_dma;
  1922. }
  1923. pci_using_64 = false;
  1924. }
  1925. /* Mark all PCI regions associated with PCI device
  1926. * pdev as being reserved by owner atl1_driver_name
  1927. */
  1928. err = pci_request_regions(pdev, atl1_driver_name);
  1929. if (err)
  1930. goto err_request_regions;
  1931. /* Enables bus-mastering on the device and calls
  1932. * pcibios_set_master to do the needed arch specific settings
  1933. */
  1934. pci_set_master(pdev);
  1935. netdev = alloc_etherdev(sizeof(struct atl1_adapter));
  1936. if (!netdev) {
  1937. err = -ENOMEM;
  1938. goto err_alloc_etherdev;
  1939. }
  1940. SET_MODULE_OWNER(netdev);
  1941. SET_NETDEV_DEV(netdev, &pdev->dev);
  1942. pci_set_drvdata(pdev, netdev);
  1943. adapter = netdev_priv(netdev);
  1944. adapter->netdev = netdev;
  1945. adapter->pdev = pdev;
  1946. adapter->hw.back = adapter;
  1947. adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
  1948. if (!adapter->hw.hw_addr) {
  1949. err = -EIO;
  1950. goto err_pci_iomap;
  1951. }
  1952. /* get device revision number */
  1953. adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
  1954. (REG_MASTER_CTRL + 2));
  1955. dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
  1956. /* set default ring resource counts */
  1957. adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
  1958. adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
  1959. adapter->mii.dev = netdev;
  1960. adapter->mii.mdio_read = mdio_read;
  1961. adapter->mii.mdio_write = mdio_write;
  1962. adapter->mii.phy_id_mask = 0x1f;
  1963. adapter->mii.reg_num_mask = 0x1f;
  1964. netdev->open = &atl1_open;
  1965. netdev->stop = &atl1_close;
  1966. netdev->hard_start_xmit = &atl1_xmit_frame;
  1967. netdev->get_stats = &atl1_get_stats;
  1968. netdev->set_multicast_list = &atl1_set_multi;
  1969. netdev->set_mac_address = &atl1_set_mac;
  1970. netdev->change_mtu = &atl1_change_mtu;
  1971. netdev->do_ioctl = &atl1_ioctl;
  1972. netdev->tx_timeout = &atl1_tx_timeout;
  1973. netdev->watchdog_timeo = 5 * HZ;
  1974. #ifdef CONFIG_NET_POLL_CONTROLLER
  1975. netdev->poll_controller = atl1_poll_controller;
  1976. #endif
  1977. netdev->vlan_rx_register = atl1_vlan_rx_register;
  1978. netdev->ethtool_ops = &atl1_ethtool_ops;
  1979. adapter->bd_number = cards_found;
  1980. adapter->pci_using_64 = pci_using_64;
  1981. /* setup the private structure */
  1982. err = atl1_sw_init(adapter);
  1983. if (err)
  1984. goto err_common;
  1985. netdev->features = NETIF_F_HW_CSUM;
  1986. netdev->features |= NETIF_F_SG;
  1987. netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
  1988. /*
  1989. * FIXME - Until tso performance gets fixed, disable the feature.
  1990. * Enable it with ethtool -K if desired.
  1991. */
  1992. /* netdev->features |= NETIF_F_TSO; */
  1993. if (pci_using_64)
  1994. netdev->features |= NETIF_F_HIGHDMA;
  1995. netdev->features |= NETIF_F_LLTX;
  1996. /*
  1997. * patch for some L1 of old version,
  1998. * the final version of L1 may not need these
  1999. * patches
  2000. */
  2001. /* atl1_pcie_patch(adapter); */
  2002. /* really reset GPHY core */
  2003. iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
  2004. /*
  2005. * reset the controller to
  2006. * put the device in a known good starting state
  2007. */
  2008. if (atl1_reset_hw(&adapter->hw)) {
  2009. err = -EIO;
  2010. goto err_common;
  2011. }
  2012. /* copy the MAC address out of the EEPROM */
  2013. atl1_read_mac_addr(&adapter->hw);
  2014. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  2015. if (!is_valid_ether_addr(netdev->dev_addr)) {
  2016. err = -EIO;
  2017. goto err_common;
  2018. }
  2019. atl1_check_options(adapter);
  2020. /* pre-init the MAC, and setup link */
  2021. err = atl1_init_hw(&adapter->hw);
  2022. if (err) {
  2023. err = -EIO;
  2024. goto err_common;
  2025. }
  2026. atl1_pcie_patch(adapter);
  2027. /* assume we have no link for now */
  2028. netif_carrier_off(netdev);
  2029. netif_stop_queue(netdev);
  2030. init_timer(&adapter->watchdog_timer);
  2031. adapter->watchdog_timer.function = &atl1_watchdog;
  2032. adapter->watchdog_timer.data = (unsigned long)adapter;
  2033. init_timer(&adapter->phy_config_timer);
  2034. adapter->phy_config_timer.function = &atl1_phy_config;
  2035. adapter->phy_config_timer.data = (unsigned long)adapter;
  2036. adapter->phy_timer_pending = false;
  2037. INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
  2038. INIT_WORK(&adapter->link_chg_task, atl1_link_chg_task);
  2039. INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
  2040. err = register_netdev(netdev);
  2041. if (err)
  2042. goto err_common;
  2043. cards_found++;
  2044. atl1_via_workaround(adapter);
  2045. return 0;
  2046. err_common:
  2047. pci_iounmap(pdev, adapter->hw.hw_addr);
  2048. err_pci_iomap:
  2049. free_netdev(netdev);
  2050. err_alloc_etherdev:
  2051. pci_release_regions(pdev);
  2052. err_dma:
  2053. err_request_regions:
  2054. pci_disable_device(pdev);
  2055. return err;
  2056. }
  2057. /*
  2058. * atl1_remove - Device Removal Routine
  2059. * @pdev: PCI device information struct
  2060. *
  2061. * atl1_remove is called by the PCI subsystem to alert the driver
  2062. * that it should release a PCI device. The could be caused by a
  2063. * Hot-Plug event, or because the driver is going to be removed from
  2064. * memory.
  2065. */
  2066. static void __devexit atl1_remove(struct pci_dev *pdev)
  2067. {
  2068. struct net_device *netdev = pci_get_drvdata(pdev);
  2069. struct atl1_adapter *adapter;
  2070. /* Device not available. Return. */
  2071. if (!netdev)
  2072. return;
  2073. adapter = netdev_priv(netdev);
  2074. /* Some atl1 boards lack persistent storage for their MAC, and get it
  2075. * from the BIOS during POST. If we've been messing with the MAC
  2076. * address, we need to save the permanent one.
  2077. */
  2078. if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
  2079. memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr,
  2080. ETH_ALEN);
  2081. atl1_set_mac_addr(&adapter->hw);
  2082. }
  2083. iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
  2084. unregister_netdev(netdev);
  2085. pci_iounmap(pdev, adapter->hw.hw_addr);
  2086. pci_release_regions(pdev);
  2087. free_netdev(netdev);
  2088. pci_disable_device(pdev);
  2089. }
  2090. static struct pci_driver atl1_driver = {
  2091. .name = atl1_driver_name,
  2092. .id_table = atl1_pci_tbl,
  2093. .probe = atl1_probe,
  2094. .remove = __devexit_p(atl1_remove),
  2095. .suspend = atl1_suspend,
  2096. .resume = atl1_resume
  2097. };
  2098. /*
  2099. * atl1_exit_module - Driver Exit Cleanup Routine
  2100. *
  2101. * atl1_exit_module is called just before the driver is removed
  2102. * from memory.
  2103. */
  2104. static void __exit atl1_exit_module(void)
  2105. {
  2106. pci_unregister_driver(&atl1_driver);
  2107. }
  2108. /*
  2109. * atl1_init_module - Driver Registration Routine
  2110. *
  2111. * atl1_init_module is the first routine called when the driver is
  2112. * loaded. All it does is register with the PCI subsystem.
  2113. */
  2114. static int __init atl1_init_module(void)
  2115. {
  2116. return pci_register_driver(&atl1_driver);
  2117. }
  2118. module_init(atl1_init_module);
  2119. module_exit(atl1_exit_module);