or51132.c 17 KB

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  1. /*
  2. * Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
  3. *
  4. *
  5. * Copyright (C) 2007 Trent Piepho <xyzzy@speakeasy.org>
  6. *
  7. * Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
  8. *
  9. * Based on code from Jack Kelliher (kelliher@xmission.com)
  10. * Copyright (C) 2002 & pcHDTV, inc.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. */
  27. /*
  28. * This driver needs two external firmware files. Please copy
  29. * "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
  30. * /usr/lib/hotplug/firmware/ or /lib/firmware/
  31. * (depending on configuration of firmware hotplug).
  32. */
  33. #define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
  34. #define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"
  35. #include <linux/kernel.h>
  36. #include <linux/module.h>
  37. #include <linux/moduleparam.h>
  38. #include <linux/init.h>
  39. #include <linux/delay.h>
  40. #include <linux/string.h>
  41. #include <linux/slab.h>
  42. #include <asm/byteorder.h>
  43. #include "dvb_math.h"
  44. #include "dvb_frontend.h"
  45. #include "or51132.h"
  46. static int debug;
  47. #define dprintk(args...) \
  48. do { \
  49. if (debug) printk(KERN_DEBUG "or51132: " args); \
  50. } while (0)
  51. struct or51132_state
  52. {
  53. struct i2c_adapter* i2c;
  54. /* Configuration settings */
  55. const struct or51132_config* config;
  56. struct dvb_frontend frontend;
  57. /* Demodulator private data */
  58. fe_modulation_t current_modulation;
  59. u32 snr; /* Result of last SNR calculation */
  60. /* Tuner private data */
  61. u32 current_frequency;
  62. };
  63. /* Write buffer to demod */
  64. static int or51132_writebuf(struct or51132_state *state, const u8 *buf, int len)
  65. {
  66. int err;
  67. struct i2c_msg msg = { .addr = state->config->demod_address,
  68. .flags = 0, .buf = (u8*)buf, .len = len };
  69. /* msleep(20); */ /* doesn't appear to be necessary */
  70. if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  71. printk(KERN_WARNING "or51132: I2C write (addr 0x%02x len %d) error: %d\n",
  72. msg.addr, msg.len, err);
  73. return -EREMOTEIO;
  74. }
  75. return 0;
  76. }
  77. /* Write constant bytes, e.g. or51132_writebytes(state, 0x04, 0x42, 0x00);
  78. Less code and more efficient that loading a buffer on the stack with
  79. the bytes to send and then calling or51132_writebuf() on that. */
  80. #define or51132_writebytes(state, data...) \
  81. ({ const static u8 _data[] = {data}; \
  82. or51132_writebuf(state, _data, sizeof(_data)); })
  83. /* Read data from demod into buffer. Returns 0 on success. */
  84. static int or51132_readbuf(struct or51132_state *state, u8 *buf, int len)
  85. {
  86. int err;
  87. struct i2c_msg msg = { .addr = state->config->demod_address,
  88. .flags = I2C_M_RD, .buf = buf, .len = len };
  89. /* msleep(20); */ /* doesn't appear to be necessary */
  90. if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  91. printk(KERN_WARNING "or51132: I2C read (addr 0x%02x len %d) error: %d\n",
  92. msg.addr, msg.len, err);
  93. return -EREMOTEIO;
  94. }
  95. return 0;
  96. }
  97. /* Reads a 16-bit demod register. Returns <0 on error. */
  98. static int or51132_readreg(struct or51132_state *state, u8 reg)
  99. {
  100. u8 buf[2] = { 0x04, reg };
  101. struct i2c_msg msg[2] = {
  102. {.addr = state->config->demod_address, .flags = 0,
  103. .buf = buf, .len = 2 },
  104. {.addr = state->config->demod_address, .flags = I2C_M_RD,
  105. .buf = buf, .len = 2 }};
  106. int err;
  107. if ((err = i2c_transfer(state->i2c, msg, 2)) != 2) {
  108. printk(KERN_WARNING "or51132: I2C error reading register %d: %d\n",
  109. reg, err);
  110. return -EREMOTEIO;
  111. }
  112. return le16_to_cpup((u16*)buf);
  113. }
  114. static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
  115. {
  116. struct or51132_state* state = fe->demodulator_priv;
  117. const static u8 run_buf[] = {0x7F,0x01};
  118. u8 rec_buf[8];
  119. u32 firmwareAsize, firmwareBsize;
  120. int i,ret;
  121. dprintk("Firmware is %Zd bytes\n",fw->size);
  122. /* Get size of firmware A and B */
  123. firmwareAsize = le32_to_cpu(*((u32*)fw->data));
  124. dprintk("FirmwareA is %i bytes\n",firmwareAsize);
  125. firmwareBsize = le32_to_cpu(*((u32*)(fw->data+4)));
  126. dprintk("FirmwareB is %i bytes\n",firmwareBsize);
  127. /* Upload firmware */
  128. if ((ret = or51132_writebuf(state, &fw->data[8], firmwareAsize))) {
  129. printk(KERN_WARNING "or51132: load_firmware error 1\n");
  130. return ret;
  131. }
  132. if ((ret = or51132_writebuf(state, &fw->data[8+firmwareAsize],
  133. firmwareBsize))) {
  134. printk(KERN_WARNING "or51132: load_firmware error 2\n");
  135. return ret;
  136. }
  137. if ((ret = or51132_writebuf(state, run_buf, 2))) {
  138. printk(KERN_WARNING "or51132: load_firmware error 3\n");
  139. return ret;
  140. }
  141. if ((ret = or51132_writebuf(state, run_buf, 2))) {
  142. printk(KERN_WARNING "or51132: load_firmware error 4\n");
  143. return ret;
  144. }
  145. /* 50ms for operation to begin */
  146. msleep(50);
  147. /* Read back ucode version to besure we loaded correctly and are really up and running */
  148. /* Get uCode version */
  149. if ((ret = or51132_writebytes(state, 0x10, 0x10, 0x00))) {
  150. printk(KERN_WARNING "or51132: load_firmware error a\n");
  151. return ret;
  152. }
  153. if ((ret = or51132_writebytes(state, 0x04, 0x17))) {
  154. printk(KERN_WARNING "or51132: load_firmware error b\n");
  155. return ret;
  156. }
  157. if ((ret = or51132_writebytes(state, 0x00, 0x00))) {
  158. printk(KERN_WARNING "or51132: load_firmware error c\n");
  159. return ret;
  160. }
  161. for (i=0;i<4;i++) {
  162. /* Once upon a time, this command might have had something
  163. to do with getting the firmware version, but it's
  164. not used anymore:
  165. {0x04,0x00,0x30,0x00,i+1} */
  166. /* Read 8 bytes, two bytes at a time */
  167. if ((ret = or51132_readbuf(state, &rec_buf[i*2], 2))) {
  168. printk(KERN_WARNING
  169. "or51132: load_firmware error d - %d\n",i);
  170. return ret;
  171. }
  172. }
  173. printk(KERN_WARNING
  174. "or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
  175. rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
  176. rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
  177. rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
  178. rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
  179. if ((ret = or51132_writebytes(state, 0x10, 0x00, 0x00))) {
  180. printk(KERN_WARNING "or51132: load_firmware error e\n");
  181. return ret;
  182. }
  183. return 0;
  184. };
  185. static int or51132_init(struct dvb_frontend* fe)
  186. {
  187. return 0;
  188. }
  189. static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
  190. {
  191. *ber = 0;
  192. return 0;
  193. }
  194. static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
  195. {
  196. *ucblocks = 0;
  197. return 0;
  198. }
  199. static int or51132_sleep(struct dvb_frontend* fe)
  200. {
  201. return 0;
  202. }
  203. static int or51132_setmode(struct dvb_frontend* fe)
  204. {
  205. struct or51132_state* state = fe->demodulator_priv;
  206. u8 cmd_buf1[3] = {0x04, 0x01, 0x5f};
  207. u8 cmd_buf2[3] = {0x1c, 0x00, 0 };
  208. dprintk("setmode %d\n",(int)state->current_modulation);
  209. switch (state->current_modulation) {
  210. case VSB_8:
  211. /* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high */
  212. cmd_buf1[2] = 0x50;
  213. /* REC MODE inv IF spectrum, Normal */
  214. cmd_buf2[1] = 0x03;
  215. /* Channel MODE ATSC/VSB8 */
  216. cmd_buf2[2] = 0x06;
  217. break;
  218. /* All QAM modes are:
  219. Auto-deinterleave; MPEGser, MPEG2tr, phase noise-high
  220. REC MODE Normal Carrier Lock */
  221. case QAM_AUTO:
  222. /* Channel MODE Auto QAM64/256 */
  223. cmd_buf2[2] = 0x4f;
  224. break;
  225. case QAM_256:
  226. /* Channel MODE QAM256 */
  227. cmd_buf2[2] = 0x45;
  228. break;
  229. case QAM_64:
  230. /* Channel MODE QAM64 */
  231. cmd_buf2[2] = 0x43;
  232. break;
  233. default:
  234. printk(KERN_WARNING
  235. "or51132: setmode: Modulation set to unsupported value (%d)\n",
  236. state->current_modulation);
  237. return -EINVAL;
  238. }
  239. /* Set Receiver 1 register */
  240. if (or51132_writebuf(state, cmd_buf1, 3)) {
  241. printk(KERN_WARNING "or51132: set_mode error 1\n");
  242. return -EREMOTEIO;
  243. }
  244. dprintk("set #1 to %02x\n", cmd_buf1[2]);
  245. /* Set operation mode in Receiver 6 register */
  246. if (or51132_writebuf(state, cmd_buf2, 3)) {
  247. printk(KERN_WARNING "or51132: set_mode error 2\n");
  248. return -EREMOTEIO;
  249. }
  250. dprintk("set #6 to 0x%02x%02x\n", cmd_buf2[1], cmd_buf2[2]);
  251. return 0;
  252. }
  253. /* Some modulations use the same firmware. This classifies modulations
  254. by the firmware they use. */
  255. #define MOD_FWCLASS_UNKNOWN 0
  256. #define MOD_FWCLASS_VSB 1
  257. #define MOD_FWCLASS_QAM 2
  258. static int modulation_fw_class(fe_modulation_t modulation)
  259. {
  260. switch(modulation) {
  261. case VSB_8:
  262. return MOD_FWCLASS_VSB;
  263. case QAM_AUTO:
  264. case QAM_64:
  265. case QAM_256:
  266. return MOD_FWCLASS_QAM;
  267. default:
  268. return MOD_FWCLASS_UNKNOWN;
  269. }
  270. }
  271. static int or51132_set_parameters(struct dvb_frontend* fe,
  272. struct dvb_frontend_parameters *param)
  273. {
  274. int ret;
  275. struct or51132_state* state = fe->demodulator_priv;
  276. const struct firmware *fw;
  277. const char *fwname;
  278. int clock_mode;
  279. /* Upload new firmware only if we need a different one */
  280. if (modulation_fw_class(state->current_modulation) !=
  281. modulation_fw_class(param->u.vsb.modulation)) {
  282. switch(modulation_fw_class(param->u.vsb.modulation)) {
  283. case MOD_FWCLASS_VSB:
  284. dprintk("set_parameters VSB MODE\n");
  285. fwname = OR51132_VSB_FIRMWARE;
  286. /* Set non-punctured clock for VSB */
  287. clock_mode = 0;
  288. break;
  289. case MOD_FWCLASS_QAM:
  290. dprintk("set_parameters QAM MODE\n");
  291. fwname = OR51132_QAM_FIRMWARE;
  292. /* Set punctured clock for QAM */
  293. clock_mode = 1;
  294. break;
  295. default:
  296. printk("or51132: Modulation type(%d) UNSUPPORTED\n",
  297. param->u.vsb.modulation);
  298. return -1;
  299. }
  300. printk("or51132: Waiting for firmware upload(%s)...\n",
  301. fwname);
  302. ret = request_firmware(&fw, fwname, &state->i2c->dev);
  303. if (ret) {
  304. printk(KERN_WARNING "or51132: No firmware up"
  305. "loaded(timeout or file not found?)\n");
  306. return ret;
  307. }
  308. ret = or51132_load_firmware(fe, fw);
  309. release_firmware(fw);
  310. if (ret) {
  311. printk(KERN_WARNING "or51132: Writing firmware to "
  312. "device failed!\n");
  313. return ret;
  314. }
  315. printk("or51132: Firmware upload complete.\n");
  316. state->config->set_ts_params(fe, clock_mode);
  317. }
  318. /* Change only if we are actually changing the modulation */
  319. if (state->current_modulation != param->u.vsb.modulation) {
  320. state->current_modulation = param->u.vsb.modulation;
  321. or51132_setmode(fe);
  322. }
  323. if (fe->ops.tuner_ops.set_params) {
  324. fe->ops.tuner_ops.set_params(fe, param);
  325. if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
  326. }
  327. /* Set to current mode */
  328. or51132_setmode(fe);
  329. /* Update current frequency */
  330. state->current_frequency = param->frequency;
  331. return 0;
  332. }
  333. static int or51132_get_parameters(struct dvb_frontend* fe,
  334. struct dvb_frontend_parameters *param)
  335. {
  336. struct or51132_state* state = fe->demodulator_priv;
  337. int status;
  338. int retry = 1;
  339. start:
  340. /* Receiver Status */
  341. if ((status = or51132_readreg(state, 0x00)) < 0) {
  342. printk(KERN_WARNING "or51132: get_parameters: error reading receiver status\n");
  343. return -EREMOTEIO;
  344. }
  345. switch(status&0xff) {
  346. case 0x06: param->u.vsb.modulation = VSB_8; break;
  347. case 0x43: param->u.vsb.modulation = QAM_64; break;
  348. case 0x45: param->u.vsb.modulation = QAM_256; break;
  349. default:
  350. if (retry--) goto start;
  351. printk(KERN_WARNING "or51132: unknown status 0x%02x\n",
  352. status&0xff);
  353. return -EREMOTEIO;
  354. }
  355. /* FIXME: Read frequency from frontend, take AFC into account */
  356. param->frequency = state->current_frequency;
  357. /* FIXME: How to read inversion setting? Receiver 6 register? */
  358. param->inversion = INVERSION_AUTO;
  359. return 0;
  360. }
  361. static int or51132_read_status(struct dvb_frontend* fe, fe_status_t* status)
  362. {
  363. struct or51132_state* state = fe->demodulator_priv;
  364. int reg;
  365. /* Receiver Status */
  366. if ((reg = or51132_readreg(state, 0x00)) < 0) {
  367. printk(KERN_WARNING "or51132: read_status: error reading receiver status: %d\n", reg);
  368. *status = 0;
  369. return -EREMOTEIO;
  370. }
  371. dprintk("%s: read_status %04x\n", __FUNCTION__, reg);
  372. if (reg & 0x0100) /* Receiver Lock */
  373. *status = FE_HAS_SIGNAL|FE_HAS_CARRIER|FE_HAS_VITERBI|
  374. FE_HAS_SYNC|FE_HAS_LOCK;
  375. else
  376. *status = 0;
  377. return 0;
  378. }
  379. /* Calculate SNR estimation (scaled by 2^24)
  380. 8-VSB SNR and QAM equations from Oren datasheets
  381. For 8-VSB:
  382. SNR[dB] = 10 * log10(897152044.8282 / MSE^2 ) - K
  383. Where K = 0 if NTSC rejection filter is OFF; and
  384. K = 3 if NTSC rejection filter is ON
  385. For QAM64:
  386. SNR[dB] = 10 * log10(897152044.8282 / MSE^2 )
  387. For QAM256:
  388. SNR[dB] = 10 * log10(907832426.314266 / MSE^2 )
  389. We re-write the snr equation as:
  390. SNR * 2^24 = 10*(c - 2*intlog10(MSE))
  391. Where for QAM256, c = log10(907832426.314266) * 2^24
  392. and for 8-VSB and QAM64, c = log10(897152044.8282) * 2^24 */
  393. static u32 calculate_snr(u32 mse, u32 c)
  394. {
  395. if (mse == 0) /* No signal */
  396. return 0;
  397. mse = 2*intlog10(mse);
  398. if (mse > c) {
  399. /* Negative SNR, which is possible, but realisticly the
  400. demod will lose lock before the signal gets this bad. The
  401. API only allows for unsigned values, so just return 0 */
  402. return 0;
  403. }
  404. return 10*(c - mse);
  405. }
  406. static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
  407. {
  408. struct or51132_state* state = fe->demodulator_priv;
  409. int noise, reg;
  410. u32 c, usK = 0;
  411. int retry = 1;
  412. start:
  413. /* SNR after Equalizer */
  414. noise = or51132_readreg(state, 0x02);
  415. if (noise < 0) {
  416. printk(KERN_WARNING "or51132: read_snr: error reading equalizer\n");
  417. return -EREMOTEIO;
  418. }
  419. dprintk("read_snr noise (%d)\n", noise);
  420. /* Read status, contains modulation type for QAM_AUTO and
  421. NTSC filter for VSB */
  422. reg = or51132_readreg(state, 0x00);
  423. if (reg < 0) {
  424. printk(KERN_WARNING "or51132: read_snr: error reading receiver status\n");
  425. return -EREMOTEIO;
  426. }
  427. switch (reg&0xff) {
  428. case 0x06:
  429. if (reg & 0x1000) usK = 3 << 24;
  430. /* Fall through to QAM64 case */
  431. case 0x43:
  432. c = 150204167;
  433. break;
  434. case 0x45:
  435. c = 150290396;
  436. break;
  437. default:
  438. printk(KERN_WARNING "or51132: unknown status 0x%02x\n", reg&0xff);
  439. if (retry--) goto start;
  440. return -EREMOTEIO;
  441. }
  442. dprintk("%s: modulation %02x, NTSC rej O%s\n", __FUNCTION__,
  443. reg&0xff, reg&0x1000?"n":"ff");
  444. /* Calculate SNR using noise, c, and NTSC rejection correction */
  445. state->snr = calculate_snr(noise, c) - usK;
  446. *snr = (state->snr) >> 16;
  447. dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __FUNCTION__, noise,
  448. state->snr >> 24, (((state->snr>>8) & 0xffff) * 100) >> 16);
  449. return 0;
  450. }
  451. static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
  452. {
  453. /* Calculate Strength from SNR up to 35dB */
  454. /* Even though the SNR can go higher than 35dB, there is some comfort */
  455. /* factor in having a range of strong signals that can show at 100% */
  456. struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
  457. u16 snr;
  458. int ret;
  459. ret = fe->ops.read_snr(fe, &snr);
  460. if (ret != 0)
  461. return ret;
  462. /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */
  463. /* scale the range 0 - 35*2^24 into 0 - 65535 */
  464. if (state->snr >= 8960 * 0x10000)
  465. *strength = 0xffff;
  466. else
  467. *strength = state->snr / 8960;
  468. return 0;
  469. }
  470. static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
  471. {
  472. fe_tune_settings->min_delay_ms = 500;
  473. fe_tune_settings->step_size = 0;
  474. fe_tune_settings->max_drift = 0;
  475. return 0;
  476. }
  477. static void or51132_release(struct dvb_frontend* fe)
  478. {
  479. struct or51132_state* state = fe->demodulator_priv;
  480. kfree(state);
  481. }
  482. static struct dvb_frontend_ops or51132_ops;
  483. struct dvb_frontend* or51132_attach(const struct or51132_config* config,
  484. struct i2c_adapter* i2c)
  485. {
  486. struct or51132_state* state = NULL;
  487. /* Allocate memory for the internal state */
  488. state = kmalloc(sizeof(struct or51132_state), GFP_KERNEL);
  489. if (state == NULL)
  490. goto error;
  491. /* Setup the state */
  492. state->config = config;
  493. state->i2c = i2c;
  494. state->current_frequency = -1;
  495. state->current_modulation = -1;
  496. /* Create dvb_frontend */
  497. memcpy(&state->frontend.ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
  498. state->frontend.demodulator_priv = state;
  499. return &state->frontend;
  500. error:
  501. kfree(state);
  502. return NULL;
  503. }
  504. static struct dvb_frontend_ops or51132_ops = {
  505. .info = {
  506. .name = "Oren OR51132 VSB/QAM Frontend",
  507. .type = FE_ATSC,
  508. .frequency_min = 44000000,
  509. .frequency_max = 958000000,
  510. .frequency_stepsize = 166666,
  511. .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  512. FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  513. FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
  514. FE_CAN_8VSB
  515. },
  516. .release = or51132_release,
  517. .init = or51132_init,
  518. .sleep = or51132_sleep,
  519. .set_frontend = or51132_set_parameters,
  520. .get_frontend = or51132_get_parameters,
  521. .get_tune_settings = or51132_get_tune_settings,
  522. .read_status = or51132_read_status,
  523. .read_ber = or51132_read_ber,
  524. .read_signal_strength = or51132_read_signal_strength,
  525. .read_snr = or51132_read_snr,
  526. .read_ucblocks = or51132_read_ucblocks,
  527. };
  528. module_param(debug, int, 0644);
  529. MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
  530. MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
  531. MODULE_AUTHOR("Kirk Lapray");
  532. MODULE_AUTHOR("Trent Piepho");
  533. MODULE_LICENSE("GPL");
  534. EXPORT_SYMBOL(or51132_attach);
  535. /*
  536. * Local variables:
  537. * c-basic-offset: 8
  538. * End:
  539. */