irq.c 2.0 KB

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  1. /*
  2. * linux/arch/sh/boards/se/7780/irq.c
  3. *
  4. * Copyright (C) 2006,2007 Nobuhiro Iwamatsu
  5. *
  6. * Hitachi UL SolutionEngine 7780 Support.
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/irq.h>
  14. #include <linux/interrupt.h>
  15. #include <asm/irq.h>
  16. #include <asm/io.h>
  17. #include <asm/se7780.h>
  18. static struct intc2_data intc2_irq_table[] = {
  19. { 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT1 */
  20. { 4, 0, 30, 0, 30, 3 }, /* daughter board EXTINT2 */
  21. { 6, 0, 29, 0, 29, 3 }, /* daughter board EXTINT3 */
  22. { 8, 0, 28, 0, 28, 3 }, /* SMC 91C111 (LAN) */
  23. { 10, 0, 27, 0, 27, 3 }, /* daughter board EXTINT4 */
  24. { 4, 0, 30, 0, 30, 3 }, /* daughter board EXTINT5 */
  25. { 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT6 */
  26. { 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT7 */
  27. { 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT8 */
  28. { 0 , 0, 24, 0, 24, 3 }, /* SM501 */
  29. };
  30. static struct intc2_desc intc2_irq_desc __read_mostly = {
  31. .prio_base = 0, /* N/A */
  32. .msk_base = 0xffd00044,
  33. .mskclr_base = 0xffd00064,
  34. .intc2_data = intc2_irq_table,
  35. .nr_irqs = ARRAY_SIZE(intc2_irq_table),
  36. .chip = {
  37. .name = "INTC2-se7780",
  38. },
  39. };
  40. /*
  41. * Initialize IRQ setting
  42. */
  43. void __init init_se7780_IRQ(void)
  44. {
  45. /* enable all interrupt at FPGA */
  46. ctrl_outw(0, FPGA_INTMSK1);
  47. /* mask SM501 interrupt */
  48. ctrl_outw((ctrl_inw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1);
  49. /* enable all interrupt at FPGA */
  50. ctrl_outw(0, FPGA_INTMSK2);
  51. /* set FPGA INTSEL register */
  52. /* FPGA + 0x06 */
  53. ctrl_outw( ((IRQPIN_SM501 << IRQPOS_SM501) |
  54. (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1);
  55. /* FPGA + 0x08 */
  56. ctrl_outw(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) |
  57. (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) |
  58. (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) |
  59. (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2);
  60. /* FPGA + 0x0A */
  61. ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
  62. register_intc2_controller(&intc2_irq_desc);
  63. }