irq.c 24 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009
  1. /*
  2. * Derived from arch/i386/kernel/irq.c
  3. * Copyright (C) 1992 Linus Torvalds
  4. * Adapted from arch/i386 by Gary Thomas
  5. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  6. * Updated and modified by Cort Dougan <cort@fsmlabs.com>
  7. * Copyright (C) 1996-2001 Cort Dougan
  8. * Adapted for Power Macintosh by Paul Mackerras
  9. * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version
  14. * 2 of the License, or (at your option) any later version.
  15. *
  16. * This file contains the code used by various IRQ handling routines:
  17. * asking for different IRQ's should be done through these routines
  18. * instead of just grabbing them. Thus setups with different IRQ numbers
  19. * shouldn't result in any weird surprises, and installing new handlers
  20. * should be easier.
  21. *
  22. * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
  23. * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
  24. * mask register (of which only 16 are defined), hence the weird shifting
  25. * and complement of the cached_irq_mask. I want to be able to stuff
  26. * this right into the SIU SMASK register.
  27. * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
  28. * to reduce code space and undefined function references.
  29. */
  30. #undef DEBUG
  31. #include <linux/module.h>
  32. #include <linux/threads.h>
  33. #include <linux/kernel_stat.h>
  34. #include <linux/signal.h>
  35. #include <linux/sched.h>
  36. #include <linux/ptrace.h>
  37. #include <linux/ioport.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/timex.h>
  40. #include <linux/init.h>
  41. #include <linux/slab.h>
  42. #include <linux/delay.h>
  43. #include <linux/irq.h>
  44. #include <linux/seq_file.h>
  45. #include <linux/cpumask.h>
  46. #include <linux/profile.h>
  47. #include <linux/bitops.h>
  48. #include <linux/list.h>
  49. #include <linux/radix-tree.h>
  50. #include <linux/mutex.h>
  51. #include <linux/bootmem.h>
  52. #include <linux/pci.h>
  53. #include <asm/uaccess.h>
  54. #include <asm/system.h>
  55. #include <asm/io.h>
  56. #include <asm/pgtable.h>
  57. #include <asm/irq.h>
  58. #include <asm/cache.h>
  59. #include <asm/prom.h>
  60. #include <asm/ptrace.h>
  61. #include <asm/machdep.h>
  62. #include <asm/udbg.h>
  63. #ifdef CONFIG_PPC64
  64. #include <asm/paca.h>
  65. #include <asm/firmware.h>
  66. #include <asm/lv1call.h>
  67. #endif
  68. int __irq_offset_value;
  69. static int ppc_spurious_interrupts;
  70. #ifdef CONFIG_PPC32
  71. EXPORT_SYMBOL(__irq_offset_value);
  72. atomic_t ppc_n_lost_interrupts;
  73. #ifndef CONFIG_PPC_MERGE
  74. #define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
  75. unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
  76. #endif
  77. #ifdef CONFIG_TAU_INT
  78. extern int tau_initialized;
  79. extern int tau_interrupts(int);
  80. #endif
  81. #endif /* CONFIG_PPC32 */
  82. #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
  83. extern atomic_t ipi_recv;
  84. extern atomic_t ipi_sent;
  85. #endif
  86. #ifdef CONFIG_PPC64
  87. EXPORT_SYMBOL(irq_desc);
  88. int distribute_irqs = 1;
  89. static inline unsigned long get_hard_enabled(void)
  90. {
  91. unsigned long enabled;
  92. __asm__ __volatile__("lbz %0,%1(13)"
  93. : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled)));
  94. return enabled;
  95. }
  96. static inline void set_soft_enabled(unsigned long enable)
  97. {
  98. __asm__ __volatile__("stb %0,%1(13)"
  99. : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
  100. }
  101. void local_irq_restore(unsigned long en)
  102. {
  103. /*
  104. * get_paca()->soft_enabled = en;
  105. * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1?
  106. * That was allowed before, and in such a case we do need to take care
  107. * that gcc will set soft_enabled directly via r13, not choose to use
  108. * an intermediate register, lest we're preempted to a different cpu.
  109. */
  110. set_soft_enabled(en);
  111. if (!en)
  112. return;
  113. if (firmware_has_feature(FW_FEATURE_ISERIES)) {
  114. /*
  115. * Do we need to disable preemption here? Not really: in the
  116. * unlikely event that we're preempted to a different cpu in
  117. * between getting r13, loading its lppaca_ptr, and loading
  118. * its any_int, we might call iseries_handle_interrupts without
  119. * an interrupt pending on the new cpu, but that's no disaster,
  120. * is it? And the business of preempting us off the old cpu
  121. * would itself involve a local_irq_restore which handles the
  122. * interrupt to that cpu.
  123. *
  124. * But use "local_paca->lppaca_ptr" instead of "get_lppaca()"
  125. * to avoid any preemption checking added into get_paca().
  126. */
  127. if (local_paca->lppaca_ptr->int_dword.any_int)
  128. iseries_handle_interrupts();
  129. return;
  130. }
  131. /*
  132. * if (get_paca()->hard_enabled) return;
  133. * But again we need to take care that gcc gets hard_enabled directly
  134. * via r13, not choose to use an intermediate register, lest we're
  135. * preempted to a different cpu in between the two instructions.
  136. */
  137. if (get_hard_enabled())
  138. return;
  139. /*
  140. * Need to hard-enable interrupts here. Since currently disabled,
  141. * no need to take further asm precautions against preemption; but
  142. * use local_paca instead of get_paca() to avoid preemption checking.
  143. */
  144. local_paca->hard_enabled = en;
  145. if ((int)mfspr(SPRN_DEC) < 0)
  146. mtspr(SPRN_DEC, 1);
  147. /*
  148. * Force the delivery of pending soft-disabled interrupts on PS3.
  149. * Any HV call will have this side effect.
  150. */
  151. if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
  152. u64 tmp;
  153. lv1_get_version_info(&tmp);
  154. }
  155. __hard_irq_enable();
  156. }
  157. #endif /* CONFIG_PPC64 */
  158. int show_interrupts(struct seq_file *p, void *v)
  159. {
  160. int i = *(loff_t *)v, j;
  161. struct irqaction *action;
  162. irq_desc_t *desc;
  163. unsigned long flags;
  164. if (i == 0) {
  165. seq_puts(p, " ");
  166. for_each_online_cpu(j)
  167. seq_printf(p, "CPU%d ", j);
  168. seq_putc(p, '\n');
  169. }
  170. if (i < NR_IRQS) {
  171. desc = get_irq_desc(i);
  172. spin_lock_irqsave(&desc->lock, flags);
  173. action = desc->action;
  174. if (!action || !action->handler)
  175. goto skip;
  176. seq_printf(p, "%3d: ", i);
  177. #ifdef CONFIG_SMP
  178. for_each_online_cpu(j)
  179. seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
  180. #else
  181. seq_printf(p, "%10u ", kstat_irqs(i));
  182. #endif /* CONFIG_SMP */
  183. if (desc->chip)
  184. seq_printf(p, " %s ", desc->chip->typename);
  185. else
  186. seq_puts(p, " None ");
  187. seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge ");
  188. seq_printf(p, " %s", action->name);
  189. for (action = action->next; action; action = action->next)
  190. seq_printf(p, ", %s", action->name);
  191. seq_putc(p, '\n');
  192. skip:
  193. spin_unlock_irqrestore(&desc->lock, flags);
  194. } else if (i == NR_IRQS) {
  195. #ifdef CONFIG_PPC32
  196. #ifdef CONFIG_TAU_INT
  197. if (tau_initialized){
  198. seq_puts(p, "TAU: ");
  199. for_each_online_cpu(j)
  200. seq_printf(p, "%10u ", tau_interrupts(j));
  201. seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
  202. }
  203. #endif
  204. #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
  205. /* should this be per processor send/receive? */
  206. seq_printf(p, "IPI (recv/sent): %10u/%u\n",
  207. atomic_read(&ipi_recv), atomic_read(&ipi_sent));
  208. #endif
  209. #endif /* CONFIG_PPC32 */
  210. seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
  211. }
  212. return 0;
  213. }
  214. #ifdef CONFIG_HOTPLUG_CPU
  215. void fixup_irqs(cpumask_t map)
  216. {
  217. unsigned int irq;
  218. static int warned;
  219. for_each_irq(irq) {
  220. cpumask_t mask;
  221. if (irq_desc[irq].status & IRQ_PER_CPU)
  222. continue;
  223. cpus_and(mask, irq_desc[irq].affinity, map);
  224. if (any_online_cpu(mask) == NR_CPUS) {
  225. printk("Breaking affinity for irq %i\n", irq);
  226. mask = map;
  227. }
  228. if (irq_desc[irq].chip->set_affinity)
  229. irq_desc[irq].chip->set_affinity(irq, mask);
  230. else if (irq_desc[irq].action && !(warned++))
  231. printk("Cannot set affinity for irq %i\n", irq);
  232. }
  233. local_irq_enable();
  234. mdelay(1);
  235. local_irq_disable();
  236. }
  237. #endif
  238. void do_IRQ(struct pt_regs *regs)
  239. {
  240. struct pt_regs *old_regs = set_irq_regs(regs);
  241. unsigned int irq;
  242. #ifdef CONFIG_IRQSTACKS
  243. struct thread_info *curtp, *irqtp;
  244. #endif
  245. irq_enter();
  246. #ifdef CONFIG_DEBUG_STACKOVERFLOW
  247. /* Debugging check for stack overflow: is there less than 2KB free? */
  248. {
  249. long sp;
  250. sp = __get_SP() & (THREAD_SIZE-1);
  251. if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
  252. printk("do_IRQ: stack overflow: %ld\n",
  253. sp - sizeof(struct thread_info));
  254. dump_stack();
  255. }
  256. }
  257. #endif
  258. /*
  259. * Every platform is required to implement ppc_md.get_irq.
  260. * This function will either return an irq number or NO_IRQ to
  261. * indicate there are no more pending.
  262. * The value NO_IRQ_IGNORE is for buggy hardware and means that this
  263. * IRQ has already been handled. -- Tom
  264. */
  265. irq = ppc_md.get_irq();
  266. if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
  267. #ifdef CONFIG_IRQSTACKS
  268. /* Switch to the irq stack to handle this */
  269. curtp = current_thread_info();
  270. irqtp = hardirq_ctx[smp_processor_id()];
  271. if (curtp != irqtp) {
  272. struct irq_desc *desc = irq_desc + irq;
  273. void *handler = desc->handle_irq;
  274. if (handler == NULL)
  275. handler = &__do_IRQ;
  276. irqtp->task = curtp->task;
  277. irqtp->flags = 0;
  278. call_handle_irq(irq, desc, irqtp, handler);
  279. irqtp->task = NULL;
  280. if (irqtp->flags)
  281. set_bits(irqtp->flags, &curtp->flags);
  282. } else
  283. #endif
  284. generic_handle_irq(irq);
  285. } else if (irq != NO_IRQ_IGNORE)
  286. /* That's not SMP safe ... but who cares ? */
  287. ppc_spurious_interrupts++;
  288. irq_exit();
  289. set_irq_regs(old_regs);
  290. #ifdef CONFIG_PPC_ISERIES
  291. if (firmware_has_feature(FW_FEATURE_ISERIES) &&
  292. get_lppaca()->int_dword.fields.decr_int) {
  293. get_lppaca()->int_dword.fields.decr_int = 0;
  294. /* Signal a fake decrementer interrupt */
  295. timer_interrupt(regs);
  296. }
  297. #endif
  298. }
  299. void __init init_IRQ(void)
  300. {
  301. if (ppc_md.init_IRQ)
  302. ppc_md.init_IRQ();
  303. #ifdef CONFIG_PPC64
  304. irq_ctx_init();
  305. #endif
  306. }
  307. #ifdef CONFIG_IRQSTACKS
  308. struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
  309. struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
  310. void irq_ctx_init(void)
  311. {
  312. struct thread_info *tp;
  313. int i;
  314. for_each_possible_cpu(i) {
  315. memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
  316. tp = softirq_ctx[i];
  317. tp->cpu = i;
  318. tp->preempt_count = SOFTIRQ_OFFSET;
  319. memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
  320. tp = hardirq_ctx[i];
  321. tp->cpu = i;
  322. tp->preempt_count = HARDIRQ_OFFSET;
  323. }
  324. }
  325. static inline void do_softirq_onstack(void)
  326. {
  327. struct thread_info *curtp, *irqtp;
  328. curtp = current_thread_info();
  329. irqtp = softirq_ctx[smp_processor_id()];
  330. irqtp->task = curtp->task;
  331. call_do_softirq(irqtp);
  332. irqtp->task = NULL;
  333. }
  334. #else
  335. #define do_softirq_onstack() __do_softirq()
  336. #endif /* CONFIG_IRQSTACKS */
  337. void do_softirq(void)
  338. {
  339. unsigned long flags;
  340. if (in_interrupt())
  341. return;
  342. local_irq_save(flags);
  343. if (local_softirq_pending())
  344. do_softirq_onstack();
  345. local_irq_restore(flags);
  346. }
  347. EXPORT_SYMBOL(do_softirq);
  348. /*
  349. * IRQ controller and virtual interrupts
  350. */
  351. #ifdef CONFIG_PPC_MERGE
  352. static LIST_HEAD(irq_hosts);
  353. static DEFINE_SPINLOCK(irq_big_lock);
  354. static DEFINE_PER_CPU(unsigned int, irq_radix_reader);
  355. static unsigned int irq_radix_writer;
  356. struct irq_map_entry irq_map[NR_IRQS];
  357. static unsigned int irq_virq_count = NR_IRQS;
  358. static struct irq_host *irq_default_host;
  359. irq_hw_number_t virq_to_hw(unsigned int virq)
  360. {
  361. return irq_map[virq].hwirq;
  362. }
  363. EXPORT_SYMBOL_GPL(virq_to_hw);
  364. __init_refok struct irq_host *irq_alloc_host(unsigned int revmap_type,
  365. unsigned int revmap_arg,
  366. struct irq_host_ops *ops,
  367. irq_hw_number_t inval_irq)
  368. {
  369. struct irq_host *host;
  370. unsigned int size = sizeof(struct irq_host);
  371. unsigned int i;
  372. unsigned int *rmap;
  373. unsigned long flags;
  374. /* Allocate structure and revmap table if using linear mapping */
  375. if (revmap_type == IRQ_HOST_MAP_LINEAR)
  376. size += revmap_arg * sizeof(unsigned int);
  377. if (mem_init_done)
  378. host = kzalloc(size, GFP_KERNEL);
  379. else {
  380. host = alloc_bootmem(size);
  381. if (host)
  382. memset(host, 0, size);
  383. }
  384. if (host == NULL)
  385. return NULL;
  386. /* Fill structure */
  387. host->revmap_type = revmap_type;
  388. host->inval_irq = inval_irq;
  389. host->ops = ops;
  390. spin_lock_irqsave(&irq_big_lock, flags);
  391. /* If it's a legacy controller, check for duplicates and
  392. * mark it as allocated (we use irq 0 host pointer for that
  393. */
  394. if (revmap_type == IRQ_HOST_MAP_LEGACY) {
  395. if (irq_map[0].host != NULL) {
  396. spin_unlock_irqrestore(&irq_big_lock, flags);
  397. /* If we are early boot, we can't free the structure,
  398. * too bad...
  399. * this will be fixed once slab is made available early
  400. * instead of the current cruft
  401. */
  402. if (mem_init_done)
  403. kfree(host);
  404. return NULL;
  405. }
  406. irq_map[0].host = host;
  407. }
  408. list_add(&host->link, &irq_hosts);
  409. spin_unlock_irqrestore(&irq_big_lock, flags);
  410. /* Additional setups per revmap type */
  411. switch(revmap_type) {
  412. case IRQ_HOST_MAP_LEGACY:
  413. /* 0 is always the invalid number for legacy */
  414. host->inval_irq = 0;
  415. /* setup us as the host for all legacy interrupts */
  416. for (i = 1; i < NUM_ISA_INTERRUPTS; i++) {
  417. irq_map[i].hwirq = 0;
  418. smp_wmb();
  419. irq_map[i].host = host;
  420. smp_wmb();
  421. /* Clear norequest flags */
  422. get_irq_desc(i)->status &= ~IRQ_NOREQUEST;
  423. /* Legacy flags are left to default at this point,
  424. * one can then use irq_create_mapping() to
  425. * explicitely change them
  426. */
  427. ops->map(host, i, i);
  428. }
  429. break;
  430. case IRQ_HOST_MAP_LINEAR:
  431. rmap = (unsigned int *)(host + 1);
  432. for (i = 0; i < revmap_arg; i++)
  433. rmap[i] = NO_IRQ;
  434. host->revmap_data.linear.size = revmap_arg;
  435. smp_wmb();
  436. host->revmap_data.linear.revmap = rmap;
  437. break;
  438. default:
  439. break;
  440. }
  441. pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host);
  442. return host;
  443. }
  444. struct irq_host *irq_find_host(struct device_node *node)
  445. {
  446. struct irq_host *h, *found = NULL;
  447. unsigned long flags;
  448. /* We might want to match the legacy controller last since
  449. * it might potentially be set to match all interrupts in
  450. * the absence of a device node. This isn't a problem so far
  451. * yet though...
  452. */
  453. spin_lock_irqsave(&irq_big_lock, flags);
  454. list_for_each_entry(h, &irq_hosts, link)
  455. if (h->ops->match == NULL || h->ops->match(h, node)) {
  456. found = h;
  457. break;
  458. }
  459. spin_unlock_irqrestore(&irq_big_lock, flags);
  460. return found;
  461. }
  462. EXPORT_SYMBOL_GPL(irq_find_host);
  463. void irq_set_default_host(struct irq_host *host)
  464. {
  465. pr_debug("irq: Default host set to @0x%p\n", host);
  466. irq_default_host = host;
  467. }
  468. void irq_set_virq_count(unsigned int count)
  469. {
  470. pr_debug("irq: Trying to set virq count to %d\n", count);
  471. BUG_ON(count < NUM_ISA_INTERRUPTS);
  472. if (count < NR_IRQS)
  473. irq_virq_count = count;
  474. }
  475. /* radix tree not lockless safe ! we use a brlock-type mecanism
  476. * for now, until we can use a lockless radix tree
  477. */
  478. static void irq_radix_wrlock(unsigned long *flags)
  479. {
  480. unsigned int cpu, ok;
  481. spin_lock_irqsave(&irq_big_lock, *flags);
  482. irq_radix_writer = 1;
  483. smp_mb();
  484. do {
  485. barrier();
  486. ok = 1;
  487. for_each_possible_cpu(cpu) {
  488. if (per_cpu(irq_radix_reader, cpu)) {
  489. ok = 0;
  490. break;
  491. }
  492. }
  493. if (!ok)
  494. cpu_relax();
  495. } while(!ok);
  496. }
  497. static void irq_radix_wrunlock(unsigned long flags)
  498. {
  499. smp_wmb();
  500. irq_radix_writer = 0;
  501. spin_unlock_irqrestore(&irq_big_lock, flags);
  502. }
  503. static void irq_radix_rdlock(unsigned long *flags)
  504. {
  505. local_irq_save(*flags);
  506. __get_cpu_var(irq_radix_reader) = 1;
  507. smp_mb();
  508. if (likely(irq_radix_writer == 0))
  509. return;
  510. __get_cpu_var(irq_radix_reader) = 0;
  511. smp_wmb();
  512. spin_lock(&irq_big_lock);
  513. __get_cpu_var(irq_radix_reader) = 1;
  514. spin_unlock(&irq_big_lock);
  515. }
  516. static void irq_radix_rdunlock(unsigned long flags)
  517. {
  518. __get_cpu_var(irq_radix_reader) = 0;
  519. local_irq_restore(flags);
  520. }
  521. static int irq_setup_virq(struct irq_host *host, unsigned int virq,
  522. irq_hw_number_t hwirq)
  523. {
  524. /* Clear IRQ_NOREQUEST flag */
  525. get_irq_desc(virq)->status &= ~IRQ_NOREQUEST;
  526. /* map it */
  527. smp_wmb();
  528. irq_map[virq].hwirq = hwirq;
  529. smp_mb();
  530. if (host->ops->map(host, virq, hwirq)) {
  531. pr_debug("irq: -> mapping failed, freeing\n");
  532. irq_free_virt(virq, 1);
  533. return -1;
  534. }
  535. return 0;
  536. }
  537. unsigned int irq_create_direct_mapping(struct irq_host *host)
  538. {
  539. unsigned int virq;
  540. if (host == NULL)
  541. host = irq_default_host;
  542. BUG_ON(host == NULL);
  543. WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP);
  544. virq = irq_alloc_virt(host, 1, 0);
  545. if (virq == NO_IRQ) {
  546. pr_debug("irq: create_direct virq allocation failed\n");
  547. return NO_IRQ;
  548. }
  549. pr_debug("irq: create_direct obtained virq %d\n", virq);
  550. if (irq_setup_virq(host, virq, virq))
  551. return NO_IRQ;
  552. return virq;
  553. }
  554. unsigned int irq_create_mapping(struct irq_host *host,
  555. irq_hw_number_t hwirq)
  556. {
  557. unsigned int virq, hint;
  558. pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq);
  559. /* Look for default host if nececssary */
  560. if (host == NULL)
  561. host = irq_default_host;
  562. if (host == NULL) {
  563. printk(KERN_WARNING "irq_create_mapping called for"
  564. " NULL host, hwirq=%lx\n", hwirq);
  565. WARN_ON(1);
  566. return NO_IRQ;
  567. }
  568. pr_debug("irq: -> using host @%p\n", host);
  569. /* Check if mapping already exist, if it does, call
  570. * host->ops->map() to update the flags
  571. */
  572. virq = irq_find_mapping(host, hwirq);
  573. if (virq != NO_IRQ) {
  574. if (host->ops->remap)
  575. host->ops->remap(host, virq, hwirq);
  576. pr_debug("irq: -> existing mapping on virq %d\n", virq);
  577. return virq;
  578. }
  579. /* Get a virtual interrupt number */
  580. if (host->revmap_type == IRQ_HOST_MAP_LEGACY) {
  581. /* Handle legacy */
  582. virq = (unsigned int)hwirq;
  583. if (virq == 0 || virq >= NUM_ISA_INTERRUPTS)
  584. return NO_IRQ;
  585. return virq;
  586. } else {
  587. /* Allocate a virtual interrupt number */
  588. hint = hwirq % irq_virq_count;
  589. virq = irq_alloc_virt(host, 1, hint);
  590. if (virq == NO_IRQ) {
  591. pr_debug("irq: -> virq allocation failed\n");
  592. return NO_IRQ;
  593. }
  594. }
  595. pr_debug("irq: -> obtained virq %d\n", virq);
  596. if (irq_setup_virq(host, virq, hwirq))
  597. return NO_IRQ;
  598. return virq;
  599. }
  600. EXPORT_SYMBOL_GPL(irq_create_mapping);
  601. unsigned int irq_create_of_mapping(struct device_node *controller,
  602. u32 *intspec, unsigned int intsize)
  603. {
  604. struct irq_host *host;
  605. irq_hw_number_t hwirq;
  606. unsigned int type = IRQ_TYPE_NONE;
  607. unsigned int virq;
  608. if (controller == NULL)
  609. host = irq_default_host;
  610. else
  611. host = irq_find_host(controller);
  612. if (host == NULL) {
  613. printk(KERN_WARNING "irq: no irq host found for %s !\n",
  614. controller->full_name);
  615. return NO_IRQ;
  616. }
  617. /* If host has no translation, then we assume interrupt line */
  618. if (host->ops->xlate == NULL)
  619. hwirq = intspec[0];
  620. else {
  621. if (host->ops->xlate(host, controller, intspec, intsize,
  622. &hwirq, &type))
  623. return NO_IRQ;
  624. }
  625. /* Create mapping */
  626. virq = irq_create_mapping(host, hwirq);
  627. if (virq == NO_IRQ)
  628. return virq;
  629. /* Set type if specified and different than the current one */
  630. if (type != IRQ_TYPE_NONE &&
  631. type != (get_irq_desc(virq)->status & IRQF_TRIGGER_MASK))
  632. set_irq_type(virq, type);
  633. return virq;
  634. }
  635. EXPORT_SYMBOL_GPL(irq_create_of_mapping);
  636. unsigned int irq_of_parse_and_map(struct device_node *dev, int index)
  637. {
  638. struct of_irq oirq;
  639. if (of_irq_map_one(dev, index, &oirq))
  640. return NO_IRQ;
  641. return irq_create_of_mapping(oirq.controller, oirq.specifier,
  642. oirq.size);
  643. }
  644. EXPORT_SYMBOL_GPL(irq_of_parse_and_map);
  645. void irq_dispose_mapping(unsigned int virq)
  646. {
  647. struct irq_host *host;
  648. irq_hw_number_t hwirq;
  649. unsigned long flags;
  650. if (virq == NO_IRQ)
  651. return;
  652. host = irq_map[virq].host;
  653. WARN_ON (host == NULL);
  654. if (host == NULL)
  655. return;
  656. /* Never unmap legacy interrupts */
  657. if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
  658. return;
  659. /* remove chip and handler */
  660. set_irq_chip_and_handler(virq, NULL, NULL);
  661. /* Make sure it's completed */
  662. synchronize_irq(virq);
  663. /* Tell the PIC about it */
  664. if (host->ops->unmap)
  665. host->ops->unmap(host, virq);
  666. smp_mb();
  667. /* Clear reverse map */
  668. hwirq = irq_map[virq].hwirq;
  669. switch(host->revmap_type) {
  670. case IRQ_HOST_MAP_LINEAR:
  671. if (hwirq < host->revmap_data.linear.size)
  672. host->revmap_data.linear.revmap[hwirq] = NO_IRQ;
  673. break;
  674. case IRQ_HOST_MAP_TREE:
  675. /* Check if radix tree allocated yet */
  676. if (host->revmap_data.tree.gfp_mask == 0)
  677. break;
  678. irq_radix_wrlock(&flags);
  679. radix_tree_delete(&host->revmap_data.tree, hwirq);
  680. irq_radix_wrunlock(flags);
  681. break;
  682. }
  683. /* Destroy map */
  684. smp_mb();
  685. irq_map[virq].hwirq = host->inval_irq;
  686. /* Set some flags */
  687. get_irq_desc(virq)->status |= IRQ_NOREQUEST;
  688. /* Free it */
  689. irq_free_virt(virq, 1);
  690. }
  691. EXPORT_SYMBOL_GPL(irq_dispose_mapping);
  692. unsigned int irq_find_mapping(struct irq_host *host,
  693. irq_hw_number_t hwirq)
  694. {
  695. unsigned int i;
  696. unsigned int hint = hwirq % irq_virq_count;
  697. /* Look for default host if nececssary */
  698. if (host == NULL)
  699. host = irq_default_host;
  700. if (host == NULL)
  701. return NO_IRQ;
  702. /* legacy -> bail early */
  703. if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
  704. return hwirq;
  705. /* Slow path does a linear search of the map */
  706. if (hint < NUM_ISA_INTERRUPTS)
  707. hint = NUM_ISA_INTERRUPTS;
  708. i = hint;
  709. do {
  710. if (irq_map[i].host == host &&
  711. irq_map[i].hwirq == hwirq)
  712. return i;
  713. i++;
  714. if (i >= irq_virq_count)
  715. i = NUM_ISA_INTERRUPTS;
  716. } while(i != hint);
  717. return NO_IRQ;
  718. }
  719. EXPORT_SYMBOL_GPL(irq_find_mapping);
  720. unsigned int irq_radix_revmap(struct irq_host *host,
  721. irq_hw_number_t hwirq)
  722. {
  723. struct radix_tree_root *tree;
  724. struct irq_map_entry *ptr;
  725. unsigned int virq;
  726. unsigned long flags;
  727. WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
  728. /* Check if the radix tree exist yet. We test the value of
  729. * the gfp_mask for that. Sneaky but saves another int in the
  730. * structure. If not, we fallback to slow mode
  731. */
  732. tree = &host->revmap_data.tree;
  733. if (tree->gfp_mask == 0)
  734. return irq_find_mapping(host, hwirq);
  735. /* Now try to resolve */
  736. irq_radix_rdlock(&flags);
  737. ptr = radix_tree_lookup(tree, hwirq);
  738. irq_radix_rdunlock(flags);
  739. /* Found it, return */
  740. if (ptr) {
  741. virq = ptr - irq_map;
  742. return virq;
  743. }
  744. /* If not there, try to insert it */
  745. virq = irq_find_mapping(host, hwirq);
  746. if (virq != NO_IRQ) {
  747. irq_radix_wrlock(&flags);
  748. radix_tree_insert(tree, hwirq, &irq_map[virq]);
  749. irq_radix_wrunlock(flags);
  750. }
  751. return virq;
  752. }
  753. unsigned int irq_linear_revmap(struct irq_host *host,
  754. irq_hw_number_t hwirq)
  755. {
  756. unsigned int *revmap;
  757. WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR);
  758. /* Check revmap bounds */
  759. if (unlikely(hwirq >= host->revmap_data.linear.size))
  760. return irq_find_mapping(host, hwirq);
  761. /* Check if revmap was allocated */
  762. revmap = host->revmap_data.linear.revmap;
  763. if (unlikely(revmap == NULL))
  764. return irq_find_mapping(host, hwirq);
  765. /* Fill up revmap with slow path if no mapping found */
  766. if (unlikely(revmap[hwirq] == NO_IRQ))
  767. revmap[hwirq] = irq_find_mapping(host, hwirq);
  768. return revmap[hwirq];
  769. }
  770. unsigned int irq_alloc_virt(struct irq_host *host,
  771. unsigned int count,
  772. unsigned int hint)
  773. {
  774. unsigned long flags;
  775. unsigned int i, j, found = NO_IRQ;
  776. if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS))
  777. return NO_IRQ;
  778. spin_lock_irqsave(&irq_big_lock, flags);
  779. /* Use hint for 1 interrupt if any */
  780. if (count == 1 && hint >= NUM_ISA_INTERRUPTS &&
  781. hint < irq_virq_count && irq_map[hint].host == NULL) {
  782. found = hint;
  783. goto hint_found;
  784. }
  785. /* Look for count consecutive numbers in the allocatable
  786. * (non-legacy) space
  787. */
  788. for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) {
  789. if (irq_map[i].host != NULL)
  790. j = 0;
  791. else
  792. j++;
  793. if (j == count) {
  794. found = i - count + 1;
  795. break;
  796. }
  797. }
  798. if (found == NO_IRQ) {
  799. spin_unlock_irqrestore(&irq_big_lock, flags);
  800. return NO_IRQ;
  801. }
  802. hint_found:
  803. for (i = found; i < (found + count); i++) {
  804. irq_map[i].hwirq = host->inval_irq;
  805. smp_wmb();
  806. irq_map[i].host = host;
  807. }
  808. spin_unlock_irqrestore(&irq_big_lock, flags);
  809. return found;
  810. }
  811. void irq_free_virt(unsigned int virq, unsigned int count)
  812. {
  813. unsigned long flags;
  814. unsigned int i;
  815. WARN_ON (virq < NUM_ISA_INTERRUPTS);
  816. WARN_ON (count == 0 || (virq + count) > irq_virq_count);
  817. spin_lock_irqsave(&irq_big_lock, flags);
  818. for (i = virq; i < (virq + count); i++) {
  819. struct irq_host *host;
  820. if (i < NUM_ISA_INTERRUPTS ||
  821. (virq + count) > irq_virq_count)
  822. continue;
  823. host = irq_map[i].host;
  824. irq_map[i].hwirq = host->inval_irq;
  825. smp_wmb();
  826. irq_map[i].host = NULL;
  827. }
  828. spin_unlock_irqrestore(&irq_big_lock, flags);
  829. }
  830. void irq_early_init(void)
  831. {
  832. unsigned int i;
  833. for (i = 0; i < NR_IRQS; i++)
  834. get_irq_desc(i)->status |= IRQ_NOREQUEST;
  835. }
  836. /* We need to create the radix trees late */
  837. static int irq_late_init(void)
  838. {
  839. struct irq_host *h;
  840. unsigned long flags;
  841. irq_radix_wrlock(&flags);
  842. list_for_each_entry(h, &irq_hosts, link) {
  843. if (h->revmap_type == IRQ_HOST_MAP_TREE)
  844. INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC);
  845. }
  846. irq_radix_wrunlock(flags);
  847. return 0;
  848. }
  849. arch_initcall(irq_late_init);
  850. #endif /* CONFIG_PPC_MERGE */
  851. #ifdef CONFIG_PPC64
  852. static int __init setup_noirqdistrib(char *str)
  853. {
  854. distribute_irqs = 0;
  855. return 1;
  856. }
  857. __setup("noirqdistrib", setup_noirqdistrib);
  858. #endif /* CONFIG_PPC64 */