smp.c 12 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or
  3. * modify it under the terms of the GNU General Public License
  4. * as published by the Free Software Foundation; either version 2
  5. * of the License, or (at your option) any later version.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  15. *
  16. * Copyright (C) 2000, 2001 Kanoj Sarcar
  17. * Copyright (C) 2000, 2001 Ralf Baechle
  18. * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
  19. * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
  20. */
  21. #include <linux/cache.h>
  22. #include <linux/delay.h>
  23. #include <linux/init.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/threads.h>
  27. #include <linux/module.h>
  28. #include <linux/time.h>
  29. #include <linux/timex.h>
  30. #include <linux/sched.h>
  31. #include <linux/cpumask.h>
  32. #include <linux/cpu.h>
  33. #include <linux/err.h>
  34. #include <asm/atomic.h>
  35. #include <asm/cpu.h>
  36. #include <asm/processor.h>
  37. #include <asm/system.h>
  38. #include <asm/mmu_context.h>
  39. #include <asm/smp.h>
  40. #ifdef CONFIG_MIPS_MT_SMTC
  41. #include <asm/mipsmtregs.h>
  42. #endif /* CONFIG_MIPS_MT_SMTC */
  43. cpumask_t phys_cpu_present_map; /* Bitmask of available CPUs */
  44. volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */
  45. cpumask_t cpu_online_map; /* Bitmask of currently online CPUs */
  46. int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
  47. int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
  48. EXPORT_SYMBOL(phys_cpu_present_map);
  49. EXPORT_SYMBOL(cpu_online_map);
  50. extern void __init calibrate_delay(void);
  51. extern void cpu_idle(void);
  52. /*
  53. * First C code run on the secondary CPUs after being started up by
  54. * the master.
  55. */
  56. asmlinkage __cpuinit void start_secondary(void)
  57. {
  58. unsigned int cpu;
  59. #ifdef CONFIG_MIPS_MT_SMTC
  60. /* Only do cpu_probe for first TC of CPU */
  61. if ((read_c0_tcbind() & TCBIND_CURTC) == 0)
  62. #endif /* CONFIG_MIPS_MT_SMTC */
  63. cpu_probe();
  64. cpu_report();
  65. per_cpu_trap_init();
  66. prom_init_secondary();
  67. /*
  68. * XXX parity protection should be folded in here when it's converted
  69. * to an option instead of something based on .cputype
  70. */
  71. calibrate_delay();
  72. preempt_disable();
  73. cpu = smp_processor_id();
  74. cpu_data[cpu].udelay_val = loops_per_jiffy;
  75. prom_smp_finish();
  76. cpu_set(cpu, cpu_callin_map);
  77. cpu_idle();
  78. }
  79. DEFINE_SPINLOCK(smp_call_lock);
  80. struct call_data_struct *call_data;
  81. /*
  82. * Run a function on all other CPUs.
  83. * <func> The function to run. This must be fast and non-blocking.
  84. * <info> An arbitrary pointer to pass to the function.
  85. * <retry> If true, keep retrying until ready.
  86. * <wait> If true, wait until function has completed on other CPUs.
  87. * [RETURNS] 0 on success, else a negative status code.
  88. *
  89. * Does not return until remote CPUs are nearly ready to execute <func>
  90. * or are or have executed.
  91. *
  92. * You must not call this function with disabled interrupts or from a
  93. * hardware interrupt handler or from a bottom half handler:
  94. *
  95. * CPU A CPU B
  96. * Disable interrupts
  97. * smp_call_function()
  98. * Take call_lock
  99. * Send IPIs
  100. * Wait for all cpus to acknowledge IPI
  101. * CPU A has not responded, spin waiting
  102. * for cpu A to respond, holding call_lock
  103. * smp_call_function()
  104. * Spin waiting for call_lock
  105. * Deadlock Deadlock
  106. */
  107. int smp_call_function (void (*func) (void *info), void *info, int retry,
  108. int wait)
  109. {
  110. struct call_data_struct data;
  111. int i, cpus = num_online_cpus() - 1;
  112. int cpu = smp_processor_id();
  113. /*
  114. * Can die spectacularly if this CPU isn't yet marked online
  115. */
  116. BUG_ON(!cpu_online(cpu));
  117. if (!cpus)
  118. return 0;
  119. /* Can deadlock when called with interrupts disabled */
  120. WARN_ON(irqs_disabled());
  121. data.func = func;
  122. data.info = info;
  123. atomic_set(&data.started, 0);
  124. data.wait = wait;
  125. if (wait)
  126. atomic_set(&data.finished, 0);
  127. spin_lock(&smp_call_lock);
  128. call_data = &data;
  129. smp_mb();
  130. /* Send a message to all other CPUs and wait for them to respond */
  131. for_each_online_cpu(i)
  132. if (i != cpu)
  133. core_send_ipi(i, SMP_CALL_FUNCTION);
  134. /* Wait for response */
  135. /* FIXME: lock-up detection, backtrace on lock-up */
  136. while (atomic_read(&data.started) != cpus)
  137. barrier();
  138. if (wait)
  139. while (atomic_read(&data.finished) != cpus)
  140. barrier();
  141. call_data = NULL;
  142. spin_unlock(&smp_call_lock);
  143. return 0;
  144. }
  145. void smp_call_function_interrupt(void)
  146. {
  147. void (*func) (void *info) = call_data->func;
  148. void *info = call_data->info;
  149. int wait = call_data->wait;
  150. /*
  151. * Notify initiating CPU that I've grabbed the data and am
  152. * about to execute the function.
  153. */
  154. smp_mb();
  155. atomic_inc(&call_data->started);
  156. /*
  157. * At this point the info structure may be out of scope unless wait==1.
  158. */
  159. irq_enter();
  160. (*func)(info);
  161. irq_exit();
  162. if (wait) {
  163. smp_mb();
  164. atomic_inc(&call_data->finished);
  165. }
  166. }
  167. int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
  168. int retry, int wait)
  169. {
  170. struct call_data_struct data;
  171. int me;
  172. /*
  173. * Can die spectacularly if this CPU isn't yet marked online
  174. */
  175. if (!cpu_online(cpu))
  176. return 0;
  177. me = get_cpu();
  178. BUG_ON(!cpu_online(me));
  179. if (cpu == me) {
  180. local_irq_disable();
  181. func(info);
  182. local_irq_enable();
  183. put_cpu();
  184. return 0;
  185. }
  186. /* Can deadlock when called with interrupts disabled */
  187. WARN_ON(irqs_disabled());
  188. data.func = func;
  189. data.info = info;
  190. atomic_set(&data.started, 0);
  191. data.wait = wait;
  192. if (wait)
  193. atomic_set(&data.finished, 0);
  194. spin_lock(&smp_call_lock);
  195. call_data = &data;
  196. smp_mb();
  197. /* Send a message to the other CPU */
  198. core_send_ipi(cpu, SMP_CALL_FUNCTION);
  199. /* Wait for response */
  200. /* FIXME: lock-up detection, backtrace on lock-up */
  201. while (atomic_read(&data.started) != 1)
  202. barrier();
  203. if (wait)
  204. while (atomic_read(&data.finished) != 1)
  205. barrier();
  206. call_data = NULL;
  207. spin_unlock(&smp_call_lock);
  208. put_cpu();
  209. return 0;
  210. }
  211. static void stop_this_cpu(void *dummy)
  212. {
  213. /*
  214. * Remove this CPU:
  215. */
  216. cpu_clear(smp_processor_id(), cpu_online_map);
  217. local_irq_enable(); /* May need to service _machine_restart IPI */
  218. for (;;); /* Wait if available. */
  219. }
  220. void smp_send_stop(void)
  221. {
  222. smp_call_function(stop_this_cpu, NULL, 1, 0);
  223. }
  224. void __init smp_cpus_done(unsigned int max_cpus)
  225. {
  226. prom_cpus_done();
  227. }
  228. /* called from main before smp_init() */
  229. void __init smp_prepare_cpus(unsigned int max_cpus)
  230. {
  231. init_new_context(current, &init_mm);
  232. current_thread_info()->cpu = 0;
  233. plat_prepare_cpus(max_cpus);
  234. #ifndef CONFIG_HOTPLUG_CPU
  235. cpu_present_map = cpu_possible_map;
  236. #endif
  237. }
  238. /* preload SMP state for boot cpu */
  239. void __devinit smp_prepare_boot_cpu(void)
  240. {
  241. /*
  242. * This assumes that bootup is always handled by the processor
  243. * with the logic and physical number 0.
  244. */
  245. __cpu_number_map[0] = 0;
  246. __cpu_logical_map[0] = 0;
  247. cpu_set(0, phys_cpu_present_map);
  248. cpu_set(0, cpu_online_map);
  249. cpu_set(0, cpu_callin_map);
  250. }
  251. /*
  252. * Called once for each "cpu_possible(cpu)". Needs to spin up the cpu
  253. * and keep control until "cpu_online(cpu)" is set. Note: cpu is
  254. * physical, not logical.
  255. */
  256. int __cpuinit __cpu_up(unsigned int cpu)
  257. {
  258. struct task_struct *idle;
  259. /*
  260. * Processor goes to start_secondary(), sets online flag
  261. * The following code is purely to make sure
  262. * Linux can schedule processes on this slave.
  263. */
  264. idle = fork_idle(cpu);
  265. if (IS_ERR(idle))
  266. panic(KERN_ERR "Fork failed for CPU %d", cpu);
  267. prom_boot_secondary(cpu, idle);
  268. /*
  269. * Trust is futile. We should really have timeouts ...
  270. */
  271. while (!cpu_isset(cpu, cpu_callin_map))
  272. udelay(100);
  273. cpu_set(cpu, cpu_online_map);
  274. return 0;
  275. }
  276. /* Not really SMP stuff ... */
  277. int setup_profiling_timer(unsigned int multiplier)
  278. {
  279. return 0;
  280. }
  281. static void flush_tlb_all_ipi(void *info)
  282. {
  283. local_flush_tlb_all();
  284. }
  285. void flush_tlb_all(void)
  286. {
  287. on_each_cpu(flush_tlb_all_ipi, NULL, 1, 1);
  288. }
  289. static void flush_tlb_mm_ipi(void *mm)
  290. {
  291. local_flush_tlb_mm((struct mm_struct *)mm);
  292. }
  293. /*
  294. * Special Variant of smp_call_function for use by TLB functions:
  295. *
  296. * o No return value
  297. * o collapses to normal function call on UP kernels
  298. * o collapses to normal function call on systems with a single shared
  299. * primary cache.
  300. * o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core.
  301. */
  302. static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
  303. {
  304. #ifndef CONFIG_MIPS_MT_SMTC
  305. smp_call_function(func, info, 1, 1);
  306. #endif
  307. }
  308. static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
  309. {
  310. preempt_disable();
  311. smp_on_other_tlbs(func, info);
  312. func(info);
  313. preempt_enable();
  314. }
  315. /*
  316. * The following tlb flush calls are invoked when old translations are
  317. * being torn down, or pte attributes are changing. For single threaded
  318. * address spaces, a new context is obtained on the current cpu, and tlb
  319. * context on other cpus are invalidated to force a new context allocation
  320. * at switch_mm time, should the mm ever be used on other cpus. For
  321. * multithreaded address spaces, intercpu interrupts have to be sent.
  322. * Another case where intercpu interrupts are required is when the target
  323. * mm might be active on another cpu (eg debuggers doing the flushes on
  324. * behalf of debugees, kswapd stealing pages from another process etc).
  325. * Kanoj 07/00.
  326. */
  327. void flush_tlb_mm(struct mm_struct *mm)
  328. {
  329. preempt_disable();
  330. if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
  331. smp_on_other_tlbs(flush_tlb_mm_ipi, (void *)mm);
  332. } else {
  333. int i;
  334. for (i = 0; i < num_online_cpus(); i++)
  335. if (smp_processor_id() != i)
  336. cpu_context(i, mm) = 0;
  337. }
  338. local_flush_tlb_mm(mm);
  339. preempt_enable();
  340. }
  341. struct flush_tlb_data {
  342. struct vm_area_struct *vma;
  343. unsigned long addr1;
  344. unsigned long addr2;
  345. };
  346. static void flush_tlb_range_ipi(void *info)
  347. {
  348. struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
  349. local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
  350. }
  351. void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
  352. {
  353. struct mm_struct *mm = vma->vm_mm;
  354. preempt_disable();
  355. if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
  356. struct flush_tlb_data fd;
  357. fd.vma = vma;
  358. fd.addr1 = start;
  359. fd.addr2 = end;
  360. smp_on_other_tlbs(flush_tlb_range_ipi, (void *)&fd);
  361. } else {
  362. int i;
  363. for (i = 0; i < num_online_cpus(); i++)
  364. if (smp_processor_id() != i)
  365. cpu_context(i, mm) = 0;
  366. }
  367. local_flush_tlb_range(vma, start, end);
  368. preempt_enable();
  369. }
  370. static void flush_tlb_kernel_range_ipi(void *info)
  371. {
  372. struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
  373. local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
  374. }
  375. void flush_tlb_kernel_range(unsigned long start, unsigned long end)
  376. {
  377. struct flush_tlb_data fd;
  378. fd.addr1 = start;
  379. fd.addr2 = end;
  380. on_each_cpu(flush_tlb_kernel_range_ipi, (void *)&fd, 1, 1);
  381. }
  382. static void flush_tlb_page_ipi(void *info)
  383. {
  384. struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
  385. local_flush_tlb_page(fd->vma, fd->addr1);
  386. }
  387. void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
  388. {
  389. preempt_disable();
  390. if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
  391. struct flush_tlb_data fd;
  392. fd.vma = vma;
  393. fd.addr1 = page;
  394. smp_on_other_tlbs(flush_tlb_page_ipi, (void *)&fd);
  395. } else {
  396. int i;
  397. for (i = 0; i < num_online_cpus(); i++)
  398. if (smp_processor_id() != i)
  399. cpu_context(i, vma->vm_mm) = 0;
  400. }
  401. local_flush_tlb_page(vma, page);
  402. preempt_enable();
  403. }
  404. static void flush_tlb_one_ipi(void *info)
  405. {
  406. unsigned long vaddr = (unsigned long) info;
  407. local_flush_tlb_one(vaddr);
  408. }
  409. void flush_tlb_one(unsigned long vaddr)
  410. {
  411. smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
  412. }
  413. EXPORT_SYMBOL(flush_tlb_page);
  414. EXPORT_SYMBOL(flush_tlb_one);