lpfc_mbox.c 18 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Enterprise Fibre Channel Host Bus Adapters. *
  4. * Refer to the README file included with this package for *
  5. * driver version and adapter support. *
  6. * Copyright (C) 2004 Emulex Corporation. *
  7. * www.emulex.com *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of the GNU General Public License *
  11. * as published by the Free Software Foundation; either version 2 *
  12. * of the License, or (at your option) any later version. *
  13. * *
  14. * This program is distributed in the hope that it will be useful, *
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  17. * GNU General Public License for more details, a copy of which *
  18. * can be found in the file COPYING included with this package. *
  19. *******************************************************************/
  20. /*
  21. * $Id: lpfc_mbox.c 1.85 2005/04/13 11:59:11EDT sf_support Exp $
  22. */
  23. #include <linux/blkdev.h>
  24. #include <linux/pci.h>
  25. #include <linux/interrupt.h>
  26. #include "lpfc_hw.h"
  27. #include "lpfc_sli.h"
  28. #include "lpfc_disc.h"
  29. #include "lpfc_scsi.h"
  30. #include "lpfc.h"
  31. #include "lpfc_logmsg.h"
  32. #include "lpfc_crtn.h"
  33. #include "lpfc_compat.h"
  34. /**********************************************/
  35. /* mailbox command */
  36. /**********************************************/
  37. void
  38. lpfc_dump_mem(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint16_t offset)
  39. {
  40. MAILBOX_t *mb;
  41. void *ctx;
  42. mb = &pmb->mb;
  43. ctx = pmb->context2;
  44. /* Setup to dump VPD region */
  45. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  46. mb->mbxCommand = MBX_DUMP_MEMORY;
  47. mb->un.varDmp.cv = 1;
  48. mb->un.varDmp.type = DMP_NV_PARAMS;
  49. mb->un.varDmp.entry_index = offset;
  50. mb->un.varDmp.region_id = DMP_REGION_VPD;
  51. mb->un.varDmp.word_cnt = (DMP_RSP_SIZE / sizeof (uint32_t));
  52. mb->un.varDmp.co = 0;
  53. mb->un.varDmp.resp_offset = 0;
  54. pmb->context2 = ctx;
  55. mb->mbxOwner = OWN_HOST;
  56. return;
  57. }
  58. /**********************************************/
  59. /* lpfc_read_nv Issue a READ NVPARAM */
  60. /* mailbox command */
  61. /**********************************************/
  62. void
  63. lpfc_read_nv(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  64. {
  65. MAILBOX_t *mb;
  66. mb = &pmb->mb;
  67. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  68. mb->mbxCommand = MBX_READ_NV;
  69. mb->mbxOwner = OWN_HOST;
  70. return;
  71. }
  72. /**********************************************/
  73. /* lpfc_read_la Issue a READ LA */
  74. /* mailbox command */
  75. /**********************************************/
  76. int
  77. lpfc_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, struct lpfc_dmabuf *mp)
  78. {
  79. MAILBOX_t *mb;
  80. struct lpfc_sli *psli;
  81. psli = &phba->sli;
  82. mb = &pmb->mb;
  83. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  84. INIT_LIST_HEAD(&mp->list);
  85. mb->mbxCommand = MBX_READ_LA64;
  86. mb->un.varReadLA.un.lilpBde64.tus.f.bdeSize = 128;
  87. mb->un.varReadLA.un.lilpBde64.addrHigh = putPaddrHigh(mp->phys);
  88. mb->un.varReadLA.un.lilpBde64.addrLow = putPaddrLow(mp->phys);
  89. /* Save address for later completion and set the owner to host so that
  90. * the FW knows this mailbox is available for processing.
  91. */
  92. pmb->context1 = (uint8_t *) mp;
  93. mb->mbxOwner = OWN_HOST;
  94. return (0);
  95. }
  96. /**********************************************/
  97. /* lpfc_clear_la Issue a CLEAR LA */
  98. /* mailbox command */
  99. /**********************************************/
  100. void
  101. lpfc_clear_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  102. {
  103. MAILBOX_t *mb;
  104. mb = &pmb->mb;
  105. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  106. mb->un.varClearLA.eventTag = phba->fc_eventTag;
  107. mb->mbxCommand = MBX_CLEAR_LA;
  108. mb->mbxOwner = OWN_HOST;
  109. return;
  110. }
  111. /**************************************************/
  112. /* lpfc_config_link Issue a CONFIG LINK */
  113. /* mailbox command */
  114. /**************************************************/
  115. void
  116. lpfc_config_link(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  117. {
  118. MAILBOX_t *mb = &pmb->mb;
  119. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  120. /* NEW_FEATURE
  121. * SLI-2, Coalescing Response Feature.
  122. */
  123. if (phba->cfg_cr_delay) {
  124. mb->un.varCfgLnk.cr = 1;
  125. mb->un.varCfgLnk.ci = 1;
  126. mb->un.varCfgLnk.cr_delay = phba->cfg_cr_delay;
  127. mb->un.varCfgLnk.cr_count = phba->cfg_cr_count;
  128. }
  129. mb->un.varCfgLnk.myId = phba->fc_myDID;
  130. mb->un.varCfgLnk.edtov = phba->fc_edtov;
  131. mb->un.varCfgLnk.arbtov = phba->fc_arbtov;
  132. mb->un.varCfgLnk.ratov = phba->fc_ratov;
  133. mb->un.varCfgLnk.rttov = phba->fc_rttov;
  134. mb->un.varCfgLnk.altov = phba->fc_altov;
  135. mb->un.varCfgLnk.crtov = phba->fc_crtov;
  136. mb->un.varCfgLnk.citov = phba->fc_citov;
  137. if (phba->cfg_ack0)
  138. mb->un.varCfgLnk.ack0_enable = 1;
  139. mb->mbxCommand = MBX_CONFIG_LINK;
  140. mb->mbxOwner = OWN_HOST;
  141. return;
  142. }
  143. /**********************************************/
  144. /* lpfc_init_link Issue an INIT LINK */
  145. /* mailbox command */
  146. /**********************************************/
  147. void
  148. lpfc_init_link(struct lpfc_hba * phba,
  149. LPFC_MBOXQ_t * pmb, uint32_t topology, uint32_t linkspeed)
  150. {
  151. lpfc_vpd_t *vpd;
  152. struct lpfc_sli *psli;
  153. MAILBOX_t *mb;
  154. mb = &pmb->mb;
  155. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  156. psli = &phba->sli;
  157. switch (topology) {
  158. case FLAGS_TOPOLOGY_MODE_LOOP_PT:
  159. mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
  160. mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
  161. break;
  162. case FLAGS_TOPOLOGY_MODE_PT_PT:
  163. mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
  164. break;
  165. case FLAGS_TOPOLOGY_MODE_LOOP:
  166. mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
  167. break;
  168. case FLAGS_TOPOLOGY_MODE_PT_LOOP:
  169. mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
  170. mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
  171. break;
  172. }
  173. /* NEW_FEATURE
  174. * Setting up the link speed
  175. */
  176. vpd = &phba->vpd;
  177. if (vpd->rev.feaLevelHigh >= 0x02){
  178. switch(linkspeed){
  179. case LINK_SPEED_1G:
  180. case LINK_SPEED_2G:
  181. case LINK_SPEED_4G:
  182. mb->un.varInitLnk.link_flags |=
  183. FLAGS_LINK_SPEED;
  184. mb->un.varInitLnk.link_speed = linkspeed;
  185. break;
  186. case LINK_SPEED_AUTO:
  187. default:
  188. mb->un.varInitLnk.link_speed =
  189. LINK_SPEED_AUTO;
  190. break;
  191. }
  192. }
  193. else
  194. mb->un.varInitLnk.link_speed = LINK_SPEED_AUTO;
  195. mb->mbxCommand = (volatile uint8_t)MBX_INIT_LINK;
  196. mb->mbxOwner = OWN_HOST;
  197. mb->un.varInitLnk.fabric_AL_PA = phba->fc_pref_ALPA;
  198. return;
  199. }
  200. /**********************************************/
  201. /* lpfc_read_sparam Issue a READ SPARAM */
  202. /* mailbox command */
  203. /**********************************************/
  204. int
  205. lpfc_read_sparam(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  206. {
  207. struct lpfc_dmabuf *mp;
  208. MAILBOX_t *mb;
  209. struct lpfc_sli *psli;
  210. psli = &phba->sli;
  211. mb = &pmb->mb;
  212. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  213. mb->mbxOwner = OWN_HOST;
  214. /* Get a buffer to hold the HBAs Service Parameters */
  215. if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == 0) ||
  216. ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
  217. if (mp)
  218. kfree(mp);
  219. mb->mbxCommand = MBX_READ_SPARM64;
  220. /* READ_SPARAM: no buffers */
  221. lpfc_printf_log(phba,
  222. KERN_WARNING,
  223. LOG_MBOX,
  224. "%d:0301 READ_SPARAM: no buffers\n",
  225. phba->brd_no);
  226. return (1);
  227. }
  228. INIT_LIST_HEAD(&mp->list);
  229. mb->mbxCommand = MBX_READ_SPARM64;
  230. mb->un.varRdSparm.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
  231. mb->un.varRdSparm.un.sp64.addrHigh = putPaddrHigh(mp->phys);
  232. mb->un.varRdSparm.un.sp64.addrLow = putPaddrLow(mp->phys);
  233. /* save address for completion */
  234. pmb->context1 = mp;
  235. return (0);
  236. }
  237. /********************************************/
  238. /* lpfc_unreg_did Issue a UNREG_DID */
  239. /* mailbox command */
  240. /********************************************/
  241. void
  242. lpfc_unreg_did(struct lpfc_hba * phba, uint32_t did, LPFC_MBOXQ_t * pmb)
  243. {
  244. MAILBOX_t *mb;
  245. mb = &pmb->mb;
  246. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  247. mb->un.varUnregDID.did = did;
  248. mb->mbxCommand = MBX_UNREG_D_ID;
  249. mb->mbxOwner = OWN_HOST;
  250. return;
  251. }
  252. /***********************************************/
  253. /* command to write slim */
  254. /***********************************************/
  255. void
  256. lpfc_set_slim(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint32_t addr,
  257. uint32_t value)
  258. {
  259. MAILBOX_t *mb;
  260. mb = &pmb->mb;
  261. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  262. /* addr = 0x090597 is AUTO ABTS disable for ELS commands */
  263. /* addr = 0x052198 is DELAYED ABTS enable for ELS commands */
  264. /*
  265. * Always turn on DELAYED ABTS for ELS timeouts
  266. */
  267. if ((addr == 0x052198) && (value == 0))
  268. value = 1;
  269. mb->un.varWords[0] = addr;
  270. mb->un.varWords[1] = value;
  271. mb->mbxCommand = MBX_SET_SLIM;
  272. mb->mbxOwner = OWN_HOST;
  273. return;
  274. }
  275. /**********************************************/
  276. /* lpfc_read_nv Issue a READ CONFIG */
  277. /* mailbox command */
  278. /**********************************************/
  279. void
  280. lpfc_read_config(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  281. {
  282. MAILBOX_t *mb;
  283. mb = &pmb->mb;
  284. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  285. mb->mbxCommand = MBX_READ_CONFIG;
  286. mb->mbxOwner = OWN_HOST;
  287. return;
  288. }
  289. /********************************************/
  290. /* lpfc_reg_login Issue a REG_LOGIN */
  291. /* mailbox command */
  292. /********************************************/
  293. int
  294. lpfc_reg_login(struct lpfc_hba * phba,
  295. uint32_t did, uint8_t * param, LPFC_MBOXQ_t * pmb, uint32_t flag)
  296. {
  297. uint8_t *sparam;
  298. struct lpfc_dmabuf *mp;
  299. MAILBOX_t *mb;
  300. struct lpfc_sli *psli;
  301. psli = &phba->sli;
  302. mb = &pmb->mb;
  303. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  304. mb->un.varRegLogin.rpi = 0;
  305. mb->un.varRegLogin.did = did;
  306. mb->un.varWords[30] = flag; /* Set flag to issue action on cmpl */
  307. mb->mbxOwner = OWN_HOST;
  308. /* Get a buffer to hold NPorts Service Parameters */
  309. if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == NULL) ||
  310. ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
  311. if (mp)
  312. kfree(mp);
  313. mb->mbxCommand = MBX_REG_LOGIN64;
  314. /* REG_LOGIN: no buffers */
  315. lpfc_printf_log(phba,
  316. KERN_WARNING,
  317. LOG_MBOX,
  318. "%d:0302 REG_LOGIN: no buffers Data x%x x%x\n",
  319. phba->brd_no,
  320. (uint32_t) did, (uint32_t) flag);
  321. return (1);
  322. }
  323. INIT_LIST_HEAD(&mp->list);
  324. sparam = mp->virt;
  325. /* Copy param's into a new buffer */
  326. memcpy(sparam, param, sizeof (struct serv_parm));
  327. /* save address for completion */
  328. pmb->context1 = (uint8_t *) mp;
  329. mb->mbxCommand = MBX_REG_LOGIN64;
  330. mb->un.varRegLogin.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
  331. mb->un.varRegLogin.un.sp64.addrHigh = putPaddrHigh(mp->phys);
  332. mb->un.varRegLogin.un.sp64.addrLow = putPaddrLow(mp->phys);
  333. return (0);
  334. }
  335. /**********************************************/
  336. /* lpfc_unreg_login Issue a UNREG_LOGIN */
  337. /* mailbox command */
  338. /**********************************************/
  339. void
  340. lpfc_unreg_login(struct lpfc_hba * phba, uint32_t rpi, LPFC_MBOXQ_t * pmb)
  341. {
  342. MAILBOX_t *mb;
  343. mb = &pmb->mb;
  344. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  345. mb->un.varUnregLogin.rpi = (uint16_t) rpi;
  346. mb->un.varUnregLogin.rsvd1 = 0;
  347. mb->mbxCommand = MBX_UNREG_LOGIN;
  348. mb->mbxOwner = OWN_HOST;
  349. return;
  350. }
  351. static void
  352. lpfc_config_pcb_setup(struct lpfc_hba * phba)
  353. {
  354. struct lpfc_sli *psli = &phba->sli;
  355. struct lpfc_sli_ring *pring;
  356. PCB_t *pcbp = &phba->slim2p->pcb;
  357. dma_addr_t pdma_addr;
  358. uint32_t offset;
  359. uint32_t iocbCnt;
  360. int i;
  361. psli->MBhostaddr = (uint32_t *)&phba->slim2p->mbx;
  362. pcbp->maxRing = (psli->num_rings - 1);
  363. iocbCnt = 0;
  364. for (i = 0; i < psli->num_rings; i++) {
  365. pring = &psli->ring[i];
  366. /* A ring MUST have both cmd and rsp entries defined to be
  367. valid */
  368. if ((pring->numCiocb == 0) || (pring->numRiocb == 0)) {
  369. pcbp->rdsc[i].cmdEntries = 0;
  370. pcbp->rdsc[i].rspEntries = 0;
  371. pcbp->rdsc[i].cmdAddrHigh = 0;
  372. pcbp->rdsc[i].rspAddrHigh = 0;
  373. pcbp->rdsc[i].cmdAddrLow = 0;
  374. pcbp->rdsc[i].rspAddrLow = 0;
  375. pring->cmdringaddr = NULL;
  376. pring->rspringaddr = NULL;
  377. continue;
  378. }
  379. /* Command ring setup for ring */
  380. pring->cmdringaddr =
  381. (void *)&phba->slim2p->IOCBs[iocbCnt];
  382. pcbp->rdsc[i].cmdEntries = pring->numCiocb;
  383. offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
  384. (uint8_t *)phba->slim2p;
  385. pdma_addr = phba->slim2p_mapping + offset;
  386. pcbp->rdsc[i].cmdAddrHigh = putPaddrHigh(pdma_addr);
  387. pcbp->rdsc[i].cmdAddrLow = putPaddrLow(pdma_addr);
  388. iocbCnt += pring->numCiocb;
  389. /* Response ring setup for ring */
  390. pring->rspringaddr =
  391. (void *)&phba->slim2p->IOCBs[iocbCnt];
  392. pcbp->rdsc[i].rspEntries = pring->numRiocb;
  393. offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
  394. (uint8_t *)phba->slim2p;
  395. pdma_addr = phba->slim2p_mapping + offset;
  396. pcbp->rdsc[i].rspAddrHigh = putPaddrHigh(pdma_addr);
  397. pcbp->rdsc[i].rspAddrLow = putPaddrLow(pdma_addr);
  398. iocbCnt += pring->numRiocb;
  399. }
  400. }
  401. void
  402. lpfc_read_rev(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  403. {
  404. MAILBOX_t *mb;
  405. mb = &pmb->mb;
  406. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  407. mb->un.varRdRev.cv = 1;
  408. mb->mbxCommand = MBX_READ_REV;
  409. mb->mbxOwner = OWN_HOST;
  410. return;
  411. }
  412. void
  413. lpfc_config_ring(struct lpfc_hba * phba, int ring, LPFC_MBOXQ_t * pmb)
  414. {
  415. int i;
  416. MAILBOX_t *mb = &pmb->mb;
  417. struct lpfc_sli *psli;
  418. struct lpfc_sli_ring *pring;
  419. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  420. mb->un.varCfgRing.ring = ring;
  421. mb->un.varCfgRing.maxOrigXchg = 0;
  422. mb->un.varCfgRing.maxRespXchg = 0;
  423. mb->un.varCfgRing.recvNotify = 1;
  424. psli = &phba->sli;
  425. pring = &psli->ring[ring];
  426. mb->un.varCfgRing.numMask = pring->num_mask;
  427. mb->mbxCommand = MBX_CONFIG_RING;
  428. mb->mbxOwner = OWN_HOST;
  429. /* Is this ring configured for a specific profile */
  430. if (pring->prt[0].profile) {
  431. mb->un.varCfgRing.profile = pring->prt[0].profile;
  432. return;
  433. }
  434. /* Otherwise we setup specific rctl / type masks for this ring */
  435. for (i = 0; i < pring->num_mask; i++) {
  436. mb->un.varCfgRing.rrRegs[i].rval = pring->prt[i].rctl;
  437. if (mb->un.varCfgRing.rrRegs[i].rval != FC_ELS_REQ)
  438. mb->un.varCfgRing.rrRegs[i].rmask = 0xff;
  439. else
  440. mb->un.varCfgRing.rrRegs[i].rmask = 0xfe;
  441. mb->un.varCfgRing.rrRegs[i].tval = pring->prt[i].type;
  442. mb->un.varCfgRing.rrRegs[i].tmask = 0xff;
  443. }
  444. return;
  445. }
  446. void
  447. lpfc_config_port(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  448. {
  449. MAILBOX_t *mb = &pmb->mb;
  450. dma_addr_t pdma_addr;
  451. uint32_t bar_low, bar_high;
  452. size_t offset;
  453. HGP hgp;
  454. void __iomem *to_slim;
  455. memset(pmb, 0, sizeof(LPFC_MBOXQ_t));
  456. mb->mbxCommand = MBX_CONFIG_PORT;
  457. mb->mbxOwner = OWN_HOST;
  458. mb->un.varCfgPort.pcbLen = sizeof(PCB_t);
  459. offset = (uint8_t *)&phba->slim2p->pcb - (uint8_t *)phba->slim2p;
  460. pdma_addr = phba->slim2p_mapping + offset;
  461. mb->un.varCfgPort.pcbLow = putPaddrLow(pdma_addr);
  462. mb->un.varCfgPort.pcbHigh = putPaddrHigh(pdma_addr);
  463. /* Now setup pcb */
  464. phba->slim2p->pcb.type = TYPE_NATIVE_SLI2;
  465. phba->slim2p->pcb.feature = FEATURE_INITIAL_SLI2;
  466. /* Setup Mailbox pointers */
  467. phba->slim2p->pcb.mailBoxSize = sizeof(MAILBOX_t);
  468. offset = (uint8_t *)&phba->slim2p->mbx - (uint8_t *)phba->slim2p;
  469. pdma_addr = phba->slim2p_mapping + offset;
  470. phba->slim2p->pcb.mbAddrHigh = putPaddrHigh(pdma_addr);
  471. phba->slim2p->pcb.mbAddrLow = putPaddrLow(pdma_addr);
  472. /*
  473. * Setup Host Group ring pointer.
  474. *
  475. * For efficiency reasons, the ring get/put pointers can be
  476. * placed in adapter memory (SLIM) rather than in host memory.
  477. * This allows firmware to avoid PCI reads/writes when updating
  478. * and checking pointers.
  479. *
  480. * The firmware recognizes the use of SLIM memory by comparing
  481. * the address of the get/put pointers structure with that of
  482. * the SLIM BAR (BAR0).
  483. *
  484. * Caution: be sure to use the PCI config space value of BAR0/BAR1
  485. * (the hardware's view of the base address), not the OS's
  486. * value of pci_resource_start() as the OS value may be a cookie
  487. * for ioremap/iomap.
  488. */
  489. pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_0, &bar_low);
  490. pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_1, &bar_high);
  491. /* mask off BAR0's flag bits 0 - 3 */
  492. phba->slim2p->pcb.hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) +
  493. (SLIMOFF*sizeof(uint32_t));
  494. if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64)
  495. phba->slim2p->pcb.hgpAddrHigh = bar_high;
  496. else
  497. phba->slim2p->pcb.hgpAddrHigh = 0;
  498. /* write HGP data to SLIM at the required longword offset */
  499. memset(&hgp, 0, sizeof(HGP));
  500. to_slim = phba->MBslimaddr + (SLIMOFF*sizeof (uint32_t));
  501. lpfc_memcpy_to_slim(to_slim, &hgp, sizeof (HGP));
  502. /* Setup Port Group ring pointer */
  503. offset = (uint8_t *)&phba->slim2p->mbx.us.s2.port -
  504. (uint8_t *)phba->slim2p;
  505. pdma_addr = phba->slim2p_mapping + offset;
  506. phba->slim2p->pcb.pgpAddrHigh = putPaddrHigh(pdma_addr);
  507. phba->slim2p->pcb.pgpAddrLow = putPaddrLow(pdma_addr);
  508. /* Use callback routine to setp rings in the pcb */
  509. lpfc_config_pcb_setup(phba);
  510. /* special handling for LC HBAs */
  511. if (lpfc_is_LC_HBA(phba->pcidev->device)) {
  512. uint32_t hbainit[5];
  513. lpfc_hba_init(phba, hbainit);
  514. memcpy(&mb->un.varCfgPort.hbainit, hbainit, 20);
  515. }
  516. /* Swap PCB if needed */
  517. lpfc_sli_pcimem_bcopy(&phba->slim2p->pcb, &phba->slim2p->pcb,
  518. sizeof (PCB_t));
  519. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  520. "%d:0405 Service Level Interface (SLI) 2 selected\n",
  521. phba->brd_no);
  522. }
  523. void
  524. lpfc_mbox_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq)
  525. {
  526. struct lpfc_sli *psli;
  527. psli = &phba->sli;
  528. list_add_tail(&mbq->list, &psli->mboxq);
  529. psli->mboxq_cnt++;
  530. return;
  531. }
  532. LPFC_MBOXQ_t *
  533. lpfc_mbox_get(struct lpfc_hba * phba)
  534. {
  535. LPFC_MBOXQ_t *mbq = NULL;
  536. struct lpfc_sli *psli = &phba->sli;
  537. list_remove_head((&psli->mboxq), mbq, LPFC_MBOXQ_t,
  538. list);
  539. if (mbq) {
  540. psli->mboxq_cnt--;
  541. }
  542. return mbq;
  543. }