panel-tpo-td043mtea1.c 14 KB

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  1. /*
  2. * LCD panel driver for TPO TD043MTEA1
  3. *
  4. * Author: Gražvydas Ignotas <notasas@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/delay.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/regulator/consumer.h>
  15. #include <linux/gpio.h>
  16. #include <linux/err.h>
  17. #include <linux/slab.h>
  18. #include <video/omapdss.h>
  19. #include <video/omap-panel-data.h>
  20. #define TPO_R02_MODE(x) ((x) & 7)
  21. #define TPO_R02_MODE_800x480 7
  22. #define TPO_R02_NCLK_RISING BIT(3)
  23. #define TPO_R02_HSYNC_HIGH BIT(4)
  24. #define TPO_R02_VSYNC_HIGH BIT(5)
  25. #define TPO_R03_NSTANDBY BIT(0)
  26. #define TPO_R03_EN_CP_CLK BIT(1)
  27. #define TPO_R03_EN_VGL_PUMP BIT(2)
  28. #define TPO_R03_EN_PWM BIT(3)
  29. #define TPO_R03_DRIVING_CAP_100 BIT(4)
  30. #define TPO_R03_EN_PRE_CHARGE BIT(6)
  31. #define TPO_R03_SOFTWARE_CTL BIT(7)
  32. #define TPO_R04_NFLIP_H BIT(0)
  33. #define TPO_R04_NFLIP_V BIT(1)
  34. #define TPO_R04_CP_CLK_FREQ_1H BIT(2)
  35. #define TPO_R04_VGL_FREQ_1H BIT(4)
  36. #define TPO_R03_VAL_NORMAL (TPO_R03_NSTANDBY | TPO_R03_EN_CP_CLK | \
  37. TPO_R03_EN_VGL_PUMP | TPO_R03_EN_PWM | \
  38. TPO_R03_DRIVING_CAP_100 | TPO_R03_EN_PRE_CHARGE | \
  39. TPO_R03_SOFTWARE_CTL)
  40. #define TPO_R03_VAL_STANDBY (TPO_R03_DRIVING_CAP_100 | \
  41. TPO_R03_EN_PRE_CHARGE | TPO_R03_SOFTWARE_CTL)
  42. static const u16 tpo_td043_def_gamma[12] = {
  43. 105, 315, 381, 431, 490, 537, 579, 686, 780, 837, 880, 1023
  44. };
  45. struct tpo_td043_device {
  46. struct spi_device *spi;
  47. struct regulator *vcc_reg;
  48. int nreset_gpio;
  49. u16 gamma[12];
  50. u32 mode;
  51. u32 hmirror:1;
  52. u32 vmirror:1;
  53. u32 powered_on:1;
  54. u32 spi_suspended:1;
  55. u32 power_on_resume:1;
  56. };
  57. /* used to pass spi_device from SPI to DSS portion of the driver */
  58. static struct tpo_td043_device *g_tpo_td043;
  59. static int tpo_td043_write(struct spi_device *spi, u8 addr, u8 data)
  60. {
  61. struct spi_message m;
  62. struct spi_transfer xfer;
  63. u16 w;
  64. int r;
  65. spi_message_init(&m);
  66. memset(&xfer, 0, sizeof(xfer));
  67. w = ((u16)addr << 10) | (1 << 8) | data;
  68. xfer.tx_buf = &w;
  69. xfer.bits_per_word = 16;
  70. xfer.len = 2;
  71. spi_message_add_tail(&xfer, &m);
  72. r = spi_sync(spi, &m);
  73. if (r < 0)
  74. dev_warn(&spi->dev, "failed to write to LCD reg (%d)\n", r);
  75. return r;
  76. }
  77. static void tpo_td043_write_gamma(struct spi_device *spi, u16 gamma[12])
  78. {
  79. u8 i, val;
  80. /* gamma bits [9:8] */
  81. for (val = i = 0; i < 4; i++)
  82. val |= (gamma[i] & 0x300) >> ((i + 1) * 2);
  83. tpo_td043_write(spi, 0x11, val);
  84. for (val = i = 0; i < 4; i++)
  85. val |= (gamma[i+4] & 0x300) >> ((i + 1) * 2);
  86. tpo_td043_write(spi, 0x12, val);
  87. for (val = i = 0; i < 4; i++)
  88. val |= (gamma[i+8] & 0x300) >> ((i + 1) * 2);
  89. tpo_td043_write(spi, 0x13, val);
  90. /* gamma bits [7:0] */
  91. for (val = i = 0; i < 12; i++)
  92. tpo_td043_write(spi, 0x14 + i, gamma[i] & 0xff);
  93. }
  94. static int tpo_td043_write_mirror(struct spi_device *spi, bool h, bool v)
  95. {
  96. u8 reg4 = TPO_R04_NFLIP_H | TPO_R04_NFLIP_V | \
  97. TPO_R04_CP_CLK_FREQ_1H | TPO_R04_VGL_FREQ_1H;
  98. if (h)
  99. reg4 &= ~TPO_R04_NFLIP_H;
  100. if (v)
  101. reg4 &= ~TPO_R04_NFLIP_V;
  102. return tpo_td043_write(spi, 4, reg4);
  103. }
  104. static int tpo_td043_set_hmirror(struct omap_dss_device *dssdev, bool enable)
  105. {
  106. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  107. tpo_td043->hmirror = enable;
  108. return tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
  109. tpo_td043->vmirror);
  110. }
  111. static bool tpo_td043_get_hmirror(struct omap_dss_device *dssdev)
  112. {
  113. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  114. return tpo_td043->hmirror;
  115. }
  116. static ssize_t tpo_td043_vmirror_show(struct device *dev,
  117. struct device_attribute *attr, char *buf)
  118. {
  119. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  120. return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->vmirror);
  121. }
  122. static ssize_t tpo_td043_vmirror_store(struct device *dev,
  123. struct device_attribute *attr, const char *buf, size_t count)
  124. {
  125. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  126. int val;
  127. int ret;
  128. ret = kstrtoint(buf, 0, &val);
  129. if (ret < 0)
  130. return ret;
  131. val = !!val;
  132. ret = tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror, val);
  133. if (ret < 0)
  134. return ret;
  135. tpo_td043->vmirror = val;
  136. return count;
  137. }
  138. static ssize_t tpo_td043_mode_show(struct device *dev,
  139. struct device_attribute *attr, char *buf)
  140. {
  141. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  142. return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->mode);
  143. }
  144. static ssize_t tpo_td043_mode_store(struct device *dev,
  145. struct device_attribute *attr, const char *buf, size_t count)
  146. {
  147. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  148. long val;
  149. int ret;
  150. ret = kstrtol(buf, 0, &val);
  151. if (ret != 0 || val & ~7)
  152. return -EINVAL;
  153. tpo_td043->mode = val;
  154. val |= TPO_R02_NCLK_RISING;
  155. tpo_td043_write(tpo_td043->spi, 2, val);
  156. return count;
  157. }
  158. static ssize_t tpo_td043_gamma_show(struct device *dev,
  159. struct device_attribute *attr, char *buf)
  160. {
  161. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  162. ssize_t len = 0;
  163. int ret;
  164. int i;
  165. for (i = 0; i < ARRAY_SIZE(tpo_td043->gamma); i++) {
  166. ret = snprintf(buf + len, PAGE_SIZE - len, "%u ",
  167. tpo_td043->gamma[i]);
  168. if (ret < 0)
  169. return ret;
  170. len += ret;
  171. }
  172. buf[len - 1] = '\n';
  173. return len;
  174. }
  175. static ssize_t tpo_td043_gamma_store(struct device *dev,
  176. struct device_attribute *attr, const char *buf, size_t count)
  177. {
  178. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  179. unsigned int g[12];
  180. int ret;
  181. int i;
  182. ret = sscanf(buf, "%u %u %u %u %u %u %u %u %u %u %u %u",
  183. &g[0], &g[1], &g[2], &g[3], &g[4], &g[5],
  184. &g[6], &g[7], &g[8], &g[9], &g[10], &g[11]);
  185. if (ret != 12)
  186. return -EINVAL;
  187. for (i = 0; i < 12; i++)
  188. tpo_td043->gamma[i] = g[i];
  189. tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
  190. return count;
  191. }
  192. static DEVICE_ATTR(vmirror, S_IRUGO | S_IWUSR,
  193. tpo_td043_vmirror_show, tpo_td043_vmirror_store);
  194. static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR,
  195. tpo_td043_mode_show, tpo_td043_mode_store);
  196. static DEVICE_ATTR(gamma, S_IRUGO | S_IWUSR,
  197. tpo_td043_gamma_show, tpo_td043_gamma_store);
  198. static struct attribute *tpo_td043_attrs[] = {
  199. &dev_attr_vmirror.attr,
  200. &dev_attr_mode.attr,
  201. &dev_attr_gamma.attr,
  202. NULL,
  203. };
  204. static struct attribute_group tpo_td043_attr_group = {
  205. .attrs = tpo_td043_attrs,
  206. };
  207. static const struct omap_video_timings tpo_td043_timings = {
  208. .x_res = 800,
  209. .y_res = 480,
  210. .pixel_clock = 36000,
  211. .hsw = 1,
  212. .hfp = 68,
  213. .hbp = 214,
  214. .vsw = 1,
  215. .vfp = 39,
  216. .vbp = 34,
  217. .vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
  218. .hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
  219. .data_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
  220. .de_level = OMAPDSS_SIG_ACTIVE_HIGH,
  221. .sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
  222. };
  223. static inline struct panel_tpo_td043_data
  224. *get_panel_data(const struct omap_dss_device *dssdev)
  225. {
  226. return (struct panel_tpo_td043_data *) dssdev->data;
  227. }
  228. static int tpo_td043_power_on(struct tpo_td043_device *tpo_td043)
  229. {
  230. int r;
  231. if (tpo_td043->powered_on)
  232. return 0;
  233. r = regulator_enable(tpo_td043->vcc_reg);
  234. if (r != 0)
  235. return r;
  236. /* wait for panel to stabilize */
  237. msleep(160);
  238. if (gpio_is_valid(tpo_td043->nreset_gpio))
  239. gpio_set_value(tpo_td043->nreset_gpio, 1);
  240. tpo_td043_write(tpo_td043->spi, 2,
  241. TPO_R02_MODE(tpo_td043->mode) | TPO_R02_NCLK_RISING);
  242. tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_NORMAL);
  243. tpo_td043_write(tpo_td043->spi, 0x20, 0xf0);
  244. tpo_td043_write(tpo_td043->spi, 0x21, 0xf0);
  245. tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
  246. tpo_td043->vmirror);
  247. tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
  248. tpo_td043->powered_on = 1;
  249. return 0;
  250. }
  251. static void tpo_td043_power_off(struct tpo_td043_device *tpo_td043)
  252. {
  253. if (!tpo_td043->powered_on)
  254. return;
  255. tpo_td043_write(tpo_td043->spi, 3,
  256. TPO_R03_VAL_STANDBY | TPO_R03_EN_PWM);
  257. if (gpio_is_valid(tpo_td043->nreset_gpio))
  258. gpio_set_value(tpo_td043->nreset_gpio, 0);
  259. /* wait for at least 2 vsyncs before cutting off power */
  260. msleep(50);
  261. tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_STANDBY);
  262. regulator_disable(tpo_td043->vcc_reg);
  263. tpo_td043->powered_on = 0;
  264. }
  265. static int tpo_td043_enable_dss(struct omap_dss_device *dssdev)
  266. {
  267. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  268. int r;
  269. if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
  270. return 0;
  271. omapdss_dpi_set_timings(dssdev, &dssdev->panel.timings);
  272. omapdss_dpi_set_data_lines(dssdev, dssdev->phy.dpi.data_lines);
  273. r = omapdss_dpi_display_enable(dssdev);
  274. if (r)
  275. goto err0;
  276. /*
  277. * If we are resuming from system suspend, SPI clocks might not be
  278. * enabled yet, so we'll program the LCD from SPI PM resume callback.
  279. */
  280. if (!tpo_td043->spi_suspended) {
  281. r = tpo_td043_power_on(tpo_td043);
  282. if (r)
  283. goto err1;
  284. }
  285. dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
  286. return 0;
  287. err1:
  288. omapdss_dpi_display_disable(dssdev);
  289. err0:
  290. return r;
  291. }
  292. static void tpo_td043_disable_dss(struct omap_dss_device *dssdev)
  293. {
  294. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  295. if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  296. return;
  297. omapdss_dpi_display_disable(dssdev);
  298. if (!tpo_td043->spi_suspended)
  299. tpo_td043_power_off(tpo_td043);
  300. }
  301. static int tpo_td043_enable(struct omap_dss_device *dssdev)
  302. {
  303. dev_dbg(&dssdev->dev, "enable\n");
  304. return tpo_td043_enable_dss(dssdev);
  305. }
  306. static void tpo_td043_disable(struct omap_dss_device *dssdev)
  307. {
  308. dev_dbg(&dssdev->dev, "disable\n");
  309. tpo_td043_disable_dss(dssdev);
  310. dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
  311. }
  312. static int tpo_td043_probe(struct omap_dss_device *dssdev)
  313. {
  314. struct tpo_td043_device *tpo_td043 = g_tpo_td043;
  315. struct panel_tpo_td043_data *pdata = get_panel_data(dssdev);
  316. int ret = 0;
  317. dev_dbg(&dssdev->dev, "probe\n");
  318. if (tpo_td043 == NULL) {
  319. dev_err(&dssdev->dev, "missing tpo_td043_device\n");
  320. return -ENODEV;
  321. }
  322. if (!pdata)
  323. return -EINVAL;
  324. tpo_td043->nreset_gpio = pdata->nreset_gpio;
  325. dssdev->panel.timings = tpo_td043_timings;
  326. dssdev->ctrl.pixel_size = 24;
  327. tpo_td043->mode = TPO_R02_MODE_800x480;
  328. memcpy(tpo_td043->gamma, tpo_td043_def_gamma, sizeof(tpo_td043->gamma));
  329. tpo_td043->vcc_reg = regulator_get(&dssdev->dev, "vcc");
  330. if (IS_ERR(tpo_td043->vcc_reg)) {
  331. dev_err(&dssdev->dev, "failed to get LCD VCC regulator\n");
  332. ret = PTR_ERR(tpo_td043->vcc_reg);
  333. goto fail_regulator;
  334. }
  335. if (gpio_is_valid(tpo_td043->nreset_gpio)) {
  336. ret = devm_gpio_request_one(&dssdev->dev,
  337. tpo_td043->nreset_gpio, GPIOF_OUT_INIT_LOW,
  338. "lcd reset");
  339. if (ret < 0) {
  340. dev_err(&dssdev->dev, "couldn't request reset GPIO\n");
  341. goto fail_gpio_req;
  342. }
  343. }
  344. ret = sysfs_create_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
  345. if (ret)
  346. dev_warn(&dssdev->dev, "failed to create sysfs files\n");
  347. dev_set_drvdata(&dssdev->dev, tpo_td043);
  348. return 0;
  349. fail_gpio_req:
  350. regulator_put(tpo_td043->vcc_reg);
  351. fail_regulator:
  352. kfree(tpo_td043);
  353. return ret;
  354. }
  355. static void tpo_td043_remove(struct omap_dss_device *dssdev)
  356. {
  357. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  358. dev_dbg(&dssdev->dev, "remove\n");
  359. sysfs_remove_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
  360. regulator_put(tpo_td043->vcc_reg);
  361. }
  362. static void tpo_td043_set_timings(struct omap_dss_device *dssdev,
  363. struct omap_video_timings *timings)
  364. {
  365. omapdss_dpi_set_timings(dssdev, timings);
  366. dssdev->panel.timings = *timings;
  367. }
  368. static int tpo_td043_check_timings(struct omap_dss_device *dssdev,
  369. struct omap_video_timings *timings)
  370. {
  371. return dpi_check_timings(dssdev, timings);
  372. }
  373. static struct omap_dss_driver tpo_td043_driver = {
  374. .probe = tpo_td043_probe,
  375. .remove = tpo_td043_remove,
  376. .enable = tpo_td043_enable,
  377. .disable = tpo_td043_disable,
  378. .set_mirror = tpo_td043_set_hmirror,
  379. .get_mirror = tpo_td043_get_hmirror,
  380. .set_timings = tpo_td043_set_timings,
  381. .check_timings = tpo_td043_check_timings,
  382. .driver = {
  383. .name = "tpo_td043mtea1_panel",
  384. .owner = THIS_MODULE,
  385. },
  386. };
  387. static int tpo_td043_spi_probe(struct spi_device *spi)
  388. {
  389. struct omap_dss_device *dssdev = spi->dev.platform_data;
  390. struct tpo_td043_device *tpo_td043;
  391. int ret;
  392. if (dssdev == NULL) {
  393. dev_err(&spi->dev, "missing dssdev\n");
  394. return -ENODEV;
  395. }
  396. if (g_tpo_td043 != NULL)
  397. return -EBUSY;
  398. spi->bits_per_word = 16;
  399. spi->mode = SPI_MODE_0;
  400. ret = spi_setup(spi);
  401. if (ret < 0) {
  402. dev_err(&spi->dev, "spi_setup failed: %d\n", ret);
  403. return ret;
  404. }
  405. tpo_td043 = kzalloc(sizeof(*tpo_td043), GFP_KERNEL);
  406. if (tpo_td043 == NULL)
  407. return -ENOMEM;
  408. tpo_td043->spi = spi;
  409. dev_set_drvdata(&spi->dev, tpo_td043);
  410. g_tpo_td043 = tpo_td043;
  411. omap_dss_register_driver(&tpo_td043_driver);
  412. return 0;
  413. }
  414. static int tpo_td043_spi_remove(struct spi_device *spi)
  415. {
  416. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&spi->dev);
  417. omap_dss_unregister_driver(&tpo_td043_driver);
  418. kfree(tpo_td043);
  419. g_tpo_td043 = NULL;
  420. return 0;
  421. }
  422. #ifdef CONFIG_PM_SLEEP
  423. static int tpo_td043_spi_suspend(struct device *dev)
  424. {
  425. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  426. dev_dbg(dev, "tpo_td043_spi_suspend, tpo %p\n", tpo_td043);
  427. tpo_td043->power_on_resume = tpo_td043->powered_on;
  428. tpo_td043_power_off(tpo_td043);
  429. tpo_td043->spi_suspended = 1;
  430. return 0;
  431. }
  432. static int tpo_td043_spi_resume(struct device *dev)
  433. {
  434. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  435. int ret;
  436. dev_dbg(dev, "tpo_td043_spi_resume\n");
  437. if (tpo_td043->power_on_resume) {
  438. ret = tpo_td043_power_on(tpo_td043);
  439. if (ret)
  440. return ret;
  441. }
  442. tpo_td043->spi_suspended = 0;
  443. return 0;
  444. }
  445. #endif
  446. static SIMPLE_DEV_PM_OPS(tpo_td043_spi_pm,
  447. tpo_td043_spi_suspend, tpo_td043_spi_resume);
  448. static struct spi_driver tpo_td043_spi_driver = {
  449. .driver = {
  450. .name = "tpo_td043mtea1_panel_spi",
  451. .owner = THIS_MODULE,
  452. .pm = &tpo_td043_spi_pm,
  453. },
  454. .probe = tpo_td043_spi_probe,
  455. .remove = tpo_td043_spi_remove,
  456. };
  457. module_spi_driver(tpo_td043_spi_driver);
  458. MODULE_AUTHOR("Gražvydas Ignotas <notasas@gmail.com>");
  459. MODULE_DESCRIPTION("TPO TD043MTEA1 LCD Driver");
  460. MODULE_LICENSE("GPL");