saa7134-dvb.c 27 KB

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  1. /*
  2. *
  3. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  4. *
  5. * Extended 3 / 2005 by Hartmut Hackmann to support various
  6. * cards with the tda10046 DVB-T channel decoder
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/init.h>
  23. #include <linux/list.h>
  24. #include <linux/module.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/kthread.h>
  29. #include <linux/suspend.h>
  30. #include "saa7134-reg.h"
  31. #include "saa7134.h"
  32. #include <media/v4l2-common.h>
  33. #ifdef HAVE_MT352
  34. # include "mt352.h"
  35. # include "mt352_priv.h" /* FIXME */
  36. #endif
  37. #ifdef HAVE_TDA1004X
  38. # include "tda1004x.h"
  39. #endif
  40. #ifdef HAVE_NXT200X
  41. # include "nxt200x.h"
  42. # include "dvb-pll.h"
  43. #endif
  44. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  45. MODULE_LICENSE("GPL");
  46. static unsigned int antenna_pwr = 0;
  47. module_param(antenna_pwr, int, 0444);
  48. MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
  49. /* ------------------------------------------------------------------ */
  50. #ifdef HAVE_MT352
  51. static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
  52. {
  53. u32 ok;
  54. if (!on) {
  55. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
  56. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  57. return 0;
  58. }
  59. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
  60. saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  61. udelay(10);
  62. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
  63. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
  64. udelay(10);
  65. saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
  66. udelay(10);
  67. ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
  68. printk("%s: %s %s\n", dev->name, __FUNCTION__,
  69. ok ? "on" : "off");
  70. if (!ok)
  71. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  72. return ok;
  73. }
  74. static int mt352_pinnacle_init(struct dvb_frontend* fe)
  75. {
  76. static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
  77. static u8 reset [] = { RESET, 0x80 };
  78. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  79. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
  80. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
  81. static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
  82. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
  83. static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
  84. static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
  85. struct saa7134_dev *dev= fe->dvb->priv;
  86. printk("%s: %s called\n",dev->name,__FUNCTION__);
  87. mt352_write(fe, clock_config, sizeof(clock_config));
  88. udelay(200);
  89. mt352_write(fe, reset, sizeof(reset));
  90. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  91. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  92. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  93. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  94. mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
  95. mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
  96. mt352_write(fe, irq_cfg, sizeof(irq_cfg));
  97. return 0;
  98. }
  99. static int mt352_pinnacle_pll_set(struct dvb_frontend* fe,
  100. struct dvb_frontend_parameters* params,
  101. u8* pllbuf)
  102. {
  103. static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
  104. static int off = TDA9887_PRESENT | TDA9887_PORT2_ACTIVE;
  105. struct saa7134_dev *dev = fe->dvb->priv;
  106. struct v4l2_frequency f;
  107. /* set frequency (mt2050) */
  108. f.tuner = 0;
  109. f.type = V4L2_TUNER_DIGITAL_TV;
  110. f.frequency = params->frequency / 1000 * 16 / 1000;
  111. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
  112. saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
  113. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&off);
  114. pinnacle_antenna_pwr(dev, antenna_pwr);
  115. /* mt352 setup */
  116. mt352_pinnacle_init(fe);
  117. pllbuf[0] = 0xc2;
  118. pllbuf[1] = 0x00;
  119. pllbuf[2] = 0x00;
  120. pllbuf[3] = 0x80;
  121. pllbuf[4] = 0x00;
  122. return 0;
  123. }
  124. static struct mt352_config pinnacle_300i = {
  125. .demod_address = 0x3c >> 1,
  126. .adc_clock = 20333,
  127. .if2 = 36150,
  128. .no_tuner = 1,
  129. .demod_init = mt352_pinnacle_init,
  130. .pll_set = mt352_pinnacle_pll_set,
  131. };
  132. #endif
  133. /* ------------------------------------------------------------------ */
  134. #ifdef HAVE_TDA1004X
  135. static int philips_tda6651_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  136. {
  137. struct saa7134_dev *dev = fe->dvb->priv;
  138. u8 tuner_buf[4];
  139. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
  140. sizeof(tuner_buf) };
  141. int tuner_frequency = 0;
  142. u8 band, cp, filter;
  143. /* determine charge pump */
  144. tuner_frequency = params->frequency + 36166000;
  145. if (tuner_frequency < 87000000)
  146. return -EINVAL;
  147. else if (tuner_frequency < 130000000)
  148. cp = 3;
  149. else if (tuner_frequency < 160000000)
  150. cp = 5;
  151. else if (tuner_frequency < 200000000)
  152. cp = 6;
  153. else if (tuner_frequency < 290000000)
  154. cp = 3;
  155. else if (tuner_frequency < 420000000)
  156. cp = 5;
  157. else if (tuner_frequency < 480000000)
  158. cp = 6;
  159. else if (tuner_frequency < 620000000)
  160. cp = 3;
  161. else if (tuner_frequency < 830000000)
  162. cp = 5;
  163. else if (tuner_frequency < 895000000)
  164. cp = 7;
  165. else
  166. return -EINVAL;
  167. /* determine band */
  168. if (params->frequency < 49000000)
  169. return -EINVAL;
  170. else if (params->frequency < 161000000)
  171. band = 1;
  172. else if (params->frequency < 444000000)
  173. band = 2;
  174. else if (params->frequency < 861000000)
  175. band = 4;
  176. else
  177. return -EINVAL;
  178. /* setup PLL filter */
  179. switch (params->u.ofdm.bandwidth) {
  180. case BANDWIDTH_6_MHZ:
  181. filter = 0;
  182. break;
  183. case BANDWIDTH_7_MHZ:
  184. filter = 0;
  185. break;
  186. case BANDWIDTH_8_MHZ:
  187. filter = 1;
  188. break;
  189. default:
  190. return -EINVAL;
  191. }
  192. /* calculate divisor
  193. * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
  194. */
  195. tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
  196. /* setup tuner buffer */
  197. tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
  198. tuner_buf[1] = tuner_frequency & 0xff;
  199. tuner_buf[2] = 0xca;
  200. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  201. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  202. return -EIO;
  203. msleep(1);
  204. return 0;
  205. }
  206. static int philips_tda6651_pll_init(u8 addr, struct dvb_frontend *fe)
  207. {
  208. struct saa7134_dev *dev = fe->dvb->priv;
  209. static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  210. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
  211. /* setup PLL configuration */
  212. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  213. return -EIO;
  214. msleep(1);
  215. return 0;
  216. }
  217. /* ------------------------------------------------------------------ */
  218. static int philips_tu1216_pll_60_init(struct dvb_frontend *fe)
  219. {
  220. return philips_tda6651_pll_init(0x60, fe);
  221. }
  222. static int philips_tu1216_pll_60_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  223. {
  224. return philips_tda6651_pll_set(0x60, fe, params);
  225. }
  226. static int philips_tu1216_request_firmware(struct dvb_frontend *fe,
  227. const struct firmware **fw, char *name)
  228. {
  229. struct saa7134_dev *dev = fe->dvb->priv;
  230. return request_firmware(fw, name, &dev->pci->dev);
  231. }
  232. static struct tda1004x_config philips_tu1216_60_config = {
  233. .demod_address = 0x8,
  234. .invert = 1,
  235. .invert_oclk = 0,
  236. .xtal_freq = TDA10046_XTAL_4M,
  237. .agc_config = TDA10046_AGC_DEFAULT,
  238. .if_freq = TDA10046_FREQ_3617,
  239. .pll_init = philips_tu1216_pll_60_init,
  240. .pll_set = philips_tu1216_pll_60_set,
  241. .pll_sleep = NULL,
  242. .request_firmware = philips_tu1216_request_firmware,
  243. };
  244. /* ------------------------------------------------------------------ */
  245. static int philips_tu1216_pll_61_init(struct dvb_frontend *fe)
  246. {
  247. return philips_tda6651_pll_init(0x61, fe);
  248. }
  249. static int philips_tu1216_pll_61_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  250. {
  251. return philips_tda6651_pll_set(0x61, fe, params);
  252. }
  253. static struct tda1004x_config philips_tu1216_61_config = {
  254. .demod_address = 0x8,
  255. .invert = 1,
  256. .invert_oclk = 0,
  257. .xtal_freq = TDA10046_XTAL_4M,
  258. .agc_config = TDA10046_AGC_DEFAULT,
  259. .if_freq = TDA10046_FREQ_3617,
  260. .pll_init = philips_tu1216_pll_61_init,
  261. .pll_set = philips_tu1216_pll_61_set,
  262. .pll_sleep = NULL,
  263. .request_firmware = philips_tu1216_request_firmware,
  264. };
  265. /* ------------------------------------------------------------------ */
  266. static int philips_europa_pll_init(struct dvb_frontend *fe)
  267. {
  268. struct saa7134_dev *dev = fe->dvb->priv;
  269. static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
  270. struct i2c_msg init_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
  271. /* setup PLL configuration */
  272. if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
  273. return -EIO;
  274. msleep(1);
  275. /* switch the board to dvb mode */
  276. init_msg.addr = 0x43;
  277. init_msg.len = 0x02;
  278. msg[0] = 0x00;
  279. msg[1] = 0x40;
  280. if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
  281. return -EIO;
  282. return 0;
  283. }
  284. static int philips_td1316_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  285. {
  286. return philips_tda6651_pll_set(0x61, fe, params);
  287. }
  288. static void philips_europa_analog(struct dvb_frontend *fe)
  289. {
  290. struct saa7134_dev *dev = fe->dvb->priv;
  291. /* this message actually turns the tuner back to analog mode */
  292. static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
  293. struct i2c_msg analog_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
  294. i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
  295. msleep(1);
  296. /* switch the board to analog mode */
  297. analog_msg.addr = 0x43;
  298. analog_msg.len = 0x02;
  299. msg[0] = 0x00;
  300. msg[1] = 0x14;
  301. i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
  302. }
  303. static struct tda1004x_config philips_europa_config = {
  304. .demod_address = 0x8,
  305. .invert = 0,
  306. .invert_oclk = 0,
  307. .xtal_freq = TDA10046_XTAL_4M,
  308. .agc_config = TDA10046_AGC_IFO_AUTO_POS,
  309. .if_freq = TDA10046_FREQ_052,
  310. .pll_init = philips_europa_pll_init,
  311. .pll_set = philips_td1316_pll_set,
  312. .pll_sleep = philips_europa_analog,
  313. .request_firmware = NULL,
  314. };
  315. /* ------------------------------------------------------------------ */
  316. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  317. {
  318. struct saa7134_dev *dev = fe->dvb->priv;
  319. /* this message is to set up ATC and ALC */
  320. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  321. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
  322. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  323. return -EIO;
  324. msleep(1);
  325. return 0;
  326. }
  327. static void philips_fmd1216_analog(struct dvb_frontend *fe)
  328. {
  329. struct saa7134_dev *dev = fe->dvb->priv;
  330. /* this message actually turns the tuner back to analog mode */
  331. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 };
  332. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
  333. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  334. msleep(1);
  335. fmd1216_init[2] = 0x86;
  336. fmd1216_init[3] = 0x54;
  337. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  338. msleep(1);
  339. }
  340. static int philips_fmd1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  341. {
  342. struct saa7134_dev *dev = fe->dvb->priv;
  343. u8 tuner_buf[4];
  344. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len =
  345. sizeof(tuner_buf) };
  346. int tuner_frequency = 0;
  347. int divider = 0;
  348. u8 band, mode, cp;
  349. /* determine charge pump */
  350. tuner_frequency = params->frequency + 36130000;
  351. if (tuner_frequency < 87000000)
  352. return -EINVAL;
  353. /* low band */
  354. else if (tuner_frequency < 180000000) {
  355. band = 1;
  356. mode = 7;
  357. cp = 0;
  358. } else if (tuner_frequency < 195000000) {
  359. band = 1;
  360. mode = 6;
  361. cp = 1;
  362. /* mid band */
  363. } else if (tuner_frequency < 366000000) {
  364. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  365. band = 10;
  366. } else {
  367. band = 2;
  368. }
  369. mode = 7;
  370. cp = 0;
  371. } else if (tuner_frequency < 478000000) {
  372. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  373. band = 10;
  374. } else {
  375. band = 2;
  376. }
  377. mode = 6;
  378. cp = 1;
  379. /* high band */
  380. } else if (tuner_frequency < 662000000) {
  381. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  382. band = 12;
  383. } else {
  384. band = 4;
  385. }
  386. mode = 7;
  387. cp = 0;
  388. } else if (tuner_frequency < 840000000) {
  389. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  390. band = 12;
  391. } else {
  392. band = 4;
  393. }
  394. mode = 6;
  395. cp = 1;
  396. } else {
  397. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  398. band = 12;
  399. } else {
  400. band = 4;
  401. }
  402. mode = 7;
  403. cp = 1;
  404. }
  405. /* calculate divisor */
  406. /* ((36166000 + Finput) / 166666) rounded! */
  407. divider = (tuner_frequency + 83333) / 166667;
  408. /* setup tuner buffer */
  409. tuner_buf[0] = (divider >> 8) & 0x7f;
  410. tuner_buf[1] = divider & 0xff;
  411. tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4;
  412. tuner_buf[3] = 0x40 | band;
  413. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  414. return -EIO;
  415. return 0;
  416. }
  417. static struct tda1004x_config medion_cardbus = {
  418. .demod_address = 0x08,
  419. .invert = 1,
  420. .invert_oclk = 0,
  421. .xtal_freq = TDA10046_XTAL_16M,
  422. .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
  423. .if_freq = TDA10046_FREQ_3613,
  424. .pll_init = philips_fmd1216_pll_init,
  425. .pll_set = philips_fmd1216_pll_set,
  426. .pll_sleep = philips_fmd1216_analog,
  427. .request_firmware = NULL,
  428. };
  429. /* ------------------------------------------------------------------ */
  430. struct tda827x_data {
  431. u32 lomax;
  432. u8 spd;
  433. u8 bs;
  434. u8 bp;
  435. u8 cp;
  436. u8 gc3;
  437. u8 div1p5;
  438. };
  439. static struct tda827x_data tda827x_dvbt[] = {
  440. { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
  441. { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
  442. { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
  443. { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
  444. { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
  445. { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
  446. { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  447. { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
  448. { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
  449. { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  450. { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  451. { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
  452. { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  453. { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  454. { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
  455. { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
  456. { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  457. { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  458. { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  459. { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  460. { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
  461. { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
  462. { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  463. { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  464. { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  465. { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
  466. { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  467. { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
  468. { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
  469. };
  470. static int philips_tda827x_pll_init(struct dvb_frontend *fe)
  471. {
  472. return 0;
  473. }
  474. static int philips_tda827x_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  475. {
  476. struct saa7134_dev *dev = fe->dvb->priv;
  477. u8 tuner_buf[14];
  478. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,
  479. .len = sizeof(tuner_buf) };
  480. int i, tuner_freq, if_freq;
  481. u32 N;
  482. switch (params->u.ofdm.bandwidth) {
  483. case BANDWIDTH_6_MHZ:
  484. if_freq = 4000000;
  485. break;
  486. case BANDWIDTH_7_MHZ:
  487. if_freq = 4500000;
  488. break;
  489. default: /* 8 MHz or Auto */
  490. if_freq = 5000000;
  491. break;
  492. }
  493. tuner_freq = params->frequency + if_freq;
  494. i = 0;
  495. while (tda827x_dvbt[i].lomax < tuner_freq) {
  496. if(tda827x_dvbt[i + 1].lomax == 0)
  497. break;
  498. i++;
  499. }
  500. N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2);
  501. tuner_buf[0] = 0;
  502. tuner_buf[1] = (N>>8) | 0x40;
  503. tuner_buf[2] = N & 0xff;
  504. tuner_buf[3] = 0;
  505. tuner_buf[4] = 0x52;
  506. tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) +
  507. (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp;
  508. tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f;
  509. tuner_buf[7] = 0xbf;
  510. tuner_buf[8] = 0x2a;
  511. tuner_buf[9] = 0x05;
  512. tuner_buf[10] = 0xff;
  513. tuner_buf[11] = 0x00;
  514. tuner_buf[12] = 0x00;
  515. tuner_buf[13] = 0x40;
  516. tuner_msg.len = 14;
  517. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  518. return -EIO;
  519. msleep(500);
  520. /* correct CP value */
  521. tuner_buf[0] = 0x30;
  522. tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp;
  523. tuner_msg.len = 2;
  524. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  525. return 0;
  526. }
  527. static void philips_tda827x_pll_sleep(struct dvb_frontend *fe)
  528. {
  529. struct saa7134_dev *dev = fe->dvb->priv;
  530. static u8 tda827x_sleep[] = { 0x30, 0xd0};
  531. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep,
  532. .len = sizeof(tda827x_sleep) };
  533. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  534. }
  535. static struct tda1004x_config tda827x_lifeview_config = {
  536. .demod_address = 0x08,
  537. .invert = 1,
  538. .invert_oclk = 0,
  539. .xtal_freq = TDA10046_XTAL_16M,
  540. .agc_config = TDA10046_AGC_TDA827X,
  541. .if_freq = TDA10046_FREQ_045,
  542. .pll_init = philips_tda827x_pll_init,
  543. .pll_set = philips_tda827x_pll_set,
  544. .pll_sleep = philips_tda827x_pll_sleep,
  545. .request_firmware = NULL,
  546. };
  547. /* ------------------------------------------------------------------ */
  548. struct tda827xa_data {
  549. u32 lomax;
  550. u8 svco;
  551. u8 spd;
  552. u8 scr;
  553. u8 sbs;
  554. u8 gc3;
  555. };
  556. static struct tda827xa_data tda827xa_dvbt[] = {
  557. { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
  558. { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
  559. { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
  560. { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
  561. { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
  562. { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  563. { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  564. { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  565. { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  566. { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
  567. { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
  568. { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
  569. { .lomax = 290000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
  570. { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
  571. { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
  572. { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
  573. { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
  574. { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
  575. { .lomax = 550000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
  576. { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
  577. { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
  578. { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
  579. { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
  580. { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
  581. { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
  582. { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
  583. { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}};
  584. static int philips_tda827xa_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  585. {
  586. struct saa7134_dev *dev = fe->dvb->priv;
  587. u8 tuner_buf[14];
  588. unsigned char reg2[2];
  589. struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = tuner_buf};
  590. int i, tuner_freq, if_freq;
  591. u32 N;
  592. switch (params->u.ofdm.bandwidth) {
  593. case BANDWIDTH_6_MHZ:
  594. if_freq = 4000000;
  595. break;
  596. case BANDWIDTH_7_MHZ:
  597. if_freq = 4500000;
  598. break;
  599. default: /* 8 MHz or Auto */
  600. if_freq = 5000000;
  601. break;
  602. }
  603. tuner_freq = params->frequency + if_freq;
  604. i = 0;
  605. while (tda827xa_dvbt[i].lomax < tuner_freq) {
  606. if(tda827xa_dvbt[i + 1].lomax == 0)
  607. break;
  608. i++;
  609. }
  610. N = ((tuner_freq + 31250) / 62500) << tda827xa_dvbt[i].spd;
  611. tuner_buf[0] = 0; // subaddress
  612. tuner_buf[1] = N >> 8;
  613. tuner_buf[2] = N & 0xff;
  614. tuner_buf[3] = 0;
  615. tuner_buf[4] = 0x16;
  616. tuner_buf[5] = (tda827xa_dvbt[i].spd << 5) + (tda827xa_dvbt[i].svco << 3) +
  617. tda827xa_dvbt[i].sbs;
  618. tuner_buf[6] = 0x4b + (tda827xa_dvbt[i].gc3 << 4);
  619. tuner_buf[7] = 0x0c;
  620. tuner_buf[8] = 0x06;
  621. tuner_buf[9] = 0x24;
  622. tuner_buf[10] = 0xff;
  623. tuner_buf[11] = 0x60;
  624. tuner_buf[12] = 0x00;
  625. tuner_buf[13] = 0x39; // lpsel
  626. msg.len = 14;
  627. if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
  628. return -EIO;
  629. msg.buf= reg2;
  630. msg.len = 2;
  631. reg2[0] = 0x60;
  632. reg2[1] = 0x3c;
  633. i2c_transfer(&dev->i2c_adap, &msg, 1);
  634. reg2[0] = 0xa0;
  635. reg2[1] = 0x40;
  636. i2c_transfer(&dev->i2c_adap, &msg, 1);
  637. msleep(2);
  638. /* correct CP value */
  639. reg2[0] = 0x30;
  640. reg2[1] = 0x10 + tda827xa_dvbt[i].scr;
  641. msg.len = 2;
  642. i2c_transfer(&dev->i2c_adap, &msg, 1);
  643. msleep(550);
  644. reg2[0] = 0x50;
  645. reg2[1] = 0x4f + (tda827xa_dvbt[i].gc3 << 4);
  646. i2c_transfer(&dev->i2c_adap, &msg, 1);
  647. return 0;
  648. }
  649. static void philips_tda827xa_pll_sleep(u8 addr, struct dvb_frontend *fe)
  650. {
  651. struct saa7134_dev *dev = fe->dvb->priv;
  652. static u8 tda827xa_sleep[] = { 0x30, 0x90};
  653. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tda827xa_sleep,
  654. .len = sizeof(tda827xa_sleep) };
  655. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  656. }
  657. /* ------------------------------------------------------------------ */
  658. static int philips_tiger_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  659. {
  660. int ret;
  661. struct saa7134_dev *dev = fe->dvb->priv;
  662. static u8 tda8290_close[] = { 0x21, 0xc0};
  663. static u8 tda8290_open[] = { 0x21, 0x80};
  664. struct i2c_msg tda8290_msg = {.addr = 0x4b,.flags = 0, .len = 2};
  665. /* close tda8290 i2c bridge */
  666. tda8290_msg.buf = tda8290_close;
  667. ret = i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
  668. if (ret != 1)
  669. return -EIO;
  670. msleep(20);
  671. ret = philips_tda827xa_pll_set(0x61, fe, params);
  672. if (ret != 0)
  673. return ret;
  674. /* open tda8290 i2c bridge */
  675. tda8290_msg.buf = tda8290_open;
  676. i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
  677. return ret;
  678. };
  679. static int philips_tiger_dvb_mode(struct dvb_frontend *fe)
  680. {
  681. struct saa7134_dev *dev = fe->dvb->priv;
  682. static u8 data[] = { 0x3c, 0x33, 0x6a};
  683. struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
  684. if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
  685. return -EIO;
  686. return 0;
  687. }
  688. static void philips_tiger_analog_mode(struct dvb_frontend *fe)
  689. {
  690. struct saa7134_dev *dev = fe->dvb->priv;
  691. static u8 data[] = { 0x3c, 0x33, 0x68};
  692. struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
  693. i2c_transfer(&dev->i2c_adap, &msg, 1);
  694. philips_tda827xa_pll_sleep( 0x61, fe);
  695. }
  696. static struct tda1004x_config philips_tiger_config = {
  697. .demod_address = 0x08,
  698. .invert = 1,
  699. .invert_oclk = 0,
  700. .xtal_freq = TDA10046_XTAL_16M,
  701. .agc_config = TDA10046_AGC_TDA827X,
  702. .if_freq = TDA10046_FREQ_045,
  703. .pll_init = philips_tiger_dvb_mode,
  704. .pll_set = philips_tiger_pll_set,
  705. .pll_sleep = philips_tiger_analog_mode,
  706. .request_firmware = NULL,
  707. };
  708. #endif
  709. /* ------------------------------------------------------------------ */
  710. #ifdef HAVE_NXT200X
  711. static struct nxt200x_config avertvhda180 = {
  712. .demod_address = 0x0a,
  713. .pll_address = 0x61,
  714. .pll_desc = &dvb_pll_tdhu2,
  715. };
  716. #endif
  717. /* ------------------------------------------------------------------ */
  718. static int dvb_init(struct saa7134_dev *dev)
  719. {
  720. /* init struct videobuf_dvb */
  721. dev->ts.nr_bufs = 32;
  722. dev->ts.nr_packets = 32*4;
  723. dev->dvb.name = dev->name;
  724. videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops,
  725. dev->pci, &dev->slock,
  726. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  727. V4L2_FIELD_ALTERNATE,
  728. sizeof(struct saa7134_buf),
  729. dev);
  730. switch (dev->board) {
  731. #ifdef HAVE_MT352
  732. case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
  733. printk("%s: pinnacle 300i dvb setup\n",dev->name);
  734. dev->dvb.frontend = mt352_attach(&pinnacle_300i,
  735. &dev->i2c_adap);
  736. break;
  737. #endif
  738. #ifdef HAVE_TDA1004X
  739. case SAA7134_BOARD_MD7134:
  740. dev->dvb.frontend = tda10046_attach(&medion_cardbus,
  741. &dev->i2c_adap);
  742. break;
  743. case SAA7134_BOARD_PHILIPS_TOUGH:
  744. dev->dvb.frontend = tda10046_attach(&philips_tu1216_60_config,
  745. &dev->i2c_adap);
  746. break;
  747. case SAA7134_BOARD_FLYDVBTDUO:
  748. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  749. &dev->i2c_adap);
  750. break;
  751. case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
  752. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  753. &dev->i2c_adap);
  754. break;
  755. case SAA7134_BOARD_PHILIPS_EUROPA:
  756. dev->dvb.frontend = tda10046_attach(&philips_europa_config,
  757. &dev->i2c_adap);
  758. break;
  759. case SAA7134_BOARD_VIDEOMATE_DVBT_300:
  760. dev->dvb.frontend = tda10046_attach(&philips_europa_config,
  761. &dev->i2c_adap);
  762. break;
  763. case SAA7134_BOARD_VIDEOMATE_DVBT_200:
  764. dev->dvb.frontend = tda10046_attach(&philips_tu1216_61_config,
  765. &dev->i2c_adap);
  766. break;
  767. case SAA7134_BOARD_PHILIPS_TIGER:
  768. dev->dvb.frontend = tda10046_attach(&philips_tiger_config,
  769. &dev->i2c_adap);
  770. break;
  771. case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
  772. dev->dvb.frontend = tda10046_attach(&philips_tiger_config,
  773. &dev->i2c_adap);
  774. break;
  775. #endif
  776. #ifdef HAVE_NXT200X
  777. case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
  778. dev->dvb.frontend = nxt200x_attach(&avertvhda180, &dev->i2c_adap);
  779. break;
  780. #endif
  781. default:
  782. printk("%s: Huh? unknown DVB card?\n",dev->name);
  783. break;
  784. }
  785. if (NULL == dev->dvb.frontend) {
  786. printk("%s: frontend initialization failed\n",dev->name);
  787. return -1;
  788. }
  789. /* register everything else */
  790. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
  791. }
  792. static int dvb_fini(struct saa7134_dev *dev)
  793. {
  794. static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
  795. switch (dev->board) {
  796. case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
  797. /* otherwise we don't detect the tuner on next insmod */
  798. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
  799. break;
  800. };
  801. videobuf_dvb_unregister(&dev->dvb);
  802. return 0;
  803. }
  804. static struct saa7134_mpeg_ops dvb_ops = {
  805. .type = SAA7134_MPEG_DVB,
  806. .init = dvb_init,
  807. .fini = dvb_fini,
  808. };
  809. static int __init dvb_register(void)
  810. {
  811. return saa7134_ts_register(&dvb_ops);
  812. }
  813. static void __exit dvb_unregister(void)
  814. {
  815. saa7134_ts_unregister(&dvb_ops);
  816. }
  817. module_init(dvb_register);
  818. module_exit(dvb_unregister);
  819. /* ------------------------------------------------------------------ */
  820. /*
  821. * Local variables:
  822. * c-basic-offset: 8
  823. * End:
  824. */