exceptions-64s.S 30 KB

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  1. /*
  2. * This file contains the 64-bit "server" PowerPC variant
  3. * of the low level exception handling including exception
  4. * vectors, exception return, part of the slb and stab
  5. * handling and other fixed offset specific things.
  6. *
  7. * This file is meant to be #included from head_64.S due to
  8. * position dependent assembly.
  9. *
  10. * Most of this originates from head_64.S and thus has the same
  11. * copyright history.
  12. *
  13. */
  14. #include <asm/exception-64s.h>
  15. #include <asm/ptrace.h>
  16. /*
  17. * We layout physical memory as follows:
  18. * 0x0000 - 0x00ff : Secondary processor spin code
  19. * 0x0100 - 0x2fff : pSeries Interrupt prologs
  20. * 0x3000 - 0x5fff : interrupt support, iSeries and common interrupt prologs
  21. * 0x6000 - 0x6fff : Initial (CPU0) segment table
  22. * 0x7000 - 0x7fff : FWNMI data area
  23. * 0x8000 - : Early init and support code
  24. */
  25. /*
  26. * This is the start of the interrupt handlers for pSeries
  27. * This code runs with relocation off.
  28. * Code from here to __end_interrupts gets copied down to real
  29. * address 0x100 when we are running a relocatable kernel.
  30. * Therefore any relative branches in this section must only
  31. * branch to labels in this section.
  32. */
  33. . = 0x100
  34. .globl __start_interrupts
  35. __start_interrupts:
  36. .globl system_reset_pSeries;
  37. system_reset_pSeries:
  38. HMT_MEDIUM;
  39. SET_SCRATCH0(r13)
  40. #ifdef CONFIG_PPC_P7_NAP
  41. BEGIN_FTR_SECTION
  42. /* Running native on arch 2.06 or later, check if we are
  43. * waking up from nap. We only handle no state loss and
  44. * supervisor state loss. We do -not- handle hypervisor
  45. * state loss at this time.
  46. */
  47. mfspr r13,SPRN_SRR1
  48. rlwinm r13,r13,47-31,30,31
  49. cmpwi cr0,r13,1
  50. bne 1f
  51. b .power7_wakeup_noloss
  52. 1: cmpwi cr0,r13,2
  53. bne 1f
  54. b .power7_wakeup_loss
  55. /* Total loss of HV state is fatal, we could try to use the
  56. * PIR to locate a PACA, then use an emergency stack etc...
  57. * but for now, let's just stay stuck here
  58. */
  59. 1: cmpwi cr0,r13,3
  60. beq .
  61. END_FTR_SECTION_IFSET(CPU_FTR_HVMODE_206)
  62. #endif /* CONFIG_PPC_P7_NAP */
  63. EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
  64. NOTEST, 0x100)
  65. . = 0x200
  66. machine_check_pSeries_1:
  67. /* This is moved out of line as it can be patched by FW, but
  68. * some code path might still want to branch into the original
  69. * vector
  70. */
  71. b machine_check_pSeries
  72. . = 0x300
  73. .globl data_access_pSeries
  74. data_access_pSeries:
  75. HMT_MEDIUM
  76. SET_SCRATCH0(r13)
  77. #ifndef CONFIG_POWER4_ONLY
  78. BEGIN_FTR_SECTION
  79. b data_access_check_stab
  80. data_access_not_stab:
  81. END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
  82. #endif
  83. EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
  84. KVMTEST_PR, 0x300)
  85. . = 0x380
  86. .globl data_access_slb_pSeries
  87. data_access_slb_pSeries:
  88. HMT_MEDIUM
  89. SET_SCRATCH0(r13)
  90. EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x380)
  91. std r3,PACA_EXSLB+EX_R3(r13)
  92. mfspr r3,SPRN_DAR
  93. #ifdef __DISABLED__
  94. /* Keep that around for when we re-implement dynamic VSIDs */
  95. cmpdi r3,0
  96. bge slb_miss_user_pseries
  97. #endif /* __DISABLED__ */
  98. mfspr r12,SPRN_SRR1
  99. #ifndef CONFIG_RELOCATABLE
  100. b .slb_miss_realmode
  101. #else
  102. /*
  103. * We can't just use a direct branch to .slb_miss_realmode
  104. * because the distance from here to there depends on where
  105. * the kernel ends up being put.
  106. */
  107. mfctr r11
  108. ld r10,PACAKBASE(r13)
  109. LOAD_HANDLER(r10, .slb_miss_realmode)
  110. mtctr r10
  111. bctr
  112. #endif
  113. STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
  114. . = 0x480
  115. .globl instruction_access_slb_pSeries
  116. instruction_access_slb_pSeries:
  117. HMT_MEDIUM
  118. SET_SCRATCH0(r13)
  119. EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
  120. std r3,PACA_EXSLB+EX_R3(r13)
  121. mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
  122. #ifdef __DISABLED__
  123. /* Keep that around for when we re-implement dynamic VSIDs */
  124. cmpdi r3,0
  125. bge slb_miss_user_pseries
  126. #endif /* __DISABLED__ */
  127. mfspr r12,SPRN_SRR1
  128. #ifndef CONFIG_RELOCATABLE
  129. b .slb_miss_realmode
  130. #else
  131. mfctr r11
  132. ld r10,PACAKBASE(r13)
  133. LOAD_HANDLER(r10, .slb_miss_realmode)
  134. mtctr r10
  135. bctr
  136. #endif
  137. /* We open code these as we can't have a ". = x" (even with
  138. * x = "." within a feature section
  139. */
  140. . = 0x500;
  141. .globl hardware_interrupt_pSeries;
  142. .globl hardware_interrupt_hv;
  143. hardware_interrupt_pSeries:
  144. hardware_interrupt_hv:
  145. BEGIN_FTR_SECTION
  146. _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
  147. EXC_HV, SOFTEN_TEST_HV)
  148. KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
  149. FTR_SECTION_ELSE
  150. _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
  151. EXC_STD, SOFTEN_TEST_PR)
  152. KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
  153. ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE_206)
  154. STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
  155. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
  156. STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
  157. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
  158. STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
  159. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
  160. MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
  161. MASKABLE_EXCEPTION_HV(0x980, 0x982, decrementer)
  162. STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
  163. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
  164. STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
  165. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
  166. . = 0xc00
  167. .globl system_call_pSeries
  168. system_call_pSeries:
  169. HMT_MEDIUM
  170. #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
  171. SET_SCRATCH0(r13)
  172. GET_PACA(r13)
  173. std r9,PACA_EXGEN+EX_R9(r13)
  174. std r10,PACA_EXGEN+EX_R10(r13)
  175. mfcr r9
  176. KVMTEST(0xc00)
  177. GET_SCRATCH0(r13)
  178. #endif
  179. BEGIN_FTR_SECTION
  180. cmpdi r0,0x1ebe
  181. beq- 1f
  182. END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
  183. mr r9,r13
  184. GET_PACA(r13)
  185. mfspr r11,SPRN_SRR0
  186. mfspr r12,SPRN_SRR1
  187. ld r10,PACAKBASE(r13)
  188. LOAD_HANDLER(r10, system_call_entry)
  189. mtspr SPRN_SRR0,r10
  190. ld r10,PACAKMSR(r13)
  191. mtspr SPRN_SRR1,r10
  192. rfid
  193. b . /* prevent speculative execution */
  194. KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
  195. /* Fast LE/BE switch system call */
  196. 1: mfspr r12,SPRN_SRR1
  197. xori r12,r12,MSR_LE
  198. mtspr SPRN_SRR1,r12
  199. rfid /* return to userspace */
  200. b .
  201. STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
  202. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
  203. /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
  204. * out of line to handle them
  205. */
  206. . = 0xe00
  207. b h_data_storage_hv
  208. . = 0xe20
  209. b h_instr_storage_hv
  210. . = 0xe40
  211. b emulation_assist_hv
  212. . = 0xe50
  213. b hmi_exception_hv
  214. . = 0xe60
  215. b hmi_exception_hv
  216. /* We need to deal with the Altivec unavailable exception
  217. * here which is at 0xf20, thus in the middle of the
  218. * prolog code of the PerformanceMonitor one. A little
  219. * trickery is thus necessary
  220. */
  221. performance_monitor_pSeries_1:
  222. . = 0xf00
  223. b performance_monitor_pSeries
  224. altivec_unavailable_pSeries_1:
  225. . = 0xf20
  226. b altivec_unavailable_pSeries
  227. vsx_unavailable_pSeries_1:
  228. . = 0xf40
  229. b vsx_unavailable_pSeries
  230. #ifdef CONFIG_CBE_RAS
  231. STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
  232. KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
  233. #endif /* CONFIG_CBE_RAS */
  234. STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
  235. KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
  236. #ifdef CONFIG_CBE_RAS
  237. STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
  238. KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
  239. #endif /* CONFIG_CBE_RAS */
  240. STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
  241. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
  242. #ifdef CONFIG_CBE_RAS
  243. STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
  244. KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
  245. #endif /* CONFIG_CBE_RAS */
  246. . = 0x3000
  247. /*** Out of line interrupts support ***/
  248. /* moved from 0x200 */
  249. machine_check_pSeries:
  250. .globl machine_check_fwnmi
  251. machine_check_fwnmi:
  252. HMT_MEDIUM
  253. SET_SCRATCH0(r13) /* save r13 */
  254. EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common,
  255. EXC_STD, KVMTEST, 0x200)
  256. KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
  257. #ifndef CONFIG_POWER4_ONLY
  258. /* moved from 0x300 */
  259. data_access_check_stab:
  260. GET_PACA(r13)
  261. std r9,PACA_EXSLB+EX_R9(r13)
  262. std r10,PACA_EXSLB+EX_R10(r13)
  263. mfspr r10,SPRN_DAR
  264. mfspr r9,SPRN_DSISR
  265. srdi r10,r10,60
  266. rlwimi r10,r9,16,0x20
  267. #ifdef CONFIG_KVM_BOOK3S_PR
  268. lbz r9,HSTATE_IN_GUEST(r13)
  269. rlwimi r10,r9,8,0x300
  270. #endif
  271. mfcr r9
  272. cmpwi r10,0x2c
  273. beq do_stab_bolted_pSeries
  274. mtcrf 0x80,r9
  275. ld r9,PACA_EXSLB+EX_R9(r13)
  276. ld r10,PACA_EXSLB+EX_R10(r13)
  277. b data_access_not_stab
  278. do_stab_bolted_pSeries:
  279. std r11,PACA_EXSLB+EX_R11(r13)
  280. std r12,PACA_EXSLB+EX_R12(r13)
  281. GET_SCRATCH0(r10)
  282. std r10,PACA_EXSLB+EX_R13(r13)
  283. EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
  284. #endif /* CONFIG_POWER4_ONLY */
  285. KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x300)
  286. KVM_HANDLER_PR_SKIP(PACA_EXSLB, EXC_STD, 0x380)
  287. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
  288. KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
  289. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
  290. KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
  291. .align 7
  292. /* moved from 0xe00 */
  293. STD_EXCEPTION_HV(., 0xe02, h_data_storage)
  294. KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
  295. STD_EXCEPTION_HV(., 0xe22, h_instr_storage)
  296. KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
  297. STD_EXCEPTION_HV(., 0xe42, emulation_assist)
  298. KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
  299. STD_EXCEPTION_HV(., 0xe62, hmi_exception) /* need to flush cache ? */
  300. KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
  301. /* moved from 0xf00 */
  302. STD_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
  303. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
  304. STD_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
  305. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
  306. STD_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
  307. KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
  308. /*
  309. * An interrupt came in while soft-disabled; clear EE in SRR1,
  310. * clear paca->hard_enabled and return.
  311. */
  312. masked_interrupt:
  313. stb r10,PACAHARDIRQEN(r13)
  314. mtcrf 0x80,r9
  315. ld r9,PACA_EXGEN+EX_R9(r13)
  316. mfspr r10,SPRN_SRR1
  317. rldicl r10,r10,48,1 /* clear MSR_EE */
  318. rotldi r10,r10,16
  319. mtspr SPRN_SRR1,r10
  320. ld r10,PACA_EXGEN+EX_R10(r13)
  321. GET_SCRATCH0(r13)
  322. rfid
  323. b .
  324. masked_Hinterrupt:
  325. stb r10,PACAHARDIRQEN(r13)
  326. mtcrf 0x80,r9
  327. ld r9,PACA_EXGEN+EX_R9(r13)
  328. mfspr r10,SPRN_HSRR1
  329. rldicl r10,r10,48,1 /* clear MSR_EE */
  330. rotldi r10,r10,16
  331. mtspr SPRN_HSRR1,r10
  332. ld r10,PACA_EXGEN+EX_R10(r13)
  333. GET_SCRATCH0(r13)
  334. hrfid
  335. b .
  336. #ifdef CONFIG_PPC_PSERIES
  337. /*
  338. * Vectors for the FWNMI option. Share common code.
  339. */
  340. .globl system_reset_fwnmi
  341. .align 7
  342. system_reset_fwnmi:
  343. HMT_MEDIUM
  344. SET_SCRATCH0(r13) /* save r13 */
  345. EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
  346. NOTEST, 0x100)
  347. #endif /* CONFIG_PPC_PSERIES */
  348. #ifdef __DISABLED__
  349. /*
  350. * This is used for when the SLB miss handler has to go virtual,
  351. * which doesn't happen for now anymore but will once we re-implement
  352. * dynamic VSIDs for shared page tables
  353. */
  354. slb_miss_user_pseries:
  355. std r10,PACA_EXGEN+EX_R10(r13)
  356. std r11,PACA_EXGEN+EX_R11(r13)
  357. std r12,PACA_EXGEN+EX_R12(r13)
  358. GET_SCRATCH0(r10)
  359. ld r11,PACA_EXSLB+EX_R9(r13)
  360. ld r12,PACA_EXSLB+EX_R3(r13)
  361. std r10,PACA_EXGEN+EX_R13(r13)
  362. std r11,PACA_EXGEN+EX_R9(r13)
  363. std r12,PACA_EXGEN+EX_R3(r13)
  364. clrrdi r12,r13,32
  365. mfmsr r10
  366. mfspr r11,SRR0 /* save SRR0 */
  367. ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
  368. ori r10,r10,MSR_IR|MSR_DR|MSR_RI
  369. mtspr SRR0,r12
  370. mfspr r12,SRR1 /* and SRR1 */
  371. mtspr SRR1,r10
  372. rfid
  373. b . /* prevent spec. execution */
  374. #endif /* __DISABLED__ */
  375. /* KVM's trampoline code needs to be close to the interrupt handlers */
  376. #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
  377. #ifdef CONFIG_KVM_BOOK3S_PR
  378. #include "../kvm/book3s_rmhandlers.S"
  379. #else
  380. #include "../kvm/book3s_hv_rmhandlers.S"
  381. #endif
  382. #endif
  383. .align 7
  384. .globl __end_interrupts
  385. __end_interrupts:
  386. /*
  387. * Code from here down to __end_handlers is invoked from the
  388. * exception prologs above. Because the prologs assemble the
  389. * addresses of these handlers using the LOAD_HANDLER macro,
  390. * which uses an addi instruction, these handlers must be in
  391. * the first 32k of the kernel image.
  392. */
  393. /*** Common interrupt handlers ***/
  394. STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
  395. /*
  396. * Machine check is different because we use a different
  397. * save area: PACA_EXMC instead of PACA_EXGEN.
  398. */
  399. .align 7
  400. .globl machine_check_common
  401. machine_check_common:
  402. EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
  403. FINISH_NAP
  404. DISABLE_INTS
  405. bl .save_nvgprs
  406. addi r3,r1,STACK_FRAME_OVERHEAD
  407. bl .machine_check_exception
  408. b .ret_from_except
  409. STD_EXCEPTION_COMMON_LITE(0x900, decrementer, .timer_interrupt)
  410. STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
  411. STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
  412. STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
  413. STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
  414. STD_EXCEPTION_COMMON(0xe40, emulation_assist, .program_check_exception)
  415. STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
  416. STD_EXCEPTION_COMMON_IDLE(0xf00, performance_monitor, .performance_monitor_exception)
  417. STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
  418. #ifdef CONFIG_ALTIVEC
  419. STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
  420. #else
  421. STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
  422. #endif
  423. #ifdef CONFIG_CBE_RAS
  424. STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
  425. STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
  426. STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
  427. #endif /* CONFIG_CBE_RAS */
  428. .align 7
  429. system_call_entry:
  430. b system_call_common
  431. /*
  432. * Here we have detected that the kernel stack pointer is bad.
  433. * R9 contains the saved CR, r13 points to the paca,
  434. * r10 contains the (bad) kernel stack pointer,
  435. * r11 and r12 contain the saved SRR0 and SRR1.
  436. * We switch to using an emergency stack, save the registers there,
  437. * and call kernel_bad_stack(), which panics.
  438. */
  439. bad_stack:
  440. ld r1,PACAEMERGSP(r13)
  441. subi r1,r1,64+INT_FRAME_SIZE
  442. std r9,_CCR(r1)
  443. std r10,GPR1(r1)
  444. std r11,_NIP(r1)
  445. std r12,_MSR(r1)
  446. mfspr r11,SPRN_DAR
  447. mfspr r12,SPRN_DSISR
  448. std r11,_DAR(r1)
  449. std r12,_DSISR(r1)
  450. mflr r10
  451. mfctr r11
  452. mfxer r12
  453. std r10,_LINK(r1)
  454. std r11,_CTR(r1)
  455. std r12,_XER(r1)
  456. SAVE_GPR(0,r1)
  457. SAVE_GPR(2,r1)
  458. ld r10,EX_R3(r3)
  459. std r10,GPR3(r1)
  460. SAVE_GPR(4,r1)
  461. SAVE_4GPRS(5,r1)
  462. ld r9,EX_R9(r3)
  463. ld r10,EX_R10(r3)
  464. SAVE_2GPRS(9,r1)
  465. ld r9,EX_R11(r3)
  466. ld r10,EX_R12(r3)
  467. ld r11,EX_R13(r3)
  468. std r9,GPR11(r1)
  469. std r10,GPR12(r1)
  470. std r11,GPR13(r1)
  471. BEGIN_FTR_SECTION
  472. ld r10,EX_CFAR(r3)
  473. std r10,ORIG_GPR3(r1)
  474. END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
  475. SAVE_8GPRS(14,r1)
  476. SAVE_10GPRS(22,r1)
  477. lhz r12,PACA_TRAP_SAVE(r13)
  478. std r12,_TRAP(r1)
  479. addi r11,r1,INT_FRAME_SIZE
  480. std r11,0(r1)
  481. li r12,0
  482. std r12,0(r11)
  483. ld r2,PACATOC(r13)
  484. ld r11,exception_marker@toc(r2)
  485. std r12,RESULT(r1)
  486. std r11,STACK_FRAME_OVERHEAD-16(r1)
  487. 1: addi r3,r1,STACK_FRAME_OVERHEAD
  488. bl .kernel_bad_stack
  489. b 1b
  490. /*
  491. * Here r13 points to the paca, r9 contains the saved CR,
  492. * SRR0 and SRR1 are saved in r11 and r12,
  493. * r9 - r13 are saved in paca->exgen.
  494. */
  495. .align 7
  496. .globl data_access_common
  497. data_access_common:
  498. mfspr r10,SPRN_DAR
  499. std r10,PACA_EXGEN+EX_DAR(r13)
  500. mfspr r10,SPRN_DSISR
  501. stw r10,PACA_EXGEN+EX_DSISR(r13)
  502. EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
  503. ld r3,PACA_EXGEN+EX_DAR(r13)
  504. lwz r4,PACA_EXGEN+EX_DSISR(r13)
  505. li r5,0x300
  506. b .do_hash_page /* Try to handle as hpte fault */
  507. .align 7
  508. .globl h_data_storage_common
  509. h_data_storage_common:
  510. mfspr r10,SPRN_HDAR
  511. std r10,PACA_EXGEN+EX_DAR(r13)
  512. mfspr r10,SPRN_HDSISR
  513. stw r10,PACA_EXGEN+EX_DSISR(r13)
  514. EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
  515. bl .save_nvgprs
  516. addi r3,r1,STACK_FRAME_OVERHEAD
  517. bl .unknown_exception
  518. b .ret_from_except
  519. .align 7
  520. .globl instruction_access_common
  521. instruction_access_common:
  522. EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
  523. ld r3,_NIP(r1)
  524. andis. r4,r12,0x5820
  525. li r5,0x400
  526. b .do_hash_page /* Try to handle as hpte fault */
  527. STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
  528. /*
  529. * Here is the common SLB miss user that is used when going to virtual
  530. * mode for SLB misses, that is currently not used
  531. */
  532. #ifdef __DISABLED__
  533. .align 7
  534. .globl slb_miss_user_common
  535. slb_miss_user_common:
  536. mflr r10
  537. std r3,PACA_EXGEN+EX_DAR(r13)
  538. stw r9,PACA_EXGEN+EX_CCR(r13)
  539. std r10,PACA_EXGEN+EX_LR(r13)
  540. std r11,PACA_EXGEN+EX_SRR0(r13)
  541. bl .slb_allocate_user
  542. ld r10,PACA_EXGEN+EX_LR(r13)
  543. ld r3,PACA_EXGEN+EX_R3(r13)
  544. lwz r9,PACA_EXGEN+EX_CCR(r13)
  545. ld r11,PACA_EXGEN+EX_SRR0(r13)
  546. mtlr r10
  547. beq- slb_miss_fault
  548. andi. r10,r12,MSR_RI /* check for unrecoverable exception */
  549. beq- unrecov_user_slb
  550. mfmsr r10
  551. .machine push
  552. .machine "power4"
  553. mtcrf 0x80,r9
  554. .machine pop
  555. clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
  556. mtmsrd r10,1
  557. mtspr SRR0,r11
  558. mtspr SRR1,r12
  559. ld r9,PACA_EXGEN+EX_R9(r13)
  560. ld r10,PACA_EXGEN+EX_R10(r13)
  561. ld r11,PACA_EXGEN+EX_R11(r13)
  562. ld r12,PACA_EXGEN+EX_R12(r13)
  563. ld r13,PACA_EXGEN+EX_R13(r13)
  564. rfid
  565. b .
  566. slb_miss_fault:
  567. EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
  568. ld r4,PACA_EXGEN+EX_DAR(r13)
  569. li r5,0
  570. std r4,_DAR(r1)
  571. std r5,_DSISR(r1)
  572. b handle_page_fault
  573. unrecov_user_slb:
  574. EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
  575. DISABLE_INTS
  576. bl .save_nvgprs
  577. 1: addi r3,r1,STACK_FRAME_OVERHEAD
  578. bl .unrecoverable_exception
  579. b 1b
  580. #endif /* __DISABLED__ */
  581. /*
  582. * r13 points to the PACA, r9 contains the saved CR,
  583. * r12 contain the saved SRR1, SRR0 is still ready for return
  584. * r3 has the faulting address
  585. * r9 - r13 are saved in paca->exslb.
  586. * r3 is saved in paca->slb_r3
  587. * We assume we aren't going to take any exceptions during this procedure.
  588. */
  589. _GLOBAL(slb_miss_realmode)
  590. mflr r10
  591. #ifdef CONFIG_RELOCATABLE
  592. mtctr r11
  593. #endif
  594. stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
  595. std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
  596. bl .slb_allocate_realmode
  597. /* All done -- return from exception. */
  598. ld r10,PACA_EXSLB+EX_LR(r13)
  599. ld r3,PACA_EXSLB+EX_R3(r13)
  600. lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
  601. #ifdef CONFIG_PPC_ISERIES
  602. BEGIN_FW_FTR_SECTION
  603. ld r11,PACALPPACAPTR(r13)
  604. ld r11,LPPACASRR0(r11) /* get SRR0 value */
  605. END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
  606. #endif /* CONFIG_PPC_ISERIES */
  607. mtlr r10
  608. andi. r10,r12,MSR_RI /* check for unrecoverable exception */
  609. beq- 2f
  610. .machine push
  611. .machine "power4"
  612. mtcrf 0x80,r9
  613. mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
  614. .machine pop
  615. #ifdef CONFIG_PPC_ISERIES
  616. BEGIN_FW_FTR_SECTION
  617. mtspr SPRN_SRR0,r11
  618. mtspr SPRN_SRR1,r12
  619. END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
  620. #endif /* CONFIG_PPC_ISERIES */
  621. ld r9,PACA_EXSLB+EX_R9(r13)
  622. ld r10,PACA_EXSLB+EX_R10(r13)
  623. ld r11,PACA_EXSLB+EX_R11(r13)
  624. ld r12,PACA_EXSLB+EX_R12(r13)
  625. ld r13,PACA_EXSLB+EX_R13(r13)
  626. rfid
  627. b . /* prevent speculative execution */
  628. 2:
  629. #ifdef CONFIG_PPC_ISERIES
  630. BEGIN_FW_FTR_SECTION
  631. b unrecov_slb
  632. END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
  633. #endif /* CONFIG_PPC_ISERIES */
  634. mfspr r11,SPRN_SRR0
  635. ld r10,PACAKBASE(r13)
  636. LOAD_HANDLER(r10,unrecov_slb)
  637. mtspr SPRN_SRR0,r10
  638. ld r10,PACAKMSR(r13)
  639. mtspr SPRN_SRR1,r10
  640. rfid
  641. b .
  642. unrecov_slb:
  643. EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
  644. DISABLE_INTS
  645. bl .save_nvgprs
  646. 1: addi r3,r1,STACK_FRAME_OVERHEAD
  647. bl .unrecoverable_exception
  648. b 1b
  649. .align 7
  650. .globl hardware_interrupt_common
  651. .globl hardware_interrupt_entry
  652. hardware_interrupt_common:
  653. EXCEPTION_PROLOG_COMMON(0x500, PACA_EXGEN)
  654. FINISH_NAP
  655. hardware_interrupt_entry:
  656. DISABLE_INTS
  657. BEGIN_FTR_SECTION
  658. bl .ppc64_runlatch_on
  659. END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
  660. addi r3,r1,STACK_FRAME_OVERHEAD
  661. bl .do_IRQ
  662. b .ret_from_except_lite
  663. #ifdef CONFIG_PPC_970_NAP
  664. power4_fixup_nap:
  665. andc r9,r9,r10
  666. std r9,TI_LOCAL_FLAGS(r11)
  667. ld r10,_LINK(r1) /* make idle task do the */
  668. std r10,_NIP(r1) /* equivalent of a blr */
  669. blr
  670. #endif
  671. .align 7
  672. .globl alignment_common
  673. alignment_common:
  674. mfspr r10,SPRN_DAR
  675. std r10,PACA_EXGEN+EX_DAR(r13)
  676. mfspr r10,SPRN_DSISR
  677. stw r10,PACA_EXGEN+EX_DSISR(r13)
  678. EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
  679. ld r3,PACA_EXGEN+EX_DAR(r13)
  680. lwz r4,PACA_EXGEN+EX_DSISR(r13)
  681. std r3,_DAR(r1)
  682. std r4,_DSISR(r1)
  683. bl .save_nvgprs
  684. addi r3,r1,STACK_FRAME_OVERHEAD
  685. ENABLE_INTS
  686. bl .alignment_exception
  687. b .ret_from_except
  688. .align 7
  689. .globl program_check_common
  690. program_check_common:
  691. EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
  692. bl .save_nvgprs
  693. addi r3,r1,STACK_FRAME_OVERHEAD
  694. ENABLE_INTS
  695. bl .program_check_exception
  696. b .ret_from_except
  697. .align 7
  698. .globl fp_unavailable_common
  699. fp_unavailable_common:
  700. EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
  701. bne 1f /* if from user, just load it up */
  702. bl .save_nvgprs
  703. addi r3,r1,STACK_FRAME_OVERHEAD
  704. ENABLE_INTS
  705. bl .kernel_fp_unavailable_exception
  706. BUG_OPCODE
  707. 1: bl .load_up_fpu
  708. b fast_exception_return
  709. .align 7
  710. .globl altivec_unavailable_common
  711. altivec_unavailable_common:
  712. EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
  713. #ifdef CONFIG_ALTIVEC
  714. BEGIN_FTR_SECTION
  715. beq 1f
  716. bl .load_up_altivec
  717. b fast_exception_return
  718. 1:
  719. END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
  720. #endif
  721. bl .save_nvgprs
  722. addi r3,r1,STACK_FRAME_OVERHEAD
  723. ENABLE_INTS
  724. bl .altivec_unavailable_exception
  725. b .ret_from_except
  726. .align 7
  727. .globl vsx_unavailable_common
  728. vsx_unavailable_common:
  729. EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
  730. #ifdef CONFIG_VSX
  731. BEGIN_FTR_SECTION
  732. bne .load_up_vsx
  733. 1:
  734. END_FTR_SECTION_IFSET(CPU_FTR_VSX)
  735. #endif
  736. bl .save_nvgprs
  737. addi r3,r1,STACK_FRAME_OVERHEAD
  738. ENABLE_INTS
  739. bl .vsx_unavailable_exception
  740. b .ret_from_except
  741. .align 7
  742. .globl __end_handlers
  743. __end_handlers:
  744. /*
  745. * Return from an exception with minimal checks.
  746. * The caller is assumed to have done EXCEPTION_PROLOG_COMMON.
  747. * If interrupts have been enabled, or anything has been
  748. * done that might have changed the scheduling status of
  749. * any task or sent any task a signal, you should use
  750. * ret_from_except or ret_from_except_lite instead of this.
  751. */
  752. fast_exc_return_irq: /* restores irq state too */
  753. ld r3,SOFTE(r1)
  754. TRACE_AND_RESTORE_IRQ(r3);
  755. ld r12,_MSR(r1)
  756. rldicl r4,r12,49,63 /* get MSR_EE to LSB */
  757. stb r4,PACAHARDIRQEN(r13) /* restore paca->hard_enabled */
  758. b 1f
  759. .globl fast_exception_return
  760. fast_exception_return:
  761. ld r12,_MSR(r1)
  762. 1: ld r11,_NIP(r1)
  763. andi. r3,r12,MSR_RI /* check if RI is set */
  764. beq- unrecov_fer
  765. #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  766. andi. r3,r12,MSR_PR
  767. beq 2f
  768. ACCOUNT_CPU_USER_EXIT(r3, r4)
  769. 2:
  770. #endif
  771. ld r3,_CCR(r1)
  772. ld r4,_LINK(r1)
  773. ld r5,_CTR(r1)
  774. ld r6,_XER(r1)
  775. mtcr r3
  776. mtlr r4
  777. mtctr r5
  778. mtxer r6
  779. REST_GPR(0, r1)
  780. REST_8GPRS(2, r1)
  781. mfmsr r10
  782. rldicl r10,r10,48,1 /* clear EE */
  783. rldicr r10,r10,16,61 /* clear RI (LE is 0 already) */
  784. mtmsrd r10,1
  785. mtspr SPRN_SRR1,r12
  786. mtspr SPRN_SRR0,r11
  787. REST_4GPRS(10, r1)
  788. ld r1,GPR1(r1)
  789. rfid
  790. b . /* prevent speculative execution */
  791. unrecov_fer:
  792. bl .save_nvgprs
  793. 1: addi r3,r1,STACK_FRAME_OVERHEAD
  794. bl .unrecoverable_exception
  795. b 1b
  796. /*
  797. * Hash table stuff
  798. */
  799. .align 7
  800. _STATIC(do_hash_page)
  801. std r3,_DAR(r1)
  802. std r4,_DSISR(r1)
  803. andis. r0,r4,0xa410 /* weird error? */
  804. bne- handle_page_fault /* if not, try to insert a HPTE */
  805. andis. r0,r4,DSISR_DABRMATCH@h
  806. bne- handle_dabr_fault
  807. BEGIN_FTR_SECTION
  808. andis. r0,r4,0x0020 /* Is it a segment table fault? */
  809. bne- do_ste_alloc /* If so handle it */
  810. END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
  811. clrrdi r11,r1,THREAD_SHIFT
  812. lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
  813. andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
  814. bne 77f /* then don't call hash_page now */
  815. /*
  816. * On iSeries, we soft-disable interrupts here, then
  817. * hard-enable interrupts so that the hash_page code can spin on
  818. * the hash_table_lock without problems on a shared processor.
  819. */
  820. DISABLE_INTS
  821. /*
  822. * Currently, trace_hardirqs_off() will be called by DISABLE_INTS
  823. * and will clobber volatile registers when irq tracing is enabled
  824. * so we need to reload them. It may be possible to be smarter here
  825. * and move the irq tracing elsewhere but let's keep it simple for
  826. * now
  827. */
  828. #ifdef CONFIG_TRACE_IRQFLAGS
  829. ld r3,_DAR(r1)
  830. ld r4,_DSISR(r1)
  831. ld r5,_TRAP(r1)
  832. ld r12,_MSR(r1)
  833. clrrdi r5,r5,4
  834. #endif /* CONFIG_TRACE_IRQFLAGS */
  835. /*
  836. * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
  837. * accessing a userspace segment (even from the kernel). We assume
  838. * kernel addresses always have the high bit set.
  839. */
  840. rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
  841. rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
  842. orc r0,r12,r0 /* MSR_PR | ~high_bit */
  843. rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
  844. ori r4,r4,1 /* add _PAGE_PRESENT */
  845. rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
  846. /*
  847. * r3 contains the faulting address
  848. * r4 contains the required access permissions
  849. * r5 contains the trap number
  850. *
  851. * at return r3 = 0 for success
  852. */
  853. bl .hash_page /* build HPTE if possible */
  854. cmpdi r3,0 /* see if hash_page succeeded */
  855. BEGIN_FW_FTR_SECTION
  856. /*
  857. * If we had interrupts soft-enabled at the point where the
  858. * DSI/ISI occurred, and an interrupt came in during hash_page,
  859. * handle it now.
  860. * We jump to ret_from_except_lite rather than fast_exception_return
  861. * because ret_from_except_lite will check for and handle pending
  862. * interrupts if necessary.
  863. */
  864. beq 13f
  865. END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
  866. BEGIN_FW_FTR_SECTION
  867. /*
  868. * Here we have interrupts hard-disabled, so it is sufficient
  869. * to restore paca->{soft,hard}_enable and get out.
  870. */
  871. beq fast_exc_return_irq /* Return from exception on success */
  872. END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
  873. /* For a hash failure, we don't bother re-enabling interrupts */
  874. ble- 12f
  875. /*
  876. * hash_page couldn't handle it, set soft interrupt enable back
  877. * to what it was before the trap. Note that .arch_local_irq_restore
  878. * handles any interrupts pending at this point.
  879. */
  880. ld r3,SOFTE(r1)
  881. TRACE_AND_RESTORE_IRQ_PARTIAL(r3, 11f)
  882. bl .arch_local_irq_restore
  883. b 11f
  884. /* We have a data breakpoint exception - handle it */
  885. handle_dabr_fault:
  886. bl .save_nvgprs
  887. ld r4,_DAR(r1)
  888. ld r5,_DSISR(r1)
  889. addi r3,r1,STACK_FRAME_OVERHEAD
  890. bl .do_dabr
  891. b .ret_from_except_lite
  892. /* Here we have a page fault that hash_page can't handle. */
  893. handle_page_fault:
  894. ENABLE_INTS
  895. 11: ld r4,_DAR(r1)
  896. ld r5,_DSISR(r1)
  897. addi r3,r1,STACK_FRAME_OVERHEAD
  898. bl .do_page_fault
  899. cmpdi r3,0
  900. beq+ 13f
  901. bl .save_nvgprs
  902. mr r5,r3
  903. addi r3,r1,STACK_FRAME_OVERHEAD
  904. lwz r4,_DAR(r1)
  905. bl .bad_page_fault
  906. b .ret_from_except
  907. 13: b .ret_from_except_lite
  908. /* We have a page fault that hash_page could handle but HV refused
  909. * the PTE insertion
  910. */
  911. 12: bl .save_nvgprs
  912. mr r5,r3
  913. addi r3,r1,STACK_FRAME_OVERHEAD
  914. ld r4,_DAR(r1)
  915. bl .low_hash_fault
  916. b .ret_from_except
  917. /*
  918. * We come here as a result of a DSI at a point where we don't want
  919. * to call hash_page, such as when we are accessing memory (possibly
  920. * user memory) inside a PMU interrupt that occurred while interrupts
  921. * were soft-disabled. We want to invoke the exception handler for
  922. * the access, or panic if there isn't a handler.
  923. */
  924. 77: bl .save_nvgprs
  925. mr r4,r3
  926. addi r3,r1,STACK_FRAME_OVERHEAD
  927. li r5,SIGSEGV
  928. bl .bad_page_fault
  929. b .ret_from_except
  930. /* here we have a segment miss */
  931. do_ste_alloc:
  932. bl .ste_allocate /* try to insert stab entry */
  933. cmpdi r3,0
  934. bne- handle_page_fault
  935. b fast_exception_return
  936. /*
  937. * r13 points to the PACA, r9 contains the saved CR,
  938. * r11 and r12 contain the saved SRR0 and SRR1.
  939. * r9 - r13 are saved in paca->exslb.
  940. * We assume we aren't going to take any exceptions during this procedure.
  941. * We assume (DAR >> 60) == 0xc.
  942. */
  943. .align 7
  944. _GLOBAL(do_stab_bolted)
  945. stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
  946. std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
  947. /* Hash to the primary group */
  948. ld r10,PACASTABVIRT(r13)
  949. mfspr r11,SPRN_DAR
  950. srdi r11,r11,28
  951. rldimi r10,r11,7,52 /* r10 = first ste of the group */
  952. /* Calculate VSID */
  953. /* This is a kernel address, so protovsid = ESID */
  954. ASM_VSID_SCRAMBLE(r11, r9, 256M)
  955. rldic r9,r11,12,16 /* r9 = vsid << 12 */
  956. /* Search the primary group for a free entry */
  957. 1: ld r11,0(r10) /* Test valid bit of the current ste */
  958. andi. r11,r11,0x80
  959. beq 2f
  960. addi r10,r10,16
  961. andi. r11,r10,0x70
  962. bne 1b
  963. /* Stick for only searching the primary group for now. */
  964. /* At least for now, we use a very simple random castout scheme */
  965. /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
  966. mftb r11
  967. rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
  968. ori r11,r11,0x10
  969. /* r10 currently points to an ste one past the group of interest */
  970. /* make it point to the randomly selected entry */
  971. subi r10,r10,128
  972. or r10,r10,r11 /* r10 is the entry to invalidate */
  973. isync /* mark the entry invalid */
  974. ld r11,0(r10)
  975. rldicl r11,r11,56,1 /* clear the valid bit */
  976. rotldi r11,r11,8
  977. std r11,0(r10)
  978. sync
  979. clrrdi r11,r11,28 /* Get the esid part of the ste */
  980. slbie r11
  981. 2: std r9,8(r10) /* Store the vsid part of the ste */
  982. eieio
  983. mfspr r11,SPRN_DAR /* Get the new esid */
  984. clrrdi r11,r11,28 /* Permits a full 32b of ESID */
  985. ori r11,r11,0x90 /* Turn on valid and kp */
  986. std r11,0(r10) /* Put new entry back into the stab */
  987. sync
  988. /* All done -- return from exception. */
  989. lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
  990. ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
  991. andi. r10,r12,MSR_RI
  992. beq- unrecov_slb
  993. mtcrf 0x80,r9 /* restore CR */
  994. mfmsr r10
  995. clrrdi r10,r10,2
  996. mtmsrd r10,1
  997. mtspr SPRN_SRR0,r11
  998. mtspr SPRN_SRR1,r12
  999. ld r9,PACA_EXSLB+EX_R9(r13)
  1000. ld r10,PACA_EXSLB+EX_R10(r13)
  1001. ld r11,PACA_EXSLB+EX_R11(r13)
  1002. ld r12,PACA_EXSLB+EX_R12(r13)
  1003. ld r13,PACA_EXSLB+EX_R13(r13)
  1004. rfid
  1005. b . /* prevent speculative execution */
  1006. #ifdef CONFIG_PPC_PSERIES
  1007. /*
  1008. * Data area reserved for FWNMI option.
  1009. * This address (0x7000) is fixed by the RPA.
  1010. */
  1011. .= 0x7000
  1012. .globl fwnmi_data_area
  1013. fwnmi_data_area:
  1014. #endif /* CONFIG_PPC_PSERIES */
  1015. /* iSeries does not use the FWNMI stuff, so it is safe to put
  1016. * this here, even if we later allow kernels that will boot on
  1017. * both pSeries and iSeries */
  1018. #ifdef CONFIG_PPC_ISERIES
  1019. . = LPARMAP_PHYS
  1020. .globl xLparMap
  1021. xLparMap:
  1022. .quad HvEsidsToMap /* xNumberEsids */
  1023. .quad HvRangesToMap /* xNumberRanges */
  1024. .quad STAB0_PAGE /* xSegmentTableOffs */
  1025. .zero 40 /* xRsvd */
  1026. /* xEsids (HvEsidsToMap entries of 2 quads) */
  1027. .quad PAGE_OFFSET_ESID /* xKernelEsid */
  1028. .quad PAGE_OFFSET_VSID /* xKernelVsid */
  1029. .quad VMALLOC_START_ESID /* xKernelEsid */
  1030. .quad VMALLOC_START_VSID /* xKernelVsid */
  1031. /* xRanges (HvRangesToMap entries of 3 quads) */
  1032. .quad HvPagesToMap /* xPages */
  1033. .quad 0 /* xOffset */
  1034. .quad PAGE_OFFSET_VSID << (SID_SHIFT - HW_PAGE_SHIFT) /* xVPN */
  1035. #endif /* CONFIG_PPC_ISERIES */
  1036. #ifdef CONFIG_PPC_PSERIES
  1037. . = 0x8000
  1038. #endif /* CONFIG_PPC_PSERIES */
  1039. /*
  1040. * Space for CPU0's segment table.
  1041. *
  1042. * On iSeries, the hypervisor must fill in at least one entry before
  1043. * we get control (with relocate on). The address is given to the hv
  1044. * as a page number (see xLparMap above), so this must be at a
  1045. * fixed address (the linker can't compute (u64)&initial_stab >>
  1046. * PAGE_SHIFT).
  1047. */
  1048. . = STAB0_OFFSET /* 0x8000 */
  1049. .globl initial_stab
  1050. initial_stab:
  1051. .space 4096