flush.c 8.8 KB

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  1. /*
  2. * linux/arch/arm/mm/flush.c
  3. *
  4. * Copyright (C) 1995-2002 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/mm.h>
  12. #include <linux/pagemap.h>
  13. #include <linux/highmem.h>
  14. #include <asm/cacheflush.h>
  15. #include <asm/cachetype.h>
  16. #include <asm/highmem.h>
  17. #include <asm/smp_plat.h>
  18. #include <asm/system.h>
  19. #include <asm/tlbflush.h>
  20. #include "mm.h"
  21. #ifdef CONFIG_CPU_CACHE_VIPT
  22. static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
  23. {
  24. unsigned long to = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
  25. const int zero = 0;
  26. set_pte_ext(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL), 0);
  27. flush_tlb_kernel_page(to);
  28. asm( "mcrr p15, 0, %1, %0, c14\n"
  29. " mcr p15, 0, %2, c7, c10, 4"
  30. :
  31. : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero)
  32. : "cc");
  33. }
  34. static void flush_icache_alias(unsigned long pfn, unsigned long vaddr, unsigned long len)
  35. {
  36. unsigned long colour = CACHE_COLOUR(vaddr);
  37. unsigned long offset = vaddr & (PAGE_SIZE - 1);
  38. unsigned long to;
  39. set_pte_ext(TOP_PTE(FLUSH_ALIAS_START) + colour, pfn_pte(pfn, PAGE_KERNEL), 0);
  40. to = FLUSH_ALIAS_START + (colour << PAGE_SHIFT) + offset;
  41. flush_tlb_kernel_page(to);
  42. flush_icache_range(to, to + len);
  43. }
  44. void flush_cache_mm(struct mm_struct *mm)
  45. {
  46. if (cache_is_vivt()) {
  47. vivt_flush_cache_mm(mm);
  48. return;
  49. }
  50. if (cache_is_vipt_aliasing()) {
  51. asm( "mcr p15, 0, %0, c7, c14, 0\n"
  52. " mcr p15, 0, %0, c7, c10, 4"
  53. :
  54. : "r" (0)
  55. : "cc");
  56. }
  57. }
  58. void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
  59. {
  60. if (cache_is_vivt()) {
  61. vivt_flush_cache_range(vma, start, end);
  62. return;
  63. }
  64. if (cache_is_vipt_aliasing()) {
  65. asm( "mcr p15, 0, %0, c7, c14, 0\n"
  66. " mcr p15, 0, %0, c7, c10, 4"
  67. :
  68. : "r" (0)
  69. : "cc");
  70. }
  71. if (vma->vm_flags & VM_EXEC)
  72. __flush_icache_all();
  73. }
  74. void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
  75. {
  76. if (cache_is_vivt()) {
  77. vivt_flush_cache_page(vma, user_addr, pfn);
  78. return;
  79. }
  80. if (cache_is_vipt_aliasing()) {
  81. flush_pfn_alias(pfn, user_addr);
  82. __flush_icache_all();
  83. }
  84. if (vma->vm_flags & VM_EXEC && icache_is_vivt_asid_tagged())
  85. __flush_icache_all();
  86. }
  87. #else
  88. #define flush_pfn_alias(pfn,vaddr) do { } while (0)
  89. #define flush_icache_alias(pfn,vaddr,len) do { } while (0)
  90. #endif
  91. static void flush_ptrace_access_other(void *args)
  92. {
  93. __flush_icache_all();
  94. }
  95. static
  96. void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
  97. unsigned long uaddr, void *kaddr, unsigned long len)
  98. {
  99. if (cache_is_vivt()) {
  100. if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
  101. unsigned long addr = (unsigned long)kaddr;
  102. __cpuc_coherent_kern_range(addr, addr + len);
  103. }
  104. return;
  105. }
  106. if (cache_is_vipt_aliasing()) {
  107. flush_pfn_alias(page_to_pfn(page), uaddr);
  108. __flush_icache_all();
  109. return;
  110. }
  111. /* VIPT non-aliasing D-cache */
  112. if (vma->vm_flags & VM_EXEC) {
  113. unsigned long addr = (unsigned long)kaddr;
  114. if (icache_is_vipt_aliasing())
  115. flush_icache_alias(page_to_pfn(page), uaddr, len);
  116. else
  117. __cpuc_coherent_kern_range(addr, addr + len);
  118. if (cache_ops_need_broadcast())
  119. smp_call_function(flush_ptrace_access_other,
  120. NULL, 1);
  121. }
  122. }
  123. /*
  124. * Copy user data from/to a page which is mapped into a different
  125. * processes address space. Really, we want to allow our "user
  126. * space" model to handle this.
  127. *
  128. * Note that this code needs to run on the current CPU.
  129. */
  130. void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
  131. unsigned long uaddr, void *dst, const void *src,
  132. unsigned long len)
  133. {
  134. #ifdef CONFIG_SMP
  135. preempt_disable();
  136. #endif
  137. memcpy(dst, src, len);
  138. flush_ptrace_access(vma, page, uaddr, dst, len);
  139. #ifdef CONFIG_SMP
  140. preempt_enable();
  141. #endif
  142. }
  143. void __flush_dcache_page(struct address_space *mapping, struct page *page)
  144. {
  145. /*
  146. * Writeback any data associated with the kernel mapping of this
  147. * page. This ensures that data in the physical page is mutually
  148. * coherent with the kernels mapping.
  149. */
  150. if (!PageHighMem(page)) {
  151. __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
  152. } else {
  153. void *addr = kmap_high_get(page);
  154. if (addr) {
  155. __cpuc_flush_dcache_area(addr, PAGE_SIZE);
  156. kunmap_high(page);
  157. } else if (cache_is_vipt()) {
  158. /* unmapped pages might still be cached */
  159. addr = kmap_atomic(page);
  160. __cpuc_flush_dcache_area(addr, PAGE_SIZE);
  161. kunmap_atomic(addr);
  162. }
  163. }
  164. /*
  165. * If this is a page cache page, and we have an aliasing VIPT cache,
  166. * we only need to do one flush - which would be at the relevant
  167. * userspace colour, which is congruent with page->index.
  168. */
  169. if (mapping && cache_is_vipt_aliasing())
  170. flush_pfn_alias(page_to_pfn(page),
  171. page->index << PAGE_CACHE_SHIFT);
  172. }
  173. static void __flush_dcache_aliases(struct address_space *mapping, struct page *page)
  174. {
  175. struct mm_struct *mm = current->active_mm;
  176. struct vm_area_struct *mpnt;
  177. struct prio_tree_iter iter;
  178. pgoff_t pgoff;
  179. /*
  180. * There are possible user space mappings of this page:
  181. * - VIVT cache: we need to also write back and invalidate all user
  182. * data in the current VM view associated with this page.
  183. * - aliasing VIPT: we only need to find one mapping of this page.
  184. */
  185. pgoff = page->index << (PAGE_CACHE_SHIFT - PAGE_SHIFT);
  186. flush_dcache_mmap_lock(mapping);
  187. vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
  188. unsigned long offset;
  189. /*
  190. * If this VMA is not in our MM, we can ignore it.
  191. */
  192. if (mpnt->vm_mm != mm)
  193. continue;
  194. if (!(mpnt->vm_flags & VM_MAYSHARE))
  195. continue;
  196. offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
  197. flush_cache_page(mpnt, mpnt->vm_start + offset, page_to_pfn(page));
  198. }
  199. flush_dcache_mmap_unlock(mapping);
  200. }
  201. #if __LINUX_ARM_ARCH__ >= 6
  202. void __sync_icache_dcache(pte_t pteval)
  203. {
  204. unsigned long pfn;
  205. struct page *page;
  206. struct address_space *mapping;
  207. if (!pte_present_user(pteval))
  208. return;
  209. if (cache_is_vipt_nonaliasing() && !pte_exec(pteval))
  210. /* only flush non-aliasing VIPT caches for exec mappings */
  211. return;
  212. pfn = pte_pfn(pteval);
  213. if (!pfn_valid(pfn))
  214. return;
  215. page = pfn_to_page(pfn);
  216. if (cache_is_vipt_aliasing())
  217. mapping = page_mapping(page);
  218. else
  219. mapping = NULL;
  220. if (!test_and_set_bit(PG_dcache_clean, &page->flags))
  221. __flush_dcache_page(mapping, page);
  222. if (pte_exec(pteval))
  223. __flush_icache_all();
  224. }
  225. #endif
  226. /*
  227. * Ensure cache coherency between kernel mapping and userspace mapping
  228. * of this page.
  229. *
  230. * We have three cases to consider:
  231. * - VIPT non-aliasing cache: fully coherent so nothing required.
  232. * - VIVT: fully aliasing, so we need to handle every alias in our
  233. * current VM view.
  234. * - VIPT aliasing: need to handle one alias in our current VM view.
  235. *
  236. * If we need to handle aliasing:
  237. * If the page only exists in the page cache and there are no user
  238. * space mappings, we can be lazy and remember that we may have dirty
  239. * kernel cache lines for later. Otherwise, we assume we have
  240. * aliasing mappings.
  241. *
  242. * Note that we disable the lazy flush for SMP configurations where
  243. * the cache maintenance operations are not automatically broadcasted.
  244. */
  245. void flush_dcache_page(struct page *page)
  246. {
  247. struct address_space *mapping;
  248. /*
  249. * The zero page is never written to, so never has any dirty
  250. * cache lines, and therefore never needs to be flushed.
  251. */
  252. if (page == ZERO_PAGE(0))
  253. return;
  254. mapping = page_mapping(page);
  255. if (!cache_ops_need_broadcast() &&
  256. mapping && !mapping_mapped(mapping))
  257. clear_bit(PG_dcache_clean, &page->flags);
  258. else {
  259. __flush_dcache_page(mapping, page);
  260. if (mapping && cache_is_vivt())
  261. __flush_dcache_aliases(mapping, page);
  262. else if (mapping)
  263. __flush_icache_all();
  264. set_bit(PG_dcache_clean, &page->flags);
  265. }
  266. }
  267. EXPORT_SYMBOL(flush_dcache_page);
  268. /*
  269. * Flush an anonymous page so that users of get_user_pages()
  270. * can safely access the data. The expected sequence is:
  271. *
  272. * get_user_pages()
  273. * -> flush_anon_page
  274. * memcpy() to/from page
  275. * if written to page, flush_dcache_page()
  276. */
  277. void __flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
  278. {
  279. unsigned long pfn;
  280. /* VIPT non-aliasing caches need do nothing */
  281. if (cache_is_vipt_nonaliasing())
  282. return;
  283. /*
  284. * Write back and invalidate userspace mapping.
  285. */
  286. pfn = page_to_pfn(page);
  287. if (cache_is_vivt()) {
  288. flush_cache_page(vma, vmaddr, pfn);
  289. } else {
  290. /*
  291. * For aliasing VIPT, we can flush an alias of the
  292. * userspace address only.
  293. */
  294. flush_pfn_alias(pfn, vmaddr);
  295. __flush_icache_all();
  296. }
  297. /*
  298. * Invalidate kernel mapping. No data should be contained
  299. * in this mapping of the page. FIXME: this is overkill
  300. * since we actually ask for a write-back and invalidate.
  301. */
  302. __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
  303. }