3945-mac.c 106 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/pci-aspm.h>
  35. #include <linux/slab.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/delay.h>
  38. #include <linux/sched.h>
  39. #include <linux/skbuff.h>
  40. #include <linux/netdevice.h>
  41. #include <linux/firmware.h>
  42. #include <linux/etherdevice.h>
  43. #include <linux/if_arp.h>
  44. #include <net/ieee80211_radiotap.h>
  45. #include <net/mac80211.h>
  46. #include <asm/div64.h>
  47. #define DRV_NAME "iwl3945"
  48. #include "commands.h"
  49. #include "common.h"
  50. #include "3945.h"
  51. #include "iwl-spectrum.h"
  52. /*
  53. * module name, copyright, version, etc.
  54. */
  55. #define DRV_DESCRIPTION \
  56. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  57. #ifdef CONFIG_IWLEGACY_DEBUG
  58. #define VD "d"
  59. #else
  60. #define VD
  61. #endif
  62. /*
  63. * add "s" to indicate spectrum measurement included.
  64. * we add it here to be consistent with previous releases in which
  65. * this was configurable.
  66. */
  67. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  68. #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
  69. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  70. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  71. MODULE_VERSION(DRV_VERSION);
  72. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  73. MODULE_LICENSE("GPL");
  74. /* module parameters */
  75. struct il_mod_params il3945_mod_params = {
  76. .sw_crypto = 1,
  77. .restart_fw = 1,
  78. .disable_hw_scan = 1,
  79. /* the rest are 0 by default */
  80. };
  81. /**
  82. * il3945_get_antenna_flags - Get antenna flags for RXON command
  83. * @il: eeprom and antenna fields are used to determine antenna flags
  84. *
  85. * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  86. * il3945_mod_params.antenna specifies the antenna diversity mode:
  87. *
  88. * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  89. * IL_ANTENNA_MAIN - Force MAIN antenna
  90. * IL_ANTENNA_AUX - Force AUX antenna
  91. */
  92. __le32
  93. il3945_get_antenna_flags(const struct il_priv *il)
  94. {
  95. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  96. switch (il3945_mod_params.antenna) {
  97. case IL_ANTENNA_DIVERSITY:
  98. return 0;
  99. case IL_ANTENNA_MAIN:
  100. if (eeprom->antenna_switch_type)
  101. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  103. case IL_ANTENNA_AUX:
  104. if (eeprom->antenna_switch_type)
  105. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  107. }
  108. /* bad antenna selector value */
  109. IL_ERR("Bad antenna selector value (0x%x)\n",
  110. il3945_mod_params.antenna);
  111. return 0; /* "diversity" is default if error */
  112. }
  113. static int
  114. il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
  115. struct ieee80211_key_conf *keyconf, u8 sta_id)
  116. {
  117. unsigned long flags;
  118. __le16 key_flags = 0;
  119. int ret;
  120. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  121. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  122. if (sta_id == il->hw_params.bcast_id)
  123. key_flags |= STA_KEY_MULTICAST_MSK;
  124. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  125. keyconf->hw_key_idx = keyconf->keyidx;
  126. key_flags &= ~STA_KEY_FLG_INVALID;
  127. spin_lock_irqsave(&il->sta_lock, flags);
  128. il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
  129. il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  130. memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
  131. memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
  132. if ((il->stations[sta_id].sta.key.
  133. key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
  134. il->stations[sta_id].sta.key.key_offset =
  135. il_get_free_ucode_key_idx(il);
  136. /* else, we are overriding an existing key => no need to allocated room
  137. * in uCode. */
  138. WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  139. "no space for a new key");
  140. il->stations[sta_id].sta.key.key_flags = key_flags;
  141. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  142. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  143. D_INFO("hwcrypto: modify ucode station key info\n");
  144. ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
  145. spin_unlock_irqrestore(&il->sta_lock, flags);
  146. return ret;
  147. }
  148. static int
  149. il3945_set_tkip_dynamic_key_info(struct il_priv *il,
  150. struct ieee80211_key_conf *keyconf, u8 sta_id)
  151. {
  152. return -EOPNOTSUPP;
  153. }
  154. static int
  155. il3945_set_wep_dynamic_key_info(struct il_priv *il,
  156. struct ieee80211_key_conf *keyconf, u8 sta_id)
  157. {
  158. return -EOPNOTSUPP;
  159. }
  160. static int
  161. il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
  162. {
  163. unsigned long flags;
  164. struct il_addsta_cmd sta_cmd;
  165. spin_lock_irqsave(&il->sta_lock, flags);
  166. memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
  167. memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
  168. il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  169. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  170. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  171. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  172. sizeof(struct il_addsta_cmd));
  173. spin_unlock_irqrestore(&il->sta_lock, flags);
  174. D_INFO("hwcrypto: clear ucode station key info\n");
  175. return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  176. }
  177. static int
  178. il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
  179. u8 sta_id)
  180. {
  181. int ret = 0;
  182. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  183. switch (keyconf->cipher) {
  184. case WLAN_CIPHER_SUITE_CCMP:
  185. ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
  186. break;
  187. case WLAN_CIPHER_SUITE_TKIP:
  188. ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
  189. break;
  190. case WLAN_CIPHER_SUITE_WEP40:
  191. case WLAN_CIPHER_SUITE_WEP104:
  192. ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
  193. break;
  194. default:
  195. IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
  196. ret = -EINVAL;
  197. }
  198. D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
  199. keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
  200. return ret;
  201. }
  202. static int
  203. il3945_remove_static_key(struct il_priv *il)
  204. {
  205. int ret = -EOPNOTSUPP;
  206. return ret;
  207. }
  208. static int
  209. il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
  210. {
  211. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  212. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  213. return -EOPNOTSUPP;
  214. IL_ERR("Static key invalid: cipher %x\n", key->cipher);
  215. return -EINVAL;
  216. }
  217. static void
  218. il3945_clear_free_frames(struct il_priv *il)
  219. {
  220. struct list_head *element;
  221. D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
  222. while (!list_empty(&il->free_frames)) {
  223. element = il->free_frames.next;
  224. list_del(element);
  225. kfree(list_entry(element, struct il3945_frame, list));
  226. il->frames_count--;
  227. }
  228. if (il->frames_count) {
  229. IL_WARN("%d frames still in use. Did we lose one?\n",
  230. il->frames_count);
  231. il->frames_count = 0;
  232. }
  233. }
  234. static struct il3945_frame *
  235. il3945_get_free_frame(struct il_priv *il)
  236. {
  237. struct il3945_frame *frame;
  238. struct list_head *element;
  239. if (list_empty(&il->free_frames)) {
  240. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  241. if (!frame) {
  242. IL_ERR("Could not allocate frame!\n");
  243. return NULL;
  244. }
  245. il->frames_count++;
  246. return frame;
  247. }
  248. element = il->free_frames.next;
  249. list_del(element);
  250. return list_entry(element, struct il3945_frame, list);
  251. }
  252. static void
  253. il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
  254. {
  255. memset(frame, 0, sizeof(*frame));
  256. list_add(&frame->list, &il->free_frames);
  257. }
  258. unsigned int
  259. il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
  260. int left)
  261. {
  262. if (!il_is_associated(il) || !il->beacon_skb)
  263. return 0;
  264. if (il->beacon_skb->len > left)
  265. return 0;
  266. memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
  267. return il->beacon_skb->len;
  268. }
  269. static int
  270. il3945_send_beacon_cmd(struct il_priv *il)
  271. {
  272. struct il3945_frame *frame;
  273. unsigned int frame_size;
  274. int rc;
  275. u8 rate;
  276. frame = il3945_get_free_frame(il);
  277. if (!frame) {
  278. IL_ERR("Could not obtain free frame buffer for beacon "
  279. "command.\n");
  280. return -ENOMEM;
  281. }
  282. rate = il_get_lowest_plcp(il);
  283. frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
  284. rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
  285. il3945_free_frame(il, frame);
  286. return rc;
  287. }
  288. static void
  289. il3945_unset_hw_params(struct il_priv *il)
  290. {
  291. if (il->_3945.shared_virt)
  292. dma_free_coherent(&il->pci_dev->dev,
  293. sizeof(struct il3945_shared),
  294. il->_3945.shared_virt, il->_3945.shared_phys);
  295. }
  296. static void
  297. il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
  298. struct il_device_cmd *cmd,
  299. struct sk_buff *skb_frag, int sta_id)
  300. {
  301. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  302. struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
  303. tx_cmd->sec_ctl = 0;
  304. switch (keyinfo->cipher) {
  305. case WLAN_CIPHER_SUITE_CCMP:
  306. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  307. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  308. D_TX("tx_cmd with AES hwcrypto\n");
  309. break;
  310. case WLAN_CIPHER_SUITE_TKIP:
  311. break;
  312. case WLAN_CIPHER_SUITE_WEP104:
  313. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  314. /* fall through */
  315. case WLAN_CIPHER_SUITE_WEP40:
  316. tx_cmd->sec_ctl |=
  317. TX_CMD_SEC_WEP | (info->control.hw_key->
  318. hw_key_idx & TX_CMD_SEC_MSK) <<
  319. TX_CMD_SEC_SHIFT;
  320. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  321. D_TX("Configuring packet for WEP encryption " "with key %d\n",
  322. info->control.hw_key->hw_key_idx);
  323. break;
  324. default:
  325. IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
  326. break;
  327. }
  328. }
  329. /*
  330. * handle build C_TX command notification.
  331. */
  332. static void
  333. il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
  334. struct ieee80211_tx_info *info,
  335. struct ieee80211_hdr *hdr, u8 std_id)
  336. {
  337. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  338. __le32 tx_flags = tx_cmd->tx_flags;
  339. __le16 fc = hdr->frame_control;
  340. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  341. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  342. tx_flags |= TX_CMD_FLG_ACK_MSK;
  343. if (ieee80211_is_mgmt(fc))
  344. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  345. if (ieee80211_is_probe_resp(fc) &&
  346. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  347. tx_flags |= TX_CMD_FLG_TSF_MSK;
  348. } else {
  349. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  350. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  351. }
  352. tx_cmd->sta_id = std_id;
  353. if (ieee80211_has_morefrags(fc))
  354. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  355. if (ieee80211_is_data_qos(fc)) {
  356. u8 *qc = ieee80211_get_qos_ctl(hdr);
  357. tx_cmd->tid_tspec = qc[0] & 0xf;
  358. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  359. } else {
  360. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  361. }
  362. il_tx_cmd_protection(il, info, fc, &tx_flags);
  363. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  364. if (ieee80211_is_mgmt(fc)) {
  365. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  366. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  367. else
  368. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  369. } else {
  370. tx_cmd->timeout.pm_frame_timeout = 0;
  371. }
  372. tx_cmd->driver_txop = 0;
  373. tx_cmd->tx_flags = tx_flags;
  374. tx_cmd->next_frame_len = 0;
  375. }
  376. /*
  377. * start C_TX command process
  378. */
  379. static int
  380. il3945_tx_skb(struct il_priv *il,
  381. struct ieee80211_sta *sta,
  382. struct sk_buff *skb)
  383. {
  384. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  385. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  386. struct il3945_tx_cmd *tx_cmd;
  387. struct il_tx_queue *txq = NULL;
  388. struct il_queue *q = NULL;
  389. struct il_device_cmd *out_cmd;
  390. struct il_cmd_meta *out_meta;
  391. dma_addr_t phys_addr;
  392. dma_addr_t txcmd_phys;
  393. int txq_id = skb_get_queue_mapping(skb);
  394. u16 len, idx, hdr_len;
  395. u8 id;
  396. u8 unicast;
  397. u8 sta_id;
  398. u8 tid = 0;
  399. __le16 fc;
  400. u8 wait_write_ptr = 0;
  401. unsigned long flags;
  402. spin_lock_irqsave(&il->lock, flags);
  403. if (il_is_rfkill(il)) {
  404. D_DROP("Dropping - RF KILL\n");
  405. goto drop_unlock;
  406. }
  407. if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
  408. IL_INVALID_RATE) {
  409. IL_ERR("ERROR: No TX rate available.\n");
  410. goto drop_unlock;
  411. }
  412. unicast = !is_multicast_ether_addr(hdr->addr1);
  413. id = 0;
  414. fc = hdr->frame_control;
  415. #ifdef CONFIG_IWLEGACY_DEBUG
  416. if (ieee80211_is_auth(fc))
  417. D_TX("Sending AUTH frame\n");
  418. else if (ieee80211_is_assoc_req(fc))
  419. D_TX("Sending ASSOC frame\n");
  420. else if (ieee80211_is_reassoc_req(fc))
  421. D_TX("Sending REASSOC frame\n");
  422. #endif
  423. spin_unlock_irqrestore(&il->lock, flags);
  424. hdr_len = ieee80211_hdrlen(fc);
  425. /* Find idx into station table for destination station */
  426. sta_id = il_sta_id_or_broadcast(il, sta);
  427. if (sta_id == IL_INVALID_STATION) {
  428. D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
  429. goto drop;
  430. }
  431. D_RATE("station Id %d\n", sta_id);
  432. if (ieee80211_is_data_qos(fc)) {
  433. u8 *qc = ieee80211_get_qos_ctl(hdr);
  434. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  435. if (unlikely(tid >= MAX_TID_COUNT))
  436. goto drop;
  437. }
  438. /* Descriptor for chosen Tx queue */
  439. txq = &il->txq[txq_id];
  440. q = &txq->q;
  441. if ((il_queue_space(q) < q->high_mark))
  442. goto drop;
  443. spin_lock_irqsave(&il->lock, flags);
  444. idx = il_get_cmd_idx(q, q->write_ptr, 0);
  445. txq->skbs[q->write_ptr] = skb;
  446. /* Init first empty entry in queue's array of Tx/cmd buffers */
  447. out_cmd = txq->cmd[idx];
  448. out_meta = &txq->meta[idx];
  449. tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
  450. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  451. memset(tx_cmd, 0, sizeof(*tx_cmd));
  452. /*
  453. * Set up the Tx-command (not MAC!) header.
  454. * Store the chosen Tx queue and TFD idx within the sequence field;
  455. * after Tx, uCode's Tx response will return this value so driver can
  456. * locate the frame within the tx queue and do post-tx processing.
  457. */
  458. out_cmd->hdr.cmd = C_TX;
  459. out_cmd->hdr.sequence =
  460. cpu_to_le16((u16)
  461. (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
  462. /* Copy MAC header from skb into command buffer */
  463. memcpy(tx_cmd->hdr, hdr, hdr_len);
  464. if (info->control.hw_key)
  465. il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
  466. /* TODO need this for burst mode later on */
  467. il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
  468. il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
  469. /* Total # bytes to be transmitted */
  470. len = (u16) skb->len;
  471. tx_cmd->len = cpu_to_le16(len);
  472. il_update_stats(il, true, fc, len);
  473. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  474. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  475. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  476. txq->need_update = 1;
  477. } else {
  478. wait_write_ptr = 1;
  479. txq->need_update = 0;
  480. }
  481. D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
  482. D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  483. il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  484. il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
  485. ieee80211_hdrlen(fc));
  486. /*
  487. * Use the first empty entry in this queue's command buffer array
  488. * to contain the Tx command and MAC header concatenated together
  489. * (payload data will be in another buffer).
  490. * Size of this varies, due to varying MAC header length.
  491. * If end is not dword aligned, we'll have 2 extra bytes at the end
  492. * of the MAC header (device reads on dword boundaries).
  493. * We'll tell device about this padding later.
  494. */
  495. len =
  496. sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
  497. hdr_len;
  498. len = (len + 3) & ~3;
  499. /* Physical address of this Tx command's header (not MAC header!),
  500. * within command buffer array. */
  501. txcmd_phys =
  502. pci_map_single(il->pci_dev, &out_cmd->hdr, len, PCI_DMA_TODEVICE);
  503. /* we do not map meta data ... so we can safely access address to
  504. * provide to unmap command*/
  505. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  506. dma_unmap_len_set(out_meta, len, len);
  507. /* Add buffer containing Tx command and MAC(!) header to TFD's
  508. * first entry */
  509. il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, len, 1, 0);
  510. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  511. * if any (802.11 null frames have no payload). */
  512. len = skb->len - hdr_len;
  513. if (len) {
  514. phys_addr =
  515. pci_map_single(il->pci_dev, skb->data + hdr_len, len,
  516. PCI_DMA_TODEVICE);
  517. il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, len, 0,
  518. U32_PAD(len));
  519. }
  520. /* Tell device the write idx *just past* this latest filled TFD */
  521. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  522. il_txq_update_write_ptr(il, txq);
  523. spin_unlock_irqrestore(&il->lock, flags);
  524. if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
  525. if (wait_write_ptr) {
  526. spin_lock_irqsave(&il->lock, flags);
  527. txq->need_update = 1;
  528. il_txq_update_write_ptr(il, txq);
  529. spin_unlock_irqrestore(&il->lock, flags);
  530. }
  531. il_stop_queue(il, txq);
  532. }
  533. return 0;
  534. drop_unlock:
  535. spin_unlock_irqrestore(&il->lock, flags);
  536. drop:
  537. return -1;
  538. }
  539. static int
  540. il3945_get_measurement(struct il_priv *il,
  541. struct ieee80211_measurement_params *params, u8 type)
  542. {
  543. struct il_spectrum_cmd spectrum;
  544. struct il_rx_pkt *pkt;
  545. struct il_host_cmd cmd = {
  546. .id = C_SPECTRUM_MEASUREMENT,
  547. .data = (void *)&spectrum,
  548. .flags = CMD_WANT_SKB,
  549. };
  550. u32 add_time = le64_to_cpu(params->start_time);
  551. int rc;
  552. int spectrum_resp_status;
  553. int duration = le16_to_cpu(params->duration);
  554. if (il_is_associated(il))
  555. add_time =
  556. il_usecs_to_beacons(il,
  557. le64_to_cpu(params->start_time) -
  558. il->_3945.last_tsf,
  559. le16_to_cpu(il->timing.beacon_interval));
  560. memset(&spectrum, 0, sizeof(spectrum));
  561. spectrum.channel_count = cpu_to_le16(1);
  562. spectrum.flags =
  563. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  564. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  565. cmd.len = sizeof(spectrum);
  566. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  567. if (il_is_associated(il))
  568. spectrum.start_time =
  569. il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
  570. le16_to_cpu(il->timing.beacon_interval));
  571. else
  572. spectrum.start_time = 0;
  573. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  574. spectrum.channels[0].channel = params->channel;
  575. spectrum.channels[0].type = type;
  576. if (il->active.flags & RXON_FLG_BAND_24G_MSK)
  577. spectrum.flags |=
  578. RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
  579. RXON_FLG_TGG_PROTECT_MSK;
  580. rc = il_send_cmd_sync(il, &cmd);
  581. if (rc)
  582. return rc;
  583. pkt = (struct il_rx_pkt *)cmd.reply_page;
  584. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  585. IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
  586. rc = -EIO;
  587. }
  588. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  589. switch (spectrum_resp_status) {
  590. case 0: /* Command will be handled */
  591. if (pkt->u.spectrum.id != 0xff) {
  592. D_INFO("Replaced existing measurement: %d\n",
  593. pkt->u.spectrum.id);
  594. il->measurement_status &= ~MEASUREMENT_READY;
  595. }
  596. il->measurement_status |= MEASUREMENT_ACTIVE;
  597. rc = 0;
  598. break;
  599. case 1: /* Command will not be handled */
  600. rc = -EAGAIN;
  601. break;
  602. }
  603. il_free_pages(il, cmd.reply_page);
  604. return rc;
  605. }
  606. static void
  607. il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
  608. {
  609. struct il_rx_pkt *pkt = rxb_addr(rxb);
  610. struct il_alive_resp *palive;
  611. struct delayed_work *pwork;
  612. palive = &pkt->u.alive_frame;
  613. D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
  614. palive->is_valid, palive->ver_type, palive->ver_subtype);
  615. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  616. D_INFO("Initialization Alive received.\n");
  617. memcpy(&il->card_alive_init, &pkt->u.alive_frame,
  618. sizeof(struct il_alive_resp));
  619. pwork = &il->init_alive_start;
  620. } else {
  621. D_INFO("Runtime Alive received.\n");
  622. memcpy(&il->card_alive, &pkt->u.alive_frame,
  623. sizeof(struct il_alive_resp));
  624. pwork = &il->alive_start;
  625. il3945_disable_events(il);
  626. }
  627. /* We delay the ALIVE response by 5ms to
  628. * give the HW RF Kill time to activate... */
  629. if (palive->is_valid == UCODE_VALID_OK)
  630. queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
  631. else
  632. IL_WARN("uCode did not respond OK.\n");
  633. }
  634. static void
  635. il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
  636. {
  637. #ifdef CONFIG_IWLEGACY_DEBUG
  638. struct il_rx_pkt *pkt = rxb_addr(rxb);
  639. #endif
  640. D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
  641. }
  642. static void
  643. il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
  644. {
  645. struct il_rx_pkt *pkt = rxb_addr(rxb);
  646. struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  647. #ifdef CONFIG_IWLEGACY_DEBUG
  648. u8 rate = beacon->beacon_notify_hdr.rate;
  649. D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
  650. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  651. beacon->beacon_notify_hdr.failure_frame,
  652. le32_to_cpu(beacon->ibss_mgr_status),
  653. le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
  654. #endif
  655. il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  656. }
  657. /* Handle notification from uCode that card's power state is changing
  658. * due to software, hardware, or critical temperature RFKILL */
  659. static void
  660. il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
  661. {
  662. struct il_rx_pkt *pkt = rxb_addr(rxb);
  663. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  664. unsigned long status = il->status;
  665. IL_WARN("Card state received: HW:%s SW:%s\n",
  666. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  667. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  668. _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  669. if (flags & HW_CARD_DISABLED)
  670. set_bit(S_RFKILL, &il->status);
  671. else
  672. clear_bit(S_RFKILL, &il->status);
  673. il_scan_cancel(il);
  674. if ((test_bit(S_RFKILL, &status) !=
  675. test_bit(S_RFKILL, &il->status)))
  676. wiphy_rfkill_set_hw_state(il->hw->wiphy,
  677. test_bit(S_RFKILL, &il->status));
  678. else
  679. wake_up(&il->wait_command_queue);
  680. }
  681. /**
  682. * il3945_setup_handlers - Initialize Rx handler callbacks
  683. *
  684. * Setup the RX handlers for each of the reply types sent from the uCode
  685. * to the host.
  686. *
  687. * This function chains into the hardware specific files for them to setup
  688. * any hardware specific handlers as well.
  689. */
  690. static void
  691. il3945_setup_handlers(struct il_priv *il)
  692. {
  693. il->handlers[N_ALIVE] = il3945_hdl_alive;
  694. il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
  695. il->handlers[N_ERROR] = il_hdl_error;
  696. il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
  697. il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
  698. il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
  699. il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
  700. il->handlers[N_BEACON] = il3945_hdl_beacon;
  701. /*
  702. * The same handler is used for both the REPLY to a discrete
  703. * stats request from the host as well as for the periodic
  704. * stats notifications (after received beacons) from the uCode.
  705. */
  706. il->handlers[C_STATS] = il3945_hdl_c_stats;
  707. il->handlers[N_STATS] = il3945_hdl_stats;
  708. il_setup_rx_scan_handlers(il);
  709. il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
  710. /* Set up hardware specific Rx handlers */
  711. il3945_hw_handler_setup(il);
  712. }
  713. /************************** RX-FUNCTIONS ****************************/
  714. /*
  715. * Rx theory of operation
  716. *
  717. * The host allocates 32 DMA target addresses and passes the host address
  718. * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
  719. * 0 to 31
  720. *
  721. * Rx Queue Indexes
  722. * The host/firmware share two idx registers for managing the Rx buffers.
  723. *
  724. * The READ idx maps to the first position that the firmware may be writing
  725. * to -- the driver can read up to (but not including) this position and get
  726. * good data.
  727. * The READ idx is managed by the firmware once the card is enabled.
  728. *
  729. * The WRITE idx maps to the last position the driver has read from -- the
  730. * position preceding WRITE is the last slot the firmware can place a packet.
  731. *
  732. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  733. * WRITE = READ.
  734. *
  735. * During initialization, the host sets up the READ queue position to the first
  736. * IDX position, and WRITE to the last (READ - 1 wrapped)
  737. *
  738. * When the firmware places a packet in a buffer, it will advance the READ idx
  739. * and fire the RX interrupt. The driver can then query the READ idx and
  740. * process as many packets as possible, moving the WRITE idx forward as it
  741. * resets the Rx queue buffers with new memory.
  742. *
  743. * The management in the driver is as follows:
  744. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  745. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  746. * to replenish the iwl->rxq->rx_free.
  747. * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  748. * iwl->rxq is replenished and the READ IDX is updated (updating the
  749. * 'processed' and 'read' driver idxes as well)
  750. * + A received packet is processed and handed to the kernel network stack,
  751. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  752. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  753. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  754. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  755. * were enough free buffers and RX_STALLED is set it is cleared.
  756. *
  757. *
  758. * Driver sequence:
  759. *
  760. * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  761. * il3945_rx_queue_restock
  762. * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  763. * queue, updates firmware pointers, and updates
  764. * the WRITE idx. If insufficient rx_free buffers
  765. * are available, schedules il3945_rx_replenish
  766. *
  767. * -- enable interrupts --
  768. * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
  769. * READ IDX, detaching the SKB from the pool.
  770. * Moves the packet buffer from queue to rx_used.
  771. * Calls il3945_rx_queue_restock to refill any empty
  772. * slots.
  773. * ...
  774. *
  775. */
  776. /**
  777. * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  778. */
  779. static inline __le32
  780. il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
  781. {
  782. return cpu_to_le32((u32) dma_addr);
  783. }
  784. /**
  785. * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
  786. *
  787. * If there are slots in the RX queue that need to be restocked,
  788. * and we have free pre-allocated buffers, fill the ranks as much
  789. * as we can, pulling from rx_free.
  790. *
  791. * This moves the 'write' idx forward to catch up with 'processed', and
  792. * also updates the memory address in the firmware to reference the new
  793. * target buffer.
  794. */
  795. static void
  796. il3945_rx_queue_restock(struct il_priv *il)
  797. {
  798. struct il_rx_queue *rxq = &il->rxq;
  799. struct list_head *element;
  800. struct il_rx_buf *rxb;
  801. unsigned long flags;
  802. int write;
  803. spin_lock_irqsave(&rxq->lock, flags);
  804. write = rxq->write & ~0x7;
  805. while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
  806. /* Get next free Rx buffer, remove from free list */
  807. element = rxq->rx_free.next;
  808. rxb = list_entry(element, struct il_rx_buf, list);
  809. list_del(element);
  810. /* Point to Rx buffer via next RBD in circular buffer */
  811. rxq->bd[rxq->write] =
  812. il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
  813. rxq->queue[rxq->write] = rxb;
  814. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  815. rxq->free_count--;
  816. }
  817. spin_unlock_irqrestore(&rxq->lock, flags);
  818. /* If the pre-allocated buffer pool is dropping low, schedule to
  819. * refill it */
  820. if (rxq->free_count <= RX_LOW_WATERMARK)
  821. queue_work(il->workqueue, &il->rx_replenish);
  822. /* If we've added more space for the firmware to place data, tell it.
  823. * Increment device's write pointer in multiples of 8. */
  824. if (rxq->write_actual != (rxq->write & ~0x7) ||
  825. abs(rxq->write - rxq->read) > 7) {
  826. spin_lock_irqsave(&rxq->lock, flags);
  827. rxq->need_update = 1;
  828. spin_unlock_irqrestore(&rxq->lock, flags);
  829. il_rx_queue_update_write_ptr(il, rxq);
  830. }
  831. }
  832. /**
  833. * il3945_rx_replenish - Move all used packet from rx_used to rx_free
  834. *
  835. * When moving to rx_free an SKB is allocated for the slot.
  836. *
  837. * Also restock the Rx queue via il3945_rx_queue_restock.
  838. * This is called as a scheduled work item (except for during initialization)
  839. */
  840. static void
  841. il3945_rx_allocate(struct il_priv *il, gfp_t priority)
  842. {
  843. struct il_rx_queue *rxq = &il->rxq;
  844. struct list_head *element;
  845. struct il_rx_buf *rxb;
  846. struct page *page;
  847. dma_addr_t page_dma;
  848. unsigned long flags;
  849. gfp_t gfp_mask = priority;
  850. while (1) {
  851. spin_lock_irqsave(&rxq->lock, flags);
  852. if (list_empty(&rxq->rx_used)) {
  853. spin_unlock_irqrestore(&rxq->lock, flags);
  854. return;
  855. }
  856. spin_unlock_irqrestore(&rxq->lock, flags);
  857. if (rxq->free_count > RX_LOW_WATERMARK)
  858. gfp_mask |= __GFP_NOWARN;
  859. if (il->hw_params.rx_page_order > 0)
  860. gfp_mask |= __GFP_COMP;
  861. /* Alloc a new receive buffer */
  862. page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
  863. if (!page) {
  864. if (net_ratelimit())
  865. D_INFO("Failed to allocate SKB buffer.\n");
  866. if (rxq->free_count <= RX_LOW_WATERMARK &&
  867. net_ratelimit())
  868. IL_ERR("Failed to allocate SKB buffer with %0x."
  869. "Only %u free buffers remaining.\n",
  870. priority, rxq->free_count);
  871. /* We don't reschedule replenish work here -- we will
  872. * call the restock method and if it still needs
  873. * more buffers it will schedule replenish */
  874. break;
  875. }
  876. /* Get physical address of RB/SKB */
  877. page_dma =
  878. pci_map_page(il->pci_dev, page, 0,
  879. PAGE_SIZE << il->hw_params.rx_page_order,
  880. PCI_DMA_FROMDEVICE);
  881. if (unlikely(pci_dma_mapping_error(il->pci_dev, page_dma))) {
  882. __free_pages(page, il->hw_params.rx_page_order);
  883. break;
  884. }
  885. spin_lock_irqsave(&rxq->lock, flags);
  886. if (list_empty(&rxq->rx_used)) {
  887. spin_unlock_irqrestore(&rxq->lock, flags);
  888. pci_unmap_page(il->pci_dev, page_dma,
  889. PAGE_SIZE << il->hw_params.rx_page_order,
  890. PCI_DMA_FROMDEVICE);
  891. __free_pages(page, il->hw_params.rx_page_order);
  892. return;
  893. }
  894. element = rxq->rx_used.next;
  895. rxb = list_entry(element, struct il_rx_buf, list);
  896. list_del(element);
  897. rxb->page = page;
  898. rxb->page_dma = page_dma;
  899. list_add_tail(&rxb->list, &rxq->rx_free);
  900. rxq->free_count++;
  901. il->alloc_rxb_page++;
  902. spin_unlock_irqrestore(&rxq->lock, flags);
  903. }
  904. }
  905. void
  906. il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
  907. {
  908. unsigned long flags;
  909. int i;
  910. spin_lock_irqsave(&rxq->lock, flags);
  911. INIT_LIST_HEAD(&rxq->rx_free);
  912. INIT_LIST_HEAD(&rxq->rx_used);
  913. /* Fill the rx_used queue with _all_ of the Rx buffers */
  914. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  915. /* In the reset function, these buffers may have been allocated
  916. * to an SKB, so we need to unmap and free potential storage */
  917. if (rxq->pool[i].page != NULL) {
  918. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  919. PAGE_SIZE << il->hw_params.rx_page_order,
  920. PCI_DMA_FROMDEVICE);
  921. __il_free_pages(il, rxq->pool[i].page);
  922. rxq->pool[i].page = NULL;
  923. }
  924. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  925. }
  926. /* Set us so that we have processed and used all buffers, but have
  927. * not restocked the Rx queue with fresh buffers */
  928. rxq->read = rxq->write = 0;
  929. rxq->write_actual = 0;
  930. rxq->free_count = 0;
  931. spin_unlock_irqrestore(&rxq->lock, flags);
  932. }
  933. void
  934. il3945_rx_replenish(void *data)
  935. {
  936. struct il_priv *il = data;
  937. unsigned long flags;
  938. il3945_rx_allocate(il, GFP_KERNEL);
  939. spin_lock_irqsave(&il->lock, flags);
  940. il3945_rx_queue_restock(il);
  941. spin_unlock_irqrestore(&il->lock, flags);
  942. }
  943. static void
  944. il3945_rx_replenish_now(struct il_priv *il)
  945. {
  946. il3945_rx_allocate(il, GFP_ATOMIC);
  947. il3945_rx_queue_restock(il);
  948. }
  949. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  950. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  951. * This free routine walks the list of POOL entries and if SKB is set to
  952. * non NULL it is unmapped and freed
  953. */
  954. static void
  955. il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
  956. {
  957. int i;
  958. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  959. if (rxq->pool[i].page != NULL) {
  960. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  961. PAGE_SIZE << il->hw_params.rx_page_order,
  962. PCI_DMA_FROMDEVICE);
  963. __il_free_pages(il, rxq->pool[i].page);
  964. rxq->pool[i].page = NULL;
  965. }
  966. }
  967. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  968. rxq->bd_dma);
  969. dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
  970. rxq->rb_stts, rxq->rb_stts_dma);
  971. rxq->bd = NULL;
  972. rxq->rb_stts = NULL;
  973. }
  974. /* Convert linear signal-to-noise ratio into dB */
  975. static u8 ratio2dB[100] = {
  976. /* 0 1 2 3 4 5 6 7 8 9 */
  977. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  978. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  979. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  980. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  981. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  982. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  983. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  984. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  985. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  986. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  987. };
  988. /* Calculates a relative dB value from a ratio of linear
  989. * (i.e. not dB) signal levels.
  990. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  991. int
  992. il3945_calc_db_from_ratio(int sig_ratio)
  993. {
  994. /* 1000:1 or higher just report as 60 dB */
  995. if (sig_ratio >= 1000)
  996. return 60;
  997. /* 100:1 or higher, divide by 10 and use table,
  998. * add 20 dB to make up for divide by 10 */
  999. if (sig_ratio >= 100)
  1000. return 20 + (int)ratio2dB[sig_ratio / 10];
  1001. /* We shouldn't see this */
  1002. if (sig_ratio < 1)
  1003. return 0;
  1004. /* Use table for ratios 1:1 - 99:1 */
  1005. return (int)ratio2dB[sig_ratio];
  1006. }
  1007. /**
  1008. * il3945_rx_handle - Main entry function for receiving responses from uCode
  1009. *
  1010. * Uses the il->handlers callback function array to invoke
  1011. * the appropriate handlers, including command responses,
  1012. * frame-received notifications, and other notifications.
  1013. */
  1014. static void
  1015. il3945_rx_handle(struct il_priv *il)
  1016. {
  1017. struct il_rx_buf *rxb;
  1018. struct il_rx_pkt *pkt;
  1019. struct il_rx_queue *rxq = &il->rxq;
  1020. u32 r, i;
  1021. int reclaim;
  1022. unsigned long flags;
  1023. u8 fill_rx = 0;
  1024. u32 count = 8;
  1025. int total_empty = 0;
  1026. /* uCode's read idx (stored in shared DRAM) indicates the last Rx
  1027. * buffer that the driver may process (last buffer filled by ucode). */
  1028. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1029. i = rxq->read;
  1030. /* calculate total frames need to be restock after handling RX */
  1031. total_empty = r - rxq->write_actual;
  1032. if (total_empty < 0)
  1033. total_empty += RX_QUEUE_SIZE;
  1034. if (total_empty > (RX_QUEUE_SIZE / 2))
  1035. fill_rx = 1;
  1036. /* Rx interrupt, but nothing sent from uCode */
  1037. if (i == r)
  1038. D_RX("r = %d, i = %d\n", r, i);
  1039. while (i != r) {
  1040. int len;
  1041. rxb = rxq->queue[i];
  1042. /* If an RXB doesn't have a Rx queue slot associated with it,
  1043. * then a bug has been introduced in the queue refilling
  1044. * routines -- catch it here */
  1045. BUG_ON(rxb == NULL);
  1046. rxq->queue[i] = NULL;
  1047. pci_unmap_page(il->pci_dev, rxb->page_dma,
  1048. PAGE_SIZE << il->hw_params.rx_page_order,
  1049. PCI_DMA_FROMDEVICE);
  1050. pkt = rxb_addr(rxb);
  1051. len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
  1052. len += sizeof(u32); /* account for status word */
  1053. /* Reclaim a command buffer only if this packet is a response
  1054. * to a (driver-originated) command.
  1055. * If the packet (e.g. Rx frame) originated from uCode,
  1056. * there is no command buffer to reclaim.
  1057. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1058. * but apparently a few don't get set; catch them here. */
  1059. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1060. pkt->hdr.cmd != N_STATS && pkt->hdr.cmd != C_TX;
  1061. /* Based on type of command response or notification,
  1062. * handle those that need handling via function in
  1063. * handlers table. See il3945_setup_handlers() */
  1064. if (il->handlers[pkt->hdr.cmd]) {
  1065. D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
  1066. il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1067. il->isr_stats.handlers[pkt->hdr.cmd]++;
  1068. il->handlers[pkt->hdr.cmd] (il, rxb);
  1069. } else {
  1070. /* No handling needed */
  1071. D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
  1072. i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1073. }
  1074. /*
  1075. * XXX: After here, we should always check rxb->page
  1076. * against NULL before touching it or its virtual
  1077. * memory (pkt). Because some handler might have
  1078. * already taken or freed the pages.
  1079. */
  1080. if (reclaim) {
  1081. /* Invoke any callbacks, transfer the buffer to caller,
  1082. * and fire off the (possibly) blocking il_send_cmd()
  1083. * as we reclaim the driver command queue */
  1084. if (rxb->page)
  1085. il_tx_cmd_complete(il, rxb);
  1086. else
  1087. IL_WARN("Claim null rxb?\n");
  1088. }
  1089. /* Reuse the page if possible. For notification packets and
  1090. * SKBs that fail to Rx correctly, add them back into the
  1091. * rx_free list for reuse later. */
  1092. spin_lock_irqsave(&rxq->lock, flags);
  1093. if (rxb->page != NULL) {
  1094. rxb->page_dma =
  1095. pci_map_page(il->pci_dev, rxb->page, 0,
  1096. PAGE_SIZE << il->hw_params.
  1097. rx_page_order, PCI_DMA_FROMDEVICE);
  1098. if (unlikely(pci_dma_mapping_error(il->pci_dev,
  1099. rxb->page_dma))) {
  1100. __il_free_pages(il, rxb->page);
  1101. rxb->page = NULL;
  1102. list_add_tail(&rxb->list, &rxq->rx_used);
  1103. } else {
  1104. list_add_tail(&rxb->list, &rxq->rx_free);
  1105. rxq->free_count++;
  1106. }
  1107. } else
  1108. list_add_tail(&rxb->list, &rxq->rx_used);
  1109. spin_unlock_irqrestore(&rxq->lock, flags);
  1110. i = (i + 1) & RX_QUEUE_MASK;
  1111. /* If there are a lot of unused frames,
  1112. * restock the Rx queue so ucode won't assert. */
  1113. if (fill_rx) {
  1114. count++;
  1115. if (count >= 8) {
  1116. rxq->read = i;
  1117. il3945_rx_replenish_now(il);
  1118. count = 0;
  1119. }
  1120. }
  1121. }
  1122. /* Backtrack one entry */
  1123. rxq->read = i;
  1124. if (fill_rx)
  1125. il3945_rx_replenish_now(il);
  1126. else
  1127. il3945_rx_queue_restock(il);
  1128. }
  1129. /* call this function to flush any scheduled tasklet */
  1130. static inline void
  1131. il3945_synchronize_irq(struct il_priv *il)
  1132. {
  1133. /* wait to make sure we flush pending tasklet */
  1134. synchronize_irq(il->pci_dev->irq);
  1135. tasklet_kill(&il->irq_tasklet);
  1136. }
  1137. static const char *
  1138. il3945_desc_lookup(int i)
  1139. {
  1140. switch (i) {
  1141. case 1:
  1142. return "FAIL";
  1143. case 2:
  1144. return "BAD_PARAM";
  1145. case 3:
  1146. return "BAD_CHECKSUM";
  1147. case 4:
  1148. return "NMI_INTERRUPT";
  1149. case 5:
  1150. return "SYSASSERT";
  1151. case 6:
  1152. return "FATAL_ERROR";
  1153. }
  1154. return "UNKNOWN";
  1155. }
  1156. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1157. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1158. void
  1159. il3945_dump_nic_error_log(struct il_priv *il)
  1160. {
  1161. u32 i;
  1162. u32 desc, time, count, base, data1;
  1163. u32 blink1, blink2, ilink1, ilink2;
  1164. base = le32_to_cpu(il->card_alive.error_event_table_ptr);
  1165. if (!il3945_hw_valid_rtc_data_addr(base)) {
  1166. IL_ERR("Not valid error log pointer 0x%08X\n", base);
  1167. return;
  1168. }
  1169. count = il_read_targ_mem(il, base);
  1170. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1171. IL_ERR("Start IWL Error Log Dump:\n");
  1172. IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
  1173. }
  1174. IL_ERR("Desc Time asrtPC blink2 "
  1175. "ilink1 nmiPC Line\n");
  1176. for (i = ERROR_START_OFFSET;
  1177. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1178. i += ERROR_ELEM_SIZE) {
  1179. desc = il_read_targ_mem(il, base + i);
  1180. time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
  1181. blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
  1182. blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
  1183. ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
  1184. ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
  1185. data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
  1186. IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1187. il3945_desc_lookup(desc), desc, time, blink1, blink2,
  1188. ilink1, ilink2, data1);
  1189. }
  1190. }
  1191. static void
  1192. il3945_irq_tasklet(struct il_priv *il)
  1193. {
  1194. u32 inta, handled = 0;
  1195. u32 inta_fh;
  1196. unsigned long flags;
  1197. #ifdef CONFIG_IWLEGACY_DEBUG
  1198. u32 inta_mask;
  1199. #endif
  1200. spin_lock_irqsave(&il->lock, flags);
  1201. /* Ack/clear/reset pending uCode interrupts.
  1202. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1203. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1204. inta = _il_rd(il, CSR_INT);
  1205. _il_wr(il, CSR_INT, inta);
  1206. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1207. * Any new interrupts that happen after this, either while we're
  1208. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1209. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1210. _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
  1211. #ifdef CONFIG_IWLEGACY_DEBUG
  1212. if (il_get_debug_level(il) & IL_DL_ISR) {
  1213. /* just for debug */
  1214. inta_mask = _il_rd(il, CSR_INT_MASK);
  1215. D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
  1216. inta_mask, inta_fh);
  1217. }
  1218. #endif
  1219. spin_unlock_irqrestore(&il->lock, flags);
  1220. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1221. * atomic, make sure that inta covers all the interrupts that
  1222. * we've discovered, even if FH interrupt came in just after
  1223. * reading CSR_INT. */
  1224. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1225. inta |= CSR_INT_BIT_FH_RX;
  1226. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1227. inta |= CSR_INT_BIT_FH_TX;
  1228. /* Now service all interrupt bits discovered above. */
  1229. if (inta & CSR_INT_BIT_HW_ERR) {
  1230. IL_ERR("Hardware error detected. Restarting.\n");
  1231. /* Tell the device to stop sending interrupts */
  1232. il_disable_interrupts(il);
  1233. il->isr_stats.hw++;
  1234. il_irq_handle_error(il);
  1235. handled |= CSR_INT_BIT_HW_ERR;
  1236. return;
  1237. }
  1238. #ifdef CONFIG_IWLEGACY_DEBUG
  1239. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1240. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1241. if (inta & CSR_INT_BIT_SCD) {
  1242. D_ISR("Scheduler finished to transmit "
  1243. "the frame/frames.\n");
  1244. il->isr_stats.sch++;
  1245. }
  1246. /* Alive notification via Rx interrupt will do the real work */
  1247. if (inta & CSR_INT_BIT_ALIVE) {
  1248. D_ISR("Alive interrupt\n");
  1249. il->isr_stats.alive++;
  1250. }
  1251. }
  1252. #endif
  1253. /* Safely ignore these bits for debug checks below */
  1254. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1255. /* Error detected by uCode */
  1256. if (inta & CSR_INT_BIT_SW_ERR) {
  1257. IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
  1258. inta);
  1259. il->isr_stats.sw++;
  1260. il_irq_handle_error(il);
  1261. handled |= CSR_INT_BIT_SW_ERR;
  1262. }
  1263. /* uCode wakes up after power-down sleep */
  1264. if (inta & CSR_INT_BIT_WAKEUP) {
  1265. D_ISR("Wakeup interrupt\n");
  1266. il_rx_queue_update_write_ptr(il, &il->rxq);
  1267. il_txq_update_write_ptr(il, &il->txq[0]);
  1268. il_txq_update_write_ptr(il, &il->txq[1]);
  1269. il_txq_update_write_ptr(il, &il->txq[2]);
  1270. il_txq_update_write_ptr(il, &il->txq[3]);
  1271. il_txq_update_write_ptr(il, &il->txq[4]);
  1272. il_txq_update_write_ptr(il, &il->txq[5]);
  1273. il->isr_stats.wakeup++;
  1274. handled |= CSR_INT_BIT_WAKEUP;
  1275. }
  1276. /* All uCode command responses, including Tx command responses,
  1277. * Rx "responses" (frame-received notification), and other
  1278. * notifications from uCode come through here*/
  1279. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1280. il3945_rx_handle(il);
  1281. il->isr_stats.rx++;
  1282. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1283. }
  1284. if (inta & CSR_INT_BIT_FH_TX) {
  1285. D_ISR("Tx interrupt\n");
  1286. il->isr_stats.tx++;
  1287. _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
  1288. il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
  1289. handled |= CSR_INT_BIT_FH_TX;
  1290. }
  1291. if (inta & ~handled) {
  1292. IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1293. il->isr_stats.unhandled++;
  1294. }
  1295. if (inta & ~il->inta_mask) {
  1296. IL_WARN("Disabled INTA bits 0x%08x were pending\n",
  1297. inta & ~il->inta_mask);
  1298. IL_WARN(" with inta_fh = 0x%08x\n", inta_fh);
  1299. }
  1300. /* Re-enable all interrupts */
  1301. /* only Re-enable if disabled by irq */
  1302. if (test_bit(S_INT_ENABLED, &il->status))
  1303. il_enable_interrupts(il);
  1304. #ifdef CONFIG_IWLEGACY_DEBUG
  1305. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1306. inta = _il_rd(il, CSR_INT);
  1307. inta_mask = _il_rd(il, CSR_INT_MASK);
  1308. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1309. D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1310. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1311. }
  1312. #endif
  1313. }
  1314. static int
  1315. il3945_get_channels_for_scan(struct il_priv *il, enum ieee80211_band band,
  1316. u8 is_active, u8 n_probes,
  1317. struct il3945_scan_channel *scan_ch,
  1318. struct ieee80211_vif *vif)
  1319. {
  1320. struct ieee80211_channel *chan;
  1321. const struct ieee80211_supported_band *sband;
  1322. const struct il_channel_info *ch_info;
  1323. u16 passive_dwell = 0;
  1324. u16 active_dwell = 0;
  1325. int added, i;
  1326. sband = il_get_hw_mode(il, band);
  1327. if (!sband)
  1328. return 0;
  1329. active_dwell = il_get_active_dwell_time(il, band, n_probes);
  1330. passive_dwell = il_get_passive_dwell_time(il, band, vif);
  1331. if (passive_dwell <= active_dwell)
  1332. passive_dwell = active_dwell + 1;
  1333. for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
  1334. chan = il->scan_request->channels[i];
  1335. if (chan->band != band)
  1336. continue;
  1337. scan_ch->channel = chan->hw_value;
  1338. ch_info = il_get_channel_info(il, band, scan_ch->channel);
  1339. if (!il_is_channel_valid(ch_info)) {
  1340. D_SCAN("Channel %d is INVALID for this band.\n",
  1341. scan_ch->channel);
  1342. continue;
  1343. }
  1344. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1345. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1346. /* If passive , set up for auto-switch
  1347. * and use long active_dwell time.
  1348. */
  1349. if (!is_active || il_is_channel_passive(ch_info) ||
  1350. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1351. scan_ch->type = 0; /* passive */
  1352. if (IL_UCODE_API(il->ucode_ver) == 1)
  1353. scan_ch->active_dwell =
  1354. cpu_to_le16(passive_dwell - 1);
  1355. } else {
  1356. scan_ch->type = 1; /* active */
  1357. }
  1358. /* Set direct probe bits. These may be used both for active
  1359. * scan channels (probes gets sent right away),
  1360. * or for passive channels (probes get se sent only after
  1361. * hearing clear Rx packet).*/
  1362. if (IL_UCODE_API(il->ucode_ver) >= 2) {
  1363. if (n_probes)
  1364. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1365. } else {
  1366. /* uCode v1 does not allow setting direct probe bits on
  1367. * passive channel. */
  1368. if ((scan_ch->type & 1) && n_probes)
  1369. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1370. }
  1371. /* Set txpower levels to defaults */
  1372. scan_ch->tpc.dsp_atten = 110;
  1373. /* scan_pwr_info->tpc.dsp_atten; */
  1374. /*scan_pwr_info->tpc.tx_gain; */
  1375. if (band == IEEE80211_BAND_5GHZ)
  1376. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1377. else {
  1378. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1379. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1380. * power level:
  1381. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1382. */
  1383. }
  1384. D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
  1385. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1386. (scan_ch->type & 1) ? active_dwell : passive_dwell);
  1387. scan_ch++;
  1388. added++;
  1389. }
  1390. D_SCAN("total channels to scan %d\n", added);
  1391. return added;
  1392. }
  1393. static void
  1394. il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
  1395. {
  1396. int i;
  1397. for (i = 0; i < RATE_COUNT_LEGACY; i++) {
  1398. rates[i].bitrate = il3945_rates[i].ieee * 5;
  1399. rates[i].hw_value = i; /* Rate scaling will work on idxes */
  1400. rates[i].hw_value_short = i;
  1401. rates[i].flags = 0;
  1402. if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
  1403. /*
  1404. * If CCK != 1M then set short preamble rate flag.
  1405. */
  1406. rates[i].flags |=
  1407. (il3945_rates[i].plcp ==
  1408. 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1409. }
  1410. }
  1411. }
  1412. /******************************************************************************
  1413. *
  1414. * uCode download functions
  1415. *
  1416. ******************************************************************************/
  1417. static void
  1418. il3945_dealloc_ucode_pci(struct il_priv *il)
  1419. {
  1420. il_free_fw_desc(il->pci_dev, &il->ucode_code);
  1421. il_free_fw_desc(il->pci_dev, &il->ucode_data);
  1422. il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1423. il_free_fw_desc(il->pci_dev, &il->ucode_init);
  1424. il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
  1425. il_free_fw_desc(il->pci_dev, &il->ucode_boot);
  1426. }
  1427. /**
  1428. * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1429. * looking at all data.
  1430. */
  1431. static int
  1432. il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
  1433. {
  1434. u32 val;
  1435. u32 save_len = len;
  1436. int rc = 0;
  1437. u32 errcnt;
  1438. D_INFO("ucode inst image size is %u\n", len);
  1439. il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
  1440. errcnt = 0;
  1441. for (; len > 0; len -= sizeof(u32), image++) {
  1442. /* read data comes through single port, auto-incr addr */
  1443. /* NOTE: Use the debugless read so we don't flood kernel log
  1444. * if IL_DL_IO is set */
  1445. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1446. if (val != le32_to_cpu(*image)) {
  1447. IL_ERR("uCode INST section is invalid at "
  1448. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1449. save_len - len, val, le32_to_cpu(*image));
  1450. rc = -EIO;
  1451. errcnt++;
  1452. if (errcnt >= 20)
  1453. break;
  1454. }
  1455. }
  1456. if (!errcnt)
  1457. D_INFO("ucode image in INSTRUCTION memory is good\n");
  1458. return rc;
  1459. }
  1460. /**
  1461. * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1462. * using sample data 100 bytes apart. If these sample points are good,
  1463. * it's a pretty good bet that everything between them is good, too.
  1464. */
  1465. static int
  1466. il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
  1467. {
  1468. u32 val;
  1469. int rc = 0;
  1470. u32 errcnt = 0;
  1471. u32 i;
  1472. D_INFO("ucode inst image size is %u\n", len);
  1473. for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
  1474. /* read data comes through single port, auto-incr addr */
  1475. /* NOTE: Use the debugless read so we don't flood kernel log
  1476. * if IL_DL_IO is set */
  1477. il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
  1478. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1479. if (val != le32_to_cpu(*image)) {
  1480. #if 0 /* Enable this if you want to see details */
  1481. IL_ERR("uCode INST section is invalid at "
  1482. "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
  1483. *image);
  1484. #endif
  1485. rc = -EIO;
  1486. errcnt++;
  1487. if (errcnt >= 3)
  1488. break;
  1489. }
  1490. }
  1491. return rc;
  1492. }
  1493. /**
  1494. * il3945_verify_ucode - determine which instruction image is in SRAM,
  1495. * and verify its contents
  1496. */
  1497. static int
  1498. il3945_verify_ucode(struct il_priv *il)
  1499. {
  1500. __le32 *image;
  1501. u32 len;
  1502. int rc = 0;
  1503. /* Try bootstrap */
  1504. image = (__le32 *) il->ucode_boot.v_addr;
  1505. len = il->ucode_boot.len;
  1506. rc = il3945_verify_inst_sparse(il, image, len);
  1507. if (rc == 0) {
  1508. D_INFO("Bootstrap uCode is good in inst SRAM\n");
  1509. return 0;
  1510. }
  1511. /* Try initialize */
  1512. image = (__le32 *) il->ucode_init.v_addr;
  1513. len = il->ucode_init.len;
  1514. rc = il3945_verify_inst_sparse(il, image, len);
  1515. if (rc == 0) {
  1516. D_INFO("Initialize uCode is good in inst SRAM\n");
  1517. return 0;
  1518. }
  1519. /* Try runtime/protocol */
  1520. image = (__le32 *) il->ucode_code.v_addr;
  1521. len = il->ucode_code.len;
  1522. rc = il3945_verify_inst_sparse(il, image, len);
  1523. if (rc == 0) {
  1524. D_INFO("Runtime uCode is good in inst SRAM\n");
  1525. return 0;
  1526. }
  1527. IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1528. /* Since nothing seems to match, show first several data entries in
  1529. * instruction SRAM, so maybe visual inspection will give a clue.
  1530. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1531. image = (__le32 *) il->ucode_boot.v_addr;
  1532. len = il->ucode_boot.len;
  1533. rc = il3945_verify_inst_full(il, image, len);
  1534. return rc;
  1535. }
  1536. static void
  1537. il3945_nic_start(struct il_priv *il)
  1538. {
  1539. /* Remove all resets to allow NIC to operate */
  1540. _il_wr(il, CSR_RESET, 0);
  1541. }
  1542. #define IL3945_UCODE_GET(item) \
  1543. static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
  1544. { \
  1545. return le32_to_cpu(ucode->v1.item); \
  1546. }
  1547. static u32
  1548. il3945_ucode_get_header_size(u32 api_ver)
  1549. {
  1550. return 24;
  1551. }
  1552. static u8 *
  1553. il3945_ucode_get_data(const struct il_ucode_header *ucode)
  1554. {
  1555. return (u8 *) ucode->v1.data;
  1556. }
  1557. IL3945_UCODE_GET(inst_size);
  1558. IL3945_UCODE_GET(data_size);
  1559. IL3945_UCODE_GET(init_size);
  1560. IL3945_UCODE_GET(init_data_size);
  1561. IL3945_UCODE_GET(boot_size);
  1562. /**
  1563. * il3945_read_ucode - Read uCode images from disk file.
  1564. *
  1565. * Copy into buffers for card to fetch via bus-mastering
  1566. */
  1567. static int
  1568. il3945_read_ucode(struct il_priv *il)
  1569. {
  1570. const struct il_ucode_header *ucode;
  1571. int ret = -EINVAL, idx;
  1572. const struct firmware *ucode_raw;
  1573. /* firmware file name contains uCode/driver compatibility version */
  1574. const char *name_pre = il->cfg->fw_name_pre;
  1575. const unsigned int api_max = il->cfg->ucode_api_max;
  1576. const unsigned int api_min = il->cfg->ucode_api_min;
  1577. char buf[25];
  1578. u8 *src;
  1579. size_t len;
  1580. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1581. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1582. * request_firmware() is synchronous, file is in memory on return. */
  1583. for (idx = api_max; idx >= api_min; idx--) {
  1584. sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
  1585. ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
  1586. if (ret < 0) {
  1587. IL_ERR("%s firmware file req failed: %d\n", buf, ret);
  1588. if (ret == -ENOENT)
  1589. continue;
  1590. else
  1591. goto error;
  1592. } else {
  1593. if (idx < api_max)
  1594. IL_ERR("Loaded firmware %s, "
  1595. "which is deprecated. "
  1596. " Please use API v%u instead.\n", buf,
  1597. api_max);
  1598. D_INFO("Got firmware '%s' file "
  1599. "(%zd bytes) from disk\n", buf, ucode_raw->size);
  1600. break;
  1601. }
  1602. }
  1603. if (ret < 0)
  1604. goto error;
  1605. /* Make sure that we got at least our header! */
  1606. if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
  1607. IL_ERR("File size way too small!\n");
  1608. ret = -EINVAL;
  1609. goto err_release;
  1610. }
  1611. /* Data from ucode file: header followed by uCode images */
  1612. ucode = (struct il_ucode_header *)ucode_raw->data;
  1613. il->ucode_ver = le32_to_cpu(ucode->ver);
  1614. api_ver = IL_UCODE_API(il->ucode_ver);
  1615. inst_size = il3945_ucode_get_inst_size(ucode);
  1616. data_size = il3945_ucode_get_data_size(ucode);
  1617. init_size = il3945_ucode_get_init_size(ucode);
  1618. init_data_size = il3945_ucode_get_init_data_size(ucode);
  1619. boot_size = il3945_ucode_get_boot_size(ucode);
  1620. src = il3945_ucode_get_data(ucode);
  1621. /* api_ver should match the api version forming part of the
  1622. * firmware filename ... but we don't check for that and only rely
  1623. * on the API version read from firmware header from here on forward */
  1624. if (api_ver < api_min || api_ver > api_max) {
  1625. IL_ERR("Driver unable to support your firmware API. "
  1626. "Driver supports v%u, firmware is v%u.\n", api_max,
  1627. api_ver);
  1628. il->ucode_ver = 0;
  1629. ret = -EINVAL;
  1630. goto err_release;
  1631. }
  1632. if (api_ver != api_max)
  1633. IL_ERR("Firmware has old API version. Expected %u, "
  1634. "got %u. New firmware can be obtained "
  1635. "from http://www.intellinuxwireless.org.\n", api_max,
  1636. api_ver);
  1637. IL_INFO("loaded firmware version %u.%u.%u.%u\n",
  1638. IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
  1639. IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
  1640. snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
  1641. "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
  1642. IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
  1643. IL_UCODE_SERIAL(il->ucode_ver));
  1644. D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
  1645. D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  1646. D_INFO("f/w package hdr runtime data size = %u\n", data_size);
  1647. D_INFO("f/w package hdr init inst size = %u\n", init_size);
  1648. D_INFO("f/w package hdr init data size = %u\n", init_data_size);
  1649. D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  1650. /* Verify size of file vs. image size info in file's header */
  1651. if (ucode_raw->size !=
  1652. il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
  1653. init_size + init_data_size + boot_size) {
  1654. D_INFO("uCode file size %zd does not match expected size\n",
  1655. ucode_raw->size);
  1656. ret = -EINVAL;
  1657. goto err_release;
  1658. }
  1659. /* Verify that uCode images will fit in card's SRAM */
  1660. if (inst_size > IL39_MAX_INST_SIZE) {
  1661. D_INFO("uCode instr len %d too large to fit in\n", inst_size);
  1662. ret = -EINVAL;
  1663. goto err_release;
  1664. }
  1665. if (data_size > IL39_MAX_DATA_SIZE) {
  1666. D_INFO("uCode data len %d too large to fit in\n", data_size);
  1667. ret = -EINVAL;
  1668. goto err_release;
  1669. }
  1670. if (init_size > IL39_MAX_INST_SIZE) {
  1671. D_INFO("uCode init instr len %d too large to fit in\n",
  1672. init_size);
  1673. ret = -EINVAL;
  1674. goto err_release;
  1675. }
  1676. if (init_data_size > IL39_MAX_DATA_SIZE) {
  1677. D_INFO("uCode init data len %d too large to fit in\n",
  1678. init_data_size);
  1679. ret = -EINVAL;
  1680. goto err_release;
  1681. }
  1682. if (boot_size > IL39_MAX_BSM_SIZE) {
  1683. D_INFO("uCode boot instr len %d too large to fit in\n",
  1684. boot_size);
  1685. ret = -EINVAL;
  1686. goto err_release;
  1687. }
  1688. /* Allocate ucode buffers for card's bus-master loading ... */
  1689. /* Runtime instructions and 2 copies of data:
  1690. * 1) unmodified from disk
  1691. * 2) backup cache for save/restore during power-downs */
  1692. il->ucode_code.len = inst_size;
  1693. il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
  1694. il->ucode_data.len = data_size;
  1695. il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
  1696. il->ucode_data_backup.len = data_size;
  1697. il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1698. if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
  1699. !il->ucode_data_backup.v_addr)
  1700. goto err_pci_alloc;
  1701. /* Initialization instructions and data */
  1702. if (init_size && init_data_size) {
  1703. il->ucode_init.len = init_size;
  1704. il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
  1705. il->ucode_init_data.len = init_data_size;
  1706. il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
  1707. if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
  1708. goto err_pci_alloc;
  1709. }
  1710. /* Bootstrap (instructions only, no data) */
  1711. if (boot_size) {
  1712. il->ucode_boot.len = boot_size;
  1713. il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
  1714. if (!il->ucode_boot.v_addr)
  1715. goto err_pci_alloc;
  1716. }
  1717. /* Copy images into buffers for card's bus-master reads ... */
  1718. /* Runtime instructions (first block of data in file) */
  1719. len = inst_size;
  1720. D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
  1721. memcpy(il->ucode_code.v_addr, src, len);
  1722. src += len;
  1723. D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1724. il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
  1725. /* Runtime data (2nd block)
  1726. * NOTE: Copy into backup buffer will be done in il3945_up() */
  1727. len = data_size;
  1728. D_INFO("Copying (but not loading) uCode data len %zd\n", len);
  1729. memcpy(il->ucode_data.v_addr, src, len);
  1730. memcpy(il->ucode_data_backup.v_addr, src, len);
  1731. src += len;
  1732. /* Initialization instructions (3rd block) */
  1733. if (init_size) {
  1734. len = init_size;
  1735. D_INFO("Copying (but not loading) init instr len %zd\n", len);
  1736. memcpy(il->ucode_init.v_addr, src, len);
  1737. src += len;
  1738. }
  1739. /* Initialization data (4th block) */
  1740. if (init_data_size) {
  1741. len = init_data_size;
  1742. D_INFO("Copying (but not loading) init data len %zd\n", len);
  1743. memcpy(il->ucode_init_data.v_addr, src, len);
  1744. src += len;
  1745. }
  1746. /* Bootstrap instructions (5th block) */
  1747. len = boot_size;
  1748. D_INFO("Copying (but not loading) boot instr len %zd\n", len);
  1749. memcpy(il->ucode_boot.v_addr, src, len);
  1750. /* We have our copies now, allow OS release its copies */
  1751. release_firmware(ucode_raw);
  1752. return 0;
  1753. err_pci_alloc:
  1754. IL_ERR("failed to allocate pci memory\n");
  1755. ret = -ENOMEM;
  1756. il3945_dealloc_ucode_pci(il);
  1757. err_release:
  1758. release_firmware(ucode_raw);
  1759. error:
  1760. return ret;
  1761. }
  1762. /**
  1763. * il3945_set_ucode_ptrs - Set uCode address location
  1764. *
  1765. * Tell initialization uCode where to find runtime uCode.
  1766. *
  1767. * BSM registers initially contain pointers to initialization uCode.
  1768. * We need to replace them to load runtime uCode inst and data,
  1769. * and to save runtime data when powering down.
  1770. */
  1771. static int
  1772. il3945_set_ucode_ptrs(struct il_priv *il)
  1773. {
  1774. dma_addr_t pinst;
  1775. dma_addr_t pdata;
  1776. /* bits 31:0 for 3945 */
  1777. pinst = il->ucode_code.p_addr;
  1778. pdata = il->ucode_data_backup.p_addr;
  1779. /* Tell bootstrap uCode where to find image to load */
  1780. il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
  1781. il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
  1782. il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
  1783. /* Inst byte count must be last to set up, bit 31 signals uCode
  1784. * that all new ptr/size info is in place */
  1785. il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
  1786. il->ucode_code.len | BSM_DRAM_INST_LOAD);
  1787. D_INFO("Runtime uCode pointers are set.\n");
  1788. return 0;
  1789. }
  1790. /**
  1791. * il3945_init_alive_start - Called after N_ALIVE notification received
  1792. *
  1793. * Called after N_ALIVE notification received from "initialize" uCode.
  1794. *
  1795. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1796. */
  1797. static void
  1798. il3945_init_alive_start(struct il_priv *il)
  1799. {
  1800. /* Check alive response for "valid" sign from uCode */
  1801. if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
  1802. /* We had an error bringing up the hardware, so take it
  1803. * all the way back down so we can try again */
  1804. D_INFO("Initialize Alive failed.\n");
  1805. goto restart;
  1806. }
  1807. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  1808. * This is a paranoid check, because we would not have gotten the
  1809. * "initialize" alive if code weren't properly loaded. */
  1810. if (il3945_verify_ucode(il)) {
  1811. /* Runtime instruction load was bad;
  1812. * take it all the way back down so we can try again */
  1813. D_INFO("Bad \"initialize\" uCode load.\n");
  1814. goto restart;
  1815. }
  1816. /* Send pointers to protocol/runtime uCode image ... init code will
  1817. * load and launch runtime uCode, which will send us another "Alive"
  1818. * notification. */
  1819. D_INFO("Initialization Alive received.\n");
  1820. if (il3945_set_ucode_ptrs(il)) {
  1821. /* Runtime instruction load won't happen;
  1822. * take it all the way back down so we can try again */
  1823. D_INFO("Couldn't set up uCode pointers.\n");
  1824. goto restart;
  1825. }
  1826. return;
  1827. restart:
  1828. queue_work(il->workqueue, &il->restart);
  1829. }
  1830. /**
  1831. * il3945_alive_start - called after N_ALIVE notification received
  1832. * from protocol/runtime uCode (initialization uCode's
  1833. * Alive gets handled by il3945_init_alive_start()).
  1834. */
  1835. static void
  1836. il3945_alive_start(struct il_priv *il)
  1837. {
  1838. int thermal_spin = 0;
  1839. u32 rfkill;
  1840. D_INFO("Runtime Alive received.\n");
  1841. if (il->card_alive.is_valid != UCODE_VALID_OK) {
  1842. /* We had an error bringing up the hardware, so take it
  1843. * all the way back down so we can try again */
  1844. D_INFO("Alive failed.\n");
  1845. goto restart;
  1846. }
  1847. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  1848. * This is a paranoid check, because we would not have gotten the
  1849. * "runtime" alive if code weren't properly loaded. */
  1850. if (il3945_verify_ucode(il)) {
  1851. /* Runtime instruction load was bad;
  1852. * take it all the way back down so we can try again */
  1853. D_INFO("Bad runtime uCode load.\n");
  1854. goto restart;
  1855. }
  1856. rfkill = il_rd_prph(il, APMG_RFKILL_REG);
  1857. D_INFO("RFKILL status: 0x%x\n", rfkill);
  1858. if (rfkill & 0x1) {
  1859. clear_bit(S_RFKILL, &il->status);
  1860. /* if RFKILL is not on, then wait for thermal
  1861. * sensor in adapter to kick in */
  1862. while (il3945_hw_get_temperature(il) == 0) {
  1863. thermal_spin++;
  1864. udelay(10);
  1865. }
  1866. if (thermal_spin)
  1867. D_INFO("Thermal calibration took %dus\n",
  1868. thermal_spin * 10);
  1869. } else
  1870. set_bit(S_RFKILL, &il->status);
  1871. /* After the ALIVE response, we can send commands to 3945 uCode */
  1872. set_bit(S_ALIVE, &il->status);
  1873. /* Enable watchdog to monitor the driver tx queues */
  1874. il_setup_watchdog(il);
  1875. if (il_is_rfkill(il))
  1876. return;
  1877. ieee80211_wake_queues(il->hw);
  1878. il->active_rate = RATES_MASK_3945;
  1879. il_power_update_mode(il, true);
  1880. if (il_is_associated(il)) {
  1881. struct il3945_rxon_cmd *active_rxon =
  1882. (struct il3945_rxon_cmd *)(&il->active);
  1883. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1884. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1885. } else {
  1886. /* Initialize our rx_config data */
  1887. il_connection_init_rx_config(il);
  1888. }
  1889. /* Configure Bluetooth device coexistence support */
  1890. il_send_bt_config(il);
  1891. set_bit(S_READY, &il->status);
  1892. /* Configure the adapter for unassociated operation */
  1893. il3945_commit_rxon(il);
  1894. il3945_reg_txpower_periodic(il);
  1895. D_INFO("ALIVE processing complete.\n");
  1896. wake_up(&il->wait_command_queue);
  1897. return;
  1898. restart:
  1899. queue_work(il->workqueue, &il->restart);
  1900. }
  1901. static void il3945_cancel_deferred_work(struct il_priv *il);
  1902. static void
  1903. __il3945_down(struct il_priv *il)
  1904. {
  1905. unsigned long flags;
  1906. int exit_pending;
  1907. D_INFO(DRV_NAME " is going down\n");
  1908. il_scan_cancel_timeout(il, 200);
  1909. exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
  1910. /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
  1911. * to prevent rearm timer */
  1912. del_timer_sync(&il->watchdog);
  1913. /* Station information will now be cleared in device */
  1914. il_clear_ucode_stations(il);
  1915. il_dealloc_bcast_stations(il);
  1916. il_clear_driver_stations(il);
  1917. /* Unblock any waiting calls */
  1918. wake_up_all(&il->wait_command_queue);
  1919. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1920. * exiting the module */
  1921. if (!exit_pending)
  1922. clear_bit(S_EXIT_PENDING, &il->status);
  1923. /* stop and reset the on-board processor */
  1924. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  1925. /* tell the device to stop sending interrupts */
  1926. spin_lock_irqsave(&il->lock, flags);
  1927. il_disable_interrupts(il);
  1928. spin_unlock_irqrestore(&il->lock, flags);
  1929. il3945_synchronize_irq(il);
  1930. if (il->mac80211_registered)
  1931. ieee80211_stop_queues(il->hw);
  1932. /* If we have not previously called il3945_init() then
  1933. * clear all bits but the RF Kill bits and return */
  1934. if (!il_is_init(il)) {
  1935. il->status =
  1936. test_bit(S_RFKILL, &il->status) << S_RFKILL |
  1937. test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
  1938. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1939. goto exit;
  1940. }
  1941. /* ...otherwise clear out all the status bits but the RF Kill
  1942. * bit and continue taking the NIC down. */
  1943. il->status &=
  1944. test_bit(S_RFKILL, &il->status) << S_RFKILL |
  1945. test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
  1946. test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
  1947. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1948. /*
  1949. * We disabled and synchronized interrupt, and priv->mutex is taken, so
  1950. * here is the only thread which will program device registers, but
  1951. * still have lockdep assertions, so we are taking reg_lock.
  1952. */
  1953. spin_lock_irq(&il->reg_lock);
  1954. /* FIXME: il_grab_nic_access if rfkill is off ? */
  1955. il3945_hw_txq_ctx_stop(il);
  1956. il3945_hw_rxq_stop(il);
  1957. /* Power-down device's busmaster DMA clocks */
  1958. _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  1959. udelay(5);
  1960. /* Stop the device, and put it in low power state */
  1961. _il_apm_stop(il);
  1962. spin_unlock_irq(&il->reg_lock);
  1963. il3945_hw_txq_ctx_free(il);
  1964. exit:
  1965. memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
  1966. if (il->beacon_skb)
  1967. dev_kfree_skb(il->beacon_skb);
  1968. il->beacon_skb = NULL;
  1969. /* clear out any free frames */
  1970. il3945_clear_free_frames(il);
  1971. }
  1972. static void
  1973. il3945_down(struct il_priv *il)
  1974. {
  1975. mutex_lock(&il->mutex);
  1976. __il3945_down(il);
  1977. mutex_unlock(&il->mutex);
  1978. il3945_cancel_deferred_work(il);
  1979. }
  1980. #define MAX_HW_RESTARTS 5
  1981. static int
  1982. il3945_alloc_bcast_station(struct il_priv *il)
  1983. {
  1984. unsigned long flags;
  1985. u8 sta_id;
  1986. spin_lock_irqsave(&il->sta_lock, flags);
  1987. sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
  1988. if (sta_id == IL_INVALID_STATION) {
  1989. IL_ERR("Unable to prepare broadcast station\n");
  1990. spin_unlock_irqrestore(&il->sta_lock, flags);
  1991. return -EINVAL;
  1992. }
  1993. il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
  1994. il->stations[sta_id].used |= IL_STA_BCAST;
  1995. spin_unlock_irqrestore(&il->sta_lock, flags);
  1996. return 0;
  1997. }
  1998. static int
  1999. __il3945_up(struct il_priv *il)
  2000. {
  2001. int rc, i;
  2002. rc = il3945_alloc_bcast_station(il);
  2003. if (rc)
  2004. return rc;
  2005. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2006. IL_WARN("Exit pending; will not bring the NIC up\n");
  2007. return -EIO;
  2008. }
  2009. if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
  2010. IL_ERR("ucode not available for device bring up\n");
  2011. return -EIO;
  2012. }
  2013. /* If platform's RF_KILL switch is NOT set to KILL */
  2014. if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2015. clear_bit(S_RFKILL, &il->status);
  2016. else {
  2017. set_bit(S_RFKILL, &il->status);
  2018. IL_WARN("Radio disabled by HW RF Kill switch\n");
  2019. return -ENODEV;
  2020. }
  2021. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2022. rc = il3945_hw_nic_init(il);
  2023. if (rc) {
  2024. IL_ERR("Unable to int nic\n");
  2025. return rc;
  2026. }
  2027. /* make sure rfkill handshake bits are cleared */
  2028. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2029. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2030. /* clear (again), then enable host interrupts */
  2031. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2032. il_enable_interrupts(il);
  2033. /* really make sure rfkill handshake bits are cleared */
  2034. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2035. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2036. /* Copy original ucode data image from disk into backup cache.
  2037. * This will be used to initialize the on-board processor's
  2038. * data SRAM for a clean start when the runtime program first loads. */
  2039. memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
  2040. il->ucode_data.len);
  2041. /* We return success when we resume from suspend and rf_kill is on. */
  2042. if (test_bit(S_RFKILL, &il->status))
  2043. return 0;
  2044. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2045. /* load bootstrap state machine,
  2046. * load bootstrap program into processor's memory,
  2047. * prepare to load the "initialize" uCode */
  2048. rc = il->ops->load_ucode(il);
  2049. if (rc) {
  2050. IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
  2051. continue;
  2052. }
  2053. /* start card; "initialize" will load runtime ucode */
  2054. il3945_nic_start(il);
  2055. D_INFO(DRV_NAME " is coming up\n");
  2056. return 0;
  2057. }
  2058. set_bit(S_EXIT_PENDING, &il->status);
  2059. __il3945_down(il);
  2060. clear_bit(S_EXIT_PENDING, &il->status);
  2061. /* tried to restart and config the device for as long as our
  2062. * patience could withstand */
  2063. IL_ERR("Unable to initialize device after %d attempts.\n", i);
  2064. return -EIO;
  2065. }
  2066. /*****************************************************************************
  2067. *
  2068. * Workqueue callbacks
  2069. *
  2070. *****************************************************************************/
  2071. static void
  2072. il3945_bg_init_alive_start(struct work_struct *data)
  2073. {
  2074. struct il_priv *il =
  2075. container_of(data, struct il_priv, init_alive_start.work);
  2076. mutex_lock(&il->mutex);
  2077. if (test_bit(S_EXIT_PENDING, &il->status))
  2078. goto out;
  2079. il3945_init_alive_start(il);
  2080. out:
  2081. mutex_unlock(&il->mutex);
  2082. }
  2083. static void
  2084. il3945_bg_alive_start(struct work_struct *data)
  2085. {
  2086. struct il_priv *il =
  2087. container_of(data, struct il_priv, alive_start.work);
  2088. mutex_lock(&il->mutex);
  2089. if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
  2090. goto out;
  2091. il3945_alive_start(il);
  2092. out:
  2093. mutex_unlock(&il->mutex);
  2094. }
  2095. /*
  2096. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2097. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2098. * *is* readable even when device has been SW_RESET into low power mode
  2099. * (e.g. during RF KILL).
  2100. */
  2101. static void
  2102. il3945_rfkill_poll(struct work_struct *data)
  2103. {
  2104. struct il_priv *il =
  2105. container_of(data, struct il_priv, _3945.rfkill_poll.work);
  2106. bool old_rfkill = test_bit(S_RFKILL, &il->status);
  2107. bool new_rfkill =
  2108. !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2109. if (new_rfkill != old_rfkill) {
  2110. if (new_rfkill)
  2111. set_bit(S_RFKILL, &il->status);
  2112. else
  2113. clear_bit(S_RFKILL, &il->status);
  2114. wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
  2115. D_RF_KILL("RF_KILL bit toggled to %s.\n",
  2116. new_rfkill ? "disable radio" : "enable radio");
  2117. }
  2118. /* Keep this running, even if radio now enabled. This will be
  2119. * cancelled in mac_start() if system decides to start again */
  2120. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2121. round_jiffies_relative(2 * HZ));
  2122. }
  2123. int
  2124. il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
  2125. {
  2126. struct il_host_cmd cmd = {
  2127. .id = C_SCAN,
  2128. .len = sizeof(struct il3945_scan_cmd),
  2129. .flags = CMD_SIZE_HUGE,
  2130. };
  2131. struct il3945_scan_cmd *scan;
  2132. u8 n_probes = 0;
  2133. enum ieee80211_band band;
  2134. bool is_active = false;
  2135. int ret;
  2136. u16 len;
  2137. lockdep_assert_held(&il->mutex);
  2138. if (!il->scan_cmd) {
  2139. il->scan_cmd =
  2140. kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
  2141. GFP_KERNEL);
  2142. if (!il->scan_cmd) {
  2143. D_SCAN("Fail to allocate scan memory\n");
  2144. return -ENOMEM;
  2145. }
  2146. }
  2147. scan = il->scan_cmd;
  2148. memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
  2149. scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
  2150. scan->quiet_time = IL_ACTIVE_QUIET_TIME;
  2151. if (il_is_associated(il)) {
  2152. u16 interval;
  2153. u32 extra;
  2154. u32 suspend_time = 100;
  2155. u32 scan_suspend_time = 100;
  2156. D_INFO("Scanning while associated...\n");
  2157. interval = vif->bss_conf.beacon_int;
  2158. scan->suspend_time = 0;
  2159. scan->max_out_time = cpu_to_le32(200 * 1024);
  2160. if (!interval)
  2161. interval = suspend_time;
  2162. /*
  2163. * suspend time format:
  2164. * 0-19: beacon interval in usec (time before exec.)
  2165. * 20-23: 0
  2166. * 24-31: number of beacons (suspend between channels)
  2167. */
  2168. extra = (suspend_time / interval) << 24;
  2169. scan_suspend_time =
  2170. 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
  2171. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2172. D_SCAN("suspend_time 0x%X beacon interval %d\n",
  2173. scan_suspend_time, interval);
  2174. }
  2175. if (il->scan_request->n_ssids) {
  2176. int i, p = 0;
  2177. D_SCAN("Kicking off active scan\n");
  2178. for (i = 0; i < il->scan_request->n_ssids; i++) {
  2179. /* always does wildcard anyway */
  2180. if (!il->scan_request->ssids[i].ssid_len)
  2181. continue;
  2182. scan->direct_scan[p].id = WLAN_EID_SSID;
  2183. scan->direct_scan[p].len =
  2184. il->scan_request->ssids[i].ssid_len;
  2185. memcpy(scan->direct_scan[p].ssid,
  2186. il->scan_request->ssids[i].ssid,
  2187. il->scan_request->ssids[i].ssid_len);
  2188. n_probes++;
  2189. p++;
  2190. }
  2191. is_active = true;
  2192. } else
  2193. D_SCAN("Kicking off passive scan.\n");
  2194. /* We don't build a direct scan probe request; the uCode will do
  2195. * that based on the direct_mask added to each channel entry */
  2196. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2197. scan->tx_cmd.sta_id = il->hw_params.bcast_id;
  2198. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2199. /* flags + rate selection */
  2200. switch (il->scan_band) {
  2201. case IEEE80211_BAND_2GHZ:
  2202. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2203. scan->tx_cmd.rate = RATE_1M_PLCP;
  2204. band = IEEE80211_BAND_2GHZ;
  2205. break;
  2206. case IEEE80211_BAND_5GHZ:
  2207. scan->tx_cmd.rate = RATE_6M_PLCP;
  2208. band = IEEE80211_BAND_5GHZ;
  2209. break;
  2210. default:
  2211. IL_WARN("Invalid scan band\n");
  2212. return -EIO;
  2213. }
  2214. /*
  2215. * If active scaning is requested but a certain channel is marked
  2216. * passive, we can do active scanning if we detect transmissions. For
  2217. * passive only scanning disable switching to active on any channel.
  2218. */
  2219. scan->good_CRC_th =
  2220. is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
  2221. len =
  2222. il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
  2223. vif->addr, il->scan_request->ie,
  2224. il->scan_request->ie_len,
  2225. IL_MAX_SCAN_SIZE - sizeof(*scan));
  2226. scan->tx_cmd.len = cpu_to_le16(len);
  2227. /* select Rx antennas */
  2228. scan->flags |= il3945_get_antenna_flags(il);
  2229. scan->channel_count =
  2230. il3945_get_channels_for_scan(il, band, is_active, n_probes,
  2231. (void *)&scan->data[len], vif);
  2232. if (scan->channel_count == 0) {
  2233. D_SCAN("channel count %d\n", scan->channel_count);
  2234. return -EIO;
  2235. }
  2236. cmd.len +=
  2237. le16_to_cpu(scan->tx_cmd.len) +
  2238. scan->channel_count * sizeof(struct il3945_scan_channel);
  2239. cmd.data = scan;
  2240. scan->len = cpu_to_le16(cmd.len);
  2241. set_bit(S_SCAN_HW, &il->status);
  2242. ret = il_send_cmd_sync(il, &cmd);
  2243. if (ret)
  2244. clear_bit(S_SCAN_HW, &il->status);
  2245. return ret;
  2246. }
  2247. void
  2248. il3945_post_scan(struct il_priv *il)
  2249. {
  2250. /*
  2251. * Since setting the RXON may have been deferred while
  2252. * performing the scan, fire one off if needed
  2253. */
  2254. if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
  2255. il3945_commit_rxon(il);
  2256. }
  2257. static void
  2258. il3945_bg_restart(struct work_struct *data)
  2259. {
  2260. struct il_priv *il = container_of(data, struct il_priv, restart);
  2261. if (test_bit(S_EXIT_PENDING, &il->status))
  2262. return;
  2263. if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
  2264. mutex_lock(&il->mutex);
  2265. il->is_open = 0;
  2266. mutex_unlock(&il->mutex);
  2267. il3945_down(il);
  2268. ieee80211_restart_hw(il->hw);
  2269. } else {
  2270. il3945_down(il);
  2271. mutex_lock(&il->mutex);
  2272. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2273. mutex_unlock(&il->mutex);
  2274. return;
  2275. }
  2276. __il3945_up(il);
  2277. mutex_unlock(&il->mutex);
  2278. }
  2279. }
  2280. static void
  2281. il3945_bg_rx_replenish(struct work_struct *data)
  2282. {
  2283. struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
  2284. mutex_lock(&il->mutex);
  2285. if (test_bit(S_EXIT_PENDING, &il->status))
  2286. goto out;
  2287. il3945_rx_replenish(il);
  2288. out:
  2289. mutex_unlock(&il->mutex);
  2290. }
  2291. void
  2292. il3945_post_associate(struct il_priv *il)
  2293. {
  2294. int rc = 0;
  2295. struct ieee80211_conf *conf = NULL;
  2296. if (!il->vif || !il->is_open)
  2297. return;
  2298. D_ASSOC("Associated as %d to: %pM\n", il->vif->bss_conf.aid,
  2299. il->active.bssid_addr);
  2300. if (test_bit(S_EXIT_PENDING, &il->status))
  2301. return;
  2302. il_scan_cancel_timeout(il, 200);
  2303. conf = &il->hw->conf;
  2304. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2305. il3945_commit_rxon(il);
  2306. rc = il_send_rxon_timing(il);
  2307. if (rc)
  2308. IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
  2309. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2310. il->staging.assoc_id = cpu_to_le16(il->vif->bss_conf.aid);
  2311. D_ASSOC("assoc id %d beacon interval %d\n", il->vif->bss_conf.aid,
  2312. il->vif->bss_conf.beacon_int);
  2313. if (il->vif->bss_conf.use_short_preamble)
  2314. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2315. else
  2316. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2317. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2318. if (il->vif->bss_conf.use_short_slot)
  2319. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2320. else
  2321. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2322. }
  2323. il3945_commit_rxon(il);
  2324. switch (il->vif->type) {
  2325. case NL80211_IFTYPE_STATION:
  2326. il3945_rate_scale_init(il->hw, IL_AP_ID);
  2327. break;
  2328. case NL80211_IFTYPE_ADHOC:
  2329. il3945_send_beacon_cmd(il);
  2330. break;
  2331. default:
  2332. IL_ERR("%s Should not be called in %d mode\n", __func__,
  2333. il->vif->type);
  2334. break;
  2335. }
  2336. }
  2337. /*****************************************************************************
  2338. *
  2339. * mac80211 entry point functions
  2340. *
  2341. *****************************************************************************/
  2342. #define UCODE_READY_TIMEOUT (2 * HZ)
  2343. static int
  2344. il3945_mac_start(struct ieee80211_hw *hw)
  2345. {
  2346. struct il_priv *il = hw->priv;
  2347. int ret;
  2348. /* we should be verifying the device is ready to be opened */
  2349. mutex_lock(&il->mutex);
  2350. D_MAC80211("enter\n");
  2351. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2352. * ucode filename and max sizes are card-specific. */
  2353. if (!il->ucode_code.len) {
  2354. ret = il3945_read_ucode(il);
  2355. if (ret) {
  2356. IL_ERR("Could not read microcode: %d\n", ret);
  2357. mutex_unlock(&il->mutex);
  2358. goto out_release_irq;
  2359. }
  2360. }
  2361. ret = __il3945_up(il);
  2362. mutex_unlock(&il->mutex);
  2363. if (ret)
  2364. goto out_release_irq;
  2365. D_INFO("Start UP work.\n");
  2366. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2367. * mac80211 will not be run successfully. */
  2368. ret = wait_event_timeout(il->wait_command_queue,
  2369. test_bit(S_READY, &il->status),
  2370. UCODE_READY_TIMEOUT);
  2371. if (!ret) {
  2372. if (!test_bit(S_READY, &il->status)) {
  2373. IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
  2374. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2375. ret = -ETIMEDOUT;
  2376. goto out_release_irq;
  2377. }
  2378. }
  2379. /* ucode is running and will send rfkill notifications,
  2380. * no need to poll the killswitch state anymore */
  2381. cancel_delayed_work(&il->_3945.rfkill_poll);
  2382. il->is_open = 1;
  2383. D_MAC80211("leave\n");
  2384. return 0;
  2385. out_release_irq:
  2386. il->is_open = 0;
  2387. D_MAC80211("leave - failed\n");
  2388. return ret;
  2389. }
  2390. static void
  2391. il3945_mac_stop(struct ieee80211_hw *hw)
  2392. {
  2393. struct il_priv *il = hw->priv;
  2394. D_MAC80211("enter\n");
  2395. if (!il->is_open) {
  2396. D_MAC80211("leave - skip\n");
  2397. return;
  2398. }
  2399. il->is_open = 0;
  2400. il3945_down(il);
  2401. flush_workqueue(il->workqueue);
  2402. /* start polling the killswitch state again */
  2403. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2404. round_jiffies_relative(2 * HZ));
  2405. D_MAC80211("leave\n");
  2406. }
  2407. static void
  2408. il3945_mac_tx(struct ieee80211_hw *hw,
  2409. struct ieee80211_tx_control *control,
  2410. struct sk_buff *skb)
  2411. {
  2412. struct il_priv *il = hw->priv;
  2413. D_MAC80211("enter\n");
  2414. D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2415. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2416. if (il3945_tx_skb(il, control->sta, skb))
  2417. dev_kfree_skb_any(skb);
  2418. D_MAC80211("leave\n");
  2419. }
  2420. void
  2421. il3945_config_ap(struct il_priv *il)
  2422. {
  2423. struct ieee80211_vif *vif = il->vif;
  2424. int rc = 0;
  2425. if (test_bit(S_EXIT_PENDING, &il->status))
  2426. return;
  2427. /* The following should be done only at AP bring up */
  2428. if (!(il_is_associated(il))) {
  2429. /* RXON - unassoc (to set timing command) */
  2430. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2431. il3945_commit_rxon(il);
  2432. /* RXON Timing */
  2433. rc = il_send_rxon_timing(il);
  2434. if (rc)
  2435. IL_WARN("C_RXON_TIMING failed - "
  2436. "Attempting to continue.\n");
  2437. il->staging.assoc_id = 0;
  2438. if (vif->bss_conf.use_short_preamble)
  2439. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2440. else
  2441. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2442. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2443. if (vif->bss_conf.use_short_slot)
  2444. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2445. else
  2446. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2447. }
  2448. /* restore RXON assoc */
  2449. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2450. il3945_commit_rxon(il);
  2451. }
  2452. il3945_send_beacon_cmd(il);
  2453. }
  2454. static int
  2455. il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2456. struct ieee80211_vif *vif, struct ieee80211_sta *sta,
  2457. struct ieee80211_key_conf *key)
  2458. {
  2459. struct il_priv *il = hw->priv;
  2460. int ret = 0;
  2461. u8 sta_id = IL_INVALID_STATION;
  2462. u8 static_key;
  2463. D_MAC80211("enter\n");
  2464. if (il3945_mod_params.sw_crypto) {
  2465. D_MAC80211("leave - hwcrypto disabled\n");
  2466. return -EOPNOTSUPP;
  2467. }
  2468. /*
  2469. * To support IBSS RSN, don't program group keys in IBSS, the
  2470. * hardware will then not attempt to decrypt the frames.
  2471. */
  2472. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2473. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  2474. D_MAC80211("leave - IBSS RSN\n");
  2475. return -EOPNOTSUPP;
  2476. }
  2477. static_key = !il_is_associated(il);
  2478. if (!static_key) {
  2479. sta_id = il_sta_id_or_broadcast(il, sta);
  2480. if (sta_id == IL_INVALID_STATION) {
  2481. D_MAC80211("leave - station not found\n");
  2482. return -EINVAL;
  2483. }
  2484. }
  2485. mutex_lock(&il->mutex);
  2486. il_scan_cancel_timeout(il, 100);
  2487. switch (cmd) {
  2488. case SET_KEY:
  2489. if (static_key)
  2490. ret = il3945_set_static_key(il, key);
  2491. else
  2492. ret = il3945_set_dynamic_key(il, key, sta_id);
  2493. D_MAC80211("enable hwcrypto key\n");
  2494. break;
  2495. case DISABLE_KEY:
  2496. if (static_key)
  2497. ret = il3945_remove_static_key(il);
  2498. else
  2499. ret = il3945_clear_sta_key_info(il, sta_id);
  2500. D_MAC80211("disable hwcrypto key\n");
  2501. break;
  2502. default:
  2503. ret = -EINVAL;
  2504. }
  2505. D_MAC80211("leave ret %d\n", ret);
  2506. mutex_unlock(&il->mutex);
  2507. return ret;
  2508. }
  2509. static int
  2510. il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2511. struct ieee80211_sta *sta)
  2512. {
  2513. struct il_priv *il = hw->priv;
  2514. struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2515. int ret;
  2516. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2517. u8 sta_id;
  2518. mutex_lock(&il->mutex);
  2519. D_INFO("station %pM\n", sta->addr);
  2520. sta_priv->common.sta_id = IL_INVALID_STATION;
  2521. ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
  2522. if (ret) {
  2523. IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
  2524. /* Should we return success if return code is EEXIST ? */
  2525. mutex_unlock(&il->mutex);
  2526. return ret;
  2527. }
  2528. sta_priv->common.sta_id = sta_id;
  2529. /* Initialize rate scaling */
  2530. D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
  2531. il3945_rs_rate_init(il, sta, sta_id);
  2532. mutex_unlock(&il->mutex);
  2533. return 0;
  2534. }
  2535. static void
  2536. il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
  2537. unsigned int *total_flags, u64 multicast)
  2538. {
  2539. struct il_priv *il = hw->priv;
  2540. __le32 filter_or = 0, filter_nand = 0;
  2541. #define CHK(test, flag) do { \
  2542. if (*total_flags & (test)) \
  2543. filter_or |= (flag); \
  2544. else \
  2545. filter_nand |= (flag); \
  2546. } while (0)
  2547. D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
  2548. *total_flags);
  2549. CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
  2550. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
  2551. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2552. #undef CHK
  2553. mutex_lock(&il->mutex);
  2554. il->staging.filter_flags &= ~filter_nand;
  2555. il->staging.filter_flags |= filter_or;
  2556. /*
  2557. * Not committing directly because hardware can perform a scan,
  2558. * but even if hw is ready, committing here breaks for some reason,
  2559. * we'll eventually commit the filter flags change anyway.
  2560. */
  2561. mutex_unlock(&il->mutex);
  2562. /*
  2563. * Receiving all multicast frames is always enabled by the
  2564. * default flags setup in il_connection_init_rx_config()
  2565. * since we currently do not support programming multicast
  2566. * filters into the device.
  2567. */
  2568. *total_flags &=
  2569. FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  2570. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2571. }
  2572. /*****************************************************************************
  2573. *
  2574. * sysfs attributes
  2575. *
  2576. *****************************************************************************/
  2577. #ifdef CONFIG_IWLEGACY_DEBUG
  2578. /*
  2579. * The following adds a new attribute to the sysfs representation
  2580. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2581. * used for controlling the debug level.
  2582. *
  2583. * See the level definitions in iwl for details.
  2584. *
  2585. * The debug_level being managed using sysfs below is a per device debug
  2586. * level that is used instead of the global debug level if it (the per
  2587. * device debug level) is set.
  2588. */
  2589. static ssize_t
  2590. il3945_show_debug_level(struct device *d, struct device_attribute *attr,
  2591. char *buf)
  2592. {
  2593. struct il_priv *il = dev_get_drvdata(d);
  2594. return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
  2595. }
  2596. static ssize_t
  2597. il3945_store_debug_level(struct device *d, struct device_attribute *attr,
  2598. const char *buf, size_t count)
  2599. {
  2600. struct il_priv *il = dev_get_drvdata(d);
  2601. unsigned long val;
  2602. int ret;
  2603. ret = strict_strtoul(buf, 0, &val);
  2604. if (ret)
  2605. IL_INFO("%s is not in hex or decimal form.\n", buf);
  2606. else
  2607. il->debug_level = val;
  2608. return strnlen(buf, count);
  2609. }
  2610. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il3945_show_debug_level,
  2611. il3945_store_debug_level);
  2612. #endif /* CONFIG_IWLEGACY_DEBUG */
  2613. static ssize_t
  2614. il3945_show_temperature(struct device *d, struct device_attribute *attr,
  2615. char *buf)
  2616. {
  2617. struct il_priv *il = dev_get_drvdata(d);
  2618. if (!il_is_alive(il))
  2619. return -EAGAIN;
  2620. return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
  2621. }
  2622. static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL);
  2623. static ssize_t
  2624. il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
  2625. {
  2626. struct il_priv *il = dev_get_drvdata(d);
  2627. return sprintf(buf, "%d\n", il->tx_power_user_lmt);
  2628. }
  2629. static ssize_t
  2630. il3945_store_tx_power(struct device *d, struct device_attribute *attr,
  2631. const char *buf, size_t count)
  2632. {
  2633. struct il_priv *il = dev_get_drvdata(d);
  2634. char *p = (char *)buf;
  2635. u32 val;
  2636. val = simple_strtoul(p, &p, 10);
  2637. if (p == buf)
  2638. IL_INFO(": %s is not in decimal form.\n", buf);
  2639. else
  2640. il3945_hw_reg_set_txpower(il, val);
  2641. return count;
  2642. }
  2643. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power,
  2644. il3945_store_tx_power);
  2645. static ssize_t
  2646. il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
  2647. {
  2648. struct il_priv *il = dev_get_drvdata(d);
  2649. return sprintf(buf, "0x%04X\n", il->active.flags);
  2650. }
  2651. static ssize_t
  2652. il3945_store_flags(struct device *d, struct device_attribute *attr,
  2653. const char *buf, size_t count)
  2654. {
  2655. struct il_priv *il = dev_get_drvdata(d);
  2656. u32 flags = simple_strtoul(buf, NULL, 0);
  2657. mutex_lock(&il->mutex);
  2658. if (le32_to_cpu(il->staging.flags) != flags) {
  2659. /* Cancel any currently running scans... */
  2660. if (il_scan_cancel_timeout(il, 100))
  2661. IL_WARN("Could not cancel scan.\n");
  2662. else {
  2663. D_INFO("Committing rxon.flags = 0x%04X\n", flags);
  2664. il->staging.flags = cpu_to_le32(flags);
  2665. il3945_commit_rxon(il);
  2666. }
  2667. }
  2668. mutex_unlock(&il->mutex);
  2669. return count;
  2670. }
  2671. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags,
  2672. il3945_store_flags);
  2673. static ssize_t
  2674. il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
  2675. char *buf)
  2676. {
  2677. struct il_priv *il = dev_get_drvdata(d);
  2678. return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags));
  2679. }
  2680. static ssize_t
  2681. il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
  2682. const char *buf, size_t count)
  2683. {
  2684. struct il_priv *il = dev_get_drvdata(d);
  2685. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2686. mutex_lock(&il->mutex);
  2687. if (le32_to_cpu(il->staging.filter_flags) != filter_flags) {
  2688. /* Cancel any currently running scans... */
  2689. if (il_scan_cancel_timeout(il, 100))
  2690. IL_WARN("Could not cancel scan.\n");
  2691. else {
  2692. D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
  2693. filter_flags);
  2694. il->staging.filter_flags = cpu_to_le32(filter_flags);
  2695. il3945_commit_rxon(il);
  2696. }
  2697. }
  2698. mutex_unlock(&il->mutex);
  2699. return count;
  2700. }
  2701. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags,
  2702. il3945_store_filter_flags);
  2703. static ssize_t
  2704. il3945_show_measurement(struct device *d, struct device_attribute *attr,
  2705. char *buf)
  2706. {
  2707. struct il_priv *il = dev_get_drvdata(d);
  2708. struct il_spectrum_notification measure_report;
  2709. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2710. u8 *data = (u8 *) &measure_report;
  2711. unsigned long flags;
  2712. spin_lock_irqsave(&il->lock, flags);
  2713. if (!(il->measurement_status & MEASUREMENT_READY)) {
  2714. spin_unlock_irqrestore(&il->lock, flags);
  2715. return 0;
  2716. }
  2717. memcpy(&measure_report, &il->measure_report, size);
  2718. il->measurement_status = 0;
  2719. spin_unlock_irqrestore(&il->lock, flags);
  2720. while (size && PAGE_SIZE - len) {
  2721. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2722. PAGE_SIZE - len, 1);
  2723. len = strlen(buf);
  2724. if (PAGE_SIZE - len)
  2725. buf[len++] = '\n';
  2726. ofs += 16;
  2727. size -= min(size, 16U);
  2728. }
  2729. return len;
  2730. }
  2731. static ssize_t
  2732. il3945_store_measurement(struct device *d, struct device_attribute *attr,
  2733. const char *buf, size_t count)
  2734. {
  2735. struct il_priv *il = dev_get_drvdata(d);
  2736. struct ieee80211_measurement_params params = {
  2737. .channel = le16_to_cpu(il->active.channel),
  2738. .start_time = cpu_to_le64(il->_3945.last_tsf),
  2739. .duration = cpu_to_le16(1),
  2740. };
  2741. u8 type = IL_MEASURE_BASIC;
  2742. u8 buffer[32];
  2743. u8 channel;
  2744. if (count) {
  2745. char *p = buffer;
  2746. strlcpy(buffer, buf, sizeof(buffer));
  2747. channel = simple_strtoul(p, NULL, 0);
  2748. if (channel)
  2749. params.channel = channel;
  2750. p = buffer;
  2751. while (*p && *p != ' ')
  2752. p++;
  2753. if (*p)
  2754. type = simple_strtoul(p + 1, NULL, 0);
  2755. }
  2756. D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
  2757. type, params.channel, buf);
  2758. il3945_get_measurement(il, &params, type);
  2759. return count;
  2760. }
  2761. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, il3945_show_measurement,
  2762. il3945_store_measurement);
  2763. static ssize_t
  2764. il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
  2765. const char *buf, size_t count)
  2766. {
  2767. struct il_priv *il = dev_get_drvdata(d);
  2768. il->retry_rate = simple_strtoul(buf, NULL, 0);
  2769. if (il->retry_rate <= 0)
  2770. il->retry_rate = 1;
  2771. return count;
  2772. }
  2773. static ssize_t
  2774. il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
  2775. char *buf)
  2776. {
  2777. struct il_priv *il = dev_get_drvdata(d);
  2778. return sprintf(buf, "%d", il->retry_rate);
  2779. }
  2780. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate,
  2781. il3945_store_retry_rate);
  2782. static ssize_t
  2783. il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
  2784. {
  2785. /* all this shit doesn't belong into sysfs anyway */
  2786. return 0;
  2787. }
  2788. static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL);
  2789. static ssize_t
  2790. il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
  2791. {
  2792. struct il_priv *il = dev_get_drvdata(d);
  2793. if (!il_is_alive(il))
  2794. return -EAGAIN;
  2795. return sprintf(buf, "%d\n", il3945_mod_params.antenna);
  2796. }
  2797. static ssize_t
  2798. il3945_store_antenna(struct device *d, struct device_attribute *attr,
  2799. const char *buf, size_t count)
  2800. {
  2801. struct il_priv *il __maybe_unused = dev_get_drvdata(d);
  2802. int ant;
  2803. if (count == 0)
  2804. return 0;
  2805. if (sscanf(buf, "%1i", &ant) != 1) {
  2806. D_INFO("not in hex or decimal form.\n");
  2807. return count;
  2808. }
  2809. if (ant >= 0 && ant <= 2) {
  2810. D_INFO("Setting antenna select to %d.\n", ant);
  2811. il3945_mod_params.antenna = (enum il3945_antenna)ant;
  2812. } else
  2813. D_INFO("Bad antenna select value %d.\n", ant);
  2814. return count;
  2815. }
  2816. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna,
  2817. il3945_store_antenna);
  2818. static ssize_t
  2819. il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
  2820. {
  2821. struct il_priv *il = dev_get_drvdata(d);
  2822. if (!il_is_alive(il))
  2823. return -EAGAIN;
  2824. return sprintf(buf, "0x%08x\n", (int)il->status);
  2825. }
  2826. static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL);
  2827. static ssize_t
  2828. il3945_dump_error_log(struct device *d, struct device_attribute *attr,
  2829. const char *buf, size_t count)
  2830. {
  2831. struct il_priv *il = dev_get_drvdata(d);
  2832. char *p = (char *)buf;
  2833. if (p[0] == '1')
  2834. il3945_dump_nic_error_log(il);
  2835. return strnlen(buf, count);
  2836. }
  2837. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, il3945_dump_error_log);
  2838. /*****************************************************************************
  2839. *
  2840. * driver setup and tear down
  2841. *
  2842. *****************************************************************************/
  2843. static void
  2844. il3945_setup_deferred_work(struct il_priv *il)
  2845. {
  2846. il->workqueue = create_singlethread_workqueue(DRV_NAME);
  2847. init_waitqueue_head(&il->wait_command_queue);
  2848. INIT_WORK(&il->restart, il3945_bg_restart);
  2849. INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
  2850. INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
  2851. INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
  2852. INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
  2853. il_setup_scan_deferred_work(il);
  2854. il3945_hw_setup_deferred_work(il);
  2855. init_timer(&il->watchdog);
  2856. il->watchdog.data = (unsigned long)il;
  2857. il->watchdog.function = il_bg_watchdog;
  2858. tasklet_init(&il->irq_tasklet,
  2859. (void (*)(unsigned long))il3945_irq_tasklet,
  2860. (unsigned long)il);
  2861. }
  2862. static void
  2863. il3945_cancel_deferred_work(struct il_priv *il)
  2864. {
  2865. il3945_hw_cancel_deferred_work(il);
  2866. cancel_delayed_work_sync(&il->init_alive_start);
  2867. cancel_delayed_work(&il->alive_start);
  2868. il_cancel_scan_deferred_work(il);
  2869. }
  2870. static struct attribute *il3945_sysfs_entries[] = {
  2871. &dev_attr_antenna.attr,
  2872. &dev_attr_channels.attr,
  2873. &dev_attr_dump_errors.attr,
  2874. &dev_attr_flags.attr,
  2875. &dev_attr_filter_flags.attr,
  2876. &dev_attr_measurement.attr,
  2877. &dev_attr_retry_rate.attr,
  2878. &dev_attr_status.attr,
  2879. &dev_attr_temperature.attr,
  2880. &dev_attr_tx_power.attr,
  2881. #ifdef CONFIG_IWLEGACY_DEBUG
  2882. &dev_attr_debug_level.attr,
  2883. #endif
  2884. NULL
  2885. };
  2886. static struct attribute_group il3945_attribute_group = {
  2887. .name = NULL, /* put in device directory */
  2888. .attrs = il3945_sysfs_entries,
  2889. };
  2890. struct ieee80211_ops il3945_mac_ops = {
  2891. .tx = il3945_mac_tx,
  2892. .start = il3945_mac_start,
  2893. .stop = il3945_mac_stop,
  2894. .add_interface = il_mac_add_interface,
  2895. .remove_interface = il_mac_remove_interface,
  2896. .change_interface = il_mac_change_interface,
  2897. .config = il_mac_config,
  2898. .configure_filter = il3945_configure_filter,
  2899. .set_key = il3945_mac_set_key,
  2900. .conf_tx = il_mac_conf_tx,
  2901. .reset_tsf = il_mac_reset_tsf,
  2902. .bss_info_changed = il_mac_bss_info_changed,
  2903. .hw_scan = il_mac_hw_scan,
  2904. .sta_add = il3945_mac_sta_add,
  2905. .sta_remove = il_mac_sta_remove,
  2906. .tx_last_beacon = il_mac_tx_last_beacon,
  2907. .flush = il_mac_flush,
  2908. };
  2909. static int
  2910. il3945_init_drv(struct il_priv *il)
  2911. {
  2912. int ret;
  2913. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  2914. il->retry_rate = 1;
  2915. il->beacon_skb = NULL;
  2916. spin_lock_init(&il->sta_lock);
  2917. spin_lock_init(&il->hcmd_lock);
  2918. INIT_LIST_HEAD(&il->free_frames);
  2919. mutex_init(&il->mutex);
  2920. il->ieee_channels = NULL;
  2921. il->ieee_rates = NULL;
  2922. il->band = IEEE80211_BAND_2GHZ;
  2923. il->iw_mode = NL80211_IFTYPE_STATION;
  2924. il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
  2925. /* initialize force reset */
  2926. il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
  2927. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  2928. IL_WARN("Unsupported EEPROM version: 0x%04X\n",
  2929. eeprom->version);
  2930. ret = -EINVAL;
  2931. goto err;
  2932. }
  2933. ret = il_init_channel_map(il);
  2934. if (ret) {
  2935. IL_ERR("initializing regulatory failed: %d\n", ret);
  2936. goto err;
  2937. }
  2938. /* Set up txpower settings in driver for all channels */
  2939. if (il3945_txpower_set_from_eeprom(il)) {
  2940. ret = -EIO;
  2941. goto err_free_channel_map;
  2942. }
  2943. ret = il_init_geos(il);
  2944. if (ret) {
  2945. IL_ERR("initializing geos failed: %d\n", ret);
  2946. goto err_free_channel_map;
  2947. }
  2948. il3945_init_hw_rates(il, il->ieee_rates);
  2949. return 0;
  2950. err_free_channel_map:
  2951. il_free_channel_map(il);
  2952. err:
  2953. return ret;
  2954. }
  2955. #define IL3945_MAX_PROBE_REQUEST 200
  2956. static int
  2957. il3945_setup_mac(struct il_priv *il)
  2958. {
  2959. int ret;
  2960. struct ieee80211_hw *hw = il->hw;
  2961. hw->rate_control_algorithm = "iwl-3945-rs";
  2962. hw->sta_data_size = sizeof(struct il3945_sta_priv);
  2963. hw->vif_data_size = sizeof(struct il_vif_priv);
  2964. /* Tell mac80211 our characteristics */
  2965. hw->flags = IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_SPECTRUM_MGMT |
  2966. IEEE80211_HW_SUPPORTS_PS | IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  2967. hw->wiphy->interface_modes =
  2968. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
  2969. hw->wiphy->flags |=
  2970. WIPHY_FLAG_CUSTOM_REGULATORY | WIPHY_FLAG_DISABLE_BEACON_HINTS |
  2971. WIPHY_FLAG_IBSS_RSN;
  2972. hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
  2973. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  2974. /* we create the 802.11 header and a zero-length SSID element */
  2975. hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
  2976. /* Default value; 4 EDCA QOS priorities */
  2977. hw->queues = 4;
  2978. if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
  2979. il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  2980. &il->bands[IEEE80211_BAND_2GHZ];
  2981. if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
  2982. il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  2983. &il->bands[IEEE80211_BAND_5GHZ];
  2984. il_leds_init(il);
  2985. ret = ieee80211_register_hw(il->hw);
  2986. if (ret) {
  2987. IL_ERR("Failed to register hw (error %d)\n", ret);
  2988. return ret;
  2989. }
  2990. il->mac80211_registered = 1;
  2991. return 0;
  2992. }
  2993. static int
  2994. il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  2995. {
  2996. int err = 0;
  2997. struct il_priv *il;
  2998. struct ieee80211_hw *hw;
  2999. struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
  3000. struct il3945_eeprom *eeprom;
  3001. unsigned long flags;
  3002. /***********************
  3003. * 1. Allocating HW data
  3004. * ********************/
  3005. hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops);
  3006. if (!hw) {
  3007. err = -ENOMEM;
  3008. goto out;
  3009. }
  3010. il = hw->priv;
  3011. il->hw = hw;
  3012. SET_IEEE80211_DEV(hw, &pdev->dev);
  3013. il->cmd_queue = IL39_CMD_QUEUE_NUM;
  3014. /*
  3015. * Disabling hardware scan means that mac80211 will perform scans
  3016. * "the hard way", rather than using device's scan.
  3017. */
  3018. if (il3945_mod_params.disable_hw_scan) {
  3019. D_INFO("Disabling hw_scan\n");
  3020. il3945_mac_ops.hw_scan = NULL;
  3021. }
  3022. D_INFO("*** LOAD DRIVER ***\n");
  3023. il->cfg = cfg;
  3024. il->ops = &il3945_ops;
  3025. #ifdef CONFIG_IWLEGACY_DEBUGFS
  3026. il->debugfs_ops = &il3945_debugfs_ops;
  3027. #endif
  3028. il->pci_dev = pdev;
  3029. il->inta_mask = CSR_INI_SET_MASK;
  3030. /***************************
  3031. * 2. Initializing PCI bus
  3032. * *************************/
  3033. pci_disable_link_state(pdev,
  3034. PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
  3035. PCIE_LINK_STATE_CLKPM);
  3036. if (pci_enable_device(pdev)) {
  3037. err = -ENODEV;
  3038. goto out_ieee80211_free_hw;
  3039. }
  3040. pci_set_master(pdev);
  3041. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3042. if (!err)
  3043. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3044. if (err) {
  3045. IL_WARN("No suitable DMA available.\n");
  3046. goto out_pci_disable_device;
  3047. }
  3048. pci_set_drvdata(pdev, il);
  3049. err = pci_request_regions(pdev, DRV_NAME);
  3050. if (err)
  3051. goto out_pci_disable_device;
  3052. /***********************
  3053. * 3. Read REV Register
  3054. * ********************/
  3055. il->hw_base = pci_ioremap_bar(pdev, 0);
  3056. if (!il->hw_base) {
  3057. err = -ENODEV;
  3058. goto out_pci_release_regions;
  3059. }
  3060. D_INFO("pci_resource_len = 0x%08llx\n",
  3061. (unsigned long long)pci_resource_len(pdev, 0));
  3062. D_INFO("pci_resource_base = %p\n", il->hw_base);
  3063. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3064. * PCI Tx retries from interfering with C3 CPU state */
  3065. pci_write_config_byte(pdev, 0x41, 0x00);
  3066. /* these spin locks will be used in apm_init and EEPROM access
  3067. * we should init now
  3068. */
  3069. spin_lock_init(&il->reg_lock);
  3070. spin_lock_init(&il->lock);
  3071. /*
  3072. * stop and reset the on-board processor just in case it is in a
  3073. * strange state ... like being left stranded by a primary kernel
  3074. * and this is now the kdump kernel trying to start up
  3075. */
  3076. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3077. /***********************
  3078. * 4. Read EEPROM
  3079. * ********************/
  3080. /* Read the EEPROM */
  3081. err = il_eeprom_init(il);
  3082. if (err) {
  3083. IL_ERR("Unable to init EEPROM\n");
  3084. goto out_iounmap;
  3085. }
  3086. /* MAC Address location in EEPROM same for 3945/4965 */
  3087. eeprom = (struct il3945_eeprom *)il->eeprom;
  3088. D_INFO("MAC address: %pM\n", eeprom->mac_address);
  3089. SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
  3090. /***********************
  3091. * 5. Setup HW Constants
  3092. * ********************/
  3093. /* Device-specific setup */
  3094. if (il3945_hw_set_hw_params(il)) {
  3095. IL_ERR("failed to set hw settings\n");
  3096. goto out_eeprom_free;
  3097. }
  3098. /***********************
  3099. * 6. Setup il
  3100. * ********************/
  3101. err = il3945_init_drv(il);
  3102. if (err) {
  3103. IL_ERR("initializing driver failed\n");
  3104. goto out_unset_hw_params;
  3105. }
  3106. IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
  3107. /***********************
  3108. * 7. Setup Services
  3109. * ********************/
  3110. spin_lock_irqsave(&il->lock, flags);
  3111. il_disable_interrupts(il);
  3112. spin_unlock_irqrestore(&il->lock, flags);
  3113. pci_enable_msi(il->pci_dev);
  3114. err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
  3115. if (err) {
  3116. IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
  3117. goto out_disable_msi;
  3118. }
  3119. err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
  3120. if (err) {
  3121. IL_ERR("failed to create sysfs device attributes\n");
  3122. goto out_release_irq;
  3123. }
  3124. il_set_rxon_channel(il, &il->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3125. il3945_setup_deferred_work(il);
  3126. il3945_setup_handlers(il);
  3127. il_power_initialize(il);
  3128. /*********************************
  3129. * 8. Setup and Register mac80211
  3130. * *******************************/
  3131. il_enable_interrupts(il);
  3132. err = il3945_setup_mac(il);
  3133. if (err)
  3134. goto out_remove_sysfs;
  3135. err = il_dbgfs_register(il, DRV_NAME);
  3136. if (err)
  3137. IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
  3138. err);
  3139. /* Start monitoring the killswitch */
  3140. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
  3141. return 0;
  3142. out_remove_sysfs:
  3143. destroy_workqueue(il->workqueue);
  3144. il->workqueue = NULL;
  3145. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3146. out_release_irq:
  3147. free_irq(il->pci_dev->irq, il);
  3148. out_disable_msi:
  3149. pci_disable_msi(il->pci_dev);
  3150. il_free_geos(il);
  3151. il_free_channel_map(il);
  3152. out_unset_hw_params:
  3153. il3945_unset_hw_params(il);
  3154. out_eeprom_free:
  3155. il_eeprom_free(il);
  3156. out_iounmap:
  3157. iounmap(il->hw_base);
  3158. out_pci_release_regions:
  3159. pci_release_regions(pdev);
  3160. out_pci_disable_device:
  3161. pci_set_drvdata(pdev, NULL);
  3162. pci_disable_device(pdev);
  3163. out_ieee80211_free_hw:
  3164. ieee80211_free_hw(il->hw);
  3165. out:
  3166. return err;
  3167. }
  3168. static void
  3169. il3945_pci_remove(struct pci_dev *pdev)
  3170. {
  3171. struct il_priv *il = pci_get_drvdata(pdev);
  3172. unsigned long flags;
  3173. if (!il)
  3174. return;
  3175. D_INFO("*** UNLOAD DRIVER ***\n");
  3176. il_dbgfs_unregister(il);
  3177. set_bit(S_EXIT_PENDING, &il->status);
  3178. il_leds_exit(il);
  3179. if (il->mac80211_registered) {
  3180. ieee80211_unregister_hw(il->hw);
  3181. il->mac80211_registered = 0;
  3182. } else {
  3183. il3945_down(il);
  3184. }
  3185. /*
  3186. * Make sure device is reset to low power before unloading driver.
  3187. * This may be redundant with il_down(), but there are paths to
  3188. * run il_down() without calling apm_ops.stop(), and there are
  3189. * paths to avoid running il_down() at all before leaving driver.
  3190. * This (inexpensive) call *makes sure* device is reset.
  3191. */
  3192. il_apm_stop(il);
  3193. /* make sure we flush any pending irq or
  3194. * tasklet for the driver
  3195. */
  3196. spin_lock_irqsave(&il->lock, flags);
  3197. il_disable_interrupts(il);
  3198. spin_unlock_irqrestore(&il->lock, flags);
  3199. il3945_synchronize_irq(il);
  3200. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3201. cancel_delayed_work_sync(&il->_3945.rfkill_poll);
  3202. il3945_dealloc_ucode_pci(il);
  3203. if (il->rxq.bd)
  3204. il3945_rx_queue_free(il, &il->rxq);
  3205. il3945_hw_txq_ctx_free(il);
  3206. il3945_unset_hw_params(il);
  3207. /*netif_stop_queue(dev); */
  3208. flush_workqueue(il->workqueue);
  3209. /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
  3210. * il->workqueue... so we can't take down the workqueue
  3211. * until now... */
  3212. destroy_workqueue(il->workqueue);
  3213. il->workqueue = NULL;
  3214. free_irq(pdev->irq, il);
  3215. pci_disable_msi(pdev);
  3216. iounmap(il->hw_base);
  3217. pci_release_regions(pdev);
  3218. pci_disable_device(pdev);
  3219. pci_set_drvdata(pdev, NULL);
  3220. il_free_channel_map(il);
  3221. il_free_geos(il);
  3222. kfree(il->scan_cmd);
  3223. if (il->beacon_skb)
  3224. dev_kfree_skb(il->beacon_skb);
  3225. ieee80211_free_hw(il->hw);
  3226. }
  3227. /*****************************************************************************
  3228. *
  3229. * driver and module entry point
  3230. *
  3231. *****************************************************************************/
  3232. static struct pci_driver il3945_driver = {
  3233. .name = DRV_NAME,
  3234. .id_table = il3945_hw_card_ids,
  3235. .probe = il3945_pci_probe,
  3236. .remove = il3945_pci_remove,
  3237. .driver.pm = IL_LEGACY_PM_OPS,
  3238. };
  3239. static int __init
  3240. il3945_init(void)
  3241. {
  3242. int ret;
  3243. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3244. pr_info(DRV_COPYRIGHT "\n");
  3245. ret = il3945_rate_control_register();
  3246. if (ret) {
  3247. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3248. return ret;
  3249. }
  3250. ret = pci_register_driver(&il3945_driver);
  3251. if (ret) {
  3252. pr_err("Unable to initialize PCI module\n");
  3253. goto error_register;
  3254. }
  3255. return ret;
  3256. error_register:
  3257. il3945_rate_control_unregister();
  3258. return ret;
  3259. }
  3260. static void __exit
  3261. il3945_exit(void)
  3262. {
  3263. pci_unregister_driver(&il3945_driver);
  3264. il3945_rate_control_unregister();
  3265. }
  3266. MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
  3267. module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO);
  3268. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3269. module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO);
  3270. MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
  3271. module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
  3272. S_IRUGO);
  3273. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
  3274. #ifdef CONFIG_IWLEGACY_DEBUG
  3275. module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
  3276. MODULE_PARM_DESC(debug, "debug output mask");
  3277. #endif
  3278. module_param_named(fw_restart, il3945_mod_params.restart_fw, int, S_IRUGO);
  3279. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3280. module_exit(il3945_exit);
  3281. module_init(il3945_init);