nouveau_drm.c 20 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <core/device.h>
  28. #include <core/client.h>
  29. #include <core/gpuobj.h>
  30. #include <core/class.h>
  31. #include <engine/device.h>
  32. #include <engine/disp.h>
  33. #include <subdev/vm.h>
  34. #include "nouveau_drm.h"
  35. #include "nouveau_dma.h"
  36. #include "nouveau_ttm.h"
  37. #include "nouveau_gem.h"
  38. #include "nouveau_agp.h"
  39. #include "nouveau_vga.h"
  40. #include "nouveau_pm.h"
  41. #include "nouveau_acpi.h"
  42. #include "nouveau_bios.h"
  43. #include "nouveau_ioctl.h"
  44. #include "nouveau_abi16.h"
  45. #include "nouveau_fbcon.h"
  46. #include "nouveau_fence.h"
  47. #include "nouveau_debugfs.h"
  48. MODULE_PARM_DESC(config, "option string to pass to driver core");
  49. static char *nouveau_config;
  50. module_param_named(config, nouveau_config, charp, 0400);
  51. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  52. static char *nouveau_debug;
  53. module_param_named(debug, nouveau_debug, charp, 0400);
  54. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  55. static int nouveau_noaccel = 0;
  56. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  57. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  58. "0 = disabled, 1 = enabled, 2 = headless)");
  59. int nouveau_modeset = -1;
  60. module_param_named(modeset, nouveau_modeset, int, 0400);
  61. static struct drm_driver driver;
  62. static int
  63. nouveau_drm_vblank_handler(struct nouveau_eventh *event, int head)
  64. {
  65. struct nouveau_drm *drm =
  66. container_of(event, struct nouveau_drm, vblank[head]);
  67. drm_handle_vblank(drm->dev, head);
  68. return NVKM_EVENT_KEEP;
  69. }
  70. static int
  71. nouveau_drm_vblank_enable(struct drm_device *dev, int head)
  72. {
  73. struct nouveau_drm *drm = nouveau_drm(dev);
  74. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  75. if (WARN_ON_ONCE(head > ARRAY_SIZE(drm->vblank)))
  76. return -EIO;
  77. WARN_ON_ONCE(drm->vblank[head].func);
  78. drm->vblank[head].func = nouveau_drm_vblank_handler;
  79. nouveau_event_get(pdisp->vblank, head, &drm->vblank[head]);
  80. return 0;
  81. }
  82. static void
  83. nouveau_drm_vblank_disable(struct drm_device *dev, int head)
  84. {
  85. struct nouveau_drm *drm = nouveau_drm(dev);
  86. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  87. if (drm->vblank[head].func)
  88. nouveau_event_put(pdisp->vblank, head, &drm->vblank[head]);
  89. else
  90. WARN_ON_ONCE(1);
  91. drm->vblank[head].func = NULL;
  92. }
  93. static u64
  94. nouveau_name(struct pci_dev *pdev)
  95. {
  96. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  97. name |= pdev->bus->number << 16;
  98. name |= PCI_SLOT(pdev->devfn) << 8;
  99. return name | PCI_FUNC(pdev->devfn);
  100. }
  101. static int
  102. nouveau_cli_create(struct pci_dev *pdev, const char *name,
  103. int size, void **pcli)
  104. {
  105. struct nouveau_cli *cli;
  106. int ret;
  107. *pcli = NULL;
  108. ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  109. nouveau_debug, size, pcli);
  110. cli = *pcli;
  111. if (ret) {
  112. if (cli)
  113. nouveau_client_destroy(&cli->base);
  114. *pcli = NULL;
  115. return ret;
  116. }
  117. mutex_init(&cli->mutex);
  118. return 0;
  119. }
  120. static void
  121. nouveau_cli_destroy(struct nouveau_cli *cli)
  122. {
  123. struct nouveau_object *client = nv_object(cli);
  124. nouveau_vm_ref(NULL, &cli->base.vm, NULL);
  125. nouveau_client_fini(&cli->base, false);
  126. atomic_set(&client->refcount, 1);
  127. nouveau_object_ref(NULL, &client);
  128. }
  129. static void
  130. nouveau_accel_fini(struct nouveau_drm *drm)
  131. {
  132. nouveau_gpuobj_ref(NULL, &drm->notify);
  133. nouveau_channel_del(&drm->channel);
  134. nouveau_channel_del(&drm->cechan);
  135. if (drm->fence)
  136. nouveau_fence(drm)->dtor(drm);
  137. }
  138. static void
  139. nouveau_accel_init(struct nouveau_drm *drm)
  140. {
  141. struct nouveau_device *device = nv_device(drm->device);
  142. struct nouveau_object *object;
  143. u32 arg0, arg1;
  144. int ret;
  145. if (nouveau_noaccel)
  146. return;
  147. /* initialise synchronisation routines */
  148. if (device->card_type < NV_10) ret = nv04_fence_create(drm);
  149. else if (device->chipset < 0x17) ret = nv10_fence_create(drm);
  150. else if (device->card_type < NV_50) ret = nv17_fence_create(drm);
  151. else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
  152. else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
  153. else ret = nvc0_fence_create(drm);
  154. if (ret) {
  155. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  156. nouveau_accel_fini(drm);
  157. return;
  158. }
  159. if (device->card_type >= NV_E0) {
  160. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  161. NVDRM_CHAN + 1,
  162. NVE0_CHANNEL_IND_ENGINE_CE0 |
  163. NVE0_CHANNEL_IND_ENGINE_CE1, 0,
  164. &drm->cechan);
  165. if (ret)
  166. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  167. arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
  168. arg1 = 1;
  169. } else {
  170. arg0 = NvDmaFB;
  171. arg1 = NvDmaTT;
  172. }
  173. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
  174. arg0, arg1, &drm->channel);
  175. if (ret) {
  176. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  177. nouveau_accel_fini(drm);
  178. return;
  179. }
  180. if (device->card_type < NV_C0) {
  181. ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
  182. &drm->notify);
  183. if (ret) {
  184. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  185. nouveau_accel_fini(drm);
  186. return;
  187. }
  188. ret = nouveau_object_new(nv_object(drm),
  189. drm->channel->handle, NvNotify0,
  190. 0x003d, &(struct nv_dma_class) {
  191. .flags = NV_DMA_TARGET_VRAM |
  192. NV_DMA_ACCESS_RDWR,
  193. .start = drm->notify->addr,
  194. .limit = drm->notify->addr + 31
  195. }, sizeof(struct nv_dma_class),
  196. &object);
  197. if (ret) {
  198. nouveau_accel_fini(drm);
  199. return;
  200. }
  201. }
  202. nouveau_bo_move_init(drm);
  203. }
  204. static int nouveau_drm_probe(struct pci_dev *pdev,
  205. const struct pci_device_id *pent)
  206. {
  207. struct nouveau_device *device;
  208. struct apertures_struct *aper;
  209. bool boot = false;
  210. int ret;
  211. /* remove conflicting drivers (vesafb, efifb etc) */
  212. aper = alloc_apertures(3);
  213. if (!aper)
  214. return -ENOMEM;
  215. aper->ranges[0].base = pci_resource_start(pdev, 1);
  216. aper->ranges[0].size = pci_resource_len(pdev, 1);
  217. aper->count = 1;
  218. if (pci_resource_len(pdev, 2)) {
  219. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  220. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  221. aper->count++;
  222. }
  223. if (pci_resource_len(pdev, 3)) {
  224. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  225. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  226. aper->count++;
  227. }
  228. #ifdef CONFIG_X86
  229. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  230. #endif
  231. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  232. kfree(aper);
  233. ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  234. nouveau_config, nouveau_debug, &device);
  235. if (ret)
  236. return ret;
  237. pci_set_master(pdev);
  238. ret = drm_get_pci_dev(pdev, pent, &driver);
  239. if (ret) {
  240. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  241. return ret;
  242. }
  243. return 0;
  244. }
  245. static struct lock_class_key drm_client_lock_class_key;
  246. static int
  247. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  248. {
  249. struct pci_dev *pdev = dev->pdev;
  250. struct nouveau_device *device;
  251. struct nouveau_drm *drm;
  252. int ret;
  253. ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
  254. if (ret)
  255. return ret;
  256. lockdep_set_class(&drm->client.mutex, &drm_client_lock_class_key);
  257. dev->dev_private = drm;
  258. drm->dev = dev;
  259. INIT_LIST_HEAD(&drm->clients);
  260. spin_lock_init(&drm->tile.lock);
  261. /* make sure AGP controller is in a consistent state before we
  262. * (possibly) execute vbios init tables (see nouveau_agp.h)
  263. */
  264. if (drm_pci_device_is_agp(dev) && dev->agp) {
  265. /* dummy device object, doesn't init anything, but allows
  266. * agp code access to registers
  267. */
  268. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
  269. NVDRM_DEVICE, 0x0080,
  270. &(struct nv_device_class) {
  271. .device = ~0,
  272. .disable =
  273. ~(NV_DEVICE_DISABLE_MMIO |
  274. NV_DEVICE_DISABLE_IDENTIFY),
  275. .debug0 = ~0,
  276. }, sizeof(struct nv_device_class),
  277. &drm->device);
  278. if (ret)
  279. goto fail_device;
  280. nouveau_agp_reset(drm);
  281. nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
  282. }
  283. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
  284. 0x0080, &(struct nv_device_class) {
  285. .device = ~0,
  286. .disable = 0,
  287. .debug0 = 0,
  288. }, sizeof(struct nv_device_class),
  289. &drm->device);
  290. if (ret)
  291. goto fail_device;
  292. /* workaround an odd issue on nvc1 by disabling the device's
  293. * nosnoop capability. hopefully won't cause issues until a
  294. * better fix is found - assuming there is one...
  295. */
  296. device = nv_device(drm->device);
  297. if (nv_device(drm->device)->chipset == 0xc1)
  298. nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
  299. nouveau_vga_init(drm);
  300. nouveau_agp_init(drm);
  301. if (device->card_type >= NV_50) {
  302. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  303. 0x1000, &drm->client.base.vm);
  304. if (ret)
  305. goto fail_device;
  306. }
  307. ret = nouveau_ttm_init(drm);
  308. if (ret)
  309. goto fail_ttm;
  310. ret = nouveau_bios_init(dev);
  311. if (ret)
  312. goto fail_bios;
  313. ret = nouveau_display_create(dev);
  314. if (ret)
  315. goto fail_dispctor;
  316. if (dev->mode_config.num_crtc) {
  317. ret = nouveau_display_init(dev);
  318. if (ret)
  319. goto fail_dispinit;
  320. }
  321. nouveau_pm_init(dev);
  322. nouveau_accel_init(drm);
  323. nouveau_fbcon_init(dev);
  324. return 0;
  325. fail_dispinit:
  326. nouveau_display_destroy(dev);
  327. fail_dispctor:
  328. nouveau_bios_takedown(dev);
  329. fail_bios:
  330. nouveau_ttm_fini(drm);
  331. fail_ttm:
  332. nouveau_agp_fini(drm);
  333. nouveau_vga_fini(drm);
  334. fail_device:
  335. nouveau_cli_destroy(&drm->client);
  336. return ret;
  337. }
  338. static int
  339. nouveau_drm_unload(struct drm_device *dev)
  340. {
  341. struct nouveau_drm *drm = nouveau_drm(dev);
  342. nouveau_fbcon_fini(dev);
  343. nouveau_accel_fini(drm);
  344. nouveau_pm_fini(dev);
  345. if (dev->mode_config.num_crtc)
  346. nouveau_display_fini(dev);
  347. nouveau_display_destroy(dev);
  348. nouveau_bios_takedown(dev);
  349. nouveau_ttm_fini(drm);
  350. nouveau_agp_fini(drm);
  351. nouveau_vga_fini(drm);
  352. nouveau_cli_destroy(&drm->client);
  353. return 0;
  354. }
  355. static void
  356. nouveau_drm_remove(struct pci_dev *pdev)
  357. {
  358. struct drm_device *dev = pci_get_drvdata(pdev);
  359. struct nouveau_drm *drm = nouveau_drm(dev);
  360. struct nouveau_object *device;
  361. device = drm->client.base.device;
  362. drm_put_dev(dev);
  363. nouveau_object_ref(NULL, &device);
  364. nouveau_object_debug();
  365. }
  366. static int
  367. nouveau_do_suspend(struct drm_device *dev)
  368. {
  369. struct nouveau_drm *drm = nouveau_drm(dev);
  370. struct nouveau_cli *cli;
  371. int ret;
  372. if (dev->mode_config.num_crtc) {
  373. NV_INFO(drm, "suspending fbcon...\n");
  374. nouveau_fbcon_set_suspend(dev, 1);
  375. NV_INFO(drm, "suspending display...\n");
  376. ret = nouveau_display_suspend(dev);
  377. if (ret)
  378. return ret;
  379. }
  380. NV_INFO(drm, "evicting buffers...\n");
  381. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  382. if (drm->fence && nouveau_fence(drm)->suspend) {
  383. if (!nouveau_fence(drm)->suspend(drm))
  384. return -ENOMEM;
  385. }
  386. NV_INFO(drm, "suspending client object trees...\n");
  387. list_for_each_entry(cli, &drm->clients, head) {
  388. ret = nouveau_client_fini(&cli->base, true);
  389. if (ret)
  390. goto fail_client;
  391. }
  392. ret = nouveau_client_fini(&drm->client.base, true);
  393. if (ret)
  394. goto fail_client;
  395. nouveau_agp_fini(drm);
  396. return 0;
  397. fail_client:
  398. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  399. nouveau_client_init(&cli->base);
  400. }
  401. if (dev->mode_config.num_crtc) {
  402. NV_INFO(drm, "resuming display...\n");
  403. nouveau_display_resume(dev);
  404. }
  405. return ret;
  406. }
  407. int nouveau_pmops_suspend(struct device *dev)
  408. {
  409. struct pci_dev *pdev = to_pci_dev(dev);
  410. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  411. int ret;
  412. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  413. return 0;
  414. ret = nouveau_do_suspend(drm_dev);
  415. if (ret)
  416. return ret;
  417. pci_save_state(pdev);
  418. pci_disable_device(pdev);
  419. pci_set_power_state(pdev, PCI_D3hot);
  420. return 0;
  421. }
  422. static int
  423. nouveau_do_resume(struct drm_device *dev)
  424. {
  425. struct nouveau_drm *drm = nouveau_drm(dev);
  426. struct nouveau_cli *cli;
  427. NV_INFO(drm, "re-enabling device...\n");
  428. nouveau_agp_reset(drm);
  429. NV_INFO(drm, "resuming client object trees...\n");
  430. nouveau_client_init(&drm->client.base);
  431. nouveau_agp_init(drm);
  432. list_for_each_entry(cli, &drm->clients, head) {
  433. nouveau_client_init(&cli->base);
  434. }
  435. if (drm->fence && nouveau_fence(drm)->resume)
  436. nouveau_fence(drm)->resume(drm);
  437. nouveau_run_vbios_init(dev);
  438. nouveau_pm_resume(dev);
  439. if (dev->mode_config.num_crtc) {
  440. NV_INFO(drm, "resuming display...\n");
  441. nouveau_display_resume(dev);
  442. }
  443. return 0;
  444. }
  445. int nouveau_pmops_resume(struct device *dev)
  446. {
  447. struct pci_dev *pdev = to_pci_dev(dev);
  448. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  449. int ret;
  450. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  451. return 0;
  452. pci_set_power_state(pdev, PCI_D0);
  453. pci_restore_state(pdev);
  454. ret = pci_enable_device(pdev);
  455. if (ret)
  456. return ret;
  457. pci_set_master(pdev);
  458. return nouveau_do_resume(drm_dev);
  459. }
  460. static int nouveau_pmops_freeze(struct device *dev)
  461. {
  462. struct pci_dev *pdev = to_pci_dev(dev);
  463. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  464. return nouveau_do_suspend(drm_dev);
  465. }
  466. static int nouveau_pmops_thaw(struct device *dev)
  467. {
  468. struct pci_dev *pdev = to_pci_dev(dev);
  469. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  470. return nouveau_do_resume(drm_dev);
  471. }
  472. static int
  473. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  474. {
  475. struct pci_dev *pdev = dev->pdev;
  476. struct nouveau_drm *drm = nouveau_drm(dev);
  477. struct nouveau_cli *cli;
  478. char name[32], tmpname[TASK_COMM_LEN];
  479. int ret;
  480. get_task_comm(tmpname, current);
  481. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  482. ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
  483. if (ret)
  484. return ret;
  485. if (nv_device(drm->device)->card_type >= NV_50) {
  486. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  487. 0x1000, &cli->base.vm);
  488. if (ret) {
  489. nouveau_cli_destroy(cli);
  490. return ret;
  491. }
  492. }
  493. fpriv->driver_priv = cli;
  494. mutex_lock(&drm->client.mutex);
  495. list_add(&cli->head, &drm->clients);
  496. mutex_unlock(&drm->client.mutex);
  497. return 0;
  498. }
  499. static void
  500. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  501. {
  502. struct nouveau_cli *cli = nouveau_cli(fpriv);
  503. struct nouveau_drm *drm = nouveau_drm(dev);
  504. if (cli->abi16)
  505. nouveau_abi16_fini(cli->abi16);
  506. mutex_lock(&drm->client.mutex);
  507. list_del(&cli->head);
  508. mutex_unlock(&drm->client.mutex);
  509. }
  510. static void
  511. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  512. {
  513. struct nouveau_cli *cli = nouveau_cli(fpriv);
  514. nouveau_cli_destroy(cli);
  515. }
  516. static struct drm_ioctl_desc
  517. nouveau_ioctls[] = {
  518. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
  519. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  520. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
  521. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
  522. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  523. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  524. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
  525. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
  526. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
  527. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
  528. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
  529. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
  530. };
  531. static const struct file_operations
  532. nouveau_driver_fops = {
  533. .owner = THIS_MODULE,
  534. .open = drm_open,
  535. .release = drm_release,
  536. .unlocked_ioctl = drm_ioctl,
  537. .mmap = nouveau_ttm_mmap,
  538. .poll = drm_poll,
  539. .fasync = drm_fasync,
  540. .read = drm_read,
  541. #if defined(CONFIG_COMPAT)
  542. .compat_ioctl = nouveau_compat_ioctl,
  543. #endif
  544. .llseek = noop_llseek,
  545. };
  546. static struct drm_driver
  547. driver = {
  548. .driver_features =
  549. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  550. DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME,
  551. .load = nouveau_drm_load,
  552. .unload = nouveau_drm_unload,
  553. .open = nouveau_drm_open,
  554. .preclose = nouveau_drm_preclose,
  555. .postclose = nouveau_drm_postclose,
  556. .lastclose = nouveau_vga_lastclose,
  557. #if defined(CONFIG_DEBUG_FS)
  558. .debugfs_init = nouveau_debugfs_init,
  559. .debugfs_cleanup = nouveau_debugfs_takedown,
  560. #endif
  561. .get_vblank_counter = drm_vblank_count,
  562. .enable_vblank = nouveau_drm_vblank_enable,
  563. .disable_vblank = nouveau_drm_vblank_disable,
  564. .ioctls = nouveau_ioctls,
  565. .fops = &nouveau_driver_fops,
  566. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  567. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  568. .gem_prime_export = drm_gem_prime_export,
  569. .gem_prime_import = drm_gem_prime_import,
  570. .gem_prime_pin = nouveau_gem_prime_pin,
  571. .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
  572. .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
  573. .gem_prime_vmap = nouveau_gem_prime_vmap,
  574. .gem_prime_vunmap = nouveau_gem_prime_vunmap,
  575. .gem_init_object = nouveau_gem_object_new,
  576. .gem_free_object = nouveau_gem_object_del,
  577. .gem_open_object = nouveau_gem_object_open,
  578. .gem_close_object = nouveau_gem_object_close,
  579. .dumb_create = nouveau_display_dumb_create,
  580. .dumb_map_offset = nouveau_display_dumb_map_offset,
  581. .dumb_destroy = nouveau_display_dumb_destroy,
  582. .name = DRIVER_NAME,
  583. .desc = DRIVER_DESC,
  584. #ifdef GIT_REVISION
  585. .date = GIT_REVISION,
  586. #else
  587. .date = DRIVER_DATE,
  588. #endif
  589. .major = DRIVER_MAJOR,
  590. .minor = DRIVER_MINOR,
  591. .patchlevel = DRIVER_PATCHLEVEL,
  592. };
  593. static struct pci_device_id
  594. nouveau_drm_pci_table[] = {
  595. {
  596. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  597. .class = PCI_BASE_CLASS_DISPLAY << 16,
  598. .class_mask = 0xff << 16,
  599. },
  600. {
  601. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  602. .class = PCI_BASE_CLASS_DISPLAY << 16,
  603. .class_mask = 0xff << 16,
  604. },
  605. {}
  606. };
  607. static const struct dev_pm_ops nouveau_pm_ops = {
  608. .suspend = nouveau_pmops_suspend,
  609. .resume = nouveau_pmops_resume,
  610. .freeze = nouveau_pmops_freeze,
  611. .thaw = nouveau_pmops_thaw,
  612. .poweroff = nouveau_pmops_freeze,
  613. .restore = nouveau_pmops_resume,
  614. };
  615. static struct pci_driver
  616. nouveau_drm_pci_driver = {
  617. .name = "nouveau",
  618. .id_table = nouveau_drm_pci_table,
  619. .probe = nouveau_drm_probe,
  620. .remove = nouveau_drm_remove,
  621. .driver.pm = &nouveau_pm_ops,
  622. };
  623. static int __init
  624. nouveau_drm_init(void)
  625. {
  626. driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
  627. if (nouveau_modeset == -1) {
  628. #ifdef CONFIG_VGA_CONSOLE
  629. if (vgacon_text_force())
  630. nouveau_modeset = 0;
  631. #endif
  632. }
  633. if (!nouveau_modeset)
  634. return 0;
  635. nouveau_register_dsm_handler();
  636. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  637. }
  638. static void __exit
  639. nouveau_drm_exit(void)
  640. {
  641. if (!nouveau_modeset)
  642. return;
  643. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  644. nouveau_unregister_dsm_handler();
  645. }
  646. module_init(nouveau_drm_init);
  647. module_exit(nouveau_drm_exit);
  648. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  649. MODULE_AUTHOR(DRIVER_AUTHOR);
  650. MODULE_DESCRIPTION(DRIVER_DESC);
  651. MODULE_LICENSE("GPL and additional rights");