bnx2x_dcb.c 73 KB

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  1. /* bnx2x_dcb.c: Broadcom Everest network driver.
  2. *
  3. * Copyright 2009-2013 Broadcom Corporation
  4. *
  5. * Unless you and Broadcom execute a separate written software license
  6. * agreement governing use of this software, this software is licensed to you
  7. * under the terms of the GNU General Public License version 2, available
  8. * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
  9. *
  10. * Notwithstanding the above, under no circumstances may you combine this
  11. * software in any way with any other Broadcom software provided under a
  12. * license other than the GPL, without Broadcom's express prior written
  13. * consent.
  14. *
  15. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  16. * Written by: Dmitry Kravkov
  17. *
  18. */
  19. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  20. #include <linux/netdevice.h>
  21. #include <linux/types.h>
  22. #include <linux/errno.h>
  23. #include <linux/rtnetlink.h>
  24. #include <net/dcbnl.h>
  25. #include "bnx2x.h"
  26. #include "bnx2x_cmn.h"
  27. #include "bnx2x_dcb.h"
  28. /* forward declarations of dcbx related functions */
  29. static int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp);
  30. static void bnx2x_pfc_set_pfc(struct bnx2x *bp);
  31. static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp);
  32. static int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp);
  33. static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
  34. u32 *set_configuration_ets_pg,
  35. u32 *pri_pg_tbl);
  36. static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
  37. u32 *pg_pri_orginal_spread,
  38. struct pg_help_data *help_data);
  39. static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
  40. struct pg_help_data *help_data,
  41. struct dcbx_ets_feature *ets,
  42. u32 *pg_pri_orginal_spread);
  43. static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
  44. struct cos_help_data *cos_data,
  45. u32 *pg_pri_orginal_spread,
  46. struct dcbx_ets_feature *ets);
  47. static void bnx2x_dcbx_fw_struct(struct bnx2x *bp,
  48. struct bnx2x_func_tx_start_params*);
  49. /* helpers: read/write len bytes from addr into buff by REG_RD/REG_WR */
  50. static void bnx2x_read_data(struct bnx2x *bp, u32 *buff,
  51. u32 addr, u32 len)
  52. {
  53. int i;
  54. for (i = 0; i < len; i += 4, buff++)
  55. *buff = REG_RD(bp, addr + i);
  56. }
  57. static void bnx2x_write_data(struct bnx2x *bp, u32 *buff,
  58. u32 addr, u32 len)
  59. {
  60. int i;
  61. for (i = 0; i < len; i += 4, buff++)
  62. REG_WR(bp, addr + i, *buff);
  63. }
  64. static void bnx2x_pfc_set(struct bnx2x *bp)
  65. {
  66. struct bnx2x_nig_brb_pfc_port_params pfc_params = {0};
  67. u32 pri_bit, val = 0;
  68. int i;
  69. pfc_params.num_of_rx_cos_priority_mask =
  70. bp->dcbx_port_params.ets.num_of_cos;
  71. /* Tx COS configuration */
  72. for (i = 0; i < bp->dcbx_port_params.ets.num_of_cos; i++)
  73. /*
  74. * We configure only the pauseable bits (non pauseable aren't
  75. * configured at all) it's done to avoid false pauses from
  76. * network
  77. */
  78. pfc_params.rx_cos_priority_mask[i] =
  79. bp->dcbx_port_params.ets.cos_params[i].pri_bitmask
  80. & DCBX_PFC_PRI_PAUSE_MASK(bp);
  81. /*
  82. * Rx COS configuration
  83. * Changing PFC RX configuration .
  84. * In RX COS0 will always be configured to lossless and COS1 to lossy
  85. */
  86. for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) {
  87. pri_bit = 1 << i;
  88. if (!(pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp)))
  89. val |= 1 << (i * 4);
  90. }
  91. pfc_params.pkt_priority_to_cos = val;
  92. /* RX COS0 */
  93. pfc_params.llfc_low_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp);
  94. /* RX COS1 */
  95. pfc_params.llfc_high_priority_classes = 0;
  96. bnx2x_acquire_phy_lock(bp);
  97. bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED;
  98. bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params);
  99. bnx2x_release_phy_lock(bp);
  100. }
  101. static void bnx2x_pfc_clear(struct bnx2x *bp)
  102. {
  103. struct bnx2x_nig_brb_pfc_port_params nig_params = {0};
  104. nig_params.pause_enable = 1;
  105. bnx2x_acquire_phy_lock(bp);
  106. bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED;
  107. bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params);
  108. bnx2x_release_phy_lock(bp);
  109. }
  110. static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp,
  111. struct dcbx_features *features,
  112. u32 error)
  113. {
  114. u8 i = 0;
  115. DP(NETIF_MSG_LINK, "local_mib.error %x\n", error);
  116. /* PG */
  117. DP(NETIF_MSG_LINK,
  118. "local_mib.features.ets.enabled %x\n", features->ets.enabled);
  119. for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++)
  120. DP(NETIF_MSG_LINK,
  121. "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i,
  122. DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i));
  123. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++)
  124. DP(NETIF_MSG_LINK,
  125. "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i,
  126. DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i));
  127. /* pfc */
  128. DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pri_en_bitmap %x\n",
  129. features->pfc.pri_en_bitmap);
  130. DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pfc_caps %x\n",
  131. features->pfc.pfc_caps);
  132. DP(BNX2X_MSG_DCB, "dcbx_features.pfc.enabled %x\n",
  133. features->pfc.enabled);
  134. DP(BNX2X_MSG_DCB, "dcbx_features.app.default_pri %x\n",
  135. features->app.default_pri);
  136. DP(BNX2X_MSG_DCB, "dcbx_features.app.tc_supported %x\n",
  137. features->app.tc_supported);
  138. DP(BNX2X_MSG_DCB, "dcbx_features.app.enabled %x\n",
  139. features->app.enabled);
  140. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  141. DP(BNX2X_MSG_DCB,
  142. "dcbx_features.app.app_pri_tbl[%x].app_id %x\n",
  143. i, features->app.app_pri_tbl[i].app_id);
  144. DP(BNX2X_MSG_DCB,
  145. "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n",
  146. i, features->app.app_pri_tbl[i].pri_bitmap);
  147. DP(BNX2X_MSG_DCB,
  148. "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n",
  149. i, features->app.app_pri_tbl[i].appBitfield);
  150. }
  151. }
  152. static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp,
  153. u8 pri_bitmap,
  154. u8 llfc_traf_type)
  155. {
  156. u32 pri = MAX_PFC_PRIORITIES;
  157. u32 index = MAX_PFC_PRIORITIES - 1;
  158. u32 pri_mask;
  159. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  160. /* Choose the highest priority */
  161. while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) {
  162. pri_mask = 1 << index;
  163. if (GET_FLAGS(pri_bitmap, pri_mask))
  164. pri = index ;
  165. index--;
  166. }
  167. if (pri < MAX_PFC_PRIORITIES)
  168. ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri);
  169. }
  170. static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp,
  171. struct dcbx_app_priority_feature *app,
  172. u32 error) {
  173. u8 index;
  174. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  175. if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR))
  176. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_ERROR\n");
  177. if (GET_FLAGS(error, DCBX_LOCAL_APP_MISMATCH))
  178. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_MISMATCH\n");
  179. if (GET_FLAGS(error, DCBX_REMOTE_APP_TLV_NOT_FOUND))
  180. DP(BNX2X_MSG_DCB, "DCBX_REMOTE_APP_TLV_NOT_FOUND\n");
  181. if (app->enabled &&
  182. !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR | DCBX_LOCAL_APP_MISMATCH |
  183. DCBX_REMOTE_APP_TLV_NOT_FOUND)) {
  184. bp->dcbx_port_params.app.enabled = true;
  185. for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
  186. ttp[index] = 0;
  187. if (app->default_pri < MAX_PFC_PRIORITIES)
  188. ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri;
  189. for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) {
  190. struct dcbx_app_priority_entry *entry =
  191. app->app_pri_tbl;
  192. if (GET_FLAGS(entry[index].appBitfield,
  193. DCBX_APP_SF_ETH_TYPE) &&
  194. ETH_TYPE_FCOE == entry[index].app_id)
  195. bnx2x_dcbx_get_ap_priority(bp,
  196. entry[index].pri_bitmap,
  197. LLFC_TRAFFIC_TYPE_FCOE);
  198. if (GET_FLAGS(entry[index].appBitfield,
  199. DCBX_APP_SF_PORT) &&
  200. TCP_PORT_ISCSI == entry[index].app_id)
  201. bnx2x_dcbx_get_ap_priority(bp,
  202. entry[index].pri_bitmap,
  203. LLFC_TRAFFIC_TYPE_ISCSI);
  204. }
  205. } else {
  206. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_DISABLED\n");
  207. bp->dcbx_port_params.app.enabled = false;
  208. for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
  209. ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY;
  210. }
  211. }
  212. static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp,
  213. struct dcbx_ets_feature *ets,
  214. u32 error) {
  215. int i = 0;
  216. u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0};
  217. struct pg_help_data pg_help_data;
  218. struct bnx2x_dcbx_cos_params *cos_params =
  219. bp->dcbx_port_params.ets.cos_params;
  220. memset(&pg_help_data, 0, sizeof(struct pg_help_data));
  221. if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR))
  222. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ERROR\n");
  223. if (GET_FLAGS(error, DCBX_REMOTE_ETS_TLV_NOT_FOUND))
  224. DP(BNX2X_MSG_DCB, "DCBX_REMOTE_ETS_TLV_NOT_FOUND\n");
  225. /* Clean up old settings of ets on COS */
  226. for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params) ; i++) {
  227. cos_params[i].pauseable = false;
  228. cos_params[i].strict = BNX2X_DCBX_STRICT_INVALID;
  229. cos_params[i].bw_tbl = DCBX_INVALID_COS_BW;
  230. cos_params[i].pri_bitmask = 0;
  231. }
  232. if (bp->dcbx_port_params.app.enabled && ets->enabled &&
  233. !GET_FLAGS(error,
  234. DCBX_LOCAL_ETS_ERROR | DCBX_REMOTE_ETS_TLV_NOT_FOUND)) {
  235. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ENABLE\n");
  236. bp->dcbx_port_params.ets.enabled = true;
  237. bnx2x_dcbx_get_ets_pri_pg_tbl(bp,
  238. pg_pri_orginal_spread,
  239. ets->pri_pg_tbl);
  240. bnx2x_dcbx_get_num_pg_traf_type(bp,
  241. pg_pri_orginal_spread,
  242. &pg_help_data);
  243. bnx2x_dcbx_fill_cos_params(bp, &pg_help_data,
  244. ets, pg_pri_orginal_spread);
  245. } else {
  246. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_DISABLED\n");
  247. bp->dcbx_port_params.ets.enabled = false;
  248. ets->pri_pg_tbl[0] = 0;
  249. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++)
  250. DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1);
  251. }
  252. }
  253. static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp,
  254. struct dcbx_pfc_feature *pfc, u32 error)
  255. {
  256. if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR))
  257. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_ERROR\n");
  258. if (GET_FLAGS(error, DCBX_REMOTE_PFC_TLV_NOT_FOUND))
  259. DP(BNX2X_MSG_DCB, "DCBX_REMOTE_PFC_TLV_NOT_FOUND\n");
  260. if (bp->dcbx_port_params.app.enabled && pfc->enabled &&
  261. !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR | DCBX_LOCAL_PFC_MISMATCH |
  262. DCBX_REMOTE_PFC_TLV_NOT_FOUND)) {
  263. bp->dcbx_port_params.pfc.enabled = true;
  264. bp->dcbx_port_params.pfc.priority_non_pauseable_mask =
  265. ~(pfc->pri_en_bitmap);
  266. } else {
  267. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_DISABLED\n");
  268. bp->dcbx_port_params.pfc.enabled = false;
  269. bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0;
  270. }
  271. }
  272. /* maps unmapped priorities to to the same COS as L2 */
  273. static void bnx2x_dcbx_map_nw(struct bnx2x *bp)
  274. {
  275. int i;
  276. u32 unmapped = (1 << MAX_PFC_PRIORITIES) - 1; /* all ones */
  277. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  278. u32 nw_prio = 1 << ttp[LLFC_TRAFFIC_TYPE_NW];
  279. struct bnx2x_dcbx_cos_params *cos_params =
  280. bp->dcbx_port_params.ets.cos_params;
  281. /* get unmapped priorities by clearing mapped bits */
  282. for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
  283. unmapped &= ~(1 << ttp[i]);
  284. /* find cos for nw prio and extend it with unmapped */
  285. for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params); i++) {
  286. if (cos_params[i].pri_bitmask & nw_prio) {
  287. /* extend the bitmask with unmapped */
  288. DP(BNX2X_MSG_DCB,
  289. "cos %d extended with 0x%08x\n", i, unmapped);
  290. cos_params[i].pri_bitmask |= unmapped;
  291. break;
  292. }
  293. }
  294. }
  295. static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp,
  296. struct dcbx_features *features,
  297. u32 error)
  298. {
  299. bnx2x_dcbx_get_ap_feature(bp, &features->app, error);
  300. bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error);
  301. bnx2x_dcbx_get_ets_feature(bp, &features->ets, error);
  302. bnx2x_dcbx_map_nw(bp);
  303. }
  304. #define DCBX_LOCAL_MIB_MAX_TRY_READ (100)
  305. static int bnx2x_dcbx_read_mib(struct bnx2x *bp,
  306. u32 *base_mib_addr,
  307. u32 offset,
  308. int read_mib_type)
  309. {
  310. int max_try_read = 0;
  311. u32 mib_size, prefix_seq_num, suffix_seq_num;
  312. struct lldp_remote_mib *remote_mib ;
  313. struct lldp_local_mib *local_mib;
  314. switch (read_mib_type) {
  315. case DCBX_READ_LOCAL_MIB:
  316. mib_size = sizeof(struct lldp_local_mib);
  317. break;
  318. case DCBX_READ_REMOTE_MIB:
  319. mib_size = sizeof(struct lldp_remote_mib);
  320. break;
  321. default:
  322. return 1; /*error*/
  323. }
  324. offset += BP_PORT(bp) * mib_size;
  325. do {
  326. bnx2x_read_data(bp, base_mib_addr, offset, mib_size);
  327. max_try_read++;
  328. switch (read_mib_type) {
  329. case DCBX_READ_LOCAL_MIB:
  330. local_mib = (struct lldp_local_mib *) base_mib_addr;
  331. prefix_seq_num = local_mib->prefix_seq_num;
  332. suffix_seq_num = local_mib->suffix_seq_num;
  333. break;
  334. case DCBX_READ_REMOTE_MIB:
  335. remote_mib = (struct lldp_remote_mib *) base_mib_addr;
  336. prefix_seq_num = remote_mib->prefix_seq_num;
  337. suffix_seq_num = remote_mib->suffix_seq_num;
  338. break;
  339. default:
  340. return 1; /*error*/
  341. }
  342. } while ((prefix_seq_num != suffix_seq_num) &&
  343. (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ));
  344. if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) {
  345. BNX2X_ERR("MIB could not be read\n");
  346. return 1;
  347. }
  348. return 0;
  349. }
  350. static void bnx2x_pfc_set_pfc(struct bnx2x *bp)
  351. {
  352. int mfw_configured = SHMEM2_HAS(bp, drv_flags) &&
  353. GET_FLAGS(SHMEM2_RD(bp, drv_flags),
  354. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED);
  355. if (bp->dcbx_port_params.pfc.enabled &&
  356. (!(bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) || mfw_configured))
  357. /*
  358. * 1. Fills up common PFC structures if required
  359. * 2. Configure NIG, MAC and BRB via the elink
  360. */
  361. bnx2x_pfc_set(bp);
  362. else
  363. bnx2x_pfc_clear(bp);
  364. }
  365. static int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp)
  366. {
  367. struct bnx2x_func_state_params func_params = {NULL};
  368. func_params.f_obj = &bp->func_obj;
  369. func_params.cmd = BNX2X_F_CMD_TX_STOP;
  370. DP(BNX2X_MSG_DCB, "STOP TRAFFIC\n");
  371. return bnx2x_func_state_change(bp, &func_params);
  372. }
  373. static int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp)
  374. {
  375. struct bnx2x_func_state_params func_params = {NULL};
  376. struct bnx2x_func_tx_start_params *tx_params =
  377. &func_params.params.tx_start;
  378. func_params.f_obj = &bp->func_obj;
  379. func_params.cmd = BNX2X_F_CMD_TX_START;
  380. bnx2x_dcbx_fw_struct(bp, tx_params);
  381. DP(BNX2X_MSG_DCB, "START TRAFFIC\n");
  382. return bnx2x_func_state_change(bp, &func_params);
  383. }
  384. static void bnx2x_dcbx_2cos_limit_update_ets_config(struct bnx2x *bp)
  385. {
  386. struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
  387. int rc = 0;
  388. if (ets->num_of_cos == 0 || ets->num_of_cos > DCBX_COS_MAX_NUM_E2) {
  389. BNX2X_ERR("Illegal number of COSes %d\n", ets->num_of_cos);
  390. return;
  391. }
  392. /* valid COS entries */
  393. if (ets->num_of_cos == 1) /* no ETS */
  394. return;
  395. /* sanity */
  396. if (((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[0].strict) &&
  397. (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) ||
  398. ((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[1].strict) &&
  399. (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) {
  400. BNX2X_ERR("all COS should have at least bw_limit or strict"
  401. "ets->cos_params[0].strict= %x"
  402. "ets->cos_params[0].bw_tbl= %x"
  403. "ets->cos_params[1].strict= %x"
  404. "ets->cos_params[1].bw_tbl= %x",
  405. ets->cos_params[0].strict,
  406. ets->cos_params[0].bw_tbl,
  407. ets->cos_params[1].strict,
  408. ets->cos_params[1].bw_tbl);
  409. return;
  410. }
  411. /* If we join a group and there is bw_tbl and strict then bw rules */
  412. if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) &&
  413. (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) {
  414. u32 bw_tbl_0 = ets->cos_params[0].bw_tbl;
  415. u32 bw_tbl_1 = ets->cos_params[1].bw_tbl;
  416. /* Do not allow 0-100 configuration
  417. * since PBF does not support it
  418. * force 1-99 instead
  419. */
  420. if (bw_tbl_0 == 0) {
  421. bw_tbl_0 = 1;
  422. bw_tbl_1 = 99;
  423. } else if (bw_tbl_1 == 0) {
  424. bw_tbl_1 = 1;
  425. bw_tbl_0 = 99;
  426. }
  427. bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1);
  428. } else {
  429. if (ets->cos_params[0].strict == BNX2X_DCBX_STRICT_COS_HIGHEST)
  430. rc = bnx2x_ets_strict(&bp->link_params, 0);
  431. else if (ets->cos_params[1].strict
  432. == BNX2X_DCBX_STRICT_COS_HIGHEST)
  433. rc = bnx2x_ets_strict(&bp->link_params, 1);
  434. if (rc)
  435. BNX2X_ERR("update_ets_params failed\n");
  436. }
  437. }
  438. /*
  439. * In E3B0 the configuration may have more than 2 COS.
  440. */
  441. static void bnx2x_dcbx_update_ets_config(struct bnx2x *bp)
  442. {
  443. struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
  444. struct bnx2x_ets_params ets_params = { 0 };
  445. u8 i;
  446. ets_params.num_of_cos = ets->num_of_cos;
  447. for (i = 0; i < ets->num_of_cos; i++) {
  448. /* COS is SP */
  449. if (ets->cos_params[i].strict != BNX2X_DCBX_STRICT_INVALID) {
  450. if (ets->cos_params[i].bw_tbl != DCBX_INVALID_COS_BW) {
  451. BNX2X_ERR("COS can't be not BW and not SP\n");
  452. return;
  453. }
  454. ets_params.cos[i].state = bnx2x_cos_state_strict;
  455. ets_params.cos[i].params.sp_params.pri =
  456. ets->cos_params[i].strict;
  457. } else { /* COS is BW */
  458. if (ets->cos_params[i].bw_tbl == DCBX_INVALID_COS_BW) {
  459. BNX2X_ERR("COS can't be not BW and not SP\n");
  460. return;
  461. }
  462. ets_params.cos[i].state = bnx2x_cos_state_bw;
  463. ets_params.cos[i].params.bw_params.bw =
  464. (u8)ets->cos_params[i].bw_tbl;
  465. }
  466. }
  467. /* Configure the ETS in HW */
  468. if (bnx2x_ets_e3b0_config(&bp->link_params, &bp->link_vars,
  469. &ets_params)) {
  470. BNX2X_ERR("bnx2x_ets_e3b0_config failed\n");
  471. bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
  472. }
  473. }
  474. static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp)
  475. {
  476. int mfw_configured = SHMEM2_HAS(bp, drv_flags) &&
  477. GET_FLAGS(SHMEM2_RD(bp, drv_flags),
  478. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED);
  479. bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
  480. if (!bp->dcbx_port_params.ets.enabled ||
  481. ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured))
  482. return;
  483. if (CHIP_IS_E3B0(bp))
  484. bnx2x_dcbx_update_ets_config(bp);
  485. else
  486. bnx2x_dcbx_2cos_limit_update_ets_config(bp);
  487. }
  488. #ifdef BCM_DCBNL
  489. static int bnx2x_dcbx_read_shmem_remote_mib(struct bnx2x *bp)
  490. {
  491. struct lldp_remote_mib remote_mib = {0};
  492. u32 dcbx_remote_mib_offset = SHMEM2_RD(bp, dcbx_remote_mib_offset);
  493. int rc;
  494. DP(BNX2X_MSG_DCB, "dcbx_remote_mib_offset 0x%x\n",
  495. dcbx_remote_mib_offset);
  496. if (SHMEM_DCBX_REMOTE_MIB_NONE == dcbx_remote_mib_offset) {
  497. BNX2X_ERR("FW doesn't support dcbx_remote_mib_offset\n");
  498. return -EINVAL;
  499. }
  500. rc = bnx2x_dcbx_read_mib(bp, (u32 *)&remote_mib, dcbx_remote_mib_offset,
  501. DCBX_READ_REMOTE_MIB);
  502. if (rc) {
  503. BNX2X_ERR("Failed to read remote mib from FW\n");
  504. return rc;
  505. }
  506. /* save features and flags */
  507. bp->dcbx_remote_feat = remote_mib.features;
  508. bp->dcbx_remote_flags = remote_mib.flags;
  509. return 0;
  510. }
  511. #endif
  512. static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp)
  513. {
  514. struct lldp_local_mib local_mib = {0};
  515. u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset);
  516. int rc;
  517. DP(BNX2X_MSG_DCB, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset);
  518. if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) {
  519. BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n");
  520. return -EINVAL;
  521. }
  522. rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset,
  523. DCBX_READ_LOCAL_MIB);
  524. if (rc) {
  525. BNX2X_ERR("Failed to read local mib from FW\n");
  526. return rc;
  527. }
  528. /* save features and error */
  529. bp->dcbx_local_feat = local_mib.features;
  530. bp->dcbx_error = local_mib.error;
  531. return 0;
  532. }
  533. #ifdef BCM_DCBNL
  534. static inline
  535. u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent)
  536. {
  537. u8 pri;
  538. /* Choose the highest priority */
  539. for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--)
  540. if (ent->pri_bitmap & (1 << pri))
  541. break;
  542. return pri;
  543. }
  544. static inline
  545. u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent)
  546. {
  547. return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) ==
  548. DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM :
  549. DCB_APP_IDTYPE_ETHTYPE;
  550. }
  551. int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall)
  552. {
  553. int i, err = 0;
  554. for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) {
  555. struct dcbx_app_priority_entry *ent =
  556. &bp->dcbx_local_feat.app.app_pri_tbl[i];
  557. if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
  558. u8 up = bnx2x_dcbx_dcbnl_app_up(ent);
  559. /* avoid invalid user-priority */
  560. if (up) {
  561. struct dcb_app app;
  562. app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
  563. app.protocol = ent->app_id;
  564. app.priority = delall ? 0 : up;
  565. err = dcb_setapp(bp->dev, &app);
  566. }
  567. }
  568. }
  569. return err;
  570. }
  571. #endif
  572. static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp)
  573. {
  574. u8 prio, cos;
  575. for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) {
  576. for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) {
  577. if (bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask
  578. & (1 << prio)) {
  579. bp->prio_to_cos[prio] = cos;
  580. DP(BNX2X_MSG_DCB,
  581. "tx_mapping %d --> %d\n", prio, cos);
  582. }
  583. }
  584. }
  585. /* setup tc must be called under rtnl lock, but we can't take it here
  586. * as we are handling an attention on a work queue which must be
  587. * flushed at some rtnl-locked contexts (e.g. if down)
  588. */
  589. if (!test_and_set_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state))
  590. schedule_delayed_work(&bp->sp_rtnl_task, 0);
  591. }
  592. void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state)
  593. {
  594. switch (state) {
  595. case BNX2X_DCBX_STATE_NEG_RECEIVED:
  596. {
  597. DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_NEG_RECEIVED\n");
  598. #ifdef BCM_DCBNL
  599. /**
  600. * Delete app tlvs from dcbnl before reading new
  601. * negotiation results
  602. */
  603. bnx2x_dcbnl_update_applist(bp, true);
  604. /* Read remote mib if dcbx is in the FW */
  605. if (bnx2x_dcbx_read_shmem_remote_mib(bp))
  606. return;
  607. #endif
  608. /* Read neg results if dcbx is in the FW */
  609. if (bnx2x_dcbx_read_shmem_neg_results(bp))
  610. return;
  611. bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  612. bp->dcbx_error);
  613. bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  614. bp->dcbx_error);
  615. /* mark DCBX result for PMF migration */
  616. bnx2x_update_drv_flags(bp,
  617. 1 << DRV_FLAGS_DCB_CONFIGURED,
  618. 1);
  619. #ifdef BCM_DCBNL
  620. /*
  621. * Add new app tlvs to dcbnl
  622. */
  623. bnx2x_dcbnl_update_applist(bp, false);
  624. #endif
  625. /*
  626. * reconfigure the netdevice with the results of the new
  627. * dcbx negotiation.
  628. */
  629. bnx2x_dcbx_update_tc_mapping(bp);
  630. /*
  631. * allow other functions to update their netdevices
  632. * accordingly
  633. */
  634. if (IS_MF(bp))
  635. bnx2x_link_sync_notify(bp);
  636. bnx2x_dcbx_stop_hw_tx(bp);
  637. return;
  638. }
  639. case BNX2X_DCBX_STATE_TX_PAUSED:
  640. DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_PAUSED\n");
  641. bnx2x_pfc_set_pfc(bp);
  642. bnx2x_dcbx_update_ets_params(bp);
  643. /* ets may affect cmng configuration: reinit it in hw */
  644. bnx2x_set_local_cmng(bp);
  645. bnx2x_dcbx_resume_hw_tx(bp);
  646. return;
  647. case BNX2X_DCBX_STATE_TX_RELEASED:
  648. DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_RELEASED\n");
  649. bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0);
  650. #ifdef BCM_DCBNL
  651. /*
  652. * Send a notification for the new negotiated parameters
  653. */
  654. dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0);
  655. #endif
  656. return;
  657. default:
  658. BNX2X_ERR("Unknown DCBX_STATE\n");
  659. }
  660. }
  661. #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \
  662. BP_PORT(bp)*sizeof(struct lldp_admin_mib))
  663. static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp,
  664. u32 dcbx_lldp_params_offset)
  665. {
  666. struct lldp_admin_mib admin_mib;
  667. u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0;
  668. u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp);
  669. /*shortcuts*/
  670. struct dcbx_features *af = &admin_mib.features;
  671. struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params;
  672. memset(&admin_mib, 0, sizeof(struct lldp_admin_mib));
  673. /* Read the data first */
  674. bnx2x_read_data(bp, (u32 *)&admin_mib, offset,
  675. sizeof(struct lldp_admin_mib));
  676. if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON)
  677. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
  678. else
  679. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
  680. if (dp->overwrite_settings == BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE) {
  681. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK);
  682. admin_mib.ver_cfg_flags |=
  683. (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) &
  684. DCBX_CEE_VERSION_MASK;
  685. af->ets.enabled = (u8)dp->admin_ets_enable;
  686. af->pfc.enabled = (u8)dp->admin_pfc_enable;
  687. /* FOR IEEE dp->admin_tc_supported_tx_enable */
  688. if (dp->admin_ets_configuration_tx_enable)
  689. SET_FLAGS(admin_mib.ver_cfg_flags,
  690. DCBX_ETS_CONFIG_TX_ENABLED);
  691. else
  692. RESET_FLAGS(admin_mib.ver_cfg_flags,
  693. DCBX_ETS_CONFIG_TX_ENABLED);
  694. /* For IEEE admin_ets_recommendation_tx_enable */
  695. if (dp->admin_pfc_tx_enable)
  696. SET_FLAGS(admin_mib.ver_cfg_flags,
  697. DCBX_PFC_CONFIG_TX_ENABLED);
  698. else
  699. RESET_FLAGS(admin_mib.ver_cfg_flags,
  700. DCBX_PFC_CONFIG_TX_ENABLED);
  701. if (dp->admin_application_priority_tx_enable)
  702. SET_FLAGS(admin_mib.ver_cfg_flags,
  703. DCBX_APP_CONFIG_TX_ENABLED);
  704. else
  705. RESET_FLAGS(admin_mib.ver_cfg_flags,
  706. DCBX_APP_CONFIG_TX_ENABLED);
  707. if (dp->admin_ets_willing)
  708. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
  709. else
  710. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
  711. /* For IEEE admin_ets_reco_valid */
  712. if (dp->admin_pfc_willing)
  713. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
  714. else
  715. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
  716. if (dp->admin_app_priority_willing)
  717. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
  718. else
  719. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
  720. for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) {
  721. DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i,
  722. (u8)dp->admin_configuration_bw_precentage[i]);
  723. DP(BNX2X_MSG_DCB, "pg_bw_tbl[%d] = %02x\n",
  724. i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i));
  725. }
  726. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
  727. DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i,
  728. (u8)dp->admin_configuration_ets_pg[i]);
  729. DP(BNX2X_MSG_DCB, "pri_pg_tbl[%d] = %02x\n",
  730. i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i));
  731. }
  732. /*For IEEE admin_recommendation_bw_percentage
  733. *For IEEE admin_recommendation_ets_pg */
  734. af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap;
  735. for (i = 0; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) {
  736. if (dp->admin_priority_app_table[i].valid) {
  737. struct bnx2x_admin_priority_app_table *table =
  738. dp->admin_priority_app_table;
  739. if ((ETH_TYPE_FCOE == table[i].app_id) &&
  740. (TRAFFIC_TYPE_ETH == table[i].traffic_type))
  741. traf_type = FCOE_APP_IDX;
  742. else if ((TCP_PORT_ISCSI == table[i].app_id) &&
  743. (TRAFFIC_TYPE_PORT == table[i].traffic_type))
  744. traf_type = ISCSI_APP_IDX;
  745. else
  746. traf_type = other_traf_type++;
  747. af->app.app_pri_tbl[traf_type].app_id =
  748. table[i].app_id;
  749. af->app.app_pri_tbl[traf_type].pri_bitmap =
  750. (u8)(1 << table[i].priority);
  751. af->app.app_pri_tbl[traf_type].appBitfield =
  752. (DCBX_APP_ENTRY_VALID);
  753. af->app.app_pri_tbl[traf_type].appBitfield |=
  754. (TRAFFIC_TYPE_ETH == table[i].traffic_type) ?
  755. DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT;
  756. }
  757. }
  758. af->app.default_pri = (u8)dp->admin_default_priority;
  759. }
  760. /* Write the data. */
  761. bnx2x_write_data(bp, (u32 *)&admin_mib, offset,
  762. sizeof(struct lldp_admin_mib));
  763. }
  764. void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled)
  765. {
  766. if (!CHIP_IS_E1x(bp)) {
  767. bp->dcb_state = dcb_on;
  768. bp->dcbx_enabled = dcbx_enabled;
  769. } else {
  770. bp->dcb_state = false;
  771. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID;
  772. }
  773. DP(BNX2X_MSG_DCB, "DCB state [%s:%s]\n",
  774. dcb_on ? "ON" : "OFF",
  775. dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" :
  776. dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" :
  777. dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ?
  778. "on-chip with negotiation" : "invalid");
  779. }
  780. void bnx2x_dcbx_init_params(struct bnx2x *bp)
  781. {
  782. bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */
  783. bp->dcbx_config_params.admin_ets_willing = 1;
  784. bp->dcbx_config_params.admin_pfc_willing = 1;
  785. bp->dcbx_config_params.overwrite_settings = 1;
  786. bp->dcbx_config_params.admin_ets_enable = 1;
  787. bp->dcbx_config_params.admin_pfc_enable = 1;
  788. bp->dcbx_config_params.admin_tc_supported_tx_enable = 1;
  789. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  790. bp->dcbx_config_params.admin_pfc_tx_enable = 1;
  791. bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
  792. bp->dcbx_config_params.admin_ets_reco_valid = 1;
  793. bp->dcbx_config_params.admin_app_priority_willing = 1;
  794. bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 100;
  795. bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 0;
  796. bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 0;
  797. bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0;
  798. bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0;
  799. bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0;
  800. bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0;
  801. bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0;
  802. bp->dcbx_config_params.admin_configuration_ets_pg[0] = 0;
  803. bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0;
  804. bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0;
  805. bp->dcbx_config_params.admin_configuration_ets_pg[3] = 0;
  806. bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0;
  807. bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0;
  808. bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0;
  809. bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0;
  810. bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 100;
  811. bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 0;
  812. bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 0;
  813. bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0;
  814. bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 0;
  815. bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 0;
  816. bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 0;
  817. bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 0;
  818. bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0;
  819. bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1;
  820. bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2;
  821. bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3;
  822. bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4;
  823. bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5;
  824. bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6;
  825. bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7;
  826. bp->dcbx_config_params.admin_pfc_bitmap = 0x0;
  827. bp->dcbx_config_params.admin_priority_app_table[0].valid = 0;
  828. bp->dcbx_config_params.admin_priority_app_table[1].valid = 0;
  829. bp->dcbx_config_params.admin_priority_app_table[2].valid = 0;
  830. bp->dcbx_config_params.admin_priority_app_table[3].valid = 0;
  831. bp->dcbx_config_params.admin_default_priority = 0;
  832. }
  833. void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem)
  834. {
  835. u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE;
  836. /* only PMF can send ADMIN msg to MFW in old MFW versions */
  837. if ((!bp->port.pmf) && (!(bp->flags & BC_SUPPORTS_DCBX_MSG_NON_PMF)))
  838. return;
  839. if (bp->dcbx_enabled <= 0)
  840. return;
  841. /* validate:
  842. * chip of good for dcbx version,
  843. * dcb is wanted
  844. * shmem2 contains DCBX support fields
  845. */
  846. DP(BNX2X_MSG_DCB, "dcb_state %d bp->port.pmf %d\n",
  847. bp->dcb_state, bp->port.pmf);
  848. if (bp->dcb_state == BNX2X_DCB_STATE_ON &&
  849. SHMEM2_HAS(bp, dcbx_lldp_params_offset)) {
  850. dcbx_lldp_params_offset =
  851. SHMEM2_RD(bp, dcbx_lldp_params_offset);
  852. DP(BNX2X_MSG_DCB, "dcbx_lldp_params_offset 0x%x\n",
  853. dcbx_lldp_params_offset);
  854. bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_DCB_CONFIGURED, 0);
  855. if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) {
  856. /* need HW lock to avoid scenario of two drivers
  857. * writing in parallel to shmem
  858. */
  859. bnx2x_acquire_hw_lock(bp,
  860. HW_LOCK_RESOURCE_DCBX_ADMIN_MIB);
  861. if (update_shmem)
  862. bnx2x_dcbx_admin_mib_updated_params(bp,
  863. dcbx_lldp_params_offset);
  864. /* Let HW start negotiation */
  865. bnx2x_fw_command(bp,
  866. DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0);
  867. /* release HW lock only after MFW acks that it finished
  868. * reading values from shmem
  869. */
  870. bnx2x_release_hw_lock(bp,
  871. HW_LOCK_RESOURCE_DCBX_ADMIN_MIB);
  872. }
  873. }
  874. }
  875. static void
  876. bnx2x_dcbx_print_cos_params(struct bnx2x *bp,
  877. struct bnx2x_func_tx_start_params *pfc_fw_cfg)
  878. {
  879. u8 pri = 0;
  880. u8 cos = 0;
  881. DP(BNX2X_MSG_DCB,
  882. "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version);
  883. DP(BNX2X_MSG_DCB,
  884. "pdev->params.dcbx_port_params.pfc.priority_non_pauseable_mask %x\n",
  885. bp->dcbx_port_params.pfc.priority_non_pauseable_mask);
  886. for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) {
  887. DP(BNX2X_MSG_DCB,
  888. "pdev->params.dcbx_port_params.ets.cos_params[%d].pri_bitmask %x\n",
  889. cos, bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask);
  890. DP(BNX2X_MSG_DCB,
  891. "pdev->params.dcbx_port_params.ets.cos_params[%d].bw_tbl %x\n",
  892. cos, bp->dcbx_port_params.ets.cos_params[cos].bw_tbl);
  893. DP(BNX2X_MSG_DCB,
  894. "pdev->params.dcbx_port_params.ets.cos_params[%d].strict %x\n",
  895. cos, bp->dcbx_port_params.ets.cos_params[cos].strict);
  896. DP(BNX2X_MSG_DCB,
  897. "pdev->params.dcbx_port_params.ets.cos_params[%d].pauseable %x\n",
  898. cos, bp->dcbx_port_params.ets.cos_params[cos].pauseable);
  899. }
  900. for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
  901. DP(BNX2X_MSG_DCB,
  902. "pfc_fw_cfg->traffic_type_to_priority_cos[%d].priority %x\n",
  903. pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority);
  904. DP(BNX2X_MSG_DCB,
  905. "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n",
  906. pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos);
  907. }
  908. }
  909. /* fills help_data according to pg_info */
  910. static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
  911. u32 *pg_pri_orginal_spread,
  912. struct pg_help_data *help_data)
  913. {
  914. bool pg_found = false;
  915. u32 i, traf_type, add_traf_type, add_pg;
  916. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  917. struct pg_entry_help_data *data = help_data->data; /*shortcut*/
  918. /* Set to invalid */
  919. for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
  920. data[i].pg = DCBX_ILLEGAL_PG;
  921. for (add_traf_type = 0;
  922. add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) {
  923. pg_found = false;
  924. if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) {
  925. add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]];
  926. for (traf_type = 0;
  927. traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  928. traf_type++) {
  929. if (data[traf_type].pg == add_pg) {
  930. if (!(data[traf_type].pg_priority &
  931. (1 << ttp[add_traf_type])))
  932. data[traf_type].
  933. num_of_dif_pri++;
  934. data[traf_type].pg_priority |=
  935. (1 << ttp[add_traf_type]);
  936. pg_found = true;
  937. break;
  938. }
  939. }
  940. if (false == pg_found) {
  941. data[help_data->num_of_pg].pg = add_pg;
  942. data[help_data->num_of_pg].pg_priority =
  943. (1 << ttp[add_traf_type]);
  944. data[help_data->num_of_pg].num_of_dif_pri = 1;
  945. help_data->num_of_pg++;
  946. }
  947. }
  948. DP(BNX2X_MSG_DCB,
  949. "add_traf_type %d pg_found %s num_of_pg %d\n",
  950. add_traf_type, (false == pg_found) ? "NO" : "YES",
  951. help_data->num_of_pg);
  952. }
  953. }
  954. static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp,
  955. struct cos_help_data *cos_data,
  956. u32 pri_join_mask)
  957. {
  958. /* Only one priority than only one COS */
  959. cos_data->data[0].pausable =
  960. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  961. cos_data->data[0].pri_join_mask = pri_join_mask;
  962. cos_data->data[0].cos_bw = 100;
  963. cos_data->num_of_cos = 1;
  964. }
  965. static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp,
  966. struct cos_entry_help_data *data,
  967. u8 pg_bw)
  968. {
  969. if (data->cos_bw == DCBX_INVALID_COS_BW)
  970. data->cos_bw = pg_bw;
  971. else
  972. data->cos_bw += pg_bw;
  973. }
  974. static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
  975. struct cos_help_data *cos_data,
  976. u32 *pg_pri_orginal_spread,
  977. struct dcbx_ets_feature *ets)
  978. {
  979. u32 pri_tested = 0;
  980. u8 i = 0;
  981. u8 entry = 0;
  982. u8 pg_entry = 0;
  983. u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  984. cos_data->data[0].pausable = true;
  985. cos_data->data[1].pausable = false;
  986. cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
  987. for (i = 0 ; i < num_of_pri ; i++) {
  988. pri_tested = 1 << bp->dcbx_port_params.
  989. app.traffic_type_priority[i];
  990. if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) {
  991. cos_data->data[1].pri_join_mask |= pri_tested;
  992. entry = 1;
  993. } else {
  994. cos_data->data[0].pri_join_mask |= pri_tested;
  995. entry = 0;
  996. }
  997. pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params.
  998. app.traffic_type_priority[i]];
  999. /* There can be only one strict pg */
  1000. if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES)
  1001. bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry],
  1002. DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry));
  1003. else
  1004. /* If we join a group and one is strict
  1005. * than the bw rules
  1006. */
  1007. cos_data->data[entry].strict =
  1008. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1009. }
  1010. if ((0 == cos_data->data[0].pri_join_mask) &&
  1011. (0 == cos_data->data[1].pri_join_mask))
  1012. BNX2X_ERR("dcbx error: Both groups must have priorities\n");
  1013. }
  1014. #ifndef POWER_OF_2
  1015. #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1))))
  1016. #endif
  1017. static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp,
  1018. struct pg_help_data *pg_help_data,
  1019. struct cos_help_data *cos_data,
  1020. u32 pri_join_mask,
  1021. u8 num_of_dif_pri)
  1022. {
  1023. u8 i = 0;
  1024. u32 pri_tested = 0;
  1025. u32 pri_mask_without_pri = 0;
  1026. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  1027. /*debug*/
  1028. if (num_of_dif_pri == 1) {
  1029. bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask);
  1030. return;
  1031. }
  1032. /* single priority group */
  1033. if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1034. /* If there are both pauseable and non-pauseable priorities,
  1035. * the pauseable priorities go to the first queue and
  1036. * the non-pauseable priorities go to the second queue.
  1037. */
  1038. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1039. /* Pauseable */
  1040. cos_data->data[0].pausable = true;
  1041. /* Non pauseable.*/
  1042. cos_data->data[1].pausable = false;
  1043. if (2 == num_of_dif_pri) {
  1044. cos_data->data[0].cos_bw = 50;
  1045. cos_data->data[1].cos_bw = 50;
  1046. }
  1047. if (3 == num_of_dif_pri) {
  1048. if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp,
  1049. pri_join_mask))) {
  1050. cos_data->data[0].cos_bw = 33;
  1051. cos_data->data[1].cos_bw = 67;
  1052. } else {
  1053. cos_data->data[0].cos_bw = 67;
  1054. cos_data->data[1].cos_bw = 33;
  1055. }
  1056. }
  1057. } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) {
  1058. /* If there are only pauseable priorities,
  1059. * then one/two priorities go to the first queue
  1060. * and one priority goes to the second queue.
  1061. */
  1062. if (2 == num_of_dif_pri) {
  1063. cos_data->data[0].cos_bw = 50;
  1064. cos_data->data[1].cos_bw = 50;
  1065. } else {
  1066. cos_data->data[0].cos_bw = 67;
  1067. cos_data->data[1].cos_bw = 33;
  1068. }
  1069. cos_data->data[1].pausable = true;
  1070. cos_data->data[0].pausable = true;
  1071. /* All priorities except FCOE */
  1072. cos_data->data[0].pri_join_mask = (pri_join_mask &
  1073. ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE])));
  1074. /* Only FCOE priority.*/
  1075. cos_data->data[1].pri_join_mask =
  1076. (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]);
  1077. } else
  1078. /* If there are only non-pauseable priorities,
  1079. * they will all go to the same queue.
  1080. */
  1081. bnx2x_dcbx_ets_disabled_entry_data(bp,
  1082. cos_data, pri_join_mask);
  1083. } else {
  1084. /* priority group which is not BW limited (PG#15):*/
  1085. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1086. /* If there are both pauseable and non-pauseable
  1087. * priorities, the pauseable priorities go to the first
  1088. * queue and the non-pauseable priorities
  1089. * go to the second queue.
  1090. */
  1091. if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) >
  1092. DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) {
  1093. cos_data->data[0].strict =
  1094. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1095. cos_data->data[1].strict =
  1096. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
  1097. BNX2X_DCBX_STRICT_COS_HIGHEST);
  1098. } else {
  1099. cos_data->data[0].strict =
  1100. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
  1101. BNX2X_DCBX_STRICT_COS_HIGHEST);
  1102. cos_data->data[1].strict =
  1103. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1104. }
  1105. /* Pauseable */
  1106. cos_data->data[0].pausable = true;
  1107. /* Non pause-able.*/
  1108. cos_data->data[1].pausable = false;
  1109. } else {
  1110. /* If there are only pauseable priorities or
  1111. * only non-pauseable,* the lower priorities go
  1112. * to the first queue and the higher priorities go
  1113. * to the second queue.
  1114. */
  1115. cos_data->data[0].pausable =
  1116. cos_data->data[1].pausable =
  1117. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1118. for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) {
  1119. pri_tested = 1 << bp->dcbx_port_params.
  1120. app.traffic_type_priority[i];
  1121. /* Remove priority tested */
  1122. pri_mask_without_pri =
  1123. (pri_join_mask & ((u8)(~pri_tested)));
  1124. if (pri_mask_without_pri < pri_tested)
  1125. break;
  1126. }
  1127. if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX)
  1128. BNX2X_ERR("Invalid value for pri_join_mask - could not find a priority\n");
  1129. cos_data->data[0].pri_join_mask = pri_mask_without_pri;
  1130. cos_data->data[1].pri_join_mask = pri_tested;
  1131. /* Both queues are strict priority,
  1132. * and that with the highest priority
  1133. * gets the highest strict priority in the arbiter.
  1134. */
  1135. cos_data->data[0].strict =
  1136. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
  1137. BNX2X_DCBX_STRICT_COS_HIGHEST);
  1138. cos_data->data[1].strict =
  1139. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1140. }
  1141. }
  1142. }
  1143. static void bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
  1144. struct bnx2x *bp,
  1145. struct pg_help_data *pg_help_data,
  1146. struct dcbx_ets_feature *ets,
  1147. struct cos_help_data *cos_data,
  1148. u32 *pg_pri_orginal_spread,
  1149. u32 pri_join_mask,
  1150. u8 num_of_dif_pri)
  1151. {
  1152. u8 i = 0;
  1153. u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 };
  1154. /* If there are both pauseable and non-pauseable priorities,
  1155. * the pauseable priorities go to the first queue and
  1156. * the non-pauseable priorities go to the second queue.
  1157. */
  1158. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1159. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
  1160. pg_help_data->data[0].pg_priority) ||
  1161. IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
  1162. pg_help_data->data[1].pg_priority)) {
  1163. /* If one PG contains both pauseable and
  1164. * non-pauseable priorities then ETS is disabled.
  1165. */
  1166. bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data,
  1167. pg_pri_orginal_spread, ets);
  1168. bp->dcbx_port_params.ets.enabled = false;
  1169. return;
  1170. }
  1171. /* Pauseable */
  1172. cos_data->data[0].pausable = true;
  1173. /* Non pauseable. */
  1174. cos_data->data[1].pausable = false;
  1175. if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp,
  1176. pg_help_data->data[0].pg_priority)) {
  1177. /* 0 is pauseable */
  1178. cos_data->data[0].pri_join_mask =
  1179. pg_help_data->data[0].pg_priority;
  1180. pg[0] = pg_help_data->data[0].pg;
  1181. cos_data->data[1].pri_join_mask =
  1182. pg_help_data->data[1].pg_priority;
  1183. pg[1] = pg_help_data->data[1].pg;
  1184. } else {/* 1 is pauseable */
  1185. cos_data->data[0].pri_join_mask =
  1186. pg_help_data->data[1].pg_priority;
  1187. pg[0] = pg_help_data->data[1].pg;
  1188. cos_data->data[1].pri_join_mask =
  1189. pg_help_data->data[0].pg_priority;
  1190. pg[1] = pg_help_data->data[0].pg;
  1191. }
  1192. } else {
  1193. /* If there are only pauseable priorities or
  1194. * only non-pauseable, each PG goes to a queue.
  1195. */
  1196. cos_data->data[0].pausable = cos_data->data[1].pausable =
  1197. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1198. cos_data->data[0].pri_join_mask =
  1199. pg_help_data->data[0].pg_priority;
  1200. pg[0] = pg_help_data->data[0].pg;
  1201. cos_data->data[1].pri_join_mask =
  1202. pg_help_data->data[1].pg_priority;
  1203. pg[1] = pg_help_data->data[1].pg;
  1204. }
  1205. /* There can be only one strict pg */
  1206. for (i = 0 ; i < ARRAY_SIZE(pg); i++) {
  1207. if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES)
  1208. cos_data->data[i].cos_bw =
  1209. DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]);
  1210. else
  1211. cos_data->data[i].strict =
  1212. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1213. }
  1214. }
  1215. static int bnx2x_dcbx_join_pgs(
  1216. struct bnx2x *bp,
  1217. struct dcbx_ets_feature *ets,
  1218. struct pg_help_data *pg_help_data,
  1219. u8 required_num_of_pg)
  1220. {
  1221. u8 entry_joined = pg_help_data->num_of_pg - 1;
  1222. u8 entry_removed = entry_joined + 1;
  1223. u8 pg_joined = 0;
  1224. if (required_num_of_pg == 0 || ARRAY_SIZE(pg_help_data->data)
  1225. <= pg_help_data->num_of_pg) {
  1226. BNX2X_ERR("required_num_of_pg can't be zero\n");
  1227. return -EINVAL;
  1228. }
  1229. while (required_num_of_pg < pg_help_data->num_of_pg) {
  1230. entry_joined = pg_help_data->num_of_pg - 2;
  1231. entry_removed = entry_joined + 1;
  1232. /* protect index */
  1233. entry_removed %= ARRAY_SIZE(pg_help_data->data);
  1234. pg_help_data->data[entry_joined].pg_priority |=
  1235. pg_help_data->data[entry_removed].pg_priority;
  1236. pg_help_data->data[entry_joined].num_of_dif_pri +=
  1237. pg_help_data->data[entry_removed].num_of_dif_pri;
  1238. if (pg_help_data->data[entry_joined].pg == DCBX_STRICT_PRI_PG ||
  1239. pg_help_data->data[entry_removed].pg == DCBX_STRICT_PRI_PG)
  1240. /* Entries joined strict priority rules */
  1241. pg_help_data->data[entry_joined].pg =
  1242. DCBX_STRICT_PRI_PG;
  1243. else {
  1244. /* Entries can be joined join BW */
  1245. pg_joined = DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1246. pg_help_data->data[entry_joined].pg) +
  1247. DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1248. pg_help_data->data[entry_removed].pg);
  1249. DCBX_PG_BW_SET(ets->pg_bw_tbl,
  1250. pg_help_data->data[entry_joined].pg, pg_joined);
  1251. }
  1252. /* Joined the entries */
  1253. pg_help_data->num_of_pg--;
  1254. }
  1255. return 0;
  1256. }
  1257. static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
  1258. struct bnx2x *bp,
  1259. struct pg_help_data *pg_help_data,
  1260. struct dcbx_ets_feature *ets,
  1261. struct cos_help_data *cos_data,
  1262. u32 *pg_pri_orginal_spread,
  1263. u32 pri_join_mask,
  1264. u8 num_of_dif_pri)
  1265. {
  1266. u8 i = 0;
  1267. u32 pri_tested = 0;
  1268. u8 entry = 0;
  1269. u8 pg_entry = 0;
  1270. bool b_found_strict = false;
  1271. u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  1272. cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
  1273. /* If there are both pauseable and non-pauseable priorities,
  1274. * the pauseable priorities go to the first queue and the
  1275. * non-pauseable priorities go to the second queue.
  1276. */
  1277. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask))
  1278. bnx2x_dcbx_separate_pauseable_from_non(bp,
  1279. cos_data, pg_pri_orginal_spread, ets);
  1280. else {
  1281. /* If two BW-limited PG-s were combined to one queue,
  1282. * the BW is their sum.
  1283. *
  1284. * If there are only pauseable priorities or only non-pauseable,
  1285. * and there are both BW-limited and non-BW-limited PG-s,
  1286. * the BW-limited PG/s go to one queue and the non-BW-limited
  1287. * PG/s go to the second queue.
  1288. *
  1289. * If there are only pauseable priorities or only non-pauseable
  1290. * and all are BW limited, then two priorities go to the first
  1291. * queue and one priority goes to the second queue.
  1292. *
  1293. * We will join this two cases:
  1294. * if one is BW limited it will go to the second queue
  1295. * otherwise the last priority will get it
  1296. */
  1297. cos_data->data[0].pausable = cos_data->data[1].pausable =
  1298. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1299. for (i = 0 ; i < num_of_pri; i++) {
  1300. pri_tested = 1 << bp->dcbx_port_params.
  1301. app.traffic_type_priority[i];
  1302. pg_entry = (u8)pg_pri_orginal_spread[bp->
  1303. dcbx_port_params.app.traffic_type_priority[i]];
  1304. if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1305. entry = 0;
  1306. if (i == (num_of_pri-1) &&
  1307. false == b_found_strict)
  1308. /* last entry will be handled separately
  1309. * If no priority is strict than last
  1310. * entry goes to last queue.
  1311. */
  1312. entry = 1;
  1313. cos_data->data[entry].pri_join_mask |=
  1314. pri_tested;
  1315. bnx2x_dcbx_add_to_cos_bw(bp,
  1316. &cos_data->data[entry],
  1317. DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1318. pg_entry));
  1319. } else {
  1320. b_found_strict = true;
  1321. cos_data->data[1].pri_join_mask |= pri_tested;
  1322. /* If we join a group and one is strict
  1323. * than the bw rules
  1324. */
  1325. cos_data->data[1].strict =
  1326. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1327. }
  1328. }
  1329. }
  1330. }
  1331. static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp,
  1332. struct pg_help_data *help_data,
  1333. struct dcbx_ets_feature *ets,
  1334. struct cos_help_data *cos_data,
  1335. u32 *pg_pri_orginal_spread,
  1336. u32 pri_join_mask,
  1337. u8 num_of_dif_pri)
  1338. {
  1339. /* default E2 settings */
  1340. cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2;
  1341. switch (help_data->num_of_pg) {
  1342. case 1:
  1343. bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(
  1344. bp,
  1345. help_data,
  1346. cos_data,
  1347. pri_join_mask,
  1348. num_of_dif_pri);
  1349. break;
  1350. case 2:
  1351. bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
  1352. bp,
  1353. help_data,
  1354. ets,
  1355. cos_data,
  1356. pg_pri_orginal_spread,
  1357. pri_join_mask,
  1358. num_of_dif_pri);
  1359. break;
  1360. case 3:
  1361. bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
  1362. bp,
  1363. help_data,
  1364. ets,
  1365. cos_data,
  1366. pg_pri_orginal_spread,
  1367. pri_join_mask,
  1368. num_of_dif_pri);
  1369. break;
  1370. default:
  1371. BNX2X_ERR("Wrong pg_help_data.num_of_pg\n");
  1372. bnx2x_dcbx_ets_disabled_entry_data(bp,
  1373. cos_data, pri_join_mask);
  1374. }
  1375. }
  1376. static int bnx2x_dcbx_spread_strict_pri(struct bnx2x *bp,
  1377. struct cos_help_data *cos_data,
  1378. u8 entry,
  1379. u8 num_spread_of_entries,
  1380. u8 strict_app_pris)
  1381. {
  1382. u8 strict_pri = BNX2X_DCBX_STRICT_COS_HIGHEST;
  1383. u8 num_of_app_pri = MAX_PFC_PRIORITIES;
  1384. u8 app_pri_bit = 0;
  1385. while (num_spread_of_entries && num_of_app_pri > 0) {
  1386. app_pri_bit = 1 << (num_of_app_pri - 1);
  1387. if (app_pri_bit & strict_app_pris) {
  1388. struct cos_entry_help_data *data = &cos_data->
  1389. data[entry];
  1390. num_spread_of_entries--;
  1391. if (num_spread_of_entries == 0) {
  1392. /* last entry needed put all the entries left */
  1393. data->cos_bw = DCBX_INVALID_COS_BW;
  1394. data->strict = strict_pri;
  1395. data->pri_join_mask = strict_app_pris;
  1396. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1397. data->pri_join_mask);
  1398. } else {
  1399. strict_app_pris &= ~app_pri_bit;
  1400. data->cos_bw = DCBX_INVALID_COS_BW;
  1401. data->strict = strict_pri;
  1402. data->pri_join_mask = app_pri_bit;
  1403. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1404. data->pri_join_mask);
  1405. }
  1406. strict_pri =
  1407. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(strict_pri);
  1408. entry++;
  1409. }
  1410. num_of_app_pri--;
  1411. }
  1412. if (num_spread_of_entries) {
  1413. BNX2X_ERR("Didn't succeed to spread strict priorities\n");
  1414. return -EINVAL;
  1415. }
  1416. return 0;
  1417. }
  1418. static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp,
  1419. struct cos_help_data *cos_data,
  1420. u8 entry,
  1421. u8 num_spread_of_entries,
  1422. u8 strict_app_pris)
  1423. {
  1424. if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry,
  1425. num_spread_of_entries,
  1426. strict_app_pris)) {
  1427. struct cos_entry_help_data *data = &cos_data->
  1428. data[entry];
  1429. /* Fill BW entry */
  1430. data->cos_bw = DCBX_INVALID_COS_BW;
  1431. data->strict = BNX2X_DCBX_STRICT_COS_HIGHEST;
  1432. data->pri_join_mask = strict_app_pris;
  1433. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1434. data->pri_join_mask);
  1435. return 1;
  1436. }
  1437. return num_spread_of_entries;
  1438. }
  1439. static void bnx2x_dcbx_cee_fill_cos_params(struct bnx2x *bp,
  1440. struct pg_help_data *help_data,
  1441. struct dcbx_ets_feature *ets,
  1442. struct cos_help_data *cos_data,
  1443. u32 pri_join_mask)
  1444. {
  1445. u8 need_num_of_entries = 0;
  1446. u8 i = 0;
  1447. u8 entry = 0;
  1448. /*
  1449. * if the number of requested PG-s in CEE is greater than 3
  1450. * then the results are not determined since this is a violation
  1451. * of the standard.
  1452. */
  1453. if (help_data->num_of_pg > DCBX_COS_MAX_NUM_E3B0) {
  1454. if (bnx2x_dcbx_join_pgs(bp, ets, help_data,
  1455. DCBX_COS_MAX_NUM_E3B0)) {
  1456. BNX2X_ERR("Unable to reduce the number of PGs - we will disables ETS\n");
  1457. bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data,
  1458. pri_join_mask);
  1459. return;
  1460. }
  1461. }
  1462. for (i = 0 ; i < help_data->num_of_pg; i++) {
  1463. struct pg_entry_help_data *pg = &help_data->data[i];
  1464. if (pg->pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1465. struct cos_entry_help_data *data = &cos_data->
  1466. data[entry];
  1467. /* Fill BW entry */
  1468. data->cos_bw = DCBX_PG_BW_GET(ets->pg_bw_tbl, pg->pg);
  1469. data->strict = BNX2X_DCBX_STRICT_INVALID;
  1470. data->pri_join_mask = pg->pg_priority;
  1471. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1472. data->pri_join_mask);
  1473. entry++;
  1474. } else {
  1475. need_num_of_entries = min_t(u8,
  1476. (u8)pg->num_of_dif_pri,
  1477. (u8)DCBX_COS_MAX_NUM_E3B0 -
  1478. help_data->num_of_pg + 1);
  1479. /*
  1480. * If there are still VOQ-s which have no associated PG,
  1481. * then associate these VOQ-s to PG15. These PG-s will
  1482. * be used for SP between priorities on PG15.
  1483. */
  1484. entry += bnx2x_dcbx_cee_fill_strict_pri(bp, cos_data,
  1485. entry, need_num_of_entries, pg->pg_priority);
  1486. }
  1487. }
  1488. /* the entry will represent the number of COSes used */
  1489. cos_data->num_of_cos = entry;
  1490. }
  1491. static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
  1492. struct pg_help_data *help_data,
  1493. struct dcbx_ets_feature *ets,
  1494. u32 *pg_pri_orginal_spread)
  1495. {
  1496. struct cos_help_data cos_data;
  1497. u8 i = 0;
  1498. u32 pri_join_mask = 0;
  1499. u8 num_of_dif_pri = 0;
  1500. memset(&cos_data, 0, sizeof(cos_data));
  1501. /* Validate the pg value */
  1502. for (i = 0; i < help_data->num_of_pg ; i++) {
  1503. if (DCBX_STRICT_PRIORITY != help_data->data[i].pg &&
  1504. DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg)
  1505. BNX2X_ERR("Invalid pg[%d] data %x\n", i,
  1506. help_data->data[i].pg);
  1507. pri_join_mask |= help_data->data[i].pg_priority;
  1508. num_of_dif_pri += help_data->data[i].num_of_dif_pri;
  1509. }
  1510. /* defaults */
  1511. cos_data.num_of_cos = 1;
  1512. for (i = 0; i < ARRAY_SIZE(cos_data.data); i++) {
  1513. cos_data.data[i].pri_join_mask = 0;
  1514. cos_data.data[i].pausable = false;
  1515. cos_data.data[i].strict = BNX2X_DCBX_STRICT_INVALID;
  1516. cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW;
  1517. }
  1518. if (CHIP_IS_E3B0(bp))
  1519. bnx2x_dcbx_cee_fill_cos_params(bp, help_data, ets,
  1520. &cos_data, pri_join_mask);
  1521. else /* E2 + E3A0 */
  1522. bnx2x_dcbx_2cos_limit_cee_fill_cos_params(bp,
  1523. help_data, ets,
  1524. &cos_data,
  1525. pg_pri_orginal_spread,
  1526. pri_join_mask,
  1527. num_of_dif_pri);
  1528. for (i = 0; i < cos_data.num_of_cos ; i++) {
  1529. struct bnx2x_dcbx_cos_params *p =
  1530. &bp->dcbx_port_params.ets.cos_params[i];
  1531. p->strict = cos_data.data[i].strict;
  1532. p->bw_tbl = cos_data.data[i].cos_bw;
  1533. p->pri_bitmask = cos_data.data[i].pri_join_mask;
  1534. p->pauseable = cos_data.data[i].pausable;
  1535. /* sanity */
  1536. if (p->bw_tbl != DCBX_INVALID_COS_BW ||
  1537. p->strict != BNX2X_DCBX_STRICT_INVALID) {
  1538. if (p->pri_bitmask == 0)
  1539. BNX2X_ERR("Invalid pri_bitmask for %d\n", i);
  1540. if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) {
  1541. if (p->pauseable &&
  1542. DCBX_PFC_PRI_GET_NON_PAUSE(bp,
  1543. p->pri_bitmask) != 0)
  1544. BNX2X_ERR("Inconsistent config for pausable COS %d\n",
  1545. i);
  1546. if (!p->pauseable &&
  1547. DCBX_PFC_PRI_GET_PAUSE(bp,
  1548. p->pri_bitmask) != 0)
  1549. BNX2X_ERR("Inconsistent config for nonpausable COS %d\n",
  1550. i);
  1551. }
  1552. }
  1553. if (p->pauseable)
  1554. DP(BNX2X_MSG_DCB, "COS %d PAUSABLE prijoinmask 0x%x\n",
  1555. i, cos_data.data[i].pri_join_mask);
  1556. else
  1557. DP(BNX2X_MSG_DCB,
  1558. "COS %d NONPAUSABLE prijoinmask 0x%x\n",
  1559. i, cos_data.data[i].pri_join_mask);
  1560. }
  1561. bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ;
  1562. }
  1563. static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
  1564. u32 *set_configuration_ets_pg,
  1565. u32 *pri_pg_tbl)
  1566. {
  1567. int i;
  1568. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
  1569. set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i);
  1570. DP(BNX2X_MSG_DCB, "set_configuration_ets_pg[%d] = 0x%x\n",
  1571. i, set_configuration_ets_pg[i]);
  1572. }
  1573. }
  1574. static void bnx2x_dcbx_fw_struct(struct bnx2x *bp,
  1575. struct bnx2x_func_tx_start_params *pfc_fw_cfg)
  1576. {
  1577. u16 pri_bit = 0;
  1578. u8 cos = 0, pri = 0;
  1579. struct priority_cos *tt2cos;
  1580. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  1581. int mfw_configured = SHMEM2_HAS(bp, drv_flags) &&
  1582. GET_FLAGS(SHMEM2_RD(bp, drv_flags),
  1583. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED);
  1584. memset(pfc_fw_cfg, 0, sizeof(*pfc_fw_cfg));
  1585. /* to disable DCB - the structure must be zeroed */
  1586. if ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured)
  1587. return;
  1588. /*shortcut*/
  1589. tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos;
  1590. /* Fw version should be incremented each update */
  1591. pfc_fw_cfg->dcb_version = ++bp->dcb_version;
  1592. pfc_fw_cfg->dcb_enabled = 1;
  1593. /* Fill priority parameters */
  1594. for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
  1595. tt2cos[pri].priority = ttp[pri];
  1596. pri_bit = 1 << tt2cos[pri].priority;
  1597. /* Fill COS parameters based on COS calculated to
  1598. * make it more general for future use */
  1599. for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++)
  1600. if (bp->dcbx_port_params.ets.cos_params[cos].
  1601. pri_bitmask & pri_bit)
  1602. tt2cos[pri].cos = cos;
  1603. }
  1604. /* we never want the FW to add a 0 vlan tag */
  1605. pfc_fw_cfg->dont_add_pri_0_en = 1;
  1606. bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg);
  1607. }
  1608. void bnx2x_dcbx_pmf_update(struct bnx2x *bp)
  1609. {
  1610. /* if we need to synchronize DCBX result from prev PMF
  1611. * read it from shmem and update bp and netdev accordingly
  1612. */
  1613. if (SHMEM2_HAS(bp, drv_flags) &&
  1614. GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1 << DRV_FLAGS_DCB_CONFIGURED)) {
  1615. /* Read neg results if dcbx is in the FW */
  1616. if (bnx2x_dcbx_read_shmem_neg_results(bp))
  1617. return;
  1618. bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  1619. bp->dcbx_error);
  1620. bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  1621. bp->dcbx_error);
  1622. #ifdef BCM_DCBNL
  1623. /*
  1624. * Add new app tlvs to dcbnl
  1625. */
  1626. bnx2x_dcbnl_update_applist(bp, false);
  1627. /*
  1628. * Send a notification for the new negotiated parameters
  1629. */
  1630. dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0);
  1631. #endif
  1632. /*
  1633. * reconfigure the netdevice with the results of the new
  1634. * dcbx negotiation.
  1635. */
  1636. bnx2x_dcbx_update_tc_mapping(bp);
  1637. }
  1638. }
  1639. /* DCB netlink */
  1640. #ifdef BCM_DCBNL
  1641. #define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \
  1642. DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC)
  1643. static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp)
  1644. {
  1645. /* validate dcbnl call that may change HW state:
  1646. * DCB is on and DCBX mode was SUCCESSFULLY set by the user.
  1647. */
  1648. return bp->dcb_state && bp->dcbx_mode_uset;
  1649. }
  1650. static u8 bnx2x_dcbnl_get_state(struct net_device *netdev)
  1651. {
  1652. struct bnx2x *bp = netdev_priv(netdev);
  1653. DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcb_state);
  1654. return bp->dcb_state;
  1655. }
  1656. static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state)
  1657. {
  1658. struct bnx2x *bp = netdev_priv(netdev);
  1659. DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off");
  1660. /* Fail to set state to "enabled" if dcbx is disabled in nvram */
  1661. if (state && ((bp->dcbx_enabled == BNX2X_DCBX_ENABLED_OFF) ||
  1662. (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_INVALID))) {
  1663. DP(BNX2X_MSG_DCB, "Can not set dcbx to enabled while it is disabled in nvm\n");
  1664. return 1;
  1665. }
  1666. bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled);
  1667. return 0;
  1668. }
  1669. static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev,
  1670. u8 *perm_addr)
  1671. {
  1672. struct bnx2x *bp = netdev_priv(netdev);
  1673. DP(BNX2X_MSG_DCB, "GET-PERM-ADDR\n");
  1674. /* first the HW mac address */
  1675. memcpy(perm_addr, netdev->dev_addr, netdev->addr_len);
  1676. if (CNIC_LOADED(bp))
  1677. /* second SAN address */
  1678. memcpy(perm_addr+netdev->addr_len, bp->fip_mac,
  1679. netdev->addr_len);
  1680. }
  1681. static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio,
  1682. u8 prio_type, u8 pgid, u8 bw_pct,
  1683. u8 up_map)
  1684. {
  1685. struct bnx2x *bp = netdev_priv(netdev);
  1686. DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, pgid);
  1687. if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
  1688. return;
  1689. /**
  1690. * bw_pct ignored - band-width percentage devision between user
  1691. * priorities within the same group is not
  1692. * standard and hence not supported
  1693. *
  1694. * prio_type ignored - priority levels within the same group are not
  1695. * standard and hence are not supported. According
  1696. * to the standard pgid 15 is dedicated to strict
  1697. * priority traffic (on the port level).
  1698. *
  1699. * up_map ignored
  1700. */
  1701. bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid;
  1702. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  1703. }
  1704. static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev,
  1705. int pgid, u8 bw_pct)
  1706. {
  1707. struct bnx2x *bp = netdev_priv(netdev);
  1708. DP(BNX2X_MSG_DCB, "pgid[%d] = %d\n", pgid, bw_pct);
  1709. if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
  1710. return;
  1711. bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct;
  1712. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  1713. }
  1714. static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio,
  1715. u8 prio_type, u8 pgid, u8 bw_pct,
  1716. u8 up_map)
  1717. {
  1718. struct bnx2x *bp = netdev_priv(netdev);
  1719. DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n");
  1720. }
  1721. static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev,
  1722. int pgid, u8 bw_pct)
  1723. {
  1724. struct bnx2x *bp = netdev_priv(netdev);
  1725. DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n");
  1726. }
  1727. static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio,
  1728. u8 *prio_type, u8 *pgid, u8 *bw_pct,
  1729. u8 *up_map)
  1730. {
  1731. struct bnx2x *bp = netdev_priv(netdev);
  1732. DP(BNX2X_MSG_DCB, "prio = %d\n", prio);
  1733. /**
  1734. * bw_pct ignored - band-width percentage devision between user
  1735. * priorities within the same group is not
  1736. * standard and hence not supported
  1737. *
  1738. * prio_type ignored - priority levels within the same group are not
  1739. * standard and hence are not supported. According
  1740. * to the standard pgid 15 is dedicated to strict
  1741. * priority traffic (on the port level).
  1742. *
  1743. * up_map ignored
  1744. */
  1745. *up_map = *bw_pct = *prio_type = *pgid = 0;
  1746. if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
  1747. return;
  1748. *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio);
  1749. }
  1750. static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev,
  1751. int pgid, u8 *bw_pct)
  1752. {
  1753. struct bnx2x *bp = netdev_priv(netdev);
  1754. DP(BNX2X_MSG_DCB, "pgid = %d\n", pgid);
  1755. *bw_pct = 0;
  1756. if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
  1757. return;
  1758. *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid);
  1759. }
  1760. static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio,
  1761. u8 *prio_type, u8 *pgid, u8 *bw_pct,
  1762. u8 *up_map)
  1763. {
  1764. struct bnx2x *bp = netdev_priv(netdev);
  1765. DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n");
  1766. *prio_type = *pgid = *bw_pct = *up_map = 0;
  1767. }
  1768. static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev,
  1769. int pgid, u8 *bw_pct)
  1770. {
  1771. struct bnx2x *bp = netdev_priv(netdev);
  1772. DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n");
  1773. *bw_pct = 0;
  1774. }
  1775. static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio,
  1776. u8 setting)
  1777. {
  1778. struct bnx2x *bp = netdev_priv(netdev);
  1779. DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, setting);
  1780. if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES)
  1781. return;
  1782. if (setting) {
  1783. bp->dcbx_config_params.admin_pfc_bitmap |= (1 << prio);
  1784. bp->dcbx_config_params.admin_pfc_tx_enable = 1;
  1785. } else {
  1786. bp->dcbx_config_params.admin_pfc_bitmap &= ~(1 << prio);
  1787. }
  1788. }
  1789. static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio,
  1790. u8 *setting)
  1791. {
  1792. struct bnx2x *bp = netdev_priv(netdev);
  1793. DP(BNX2X_MSG_DCB, "prio = %d\n", prio);
  1794. *setting = 0;
  1795. if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES)
  1796. return;
  1797. *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1;
  1798. }
  1799. static u8 bnx2x_dcbnl_set_all(struct net_device *netdev)
  1800. {
  1801. struct bnx2x *bp = netdev_priv(netdev);
  1802. int rc = 0;
  1803. DP(BNX2X_MSG_DCB, "SET-ALL\n");
  1804. if (!bnx2x_dcbnl_set_valid(bp))
  1805. return 1;
  1806. if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
  1807. netdev_err(bp->dev,
  1808. "Handling parity error recovery. Try again later\n");
  1809. return 1;
  1810. }
  1811. if (netif_running(bp->dev)) {
  1812. bnx2x_update_drv_flags(bp,
  1813. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED,
  1814. 1);
  1815. bnx2x_dcbx_init(bp, true);
  1816. }
  1817. DP(BNX2X_MSG_DCB, "set_dcbx_params done (%d)\n", rc);
  1818. if (rc)
  1819. return 1;
  1820. return 0;
  1821. }
  1822. static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap)
  1823. {
  1824. struct bnx2x *bp = netdev_priv(netdev);
  1825. u8 rval = 0;
  1826. if (bp->dcb_state) {
  1827. switch (capid) {
  1828. case DCB_CAP_ATTR_PG:
  1829. *cap = true;
  1830. break;
  1831. case DCB_CAP_ATTR_PFC:
  1832. *cap = true;
  1833. break;
  1834. case DCB_CAP_ATTR_UP2TC:
  1835. *cap = false;
  1836. break;
  1837. case DCB_CAP_ATTR_PG_TCS:
  1838. *cap = 0x80; /* 8 priorities for PGs */
  1839. break;
  1840. case DCB_CAP_ATTR_PFC_TCS:
  1841. *cap = 0x80; /* 8 priorities for PFC */
  1842. break;
  1843. case DCB_CAP_ATTR_GSP:
  1844. *cap = true;
  1845. break;
  1846. case DCB_CAP_ATTR_BCN:
  1847. *cap = false;
  1848. break;
  1849. case DCB_CAP_ATTR_DCBX:
  1850. *cap = BNX2X_DCBX_CAPS;
  1851. break;
  1852. default:
  1853. BNX2X_ERR("Non valid capability ID\n");
  1854. rval = 1;
  1855. break;
  1856. }
  1857. } else {
  1858. DP(BNX2X_MSG_DCB, "DCB disabled\n");
  1859. rval = 1;
  1860. }
  1861. DP(BNX2X_MSG_DCB, "capid %d:%x\n", capid, *cap);
  1862. return rval;
  1863. }
  1864. static int bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num)
  1865. {
  1866. struct bnx2x *bp = netdev_priv(netdev);
  1867. u8 rval = 0;
  1868. DP(BNX2X_MSG_DCB, "tcid %d\n", tcid);
  1869. if (bp->dcb_state) {
  1870. switch (tcid) {
  1871. case DCB_NUMTCS_ATTR_PG:
  1872. *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
  1873. DCBX_COS_MAX_NUM_E2;
  1874. break;
  1875. case DCB_NUMTCS_ATTR_PFC:
  1876. *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
  1877. DCBX_COS_MAX_NUM_E2;
  1878. break;
  1879. default:
  1880. BNX2X_ERR("Non valid TC-ID\n");
  1881. rval = 1;
  1882. break;
  1883. }
  1884. } else {
  1885. DP(BNX2X_MSG_DCB, "DCB disabled\n");
  1886. rval = 1;
  1887. }
  1888. return rval;
  1889. }
  1890. static int bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num)
  1891. {
  1892. struct bnx2x *bp = netdev_priv(netdev);
  1893. DP(BNX2X_MSG_DCB, "num tcs = %d; Not supported\n", num);
  1894. return -EINVAL;
  1895. }
  1896. static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev)
  1897. {
  1898. struct bnx2x *bp = netdev_priv(netdev);
  1899. DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcbx_local_feat.pfc.enabled);
  1900. if (!bp->dcb_state)
  1901. return 0;
  1902. return bp->dcbx_local_feat.pfc.enabled;
  1903. }
  1904. static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state)
  1905. {
  1906. struct bnx2x *bp = netdev_priv(netdev);
  1907. DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off");
  1908. if (!bnx2x_dcbnl_set_valid(bp))
  1909. return;
  1910. bp->dcbx_config_params.admin_pfc_tx_enable =
  1911. bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0);
  1912. }
  1913. static void bnx2x_admin_app_set_ent(
  1914. struct bnx2x_admin_priority_app_table *app_ent,
  1915. u8 idtype, u16 idval, u8 up)
  1916. {
  1917. app_ent->valid = 1;
  1918. switch (idtype) {
  1919. case DCB_APP_IDTYPE_ETHTYPE:
  1920. app_ent->traffic_type = TRAFFIC_TYPE_ETH;
  1921. break;
  1922. case DCB_APP_IDTYPE_PORTNUM:
  1923. app_ent->traffic_type = TRAFFIC_TYPE_PORT;
  1924. break;
  1925. default:
  1926. break; /* never gets here */
  1927. }
  1928. app_ent->app_id = idval;
  1929. app_ent->priority = up;
  1930. }
  1931. static bool bnx2x_admin_app_is_equal(
  1932. struct bnx2x_admin_priority_app_table *app_ent,
  1933. u8 idtype, u16 idval)
  1934. {
  1935. if (!app_ent->valid)
  1936. return false;
  1937. switch (idtype) {
  1938. case DCB_APP_IDTYPE_ETHTYPE:
  1939. if (app_ent->traffic_type != TRAFFIC_TYPE_ETH)
  1940. return false;
  1941. break;
  1942. case DCB_APP_IDTYPE_PORTNUM:
  1943. if (app_ent->traffic_type != TRAFFIC_TYPE_PORT)
  1944. return false;
  1945. break;
  1946. default:
  1947. return false;
  1948. }
  1949. if (app_ent->app_id != idval)
  1950. return false;
  1951. return true;
  1952. }
  1953. static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up)
  1954. {
  1955. int i, ff;
  1956. /* iterate over the app entries looking for idtype and idval */
  1957. for (i = 0, ff = -1; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) {
  1958. struct bnx2x_admin_priority_app_table *app_ent =
  1959. &bp->dcbx_config_params.admin_priority_app_table[i];
  1960. if (bnx2x_admin_app_is_equal(app_ent, idtype, idval))
  1961. break;
  1962. if (ff < 0 && !app_ent->valid)
  1963. ff = i;
  1964. }
  1965. if (i < DCBX_CONFIG_MAX_APP_PROTOCOL)
  1966. /* if found overwrite up */
  1967. bp->dcbx_config_params.
  1968. admin_priority_app_table[i].priority = up;
  1969. else if (ff >= 0)
  1970. /* not found use first-free */
  1971. bnx2x_admin_app_set_ent(
  1972. &bp->dcbx_config_params.admin_priority_app_table[ff],
  1973. idtype, idval, up);
  1974. else {
  1975. /* app table is full */
  1976. BNX2X_ERR("Application table is too large\n");
  1977. return -EBUSY;
  1978. }
  1979. /* up configured, if not 0 make sure feature is enabled */
  1980. if (up)
  1981. bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
  1982. return 0;
  1983. }
  1984. static u8 bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype,
  1985. u16 idval, u8 up)
  1986. {
  1987. struct bnx2x *bp = netdev_priv(netdev);
  1988. DP(BNX2X_MSG_DCB, "app_type %d, app_id %x, prio bitmap %d\n",
  1989. idtype, idval, up);
  1990. if (!bnx2x_dcbnl_set_valid(bp)) {
  1991. DP(BNX2X_MSG_DCB, "dcbnl call not valid\n");
  1992. return -EINVAL;
  1993. }
  1994. /* verify idtype */
  1995. switch (idtype) {
  1996. case DCB_APP_IDTYPE_ETHTYPE:
  1997. case DCB_APP_IDTYPE_PORTNUM:
  1998. break;
  1999. default:
  2000. DP(BNX2X_MSG_DCB, "Wrong ID type\n");
  2001. return -EINVAL;
  2002. }
  2003. return bnx2x_set_admin_app_up(bp, idtype, idval, up);
  2004. }
  2005. static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev)
  2006. {
  2007. struct bnx2x *bp = netdev_priv(netdev);
  2008. u8 state;
  2009. state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE;
  2010. if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF)
  2011. state |= DCB_CAP_DCBX_STATIC;
  2012. return state;
  2013. }
  2014. static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state)
  2015. {
  2016. struct bnx2x *bp = netdev_priv(netdev);
  2017. DP(BNX2X_MSG_DCB, "state = %02x\n", state);
  2018. /* set dcbx mode */
  2019. if ((state & BNX2X_DCBX_CAPS) != state) {
  2020. BNX2X_ERR("Requested DCBX mode %x is beyond advertised capabilities\n",
  2021. state);
  2022. return 1;
  2023. }
  2024. if (bp->dcb_state != BNX2X_DCB_STATE_ON) {
  2025. BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n");
  2026. return 1;
  2027. }
  2028. if (state & DCB_CAP_DCBX_STATIC)
  2029. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF;
  2030. else
  2031. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON;
  2032. bp->dcbx_mode_uset = true;
  2033. return 0;
  2034. }
  2035. static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid,
  2036. u8 *flags)
  2037. {
  2038. struct bnx2x *bp = netdev_priv(netdev);
  2039. u8 rval = 0;
  2040. DP(BNX2X_MSG_DCB, "featid %d\n", featid);
  2041. if (bp->dcb_state) {
  2042. *flags = 0;
  2043. switch (featid) {
  2044. case DCB_FEATCFG_ATTR_PG:
  2045. if (bp->dcbx_local_feat.ets.enabled)
  2046. *flags |= DCB_FEATCFG_ENABLE;
  2047. if (bp->dcbx_error & DCBX_LOCAL_ETS_ERROR)
  2048. *flags |= DCB_FEATCFG_ERROR;
  2049. break;
  2050. case DCB_FEATCFG_ATTR_PFC:
  2051. if (bp->dcbx_local_feat.pfc.enabled)
  2052. *flags |= DCB_FEATCFG_ENABLE;
  2053. if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR |
  2054. DCBX_LOCAL_PFC_MISMATCH))
  2055. *flags |= DCB_FEATCFG_ERROR;
  2056. break;
  2057. case DCB_FEATCFG_ATTR_APP:
  2058. if (bp->dcbx_local_feat.app.enabled)
  2059. *flags |= DCB_FEATCFG_ENABLE;
  2060. if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR |
  2061. DCBX_LOCAL_APP_MISMATCH))
  2062. *flags |= DCB_FEATCFG_ERROR;
  2063. break;
  2064. default:
  2065. BNX2X_ERR("Non valid feature-ID\n");
  2066. rval = 1;
  2067. break;
  2068. }
  2069. } else {
  2070. DP(BNX2X_MSG_DCB, "DCB disabled\n");
  2071. rval = 1;
  2072. }
  2073. return rval;
  2074. }
  2075. static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid,
  2076. u8 flags)
  2077. {
  2078. struct bnx2x *bp = netdev_priv(netdev);
  2079. u8 rval = 0;
  2080. DP(BNX2X_MSG_DCB, "featid = %d flags = %02x\n", featid, flags);
  2081. /* ignore the 'advertise' flag */
  2082. if (bnx2x_dcbnl_set_valid(bp)) {
  2083. switch (featid) {
  2084. case DCB_FEATCFG_ATTR_PG:
  2085. bp->dcbx_config_params.admin_ets_enable =
  2086. flags & DCB_FEATCFG_ENABLE ? 1 : 0;
  2087. bp->dcbx_config_params.admin_ets_willing =
  2088. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  2089. break;
  2090. case DCB_FEATCFG_ATTR_PFC:
  2091. bp->dcbx_config_params.admin_pfc_enable =
  2092. flags & DCB_FEATCFG_ENABLE ? 1 : 0;
  2093. bp->dcbx_config_params.admin_pfc_willing =
  2094. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  2095. break;
  2096. case DCB_FEATCFG_ATTR_APP:
  2097. /* ignore enable, always enabled */
  2098. bp->dcbx_config_params.admin_app_priority_willing =
  2099. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  2100. break;
  2101. default:
  2102. BNX2X_ERR("Non valid feature-ID\n");
  2103. rval = 1;
  2104. break;
  2105. }
  2106. } else {
  2107. DP(BNX2X_MSG_DCB, "dcbnl call not valid\n");
  2108. rval = 1;
  2109. }
  2110. return rval;
  2111. }
  2112. static int bnx2x_peer_appinfo(struct net_device *netdev,
  2113. struct dcb_peer_app_info *info, u16* app_count)
  2114. {
  2115. int i;
  2116. struct bnx2x *bp = netdev_priv(netdev);
  2117. DP(BNX2X_MSG_DCB, "APP-INFO\n");
  2118. info->willing = (bp->dcbx_remote_flags & DCBX_APP_REM_WILLING) ?: 0;
  2119. info->error = (bp->dcbx_remote_flags & DCBX_APP_RX_ERROR) ?: 0;
  2120. *app_count = 0;
  2121. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++)
  2122. if (bp->dcbx_remote_feat.app.app_pri_tbl[i].appBitfield &
  2123. DCBX_APP_ENTRY_VALID)
  2124. (*app_count)++;
  2125. return 0;
  2126. }
  2127. static int bnx2x_peer_apptable(struct net_device *netdev,
  2128. struct dcb_app *table)
  2129. {
  2130. int i, j;
  2131. struct bnx2x *bp = netdev_priv(netdev);
  2132. DP(BNX2X_MSG_DCB, "APP-TABLE\n");
  2133. for (i = 0, j = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  2134. struct dcbx_app_priority_entry *ent =
  2135. &bp->dcbx_remote_feat.app.app_pri_tbl[i];
  2136. if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
  2137. table[j].selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
  2138. table[j].priority = bnx2x_dcbx_dcbnl_app_up(ent);
  2139. table[j++].protocol = ent->app_id;
  2140. }
  2141. }
  2142. return 0;
  2143. }
  2144. static int bnx2x_cee_peer_getpg(struct net_device *netdev, struct cee_pg *pg)
  2145. {
  2146. int i;
  2147. struct bnx2x *bp = netdev_priv(netdev);
  2148. pg->willing = (bp->dcbx_remote_flags & DCBX_ETS_REM_WILLING) ?: 0;
  2149. for (i = 0; i < CEE_DCBX_MAX_PGS; i++) {
  2150. pg->pg_bw[i] =
  2151. DCBX_PG_BW_GET(bp->dcbx_remote_feat.ets.pg_bw_tbl, i);
  2152. pg->prio_pg[i] =
  2153. DCBX_PRI_PG_GET(bp->dcbx_remote_feat.ets.pri_pg_tbl, i);
  2154. }
  2155. return 0;
  2156. }
  2157. static int bnx2x_cee_peer_getpfc(struct net_device *netdev,
  2158. struct cee_pfc *pfc)
  2159. {
  2160. struct bnx2x *bp = netdev_priv(netdev);
  2161. pfc->tcs_supported = bp->dcbx_remote_feat.pfc.pfc_caps;
  2162. pfc->pfc_en = bp->dcbx_remote_feat.pfc.pri_en_bitmap;
  2163. return 0;
  2164. }
  2165. const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = {
  2166. .getstate = bnx2x_dcbnl_get_state,
  2167. .setstate = bnx2x_dcbnl_set_state,
  2168. .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr,
  2169. .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx,
  2170. .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx,
  2171. .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx,
  2172. .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx,
  2173. .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx,
  2174. .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx,
  2175. .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx,
  2176. .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx,
  2177. .setpfccfg = bnx2x_dcbnl_set_pfc_cfg,
  2178. .getpfccfg = bnx2x_dcbnl_get_pfc_cfg,
  2179. .setall = bnx2x_dcbnl_set_all,
  2180. .getcap = bnx2x_dcbnl_get_cap,
  2181. .getnumtcs = bnx2x_dcbnl_get_numtcs,
  2182. .setnumtcs = bnx2x_dcbnl_set_numtcs,
  2183. .getpfcstate = bnx2x_dcbnl_get_pfc_state,
  2184. .setpfcstate = bnx2x_dcbnl_set_pfc_state,
  2185. .setapp = bnx2x_dcbnl_set_app_up,
  2186. .getdcbx = bnx2x_dcbnl_get_dcbx,
  2187. .setdcbx = bnx2x_dcbnl_set_dcbx,
  2188. .getfeatcfg = bnx2x_dcbnl_get_featcfg,
  2189. .setfeatcfg = bnx2x_dcbnl_set_featcfg,
  2190. .peer_getappinfo = bnx2x_peer_appinfo,
  2191. .peer_getapptable = bnx2x_peer_apptable,
  2192. .cee_peer_getpg = bnx2x_cee_peer_getpg,
  2193. .cee_peer_getpfc = bnx2x_cee_peer_getpfc,
  2194. };
  2195. #endif /* BCM_DCBNL */