emac_main.c 21 KB

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  1. /*
  2. * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * Driver for the ARC EMAC 10100 (hardware revision 5)
  9. *
  10. * Contributors:
  11. * Amit Bhor
  12. * Sameer Dhavale
  13. * Vineet Gupta
  14. */
  15. #include <linux/etherdevice.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/io.h>
  18. #include <linux/module.h>
  19. #include <linux/of_address.h>
  20. #include <linux/of_irq.h>
  21. #include <linux/of_mdio.h>
  22. #include <linux/of_net.h>
  23. #include <linux/of_platform.h>
  24. #include "emac.h"
  25. #define DRV_NAME "arc_emac"
  26. #define DRV_VERSION "1.0"
  27. /**
  28. * arc_emac_adjust_link - Adjust the PHY link duplex.
  29. * @ndev: Pointer to the net_device structure.
  30. *
  31. * This function is called to change the duplex setting after auto negotiation
  32. * is done by the PHY.
  33. */
  34. static void arc_emac_adjust_link(struct net_device *ndev)
  35. {
  36. struct arc_emac_priv *priv = netdev_priv(ndev);
  37. struct phy_device *phy_dev = priv->phy_dev;
  38. unsigned int reg, state_changed = 0;
  39. if (priv->link != phy_dev->link) {
  40. priv->link = phy_dev->link;
  41. state_changed = 1;
  42. }
  43. if (priv->speed != phy_dev->speed) {
  44. priv->speed = phy_dev->speed;
  45. state_changed = 1;
  46. }
  47. if (priv->duplex != phy_dev->duplex) {
  48. reg = arc_reg_get(priv, R_CTRL);
  49. if (DUPLEX_FULL == phy_dev->duplex)
  50. reg |= ENFL_MASK;
  51. else
  52. reg &= ~ENFL_MASK;
  53. arc_reg_set(priv, R_CTRL, reg);
  54. priv->duplex = phy_dev->duplex;
  55. state_changed = 1;
  56. }
  57. if (state_changed)
  58. phy_print_status(phy_dev);
  59. }
  60. /**
  61. * arc_emac_get_settings - Get PHY settings.
  62. * @ndev: Pointer to net_device structure.
  63. * @cmd: Pointer to ethtool_cmd structure.
  64. *
  65. * This implements ethtool command for getting PHY settings. If PHY could
  66. * not be found, the function returns -ENODEV. This function calls the
  67. * relevant PHY ethtool API to get the PHY settings.
  68. * Issue "ethtool ethX" under linux prompt to execute this function.
  69. */
  70. static int arc_emac_get_settings(struct net_device *ndev,
  71. struct ethtool_cmd *cmd)
  72. {
  73. struct arc_emac_priv *priv = netdev_priv(ndev);
  74. return phy_ethtool_gset(priv->phy_dev, cmd);
  75. }
  76. /**
  77. * arc_emac_set_settings - Set PHY settings as passed in the argument.
  78. * @ndev: Pointer to net_device structure.
  79. * @cmd: Pointer to ethtool_cmd structure.
  80. *
  81. * This implements ethtool command for setting various PHY settings. If PHY
  82. * could not be found, the function returns -ENODEV. This function calls the
  83. * relevant PHY ethtool API to set the PHY.
  84. * Issue e.g. "ethtool -s ethX speed 1000" under linux prompt to execute this
  85. * function.
  86. */
  87. static int arc_emac_set_settings(struct net_device *ndev,
  88. struct ethtool_cmd *cmd)
  89. {
  90. struct arc_emac_priv *priv = netdev_priv(ndev);
  91. if (!capable(CAP_NET_ADMIN))
  92. return -EPERM;
  93. return phy_ethtool_sset(priv->phy_dev, cmd);
  94. }
  95. /**
  96. * arc_emac_get_drvinfo - Get EMAC driver information.
  97. * @ndev: Pointer to net_device structure.
  98. * @info: Pointer to ethtool_drvinfo structure.
  99. *
  100. * This implements ethtool command for getting the driver information.
  101. * Issue "ethtool -i ethX" under linux prompt to execute this function.
  102. */
  103. static void arc_emac_get_drvinfo(struct net_device *ndev,
  104. struct ethtool_drvinfo *info)
  105. {
  106. strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
  107. strlcpy(info->version, DRV_VERSION, sizeof(info->version));
  108. }
  109. static const struct ethtool_ops arc_emac_ethtool_ops = {
  110. .get_settings = arc_emac_get_settings,
  111. .set_settings = arc_emac_set_settings,
  112. .get_drvinfo = arc_emac_get_drvinfo,
  113. .get_link = ethtool_op_get_link,
  114. };
  115. #define FIRST_OR_LAST_MASK (FIRST_MASK | LAST_MASK)
  116. /**
  117. * arc_emac_tx_clean - clears processed by EMAC Tx BDs.
  118. * @ndev: Pointer to the network device.
  119. */
  120. static void arc_emac_tx_clean(struct net_device *ndev)
  121. {
  122. struct arc_emac_priv *priv = netdev_priv(ndev);
  123. struct net_device_stats *stats = &priv->stats;
  124. unsigned int i;
  125. for (i = 0; i < TX_BD_NUM; i++) {
  126. unsigned int *txbd_dirty = &priv->txbd_dirty;
  127. struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty];
  128. struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty];
  129. struct sk_buff *skb = tx_buff->skb;
  130. unsigned int info = le32_to_cpu(txbd->info);
  131. *txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM;
  132. if ((info & FOR_EMAC) || !txbd->data)
  133. break;
  134. if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) {
  135. stats->tx_errors++;
  136. stats->tx_dropped++;
  137. if (info & DEFR)
  138. stats->tx_carrier_errors++;
  139. if (info & LTCL)
  140. stats->collisions++;
  141. if (info & UFLO)
  142. stats->tx_fifo_errors++;
  143. } else if (likely(info & FIRST_OR_LAST_MASK)) {
  144. stats->tx_packets++;
  145. stats->tx_bytes += skb->len;
  146. }
  147. dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr),
  148. dma_unmap_len(tx_buff, len), DMA_TO_DEVICE);
  149. /* return the sk_buff to system */
  150. dev_kfree_skb_irq(skb);
  151. txbd->data = 0;
  152. txbd->info = 0;
  153. if (netif_queue_stopped(ndev))
  154. netif_wake_queue(ndev);
  155. }
  156. }
  157. /**
  158. * arc_emac_rx - processing of Rx packets.
  159. * @ndev: Pointer to the network device.
  160. * @budget: How many BDs to process on 1 call.
  161. *
  162. * returns: Number of processed BDs
  163. *
  164. * Iterate through Rx BDs and deliver received packages to upper layer.
  165. */
  166. static int arc_emac_rx(struct net_device *ndev, int budget)
  167. {
  168. struct arc_emac_priv *priv = netdev_priv(ndev);
  169. unsigned int work_done;
  170. for (work_done = 0; work_done < budget; work_done++) {
  171. unsigned int *last_rx_bd = &priv->last_rx_bd;
  172. struct net_device_stats *stats = &priv->stats;
  173. struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
  174. struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
  175. unsigned int pktlen, info = le32_to_cpu(rxbd->info);
  176. struct sk_buff *skb;
  177. dma_addr_t addr;
  178. if (unlikely((info & OWN_MASK) == FOR_EMAC))
  179. break;
  180. /* Make a note that we saw a packet at this BD.
  181. * So next time, driver starts from this + 1
  182. */
  183. *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
  184. if (unlikely((info & FIRST_OR_LAST_MASK) !=
  185. FIRST_OR_LAST_MASK)) {
  186. /* We pre-allocate buffers of MTU size so incoming
  187. * packets won't be split/chained.
  188. */
  189. if (net_ratelimit())
  190. netdev_err(ndev, "incomplete packet received\n");
  191. /* Return ownership to EMAC */
  192. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  193. stats->rx_errors++;
  194. stats->rx_length_errors++;
  195. continue;
  196. }
  197. pktlen = info & LEN_MASK;
  198. stats->rx_packets++;
  199. stats->rx_bytes += pktlen;
  200. skb = rx_buff->skb;
  201. skb_put(skb, pktlen);
  202. skb->dev = ndev;
  203. skb->protocol = eth_type_trans(skb, ndev);
  204. dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr),
  205. dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE);
  206. /* Prepare the BD for next cycle */
  207. rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
  208. EMAC_BUFFER_SIZE);
  209. if (unlikely(!rx_buff->skb)) {
  210. stats->rx_errors++;
  211. /* Because receive_skb is below, increment rx_dropped */
  212. stats->rx_dropped++;
  213. continue;
  214. }
  215. /* receive_skb only if new skb was allocated to avoid holes */
  216. netif_receive_skb(skb);
  217. addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
  218. EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
  219. if (dma_mapping_error(&ndev->dev, addr)) {
  220. if (net_ratelimit())
  221. netdev_err(ndev, "cannot dma map\n");
  222. dev_kfree_skb(rx_buff->skb);
  223. stats->rx_errors++;
  224. continue;
  225. }
  226. dma_unmap_addr_set(rx_buff, addr, addr);
  227. dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
  228. rxbd->data = cpu_to_le32(addr);
  229. /* Make sure pointer to data buffer is set */
  230. wmb();
  231. /* Return ownership to EMAC */
  232. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  233. }
  234. return work_done;
  235. }
  236. /**
  237. * arc_emac_poll - NAPI poll handler.
  238. * @napi: Pointer to napi_struct structure.
  239. * @budget: How many BDs to process on 1 call.
  240. *
  241. * returns: Number of processed BDs
  242. */
  243. static int arc_emac_poll(struct napi_struct *napi, int budget)
  244. {
  245. struct net_device *ndev = napi->dev;
  246. struct arc_emac_priv *priv = netdev_priv(ndev);
  247. unsigned int work_done;
  248. arc_emac_tx_clean(ndev);
  249. work_done = arc_emac_rx(ndev, budget);
  250. if (work_done < budget) {
  251. napi_complete(napi);
  252. arc_reg_or(priv, R_ENABLE, RXINT_MASK);
  253. }
  254. return work_done;
  255. }
  256. /**
  257. * arc_emac_intr - Global interrupt handler for EMAC.
  258. * @irq: irq number.
  259. * @dev_instance: device instance.
  260. *
  261. * returns: IRQ_HANDLED for all cases.
  262. *
  263. * ARC EMAC has only 1 interrupt line, and depending on bits raised in
  264. * STATUS register we may tell what is a reason for interrupt to fire.
  265. */
  266. static irqreturn_t arc_emac_intr(int irq, void *dev_instance)
  267. {
  268. struct net_device *ndev = dev_instance;
  269. struct arc_emac_priv *priv = netdev_priv(ndev);
  270. struct net_device_stats *stats = &priv->stats;
  271. unsigned int status;
  272. status = arc_reg_get(priv, R_STATUS);
  273. status &= ~MDIO_MASK;
  274. /* Reset all flags except "MDIO complete" */
  275. arc_reg_set(priv, R_STATUS, status);
  276. if (status & RXINT_MASK) {
  277. if (likely(napi_schedule_prep(&priv->napi))) {
  278. arc_reg_clr(priv, R_ENABLE, RXINT_MASK);
  279. __napi_schedule(&priv->napi);
  280. }
  281. }
  282. if (status & ERR_MASK) {
  283. /* MSER/RXCR/RXFR/RXFL interrupt fires on corresponding
  284. * 8-bit error counter overrun.
  285. */
  286. if (status & MSER_MASK) {
  287. stats->rx_missed_errors += 0x100;
  288. stats->rx_errors += 0x100;
  289. }
  290. if (status & RXCR_MASK) {
  291. stats->rx_crc_errors += 0x100;
  292. stats->rx_errors += 0x100;
  293. }
  294. if (status & RXFR_MASK) {
  295. stats->rx_frame_errors += 0x100;
  296. stats->rx_errors += 0x100;
  297. }
  298. if (status & RXFL_MASK) {
  299. stats->rx_over_errors += 0x100;
  300. stats->rx_errors += 0x100;
  301. }
  302. }
  303. return IRQ_HANDLED;
  304. }
  305. /**
  306. * arc_emac_open - Open the network device.
  307. * @ndev: Pointer to the network device.
  308. *
  309. * returns: 0, on success or non-zero error value on failure.
  310. *
  311. * This function sets the MAC address, requests and enables an IRQ
  312. * for the EMAC device and starts the Tx queue.
  313. * It also connects to the phy device.
  314. */
  315. static int arc_emac_open(struct net_device *ndev)
  316. {
  317. struct arc_emac_priv *priv = netdev_priv(ndev);
  318. struct phy_device *phy_dev = priv->phy_dev;
  319. int i;
  320. phy_dev->autoneg = AUTONEG_ENABLE;
  321. phy_dev->speed = 0;
  322. phy_dev->duplex = 0;
  323. phy_dev->advertising = phy_dev->supported;
  324. if (priv->max_speed > 100) {
  325. phy_dev->advertising &= PHY_GBIT_FEATURES;
  326. } else if (priv->max_speed <= 100) {
  327. phy_dev->advertising &= PHY_BASIC_FEATURES;
  328. if (priv->max_speed <= 10) {
  329. phy_dev->advertising &= ~SUPPORTED_100baseT_Half;
  330. phy_dev->advertising &= ~SUPPORTED_100baseT_Full;
  331. }
  332. }
  333. priv->last_rx_bd = 0;
  334. /* Allocate and set buffers for Rx BD's */
  335. for (i = 0; i < RX_BD_NUM; i++) {
  336. dma_addr_t addr;
  337. unsigned int *last_rx_bd = &priv->last_rx_bd;
  338. struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
  339. struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
  340. rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
  341. EMAC_BUFFER_SIZE);
  342. if (unlikely(!rx_buff->skb))
  343. return -ENOMEM;
  344. addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
  345. EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
  346. if (dma_mapping_error(&ndev->dev, addr)) {
  347. netdev_err(ndev, "cannot dma map\n");
  348. dev_kfree_skb(rx_buff->skb);
  349. return -ENOMEM;
  350. }
  351. dma_unmap_addr_set(rx_buff, addr, addr);
  352. dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
  353. rxbd->data = cpu_to_le32(addr);
  354. /* Make sure pointer to data buffer is set */
  355. wmb();
  356. /* Return ownership to EMAC */
  357. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  358. *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
  359. }
  360. /* Clean Tx BD's */
  361. memset(priv->txbd, 0, TX_RING_SZ);
  362. /* Initialize logical address filter */
  363. arc_reg_set(priv, R_LAFL, 0);
  364. arc_reg_set(priv, R_LAFH, 0);
  365. /* Set BD ring pointers for device side */
  366. arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma);
  367. arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma);
  368. /* Enable interrupts */
  369. arc_reg_set(priv, R_ENABLE, RXINT_MASK | ERR_MASK);
  370. /* Set CONTROL */
  371. arc_reg_set(priv, R_CTRL,
  372. (RX_BD_NUM << 24) | /* RX BD table length */
  373. (TX_BD_NUM << 16) | /* TX BD table length */
  374. TXRN_MASK | RXRN_MASK);
  375. napi_enable(&priv->napi);
  376. /* Enable EMAC */
  377. arc_reg_or(priv, R_CTRL, EN_MASK);
  378. phy_start_aneg(priv->phy_dev);
  379. netif_start_queue(ndev);
  380. return 0;
  381. }
  382. /**
  383. * arc_emac_stop - Close the network device.
  384. * @ndev: Pointer to the network device.
  385. *
  386. * This function stops the Tx queue, disables interrupts and frees the IRQ for
  387. * the EMAC device.
  388. * It also disconnects the PHY device associated with the EMAC device.
  389. */
  390. static int arc_emac_stop(struct net_device *ndev)
  391. {
  392. struct arc_emac_priv *priv = netdev_priv(ndev);
  393. napi_disable(&priv->napi);
  394. netif_stop_queue(ndev);
  395. /* Disable interrupts */
  396. arc_reg_clr(priv, R_ENABLE, RXINT_MASK | ERR_MASK);
  397. /* Disable EMAC */
  398. arc_reg_clr(priv, R_CTRL, EN_MASK);
  399. return 0;
  400. }
  401. /**
  402. * arc_emac_stats - Get system network statistics.
  403. * @ndev: Pointer to net_device structure.
  404. *
  405. * Returns the address of the device statistics structure.
  406. * Statistics are updated in interrupt handler.
  407. */
  408. static struct net_device_stats *arc_emac_stats(struct net_device *ndev)
  409. {
  410. struct arc_emac_priv *priv = netdev_priv(ndev);
  411. struct net_device_stats *stats = &priv->stats;
  412. unsigned long miss, rxerr;
  413. u8 rxcrc, rxfram, rxoflow;
  414. rxerr = arc_reg_get(priv, R_RXERR);
  415. miss = arc_reg_get(priv, R_MISS);
  416. rxcrc = rxerr;
  417. rxfram = rxerr >> 8;
  418. rxoflow = rxerr >> 16;
  419. stats->rx_errors += miss;
  420. stats->rx_errors += rxcrc + rxfram + rxoflow;
  421. stats->rx_over_errors += rxoflow;
  422. stats->rx_frame_errors += rxfram;
  423. stats->rx_crc_errors += rxcrc;
  424. stats->rx_missed_errors += miss;
  425. return stats;
  426. }
  427. /**
  428. * arc_emac_tx - Starts the data transmission.
  429. * @skb: sk_buff pointer that contains data to be Transmitted.
  430. * @ndev: Pointer to net_device structure.
  431. *
  432. * returns: NETDEV_TX_OK, on success
  433. * NETDEV_TX_BUSY, if any of the descriptors are not free.
  434. *
  435. * This function is invoked from upper layers to initiate transmission.
  436. */
  437. static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
  438. {
  439. struct arc_emac_priv *priv = netdev_priv(ndev);
  440. unsigned int len, *txbd_curr = &priv->txbd_curr;
  441. struct net_device_stats *stats = &priv->stats;
  442. __le32 *info = &priv->txbd[*txbd_curr].info;
  443. dma_addr_t addr;
  444. if (skb_padto(skb, ETH_ZLEN))
  445. return NETDEV_TX_OK;
  446. len = max_t(unsigned int, ETH_ZLEN, skb->len);
  447. /* EMAC still holds this buffer in its possession.
  448. * CPU must not modify this buffer descriptor
  449. */
  450. if (unlikely((le32_to_cpu(*info) & OWN_MASK) == FOR_EMAC)) {
  451. netif_stop_queue(ndev);
  452. return NETDEV_TX_BUSY;
  453. }
  454. addr = dma_map_single(&ndev->dev, (void *)skb->data, len,
  455. DMA_TO_DEVICE);
  456. if (unlikely(dma_mapping_error(&ndev->dev, addr))) {
  457. stats->tx_dropped++;
  458. stats->tx_errors++;
  459. dev_kfree_skb(skb);
  460. return NETDEV_TX_OK;
  461. }
  462. dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr);
  463. dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len);
  464. priv->tx_buff[*txbd_curr].skb = skb;
  465. priv->txbd[*txbd_curr].data = cpu_to_le32(addr);
  466. /* Make sure pointer to data buffer is set */
  467. wmb();
  468. *info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len);
  469. /* Increment index to point to the next BD */
  470. *txbd_curr = (*txbd_curr + 1) % TX_BD_NUM;
  471. /* Get "info" of the next BD */
  472. info = &priv->txbd[*txbd_curr].info;
  473. /* Check if if Tx BD ring is full - next BD is still owned by EMAC */
  474. if (unlikely((le32_to_cpu(*info) & OWN_MASK) == FOR_EMAC))
  475. netif_stop_queue(ndev);
  476. arc_reg_set(priv, R_STATUS, TXPL_MASK);
  477. skb_tx_timestamp(skb);
  478. return NETDEV_TX_OK;
  479. }
  480. /**
  481. * arc_emac_set_address - Set the MAC address for this device.
  482. * @ndev: Pointer to net_device structure.
  483. * @p: 6 byte Address to be written as MAC address.
  484. *
  485. * This function copies the HW address from the sockaddr structure to the
  486. * net_device structure and updates the address in HW.
  487. *
  488. * returns: -EBUSY if the net device is busy or 0 if the address is set
  489. * successfully.
  490. */
  491. static int arc_emac_set_address(struct net_device *ndev, void *p)
  492. {
  493. struct arc_emac_priv *priv = netdev_priv(ndev);
  494. struct sockaddr *addr = p;
  495. unsigned int addr_low, addr_hi;
  496. if (netif_running(ndev))
  497. return -EBUSY;
  498. if (!is_valid_ether_addr(addr->sa_data))
  499. return -EADDRNOTAVAIL;
  500. memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
  501. addr_low = le32_to_cpu(*(__le32 *) &ndev->dev_addr[0]);
  502. addr_hi = le16_to_cpu(*(__le16 *) &ndev->dev_addr[4]);
  503. arc_reg_set(priv, R_ADDRL, addr_low);
  504. arc_reg_set(priv, R_ADDRH, addr_hi);
  505. return 0;
  506. }
  507. static const struct net_device_ops arc_emac_netdev_ops = {
  508. .ndo_open = arc_emac_open,
  509. .ndo_stop = arc_emac_stop,
  510. .ndo_start_xmit = arc_emac_tx,
  511. .ndo_set_mac_address = arc_emac_set_address,
  512. .ndo_get_stats = arc_emac_stats,
  513. };
  514. static int arc_emac_probe(struct platform_device *pdev)
  515. {
  516. struct resource res_regs, res_irq;
  517. struct device_node *phy_node;
  518. struct arc_emac_priv *priv;
  519. struct net_device *ndev;
  520. const char *mac_addr;
  521. unsigned int id, clock_frequency;
  522. int err;
  523. if (!pdev->dev.of_node)
  524. return -ENODEV;
  525. /* Get PHY from device tree */
  526. phy_node = of_parse_phandle(pdev->dev.of_node, "phy", 0);
  527. if (!phy_node) {
  528. dev_err(&pdev->dev, "failed to retrieve phy description from device tree\n");
  529. return -ENODEV;
  530. }
  531. /* Get EMAC registers base address from device tree */
  532. err = of_address_to_resource(pdev->dev.of_node, 0, &res_regs);
  533. if (err) {
  534. dev_err(&pdev->dev, "failed to retrieve registers base from device tree\n");
  535. return -ENODEV;
  536. }
  537. /* Get CPU clock frequency from device tree */
  538. if (of_property_read_u32(pdev->dev.of_node, "clock-frequency",
  539. &clock_frequency)) {
  540. dev_err(&pdev->dev, "failed to retrieve <clock-frequency> from device tree\n");
  541. return -EINVAL;
  542. }
  543. /* Get IRQ from device tree */
  544. err = of_irq_to_resource(pdev->dev.of_node, 0, &res_irq);
  545. if (!err) {
  546. dev_err(&pdev->dev, "failed to retrieve <irq> value from device tree\n");
  547. return -ENODEV;
  548. }
  549. ndev = alloc_etherdev(sizeof(struct arc_emac_priv));
  550. if (!ndev)
  551. return -ENOMEM;
  552. SET_NETDEV_DEV(ndev, &pdev->dev);
  553. ndev->netdev_ops = &arc_emac_netdev_ops;
  554. ndev->ethtool_ops = &arc_emac_ethtool_ops;
  555. ndev->watchdog_timeo = TX_TIMEOUT;
  556. /* FIXME :: no multicast support yet */
  557. ndev->flags &= ~IFF_MULTICAST;
  558. priv = netdev_priv(ndev);
  559. priv->dev = &pdev->dev;
  560. priv->ndev = ndev;
  561. priv->regs = devm_ioremap_resource(&pdev->dev, &res_regs);
  562. if (IS_ERR(priv->regs)) {
  563. err = PTR_ERR(priv->regs);
  564. goto out;
  565. }
  566. dev_dbg(&pdev->dev, "Registers base address is 0x%p\n", priv->regs);
  567. id = arc_reg_get(priv, R_ID);
  568. /* Check for EMAC revision 5 or 7, magic number */
  569. if (!(id == 0x0005fd02 || id == 0x0007fd02)) {
  570. dev_err(&pdev->dev, "ARC EMAC not detected, id=0x%x\n", id);
  571. err = -ENODEV;
  572. goto out;
  573. }
  574. dev_info(&pdev->dev, "ARC EMAC detected with id: 0x%x\n", id);
  575. /* Set poll rate so that it polls every 1 ms */
  576. arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000);
  577. /* Get max speed of operation from device tree */
  578. if (of_property_read_u32(pdev->dev.of_node, "max-speed",
  579. &priv->max_speed)) {
  580. dev_err(&pdev->dev, "failed to retrieve <max-speed> from device tree\n");
  581. err = -EINVAL;
  582. goto out;
  583. }
  584. ndev->irq = res_irq.start;
  585. dev_info(&pdev->dev, "IRQ is %d\n", ndev->irq);
  586. /* Register interrupt handler for device */
  587. err = devm_request_irq(&pdev->dev, ndev->irq, arc_emac_intr, 0,
  588. ndev->name, ndev);
  589. if (err) {
  590. dev_err(&pdev->dev, "could not allocate IRQ\n");
  591. goto out;
  592. }
  593. /* Get MAC address from device tree */
  594. mac_addr = of_get_mac_address(pdev->dev.of_node);
  595. if (!mac_addr || !is_valid_ether_addr(mac_addr))
  596. eth_hw_addr_random(ndev);
  597. else
  598. memcpy(ndev->dev_addr, mac_addr, ETH_ALEN);
  599. dev_info(&pdev->dev, "MAC address is now %pM\n", ndev->dev_addr);
  600. /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */
  601. priv->rxbd = dmam_alloc_coherent(&pdev->dev, RX_RING_SZ + TX_RING_SZ,
  602. &priv->rxbd_dma, GFP_KERNEL);
  603. if (!priv->rxbd) {
  604. dev_err(&pdev->dev, "failed to allocate data buffers\n");
  605. err = -ENOMEM;
  606. goto out;
  607. }
  608. priv->txbd = priv->rxbd + RX_BD_NUM;
  609. priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ;
  610. dev_dbg(&pdev->dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n",
  611. (unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma);
  612. err = arc_mdio_probe(pdev, priv);
  613. if (err) {
  614. dev_err(&pdev->dev, "failed to probe MII bus\n");
  615. goto out;
  616. }
  617. priv->phy_dev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0,
  618. PHY_INTERFACE_MODE_MII);
  619. if (!priv->phy_dev) {
  620. dev_err(&pdev->dev, "of_phy_connect() failed\n");
  621. err = -ENODEV;
  622. goto out;
  623. }
  624. dev_info(&pdev->dev, "connected to %s phy with id 0x%x\n",
  625. priv->phy_dev->drv->name, priv->phy_dev->phy_id);
  626. netif_napi_add(ndev, &priv->napi, arc_emac_poll, ARC_EMAC_NAPI_WEIGHT);
  627. err = register_netdev(ndev);
  628. if (err) {
  629. netif_napi_del(&priv->napi);
  630. dev_err(&pdev->dev, "failed to register network device\n");
  631. goto out;
  632. }
  633. return 0;
  634. out:
  635. free_netdev(ndev);
  636. return err;
  637. }
  638. static int arc_emac_remove(struct platform_device *pdev)
  639. {
  640. struct net_device *ndev = platform_get_drvdata(pdev);
  641. struct arc_emac_priv *priv = netdev_priv(ndev);
  642. phy_disconnect(priv->phy_dev);
  643. priv->phy_dev = NULL;
  644. arc_mdio_remove(priv);
  645. unregister_netdev(ndev);
  646. netif_napi_del(&priv->napi);
  647. free_netdev(ndev);
  648. return 0;
  649. }
  650. static const struct of_device_id arc_emac_dt_ids[] = {
  651. { .compatible = "snps,arc-emac" },
  652. { /* Sentinel */ }
  653. };
  654. MODULE_DEVICE_TABLE(of, arc_emac_dt_ids);
  655. static struct platform_driver arc_emac_driver = {
  656. .probe = arc_emac_probe,
  657. .remove = arc_emac_remove,
  658. .driver = {
  659. .name = DRV_NAME,
  660. .owner = THIS_MODULE,
  661. .of_match_table = arc_emac_dt_ids,
  662. },
  663. };
  664. module_platform_driver(arc_emac_driver);
  665. MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>");
  666. MODULE_DESCRIPTION("ARC EMAC driver");
  667. MODULE_LICENSE("GPL");