fw-card.c 14 KB

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  1. /* -*- c-basic-offset: 8 -*-
  2. *
  3. * fw-card.c - card level functions
  4. *
  5. * Copyright (C) 2005-2006 Kristian Hoegsberg <krh@bitplanet.net>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software Foundation,
  19. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/errno.h>
  23. #include <linux/device.h>
  24. #include <linux/rwsem.h>
  25. #include "fw-transaction.h"
  26. #include "fw-topology.h"
  27. #include "fw-device.h"
  28. /* The lib/crc16.c implementation uses the standard (0x8005)
  29. * polynomial, but we need the ITU-T (or CCITT) polynomial (0x1021).
  30. * The implementation below works on an array of host-endian u32
  31. * words, assuming they'll be transmited msb first. */
  32. u16
  33. crc16_itu_t(const u32 *buffer, size_t length)
  34. {
  35. int shift, i;
  36. u32 data;
  37. u16 sum, crc = 0;
  38. for (i = 0; i < length; i++) {
  39. data = *buffer++;
  40. for (shift = 28; shift >= 0; shift -= 4 ) {
  41. sum = ((crc >> 12) ^ (data >> shift)) & 0xf;
  42. crc = (crc << 4) ^ (sum << 12) ^ (sum << 5) ^ (sum);
  43. }
  44. crc &= 0xffff;
  45. }
  46. return crc;
  47. }
  48. static DECLARE_RWSEM(card_rwsem);
  49. static LIST_HEAD(card_list);
  50. static LIST_HEAD(descriptor_list);
  51. static int descriptor_count;
  52. #define bib_crc(v) ((v) << 0)
  53. #define bib_crc_length(v) ((v) << 16)
  54. #define bib_info_length(v) ((v) << 24)
  55. #define bib_link_speed(v) ((v) << 0)
  56. #define bib_generation(v) ((v) << 4)
  57. #define bib_max_rom(v) ((v) << 8)
  58. #define bib_max_receive(v) ((v) << 12)
  59. #define bib_cyc_clk_acc(v) ((v) << 16)
  60. #define bib_pmc ((1) << 27)
  61. #define bib_bmc ((1) << 28)
  62. #define bib_isc ((1) << 29)
  63. #define bib_cmc ((1) << 30)
  64. #define bib_imc ((1) << 31)
  65. static u32 *
  66. generate_config_rom (struct fw_card *card, size_t *config_rom_length)
  67. {
  68. struct fw_descriptor *desc;
  69. static u32 config_rom[256];
  70. int i, j, length;
  71. /* Initialize contents of config rom buffer. On the OHCI
  72. * controller, block reads to the config rom accesses the host
  73. * memory, but quadlet read access the hardware bus info block
  74. * registers. That's just crack, but it means we should make
  75. * sure the contents of bus info block in host memory mathces
  76. * the version stored in the OHCI registers. */
  77. memset(config_rom, 0, sizeof config_rom);
  78. config_rom[0] = bib_crc_length(4) | bib_info_length(4) | bib_crc(0);
  79. config_rom[1] = 0x31333934;
  80. config_rom[2] =
  81. bib_link_speed(card->link_speed) |
  82. bib_generation(card->config_rom_generation++ % 14 + 2) |
  83. bib_max_rom(2) |
  84. bib_max_receive(card->max_receive) |
  85. bib_bmc | bib_isc | bib_cmc | bib_imc;
  86. config_rom[3] = card->guid >> 32;
  87. config_rom[4] = card->guid;
  88. /* Generate root directory. */
  89. i = 5;
  90. config_rom[i++] = 0;
  91. config_rom[i++] = 0x0c0083c0; /* node capabilities */
  92. j = i + descriptor_count;
  93. /* Generate root directory entries for descriptors. */
  94. list_for_each_entry (desc, &descriptor_list, link) {
  95. if (desc->immediate > 0)
  96. config_rom[i++] = desc->immediate;
  97. config_rom[i] = desc->key | (j - i);
  98. i++;
  99. j += desc->length;
  100. }
  101. /* Update root directory length. */
  102. config_rom[5] = (i - 5 - 1) << 16;
  103. /* End of root directory, now copy in descriptors. */
  104. list_for_each_entry (desc, &descriptor_list, link) {
  105. memcpy(&config_rom[i], desc->data, desc->length * 4);
  106. i += desc->length;
  107. }
  108. /* Calculate CRCs for all blocks in the config rom. This
  109. * assumes that CRC length and info length are identical for
  110. * the bus info block, which is always the case for this
  111. * implementation. */
  112. for (i = 0; i < j; i += length + 1) {
  113. length = (config_rom[i] >> 16) & 0xff;
  114. config_rom[i] |= crc16_itu_t(&config_rom[i + 1], length);
  115. }
  116. *config_rom_length = j;
  117. return config_rom;
  118. }
  119. static void
  120. update_config_roms (void)
  121. {
  122. struct fw_card *card;
  123. u32 *config_rom;
  124. size_t length;
  125. list_for_each_entry (card, &card_list, link) {
  126. config_rom = generate_config_rom(card, &length);
  127. card->driver->set_config_rom(card, config_rom, length);
  128. }
  129. }
  130. int
  131. fw_core_add_descriptor (struct fw_descriptor *desc)
  132. {
  133. size_t i;
  134. /* Check descriptor is valid; the length of all blocks in the
  135. * descriptor has to add up to exactly the length of the
  136. * block. */
  137. i = 0;
  138. while (i < desc->length)
  139. i += (desc->data[i] >> 16) + 1;
  140. if (i != desc->length)
  141. return -EINVAL;
  142. down_write(&card_rwsem);
  143. list_add_tail (&desc->link, &descriptor_list);
  144. descriptor_count++;
  145. if (desc->immediate > 0)
  146. descriptor_count++;
  147. update_config_roms();
  148. up_write(&card_rwsem);
  149. return 0;
  150. }
  151. EXPORT_SYMBOL(fw_core_add_descriptor);
  152. void
  153. fw_core_remove_descriptor (struct fw_descriptor *desc)
  154. {
  155. down_write(&card_rwsem);
  156. list_del(&desc->link);
  157. descriptor_count--;
  158. if (desc->immediate > 0)
  159. descriptor_count--;
  160. update_config_roms();
  161. up_write(&card_rwsem);
  162. }
  163. EXPORT_SYMBOL(fw_core_remove_descriptor);
  164. static const char gap_count_table[] = {
  165. 63, 5, 7, 8, 10, 13, 16, 18, 21, 24, 26, 29, 32, 35, 37, 40
  166. };
  167. struct bm_data {
  168. struct fw_transaction t;
  169. struct {
  170. __be32 arg;
  171. __be32 data;
  172. } lock;
  173. u32 old;
  174. int rcode;
  175. struct completion done;
  176. };
  177. static void
  178. complete_bm_lock(struct fw_card *card, int rcode,
  179. void *payload, size_t length, void *data)
  180. {
  181. struct bm_data *bmd = data;
  182. if (rcode == RCODE_COMPLETE)
  183. bmd->old = be32_to_cpu(*(__be32 *) payload);
  184. bmd->rcode = rcode;
  185. complete(&bmd->done);
  186. }
  187. static void
  188. fw_card_bm_work(struct work_struct *work)
  189. {
  190. struct fw_card *card = container_of(work, struct fw_card, work.work);
  191. struct fw_device *root;
  192. struct bm_data bmd;
  193. unsigned long flags;
  194. int root_id, new_root_id, irm_id, gap_count, generation, grace;
  195. int do_reset = 0;
  196. spin_lock_irqsave(&card->lock, flags);
  197. generation = card->generation;
  198. root = card->root_node->data;
  199. root_id = card->root_node->node_id;
  200. grace = time_after(jiffies, card->reset_jiffies + DIV_ROUND_UP(HZ, 10));
  201. if (card->bm_generation + 1 == generation ||
  202. (card->bm_generation != generation && grace)) {
  203. /* This first step is to figure out who is IRM and
  204. * then try to become bus manager. If the IRM is not
  205. * well defined (e.g. does not have an active link
  206. * layer or does not responds to our lock request, we
  207. * will have to do a little vigilante bus management.
  208. * In that case, we do a goto into the gap count logic
  209. * so that when we do the reset, we still optimize the
  210. * gap count. That could well save a reset in the
  211. * next generation. */
  212. irm_id = card->irm_node->node_id;
  213. if (!card->irm_node->link_on) {
  214. new_root_id = card->local_node->node_id;
  215. fw_notify("IRM has link off, making local node (%02x) root.\n",
  216. new_root_id);
  217. goto pick_me;
  218. }
  219. bmd.lock.arg = cpu_to_be32(0x3f);
  220. bmd.lock.data = cpu_to_be32(card->local_node->node_id);
  221. spin_unlock_irqrestore(&card->lock, flags);
  222. init_completion(&bmd.done);
  223. fw_send_request(card, &bmd.t, TCODE_LOCK_COMPARE_SWAP,
  224. irm_id, generation,
  225. SCODE_100, CSR_REGISTER_BASE + CSR_BUS_MANAGER_ID,
  226. &bmd.lock, sizeof bmd.lock,
  227. complete_bm_lock, &bmd);
  228. wait_for_completion(&bmd.done);
  229. if (bmd.rcode == RCODE_GENERATION) {
  230. /* Another bus reset happened. Just return,
  231. * the BM work has been rescheduled. */
  232. return;
  233. }
  234. if (bmd.rcode == RCODE_COMPLETE && bmd.old != 0x3f)
  235. /* Somebody else is BM, let them do the work. */
  236. return;
  237. spin_lock_irqsave(&card->lock, flags);
  238. if (bmd.rcode != RCODE_COMPLETE) {
  239. /* The lock request failed, maybe the IRM
  240. * isn't really IRM capable after all. Let's
  241. * do a bus reset and pick the local node as
  242. * root, and thus, IRM. */
  243. new_root_id = card->local_node->node_id;
  244. fw_notify("BM lock failed, making local node (%02x) root.\n",
  245. new_root_id);
  246. goto pick_me;
  247. }
  248. } else if (card->bm_generation != generation) {
  249. /* OK, we weren't BM in the last generation, and it's
  250. * less than 100ms since last bus reset. Reschedule
  251. * this task 100ms from now. */
  252. spin_unlock_irqrestore(&card->lock, flags);
  253. schedule_delayed_work(&card->work, DIV_ROUND_UP(HZ, 10));
  254. return;
  255. }
  256. /* We're bus manager for this generation, so next step is to
  257. * make sure we have an active cycle master and do gap count
  258. * optimization. */
  259. card->bm_generation = generation;
  260. if (root == NULL) {
  261. /* Either link_on is false, or we failed to read the
  262. * config rom. In either case, pick another root. */
  263. new_root_id = card->local_node->node_id;
  264. } else if (atomic_read(&root->state) != FW_DEVICE_RUNNING) {
  265. /* If we haven't probed this device yet, bail out now
  266. * and let's try again once that's done. */
  267. spin_unlock_irqrestore(&card->lock, flags);
  268. return;
  269. } else if (root->config_rom[2] & bib_cmc) {
  270. /* FIXME: I suppose we should set the cmstr bit in the
  271. * STATE_CLEAR register of this node, as described in
  272. * 1394-1995, 8.4.2.6. Also, send out a force root
  273. * packet for this node. */
  274. new_root_id = root_id;
  275. } else {
  276. /* Current root has an active link layer and we
  277. * successfully read the config rom, but it's not
  278. * cycle master capable. */
  279. new_root_id = card->local_node->node_id;
  280. }
  281. pick_me:
  282. /* Now figure out what gap count to set. */
  283. if (card->topology_type == FW_TOPOLOGY_A &&
  284. card->root_node->max_hops < ARRAY_SIZE(gap_count_table))
  285. gap_count = gap_count_table[card->root_node->max_hops];
  286. else
  287. gap_count = 63;
  288. /* Finally, figure out if we should do a reset or not. If we've
  289. * done less that 5 resets with the same physical topology and we
  290. * have either a new root or a new gap count setting, let's do it. */
  291. if (card->bm_retries++ < 5 &&
  292. (card->gap_count != gap_count || new_root_id != root_id))
  293. do_reset = 1;
  294. spin_unlock_irqrestore(&card->lock, flags);
  295. if (do_reset) {
  296. fw_notify("phy config: card %d, new root=%x, gap_count=%d\n",
  297. card->index, new_root_id, gap_count);
  298. fw_send_phy_config(card, new_root_id, generation, gap_count);
  299. fw_core_initiate_bus_reset(card, 1);
  300. }
  301. }
  302. static void
  303. flush_timer_callback(unsigned long data)
  304. {
  305. struct fw_card *card = (struct fw_card *)data;
  306. fw_flush_transactions(card);
  307. }
  308. void
  309. fw_card_initialize(struct fw_card *card, const struct fw_card_driver *driver,
  310. struct device *device)
  311. {
  312. static atomic_t index = ATOMIC_INIT(-1);
  313. kref_init(&card->kref);
  314. card->index = atomic_inc_return(&index);
  315. card->driver = driver;
  316. card->device = device;
  317. card->current_tlabel = 0;
  318. card->tlabel_mask = 0;
  319. card->color = 0;
  320. INIT_LIST_HEAD(&card->transaction_list);
  321. spin_lock_init(&card->lock);
  322. setup_timer(&card->flush_timer,
  323. flush_timer_callback, (unsigned long)card);
  324. card->local_node = NULL;
  325. INIT_DELAYED_WORK(&card->work, fw_card_bm_work);
  326. }
  327. EXPORT_SYMBOL(fw_card_initialize);
  328. int
  329. fw_card_add(struct fw_card *card,
  330. u32 max_receive, u32 link_speed, u64 guid)
  331. {
  332. u32 *config_rom;
  333. size_t length;
  334. card->max_receive = max_receive;
  335. card->link_speed = link_speed;
  336. card->guid = guid;
  337. /* Activate link_on bit and contender bit in our self ID packets.*/
  338. if (card->driver->update_phy_reg(card, 4, 0,
  339. PHY_LINK_ACTIVE | PHY_CONTENDER) < 0)
  340. return -EIO;
  341. /* The subsystem grabs a reference when the card is added and
  342. * drops it when the driver calls fw_core_remove_card. */
  343. fw_card_get(card);
  344. down_write(&card_rwsem);
  345. config_rom = generate_config_rom (card, &length);
  346. list_add_tail(&card->link, &card_list);
  347. up_write(&card_rwsem);
  348. return card->driver->enable(card, config_rom, length);
  349. }
  350. EXPORT_SYMBOL(fw_card_add);
  351. /* The next few functions implements a dummy driver that use once a
  352. * card driver shuts down an fw_card. This allows the driver to
  353. * cleanly unload, as all IO to the card will be handled by the dummy
  354. * driver instead of calling into the (possibly) unloaded module. The
  355. * dummy driver just fails all IO. */
  356. static int
  357. dummy_enable(struct fw_card *card, u32 *config_rom, size_t length)
  358. {
  359. BUG();
  360. return -1;
  361. }
  362. static int
  363. dummy_update_phy_reg(struct fw_card *card, int address,
  364. int clear_bits, int set_bits)
  365. {
  366. return -ENODEV;
  367. }
  368. static int
  369. dummy_set_config_rom(struct fw_card *card,
  370. u32 *config_rom, size_t length)
  371. {
  372. /* We take the card out of card_list before setting the dummy
  373. * driver, so this should never get called. */
  374. BUG();
  375. return -1;
  376. }
  377. static void
  378. dummy_send_request(struct fw_card *card, struct fw_packet *packet)
  379. {
  380. packet->callback(packet, card, -ENODEV);
  381. }
  382. static void
  383. dummy_send_response(struct fw_card *card, struct fw_packet *packet)
  384. {
  385. packet->callback(packet, card, -ENODEV);
  386. }
  387. static int
  388. dummy_cancel_packet(struct fw_card *card, struct fw_packet *packet)
  389. {
  390. return -ENOENT;
  391. }
  392. static int
  393. dummy_enable_phys_dma(struct fw_card *card,
  394. int node_id, int generation)
  395. {
  396. return -ENODEV;
  397. }
  398. static struct fw_card_driver dummy_driver = {
  399. .name = "dummy",
  400. .enable = dummy_enable,
  401. .update_phy_reg = dummy_update_phy_reg,
  402. .set_config_rom = dummy_set_config_rom,
  403. .send_request = dummy_send_request,
  404. .cancel_packet = dummy_cancel_packet,
  405. .send_response = dummy_send_response,
  406. .enable_phys_dma = dummy_enable_phys_dma,
  407. };
  408. void
  409. fw_core_remove_card(struct fw_card *card)
  410. {
  411. card->driver->update_phy_reg(card, 4,
  412. PHY_LINK_ACTIVE | PHY_CONTENDER, 0);
  413. fw_core_initiate_bus_reset(card, 1);
  414. down_write(&card_rwsem);
  415. list_del(&card->link);
  416. up_write(&card_rwsem);
  417. /* Set up the dummy driver. */
  418. card->driver = &dummy_driver;
  419. fw_flush_transactions(card);
  420. fw_destroy_nodes(card);
  421. fw_card_put(card);
  422. }
  423. EXPORT_SYMBOL(fw_core_remove_card);
  424. struct fw_card *
  425. fw_card_get(struct fw_card *card)
  426. {
  427. kref_get(&card->kref);
  428. return card;
  429. }
  430. EXPORT_SYMBOL(fw_card_get);
  431. static void
  432. release_card(struct kref *kref)
  433. {
  434. struct fw_card *card = container_of(kref, struct fw_card, kref);
  435. kfree(card);
  436. }
  437. /* An assumption for fw_card_put() is that the card driver allocates
  438. * the fw_card struct with kalloc and that it has been shut down
  439. * before the last ref is dropped. */
  440. void
  441. fw_card_put(struct fw_card *card)
  442. {
  443. kref_put(&card->kref, release_card);
  444. }
  445. EXPORT_SYMBOL(fw_card_put);
  446. int
  447. fw_core_initiate_bus_reset(struct fw_card *card, int short_reset)
  448. {
  449. int reg = short_reset ? 5 : 1;
  450. /* The following values happen to be the same bit. However be
  451. * explicit for clarity. */
  452. int bit = short_reset ? PHY_BUS_SHORT_RESET : PHY_BUS_RESET;
  453. return card->driver->update_phy_reg(card, reg, 0, bit);
  454. }
  455. EXPORT_SYMBOL(fw_core_initiate_bus_reset);