qib_qp.c 32 KB

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  1. /*
  2. * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved.
  3. * Copyright (c) 2006 - 2012 QLogic Corporation. * All rights reserved.
  4. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #include <linux/err.h>
  35. #include <linux/vmalloc.h>
  36. #include <linux/jhash.h>
  37. #include "qib.h"
  38. #define BITS_PER_PAGE (PAGE_SIZE*BITS_PER_BYTE)
  39. #define BITS_PER_PAGE_MASK (BITS_PER_PAGE-1)
  40. static inline unsigned mk_qpn(struct qib_qpn_table *qpt,
  41. struct qpn_map *map, unsigned off)
  42. {
  43. return (map - qpt->map) * BITS_PER_PAGE + off;
  44. }
  45. static inline unsigned find_next_offset(struct qib_qpn_table *qpt,
  46. struct qpn_map *map, unsigned off,
  47. unsigned n)
  48. {
  49. if (qpt->mask) {
  50. off++;
  51. if (((off & qpt->mask) >> 1) >= n)
  52. off = (off | qpt->mask) + 2;
  53. } else
  54. off = find_next_zero_bit(map->page, BITS_PER_PAGE, off);
  55. return off;
  56. }
  57. /*
  58. * Convert the AETH credit code into the number of credits.
  59. */
  60. static u32 credit_table[31] = {
  61. 0, /* 0 */
  62. 1, /* 1 */
  63. 2, /* 2 */
  64. 3, /* 3 */
  65. 4, /* 4 */
  66. 6, /* 5 */
  67. 8, /* 6 */
  68. 12, /* 7 */
  69. 16, /* 8 */
  70. 24, /* 9 */
  71. 32, /* A */
  72. 48, /* B */
  73. 64, /* C */
  74. 96, /* D */
  75. 128, /* E */
  76. 192, /* F */
  77. 256, /* 10 */
  78. 384, /* 11 */
  79. 512, /* 12 */
  80. 768, /* 13 */
  81. 1024, /* 14 */
  82. 1536, /* 15 */
  83. 2048, /* 16 */
  84. 3072, /* 17 */
  85. 4096, /* 18 */
  86. 6144, /* 19 */
  87. 8192, /* 1A */
  88. 12288, /* 1B */
  89. 16384, /* 1C */
  90. 24576, /* 1D */
  91. 32768 /* 1E */
  92. };
  93. static void get_map_page(struct qib_qpn_table *qpt, struct qpn_map *map)
  94. {
  95. unsigned long page = get_zeroed_page(GFP_KERNEL);
  96. /*
  97. * Free the page if someone raced with us installing it.
  98. */
  99. spin_lock(&qpt->lock);
  100. if (map->page)
  101. free_page(page);
  102. else
  103. map->page = (void *)page;
  104. spin_unlock(&qpt->lock);
  105. }
  106. /*
  107. * Allocate the next available QPN or
  108. * zero/one for QP type IB_QPT_SMI/IB_QPT_GSI.
  109. */
  110. static int alloc_qpn(struct qib_devdata *dd, struct qib_qpn_table *qpt,
  111. enum ib_qp_type type, u8 port)
  112. {
  113. u32 i, offset, max_scan, qpn;
  114. struct qpn_map *map;
  115. u32 ret;
  116. if (type == IB_QPT_SMI || type == IB_QPT_GSI) {
  117. unsigned n;
  118. ret = type == IB_QPT_GSI;
  119. n = 1 << (ret + 2 * (port - 1));
  120. spin_lock(&qpt->lock);
  121. if (qpt->flags & n)
  122. ret = -EINVAL;
  123. else
  124. qpt->flags |= n;
  125. spin_unlock(&qpt->lock);
  126. goto bail;
  127. }
  128. qpn = qpt->last + 2;
  129. if (qpn >= QPN_MAX)
  130. qpn = 2;
  131. if (qpt->mask && ((qpn & qpt->mask) >> 1) >= dd->n_krcv_queues)
  132. qpn = (qpn | qpt->mask) + 2;
  133. offset = qpn & BITS_PER_PAGE_MASK;
  134. map = &qpt->map[qpn / BITS_PER_PAGE];
  135. max_scan = qpt->nmaps - !offset;
  136. for (i = 0;;) {
  137. if (unlikely(!map->page)) {
  138. get_map_page(qpt, map);
  139. if (unlikely(!map->page))
  140. break;
  141. }
  142. do {
  143. if (!test_and_set_bit(offset, map->page)) {
  144. qpt->last = qpn;
  145. ret = qpn;
  146. goto bail;
  147. }
  148. offset = find_next_offset(qpt, map, offset,
  149. dd->n_krcv_queues);
  150. qpn = mk_qpn(qpt, map, offset);
  151. /*
  152. * This test differs from alloc_pidmap().
  153. * If find_next_offset() does find a zero
  154. * bit, we don't need to check for QPN
  155. * wrapping around past our starting QPN.
  156. * We just need to be sure we don't loop
  157. * forever.
  158. */
  159. } while (offset < BITS_PER_PAGE && qpn < QPN_MAX);
  160. /*
  161. * In order to keep the number of pages allocated to a
  162. * minimum, we scan the all existing pages before increasing
  163. * the size of the bitmap table.
  164. */
  165. if (++i > max_scan) {
  166. if (qpt->nmaps == QPNMAP_ENTRIES)
  167. break;
  168. map = &qpt->map[qpt->nmaps++];
  169. offset = 0;
  170. } else if (map < &qpt->map[qpt->nmaps]) {
  171. ++map;
  172. offset = 0;
  173. } else {
  174. map = &qpt->map[0];
  175. offset = 2;
  176. }
  177. qpn = mk_qpn(qpt, map, offset);
  178. }
  179. ret = -ENOMEM;
  180. bail:
  181. return ret;
  182. }
  183. static void free_qpn(struct qib_qpn_table *qpt, u32 qpn)
  184. {
  185. struct qpn_map *map;
  186. map = qpt->map + qpn / BITS_PER_PAGE;
  187. if (map->page)
  188. clear_bit(qpn & BITS_PER_PAGE_MASK, map->page);
  189. }
  190. static inline unsigned qpn_hash(struct qib_ibdev *dev, u32 qpn)
  191. {
  192. return jhash_1word(qpn, dev->qp_rnd) &
  193. (dev->qp_table_size - 1);
  194. }
  195. /*
  196. * Put the QP into the hash table.
  197. * The hash table holds a reference to the QP.
  198. */
  199. static void insert_qp(struct qib_ibdev *dev, struct qib_qp *qp)
  200. {
  201. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  202. unsigned long flags;
  203. unsigned n = qpn_hash(dev, qp->ibqp.qp_num);
  204. atomic_inc(&qp->refcount);
  205. spin_lock_irqsave(&dev->qpt_lock, flags);
  206. if (qp->ibqp.qp_num == 0)
  207. rcu_assign_pointer(ibp->qp0, qp);
  208. else if (qp->ibqp.qp_num == 1)
  209. rcu_assign_pointer(ibp->qp1, qp);
  210. else {
  211. qp->next = dev->qp_table[n];
  212. rcu_assign_pointer(dev->qp_table[n], qp);
  213. }
  214. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  215. }
  216. /*
  217. * Remove the QP from the table so it can't be found asynchronously by
  218. * the receive interrupt routine.
  219. */
  220. static void remove_qp(struct qib_ibdev *dev, struct qib_qp *qp)
  221. {
  222. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  223. unsigned n = qpn_hash(dev, qp->ibqp.qp_num);
  224. unsigned long flags;
  225. int removed = 1;
  226. spin_lock_irqsave(&dev->qpt_lock, flags);
  227. if (rcu_dereference_protected(ibp->qp0,
  228. lockdep_is_held(&dev->qpt_lock)) == qp) {
  229. rcu_assign_pointer(ibp->qp0, NULL);
  230. } else if (rcu_dereference_protected(ibp->qp1,
  231. lockdep_is_held(&dev->qpt_lock)) == qp) {
  232. rcu_assign_pointer(ibp->qp1, NULL);
  233. } else {
  234. struct qib_qp *q;
  235. struct qib_qp __rcu **qpp;
  236. removed = 0;
  237. qpp = &dev->qp_table[n];
  238. for (; (q = rcu_dereference_protected(*qpp,
  239. lockdep_is_held(&dev->qpt_lock))) != NULL;
  240. qpp = &q->next)
  241. if (q == qp) {
  242. rcu_assign_pointer(*qpp,
  243. rcu_dereference_protected(qp->next,
  244. lockdep_is_held(&dev->qpt_lock)));
  245. removed = 1;
  246. break;
  247. }
  248. }
  249. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  250. if (removed) {
  251. synchronize_rcu();
  252. atomic_dec(&qp->refcount);
  253. }
  254. }
  255. /**
  256. * qib_free_all_qps - check for QPs still in use
  257. * @qpt: the QP table to empty
  258. *
  259. * There should not be any QPs still in use.
  260. * Free memory for table.
  261. */
  262. unsigned qib_free_all_qps(struct qib_devdata *dd)
  263. {
  264. struct qib_ibdev *dev = &dd->verbs_dev;
  265. unsigned long flags;
  266. struct qib_qp *qp;
  267. unsigned n, qp_inuse = 0;
  268. for (n = 0; n < dd->num_pports; n++) {
  269. struct qib_ibport *ibp = &dd->pport[n].ibport_data;
  270. if (!qib_mcast_tree_empty(ibp))
  271. qp_inuse++;
  272. rcu_read_lock();
  273. if (rcu_dereference(ibp->qp0))
  274. qp_inuse++;
  275. if (rcu_dereference(ibp->qp1))
  276. qp_inuse++;
  277. rcu_read_unlock();
  278. }
  279. spin_lock_irqsave(&dev->qpt_lock, flags);
  280. for (n = 0; n < dev->qp_table_size; n++) {
  281. qp = rcu_dereference_protected(dev->qp_table[n],
  282. lockdep_is_held(&dev->qpt_lock));
  283. rcu_assign_pointer(dev->qp_table[n], NULL);
  284. for (; qp; qp = rcu_dereference_protected(qp->next,
  285. lockdep_is_held(&dev->qpt_lock)))
  286. qp_inuse++;
  287. }
  288. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  289. synchronize_rcu();
  290. return qp_inuse;
  291. }
  292. /**
  293. * qib_lookup_qpn - return the QP with the given QPN
  294. * @qpt: the QP table
  295. * @qpn: the QP number to look up
  296. *
  297. * The caller is responsible for decrementing the QP reference count
  298. * when done.
  299. */
  300. struct qib_qp *qib_lookup_qpn(struct qib_ibport *ibp, u32 qpn)
  301. {
  302. struct qib_qp *qp = NULL;
  303. rcu_read_lock();
  304. if (unlikely(qpn <= 1)) {
  305. if (qpn == 0)
  306. qp = rcu_dereference(ibp->qp0);
  307. else
  308. qp = rcu_dereference(ibp->qp1);
  309. if (qp)
  310. atomic_inc(&qp->refcount);
  311. } else {
  312. struct qib_ibdev *dev = &ppd_from_ibp(ibp)->dd->verbs_dev;
  313. unsigned n = qpn_hash(dev, qpn);
  314. for (qp = rcu_dereference(dev->qp_table[n]); qp;
  315. qp = rcu_dereference(qp->next))
  316. if (qp->ibqp.qp_num == qpn) {
  317. atomic_inc(&qp->refcount);
  318. break;
  319. }
  320. }
  321. rcu_read_unlock();
  322. return qp;
  323. }
  324. /**
  325. * qib_reset_qp - initialize the QP state to the reset state
  326. * @qp: the QP to reset
  327. * @type: the QP type
  328. */
  329. static void qib_reset_qp(struct qib_qp *qp, enum ib_qp_type type)
  330. {
  331. qp->remote_qpn = 0;
  332. qp->qkey = 0;
  333. qp->qp_access_flags = 0;
  334. atomic_set(&qp->s_dma_busy, 0);
  335. qp->s_flags &= QIB_S_SIGNAL_REQ_WR;
  336. qp->s_hdrwords = 0;
  337. qp->s_wqe = NULL;
  338. qp->s_draining = 0;
  339. qp->s_next_psn = 0;
  340. qp->s_last_psn = 0;
  341. qp->s_sending_psn = 0;
  342. qp->s_sending_hpsn = 0;
  343. qp->s_psn = 0;
  344. qp->r_psn = 0;
  345. qp->r_msn = 0;
  346. if (type == IB_QPT_RC) {
  347. qp->s_state = IB_OPCODE_RC_SEND_LAST;
  348. qp->r_state = IB_OPCODE_RC_SEND_LAST;
  349. } else {
  350. qp->s_state = IB_OPCODE_UC_SEND_LAST;
  351. qp->r_state = IB_OPCODE_UC_SEND_LAST;
  352. }
  353. qp->s_ack_state = IB_OPCODE_RC_ACKNOWLEDGE;
  354. qp->r_nak_state = 0;
  355. qp->r_aflags = 0;
  356. qp->r_flags = 0;
  357. qp->s_head = 0;
  358. qp->s_tail = 0;
  359. qp->s_cur = 0;
  360. qp->s_acked = 0;
  361. qp->s_last = 0;
  362. qp->s_ssn = 1;
  363. qp->s_lsn = 0;
  364. qp->s_mig_state = IB_MIG_MIGRATED;
  365. memset(qp->s_ack_queue, 0, sizeof(qp->s_ack_queue));
  366. qp->r_head_ack_queue = 0;
  367. qp->s_tail_ack_queue = 0;
  368. qp->s_num_rd_atomic = 0;
  369. if (qp->r_rq.wq) {
  370. qp->r_rq.wq->head = 0;
  371. qp->r_rq.wq->tail = 0;
  372. }
  373. qp->r_sge.num_sge = 0;
  374. }
  375. static void clear_mr_refs(struct qib_qp *qp, int clr_sends)
  376. {
  377. unsigned n;
  378. if (test_and_clear_bit(QIB_R_REWIND_SGE, &qp->r_aflags))
  379. qib_put_ss(&qp->s_rdma_read_sge);
  380. qib_put_ss(&qp->r_sge);
  381. if (clr_sends) {
  382. while (qp->s_last != qp->s_head) {
  383. struct qib_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
  384. unsigned i;
  385. for (i = 0; i < wqe->wr.num_sge; i++) {
  386. struct qib_sge *sge = &wqe->sg_list[i];
  387. qib_put_mr(sge->mr);
  388. }
  389. if (qp->ibqp.qp_type == IB_QPT_UD ||
  390. qp->ibqp.qp_type == IB_QPT_SMI ||
  391. qp->ibqp.qp_type == IB_QPT_GSI)
  392. atomic_dec(&to_iah(wqe->wr.wr.ud.ah)->refcount);
  393. if (++qp->s_last >= qp->s_size)
  394. qp->s_last = 0;
  395. }
  396. if (qp->s_rdma_mr) {
  397. qib_put_mr(qp->s_rdma_mr);
  398. qp->s_rdma_mr = NULL;
  399. }
  400. }
  401. if (qp->ibqp.qp_type != IB_QPT_RC)
  402. return;
  403. for (n = 0; n < ARRAY_SIZE(qp->s_ack_queue); n++) {
  404. struct qib_ack_entry *e = &qp->s_ack_queue[n];
  405. if (e->opcode == IB_OPCODE_RC_RDMA_READ_REQUEST &&
  406. e->rdma_sge.mr) {
  407. qib_put_mr(e->rdma_sge.mr);
  408. e->rdma_sge.mr = NULL;
  409. }
  410. }
  411. }
  412. /**
  413. * qib_error_qp - put a QP into the error state
  414. * @qp: the QP to put into the error state
  415. * @err: the receive completion error to signal if a RWQE is active
  416. *
  417. * Flushes both send and receive work queues.
  418. * Returns true if last WQE event should be generated.
  419. * The QP r_lock and s_lock should be held and interrupts disabled.
  420. * If we are already in error state, just return.
  421. */
  422. int qib_error_qp(struct qib_qp *qp, enum ib_wc_status err)
  423. {
  424. struct qib_ibdev *dev = to_idev(qp->ibqp.device);
  425. struct ib_wc wc;
  426. int ret = 0;
  427. if (qp->state == IB_QPS_ERR || qp->state == IB_QPS_RESET)
  428. goto bail;
  429. qp->state = IB_QPS_ERR;
  430. if (qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR)) {
  431. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR);
  432. del_timer(&qp->s_timer);
  433. }
  434. if (qp->s_flags & QIB_S_ANY_WAIT_SEND)
  435. qp->s_flags &= ~QIB_S_ANY_WAIT_SEND;
  436. spin_lock(&dev->pending_lock);
  437. if (!list_empty(&qp->iowait) && !(qp->s_flags & QIB_S_BUSY)) {
  438. qp->s_flags &= ~QIB_S_ANY_WAIT_IO;
  439. list_del_init(&qp->iowait);
  440. }
  441. spin_unlock(&dev->pending_lock);
  442. if (!(qp->s_flags & QIB_S_BUSY)) {
  443. qp->s_hdrwords = 0;
  444. if (qp->s_rdma_mr) {
  445. qib_put_mr(qp->s_rdma_mr);
  446. qp->s_rdma_mr = NULL;
  447. }
  448. if (qp->s_tx) {
  449. qib_put_txreq(qp->s_tx);
  450. qp->s_tx = NULL;
  451. }
  452. }
  453. /* Schedule the sending tasklet to drain the send work queue. */
  454. if (qp->s_last != qp->s_head)
  455. qib_schedule_send(qp);
  456. clear_mr_refs(qp, 0);
  457. memset(&wc, 0, sizeof(wc));
  458. wc.qp = &qp->ibqp;
  459. wc.opcode = IB_WC_RECV;
  460. if (test_and_clear_bit(QIB_R_WRID_VALID, &qp->r_aflags)) {
  461. wc.wr_id = qp->r_wr_id;
  462. wc.status = err;
  463. qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
  464. }
  465. wc.status = IB_WC_WR_FLUSH_ERR;
  466. if (qp->r_rq.wq) {
  467. struct qib_rwq *wq;
  468. u32 head;
  469. u32 tail;
  470. spin_lock(&qp->r_rq.lock);
  471. /* sanity check pointers before trusting them */
  472. wq = qp->r_rq.wq;
  473. head = wq->head;
  474. if (head >= qp->r_rq.size)
  475. head = 0;
  476. tail = wq->tail;
  477. if (tail >= qp->r_rq.size)
  478. tail = 0;
  479. while (tail != head) {
  480. wc.wr_id = get_rwqe_ptr(&qp->r_rq, tail)->wr_id;
  481. if (++tail >= qp->r_rq.size)
  482. tail = 0;
  483. qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
  484. }
  485. wq->tail = tail;
  486. spin_unlock(&qp->r_rq.lock);
  487. } else if (qp->ibqp.event_handler)
  488. ret = 1;
  489. bail:
  490. return ret;
  491. }
  492. /**
  493. * qib_modify_qp - modify the attributes of a queue pair
  494. * @ibqp: the queue pair who's attributes we're modifying
  495. * @attr: the new attributes
  496. * @attr_mask: the mask of attributes to modify
  497. * @udata: user data for libibverbs.so
  498. *
  499. * Returns 0 on success, otherwise returns an errno.
  500. */
  501. int qib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  502. int attr_mask, struct ib_udata *udata)
  503. {
  504. struct qib_ibdev *dev = to_idev(ibqp->device);
  505. struct qib_qp *qp = to_iqp(ibqp);
  506. enum ib_qp_state cur_state, new_state;
  507. struct ib_event ev;
  508. int lastwqe = 0;
  509. int mig = 0;
  510. int ret;
  511. u32 pmtu = 0; /* for gcc warning only */
  512. spin_lock_irq(&qp->r_lock);
  513. spin_lock(&qp->s_lock);
  514. cur_state = attr_mask & IB_QP_CUR_STATE ?
  515. attr->cur_qp_state : qp->state;
  516. new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state;
  517. if (!ib_modify_qp_is_ok(cur_state, new_state, ibqp->qp_type,
  518. attr_mask))
  519. goto inval;
  520. if (attr_mask & IB_QP_AV) {
  521. if (attr->ah_attr.dlid >= QIB_MULTICAST_LID_BASE)
  522. goto inval;
  523. if (qib_check_ah(qp->ibqp.device, &attr->ah_attr))
  524. goto inval;
  525. }
  526. if (attr_mask & IB_QP_ALT_PATH) {
  527. if (attr->alt_ah_attr.dlid >= QIB_MULTICAST_LID_BASE)
  528. goto inval;
  529. if (qib_check_ah(qp->ibqp.device, &attr->alt_ah_attr))
  530. goto inval;
  531. if (attr->alt_pkey_index >= qib_get_npkeys(dd_from_dev(dev)))
  532. goto inval;
  533. }
  534. if (attr_mask & IB_QP_PKEY_INDEX)
  535. if (attr->pkey_index >= qib_get_npkeys(dd_from_dev(dev)))
  536. goto inval;
  537. if (attr_mask & IB_QP_MIN_RNR_TIMER)
  538. if (attr->min_rnr_timer > 31)
  539. goto inval;
  540. if (attr_mask & IB_QP_PORT)
  541. if (qp->ibqp.qp_type == IB_QPT_SMI ||
  542. qp->ibqp.qp_type == IB_QPT_GSI ||
  543. attr->port_num == 0 ||
  544. attr->port_num > ibqp->device->phys_port_cnt)
  545. goto inval;
  546. if (attr_mask & IB_QP_DEST_QPN)
  547. if (attr->dest_qp_num > QIB_QPN_MASK)
  548. goto inval;
  549. if (attr_mask & IB_QP_RETRY_CNT)
  550. if (attr->retry_cnt > 7)
  551. goto inval;
  552. if (attr_mask & IB_QP_RNR_RETRY)
  553. if (attr->rnr_retry > 7)
  554. goto inval;
  555. /*
  556. * Don't allow invalid path_mtu values. OK to set greater
  557. * than the active mtu (or even the max_cap, if we have tuned
  558. * that to a small mtu. We'll set qp->path_mtu
  559. * to the lesser of requested attribute mtu and active,
  560. * for packetizing messages.
  561. * Note that the QP port has to be set in INIT and MTU in RTR.
  562. */
  563. if (attr_mask & IB_QP_PATH_MTU) {
  564. struct qib_devdata *dd = dd_from_dev(dev);
  565. int mtu, pidx = qp->port_num - 1;
  566. mtu = ib_mtu_enum_to_int(attr->path_mtu);
  567. if (mtu == -1)
  568. goto inval;
  569. if (mtu > dd->pport[pidx].ibmtu) {
  570. switch (dd->pport[pidx].ibmtu) {
  571. case 4096:
  572. pmtu = IB_MTU_4096;
  573. break;
  574. case 2048:
  575. pmtu = IB_MTU_2048;
  576. break;
  577. case 1024:
  578. pmtu = IB_MTU_1024;
  579. break;
  580. case 512:
  581. pmtu = IB_MTU_512;
  582. break;
  583. case 256:
  584. pmtu = IB_MTU_256;
  585. break;
  586. default:
  587. pmtu = IB_MTU_2048;
  588. }
  589. } else
  590. pmtu = attr->path_mtu;
  591. }
  592. if (attr_mask & IB_QP_PATH_MIG_STATE) {
  593. if (attr->path_mig_state == IB_MIG_REARM) {
  594. if (qp->s_mig_state == IB_MIG_ARMED)
  595. goto inval;
  596. if (new_state != IB_QPS_RTS)
  597. goto inval;
  598. } else if (attr->path_mig_state == IB_MIG_MIGRATED) {
  599. if (qp->s_mig_state == IB_MIG_REARM)
  600. goto inval;
  601. if (new_state != IB_QPS_RTS && new_state != IB_QPS_SQD)
  602. goto inval;
  603. if (qp->s_mig_state == IB_MIG_ARMED)
  604. mig = 1;
  605. } else
  606. goto inval;
  607. }
  608. if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
  609. if (attr->max_dest_rd_atomic > QIB_MAX_RDMA_ATOMIC)
  610. goto inval;
  611. switch (new_state) {
  612. case IB_QPS_RESET:
  613. if (qp->state != IB_QPS_RESET) {
  614. qp->state = IB_QPS_RESET;
  615. spin_lock(&dev->pending_lock);
  616. if (!list_empty(&qp->iowait))
  617. list_del_init(&qp->iowait);
  618. spin_unlock(&dev->pending_lock);
  619. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_ANY_WAIT);
  620. spin_unlock(&qp->s_lock);
  621. spin_unlock_irq(&qp->r_lock);
  622. /* Stop the sending work queue and retry timer */
  623. cancel_work_sync(&qp->s_work);
  624. del_timer_sync(&qp->s_timer);
  625. wait_event(qp->wait_dma, !atomic_read(&qp->s_dma_busy));
  626. if (qp->s_tx) {
  627. qib_put_txreq(qp->s_tx);
  628. qp->s_tx = NULL;
  629. }
  630. remove_qp(dev, qp);
  631. wait_event(qp->wait, !atomic_read(&qp->refcount));
  632. spin_lock_irq(&qp->r_lock);
  633. spin_lock(&qp->s_lock);
  634. clear_mr_refs(qp, 1);
  635. qib_reset_qp(qp, ibqp->qp_type);
  636. }
  637. break;
  638. case IB_QPS_RTR:
  639. /* Allow event to retrigger if QP set to RTR more than once */
  640. qp->r_flags &= ~QIB_R_COMM_EST;
  641. qp->state = new_state;
  642. break;
  643. case IB_QPS_SQD:
  644. qp->s_draining = qp->s_last != qp->s_cur;
  645. qp->state = new_state;
  646. break;
  647. case IB_QPS_SQE:
  648. if (qp->ibqp.qp_type == IB_QPT_RC)
  649. goto inval;
  650. qp->state = new_state;
  651. break;
  652. case IB_QPS_ERR:
  653. lastwqe = qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  654. break;
  655. default:
  656. qp->state = new_state;
  657. break;
  658. }
  659. if (attr_mask & IB_QP_PKEY_INDEX)
  660. qp->s_pkey_index = attr->pkey_index;
  661. if (attr_mask & IB_QP_PORT)
  662. qp->port_num = attr->port_num;
  663. if (attr_mask & IB_QP_DEST_QPN)
  664. qp->remote_qpn = attr->dest_qp_num;
  665. if (attr_mask & IB_QP_SQ_PSN) {
  666. qp->s_next_psn = attr->sq_psn & QIB_PSN_MASK;
  667. qp->s_psn = qp->s_next_psn;
  668. qp->s_sending_psn = qp->s_next_psn;
  669. qp->s_last_psn = qp->s_next_psn - 1;
  670. qp->s_sending_hpsn = qp->s_last_psn;
  671. }
  672. if (attr_mask & IB_QP_RQ_PSN)
  673. qp->r_psn = attr->rq_psn & QIB_PSN_MASK;
  674. if (attr_mask & IB_QP_ACCESS_FLAGS)
  675. qp->qp_access_flags = attr->qp_access_flags;
  676. if (attr_mask & IB_QP_AV) {
  677. qp->remote_ah_attr = attr->ah_attr;
  678. qp->s_srate = attr->ah_attr.static_rate;
  679. }
  680. if (attr_mask & IB_QP_ALT_PATH) {
  681. qp->alt_ah_attr = attr->alt_ah_attr;
  682. qp->s_alt_pkey_index = attr->alt_pkey_index;
  683. }
  684. if (attr_mask & IB_QP_PATH_MIG_STATE) {
  685. qp->s_mig_state = attr->path_mig_state;
  686. if (mig) {
  687. qp->remote_ah_attr = qp->alt_ah_attr;
  688. qp->port_num = qp->alt_ah_attr.port_num;
  689. qp->s_pkey_index = qp->s_alt_pkey_index;
  690. }
  691. }
  692. if (attr_mask & IB_QP_PATH_MTU) {
  693. qp->path_mtu = pmtu;
  694. qp->pmtu = ib_mtu_enum_to_int(pmtu);
  695. }
  696. if (attr_mask & IB_QP_RETRY_CNT) {
  697. qp->s_retry_cnt = attr->retry_cnt;
  698. qp->s_retry = attr->retry_cnt;
  699. }
  700. if (attr_mask & IB_QP_RNR_RETRY) {
  701. qp->s_rnr_retry_cnt = attr->rnr_retry;
  702. qp->s_rnr_retry = attr->rnr_retry;
  703. }
  704. if (attr_mask & IB_QP_MIN_RNR_TIMER)
  705. qp->r_min_rnr_timer = attr->min_rnr_timer;
  706. if (attr_mask & IB_QP_TIMEOUT) {
  707. qp->timeout = attr->timeout;
  708. qp->timeout_jiffies =
  709. usecs_to_jiffies((4096UL * (1UL << qp->timeout)) /
  710. 1000UL);
  711. }
  712. if (attr_mask & IB_QP_QKEY)
  713. qp->qkey = attr->qkey;
  714. if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
  715. qp->r_max_rd_atomic = attr->max_dest_rd_atomic;
  716. if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC)
  717. qp->s_max_rd_atomic = attr->max_rd_atomic;
  718. spin_unlock(&qp->s_lock);
  719. spin_unlock_irq(&qp->r_lock);
  720. if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT)
  721. insert_qp(dev, qp);
  722. if (lastwqe) {
  723. ev.device = qp->ibqp.device;
  724. ev.element.qp = &qp->ibqp;
  725. ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
  726. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  727. }
  728. if (mig) {
  729. ev.device = qp->ibqp.device;
  730. ev.element.qp = &qp->ibqp;
  731. ev.event = IB_EVENT_PATH_MIG;
  732. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  733. }
  734. ret = 0;
  735. goto bail;
  736. inval:
  737. spin_unlock(&qp->s_lock);
  738. spin_unlock_irq(&qp->r_lock);
  739. ret = -EINVAL;
  740. bail:
  741. return ret;
  742. }
  743. int qib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  744. int attr_mask, struct ib_qp_init_attr *init_attr)
  745. {
  746. struct qib_qp *qp = to_iqp(ibqp);
  747. attr->qp_state = qp->state;
  748. attr->cur_qp_state = attr->qp_state;
  749. attr->path_mtu = qp->path_mtu;
  750. attr->path_mig_state = qp->s_mig_state;
  751. attr->qkey = qp->qkey;
  752. attr->rq_psn = qp->r_psn & QIB_PSN_MASK;
  753. attr->sq_psn = qp->s_next_psn & QIB_PSN_MASK;
  754. attr->dest_qp_num = qp->remote_qpn;
  755. attr->qp_access_flags = qp->qp_access_flags;
  756. attr->cap.max_send_wr = qp->s_size - 1;
  757. attr->cap.max_recv_wr = qp->ibqp.srq ? 0 : qp->r_rq.size - 1;
  758. attr->cap.max_send_sge = qp->s_max_sge;
  759. attr->cap.max_recv_sge = qp->r_rq.max_sge;
  760. attr->cap.max_inline_data = 0;
  761. attr->ah_attr = qp->remote_ah_attr;
  762. attr->alt_ah_attr = qp->alt_ah_attr;
  763. attr->pkey_index = qp->s_pkey_index;
  764. attr->alt_pkey_index = qp->s_alt_pkey_index;
  765. attr->en_sqd_async_notify = 0;
  766. attr->sq_draining = qp->s_draining;
  767. attr->max_rd_atomic = qp->s_max_rd_atomic;
  768. attr->max_dest_rd_atomic = qp->r_max_rd_atomic;
  769. attr->min_rnr_timer = qp->r_min_rnr_timer;
  770. attr->port_num = qp->port_num;
  771. attr->timeout = qp->timeout;
  772. attr->retry_cnt = qp->s_retry_cnt;
  773. attr->rnr_retry = qp->s_rnr_retry_cnt;
  774. attr->alt_port_num = qp->alt_ah_attr.port_num;
  775. attr->alt_timeout = qp->alt_timeout;
  776. init_attr->event_handler = qp->ibqp.event_handler;
  777. init_attr->qp_context = qp->ibqp.qp_context;
  778. init_attr->send_cq = qp->ibqp.send_cq;
  779. init_attr->recv_cq = qp->ibqp.recv_cq;
  780. init_attr->srq = qp->ibqp.srq;
  781. init_attr->cap = attr->cap;
  782. if (qp->s_flags & QIB_S_SIGNAL_REQ_WR)
  783. init_attr->sq_sig_type = IB_SIGNAL_REQ_WR;
  784. else
  785. init_attr->sq_sig_type = IB_SIGNAL_ALL_WR;
  786. init_attr->qp_type = qp->ibqp.qp_type;
  787. init_attr->port_num = qp->port_num;
  788. return 0;
  789. }
  790. /**
  791. * qib_compute_aeth - compute the AETH (syndrome + MSN)
  792. * @qp: the queue pair to compute the AETH for
  793. *
  794. * Returns the AETH.
  795. */
  796. __be32 qib_compute_aeth(struct qib_qp *qp)
  797. {
  798. u32 aeth = qp->r_msn & QIB_MSN_MASK;
  799. if (qp->ibqp.srq) {
  800. /*
  801. * Shared receive queues don't generate credits.
  802. * Set the credit field to the invalid value.
  803. */
  804. aeth |= QIB_AETH_CREDIT_INVAL << QIB_AETH_CREDIT_SHIFT;
  805. } else {
  806. u32 min, max, x;
  807. u32 credits;
  808. struct qib_rwq *wq = qp->r_rq.wq;
  809. u32 head;
  810. u32 tail;
  811. /* sanity check pointers before trusting them */
  812. head = wq->head;
  813. if (head >= qp->r_rq.size)
  814. head = 0;
  815. tail = wq->tail;
  816. if (tail >= qp->r_rq.size)
  817. tail = 0;
  818. /*
  819. * Compute the number of credits available (RWQEs).
  820. * XXX Not holding the r_rq.lock here so there is a small
  821. * chance that the pair of reads are not atomic.
  822. */
  823. credits = head - tail;
  824. if ((int)credits < 0)
  825. credits += qp->r_rq.size;
  826. /*
  827. * Binary search the credit table to find the code to
  828. * use.
  829. */
  830. min = 0;
  831. max = 31;
  832. for (;;) {
  833. x = (min + max) / 2;
  834. if (credit_table[x] == credits)
  835. break;
  836. if (credit_table[x] > credits)
  837. max = x;
  838. else if (min == x)
  839. break;
  840. else
  841. min = x;
  842. }
  843. aeth |= x << QIB_AETH_CREDIT_SHIFT;
  844. }
  845. return cpu_to_be32(aeth);
  846. }
  847. /**
  848. * qib_create_qp - create a queue pair for a device
  849. * @ibpd: the protection domain who's device we create the queue pair for
  850. * @init_attr: the attributes of the queue pair
  851. * @udata: user data for libibverbs.so
  852. *
  853. * Returns the queue pair on success, otherwise returns an errno.
  854. *
  855. * Called by the ib_create_qp() core verbs function.
  856. */
  857. struct ib_qp *qib_create_qp(struct ib_pd *ibpd,
  858. struct ib_qp_init_attr *init_attr,
  859. struct ib_udata *udata)
  860. {
  861. struct qib_qp *qp;
  862. int err;
  863. struct qib_swqe *swq = NULL;
  864. struct qib_ibdev *dev;
  865. struct qib_devdata *dd;
  866. size_t sz;
  867. size_t sg_list_sz;
  868. struct ib_qp *ret;
  869. if (init_attr->cap.max_send_sge > ib_qib_max_sges ||
  870. init_attr->cap.max_send_wr > ib_qib_max_qp_wrs) {
  871. ret = ERR_PTR(-EINVAL);
  872. goto bail;
  873. }
  874. /* Check receive queue parameters if no SRQ is specified. */
  875. if (!init_attr->srq) {
  876. if (init_attr->cap.max_recv_sge > ib_qib_max_sges ||
  877. init_attr->cap.max_recv_wr > ib_qib_max_qp_wrs) {
  878. ret = ERR_PTR(-EINVAL);
  879. goto bail;
  880. }
  881. if (init_attr->cap.max_send_sge +
  882. init_attr->cap.max_send_wr +
  883. init_attr->cap.max_recv_sge +
  884. init_attr->cap.max_recv_wr == 0) {
  885. ret = ERR_PTR(-EINVAL);
  886. goto bail;
  887. }
  888. }
  889. switch (init_attr->qp_type) {
  890. case IB_QPT_SMI:
  891. case IB_QPT_GSI:
  892. if (init_attr->port_num == 0 ||
  893. init_attr->port_num > ibpd->device->phys_port_cnt) {
  894. ret = ERR_PTR(-EINVAL);
  895. goto bail;
  896. }
  897. case IB_QPT_UC:
  898. case IB_QPT_RC:
  899. case IB_QPT_UD:
  900. sz = sizeof(struct qib_sge) *
  901. init_attr->cap.max_send_sge +
  902. sizeof(struct qib_swqe);
  903. swq = vmalloc((init_attr->cap.max_send_wr + 1) * sz);
  904. if (swq == NULL) {
  905. ret = ERR_PTR(-ENOMEM);
  906. goto bail;
  907. }
  908. sz = sizeof(*qp);
  909. sg_list_sz = 0;
  910. if (init_attr->srq) {
  911. struct qib_srq *srq = to_isrq(init_attr->srq);
  912. if (srq->rq.max_sge > 1)
  913. sg_list_sz = sizeof(*qp->r_sg_list) *
  914. (srq->rq.max_sge - 1);
  915. } else if (init_attr->cap.max_recv_sge > 1)
  916. sg_list_sz = sizeof(*qp->r_sg_list) *
  917. (init_attr->cap.max_recv_sge - 1);
  918. qp = kzalloc(sz + sg_list_sz, GFP_KERNEL);
  919. if (!qp) {
  920. ret = ERR_PTR(-ENOMEM);
  921. goto bail_swq;
  922. }
  923. RCU_INIT_POINTER(qp->next, NULL);
  924. qp->s_hdr = kzalloc(sizeof(*qp->s_hdr), GFP_KERNEL);
  925. if (!qp->s_hdr) {
  926. ret = ERR_PTR(-ENOMEM);
  927. goto bail_qp;
  928. }
  929. qp->timeout_jiffies =
  930. usecs_to_jiffies((4096UL * (1UL << qp->timeout)) /
  931. 1000UL);
  932. if (init_attr->srq)
  933. sz = 0;
  934. else {
  935. qp->r_rq.size = init_attr->cap.max_recv_wr + 1;
  936. qp->r_rq.max_sge = init_attr->cap.max_recv_sge;
  937. sz = (sizeof(struct ib_sge) * qp->r_rq.max_sge) +
  938. sizeof(struct qib_rwqe);
  939. qp->r_rq.wq = vmalloc_user(sizeof(struct qib_rwq) +
  940. qp->r_rq.size * sz);
  941. if (!qp->r_rq.wq) {
  942. ret = ERR_PTR(-ENOMEM);
  943. goto bail_qp;
  944. }
  945. }
  946. /*
  947. * ib_create_qp() will initialize qp->ibqp
  948. * except for qp->ibqp.qp_num.
  949. */
  950. spin_lock_init(&qp->r_lock);
  951. spin_lock_init(&qp->s_lock);
  952. spin_lock_init(&qp->r_rq.lock);
  953. atomic_set(&qp->refcount, 0);
  954. init_waitqueue_head(&qp->wait);
  955. init_waitqueue_head(&qp->wait_dma);
  956. init_timer(&qp->s_timer);
  957. qp->s_timer.data = (unsigned long)qp;
  958. INIT_WORK(&qp->s_work, qib_do_send);
  959. INIT_LIST_HEAD(&qp->iowait);
  960. INIT_LIST_HEAD(&qp->rspwait);
  961. qp->state = IB_QPS_RESET;
  962. qp->s_wq = swq;
  963. qp->s_size = init_attr->cap.max_send_wr + 1;
  964. qp->s_max_sge = init_attr->cap.max_send_sge;
  965. if (init_attr->sq_sig_type == IB_SIGNAL_REQ_WR)
  966. qp->s_flags = QIB_S_SIGNAL_REQ_WR;
  967. dev = to_idev(ibpd->device);
  968. dd = dd_from_dev(dev);
  969. err = alloc_qpn(dd, &dev->qpn_table, init_attr->qp_type,
  970. init_attr->port_num);
  971. if (err < 0) {
  972. ret = ERR_PTR(err);
  973. vfree(qp->r_rq.wq);
  974. goto bail_qp;
  975. }
  976. qp->ibqp.qp_num = err;
  977. qp->port_num = init_attr->port_num;
  978. qib_reset_qp(qp, init_attr->qp_type);
  979. break;
  980. default:
  981. /* Don't support raw QPs */
  982. ret = ERR_PTR(-ENOSYS);
  983. goto bail;
  984. }
  985. init_attr->cap.max_inline_data = 0;
  986. /*
  987. * Return the address of the RWQ as the offset to mmap.
  988. * See qib_mmap() for details.
  989. */
  990. if (udata && udata->outlen >= sizeof(__u64)) {
  991. if (!qp->r_rq.wq) {
  992. __u64 offset = 0;
  993. err = ib_copy_to_udata(udata, &offset,
  994. sizeof(offset));
  995. if (err) {
  996. ret = ERR_PTR(err);
  997. goto bail_ip;
  998. }
  999. } else {
  1000. u32 s = sizeof(struct qib_rwq) + qp->r_rq.size * sz;
  1001. qp->ip = qib_create_mmap_info(dev, s,
  1002. ibpd->uobject->context,
  1003. qp->r_rq.wq);
  1004. if (!qp->ip) {
  1005. ret = ERR_PTR(-ENOMEM);
  1006. goto bail_ip;
  1007. }
  1008. err = ib_copy_to_udata(udata, &(qp->ip->offset),
  1009. sizeof(qp->ip->offset));
  1010. if (err) {
  1011. ret = ERR_PTR(err);
  1012. goto bail_ip;
  1013. }
  1014. }
  1015. }
  1016. spin_lock(&dev->n_qps_lock);
  1017. if (dev->n_qps_allocated == ib_qib_max_qps) {
  1018. spin_unlock(&dev->n_qps_lock);
  1019. ret = ERR_PTR(-ENOMEM);
  1020. goto bail_ip;
  1021. }
  1022. dev->n_qps_allocated++;
  1023. spin_unlock(&dev->n_qps_lock);
  1024. if (qp->ip) {
  1025. spin_lock_irq(&dev->pending_lock);
  1026. list_add(&qp->ip->pending_mmaps, &dev->pending_mmaps);
  1027. spin_unlock_irq(&dev->pending_lock);
  1028. }
  1029. ret = &qp->ibqp;
  1030. goto bail;
  1031. bail_ip:
  1032. if (qp->ip)
  1033. kref_put(&qp->ip->ref, qib_release_mmap_info);
  1034. else
  1035. vfree(qp->r_rq.wq);
  1036. free_qpn(&dev->qpn_table, qp->ibqp.qp_num);
  1037. bail_qp:
  1038. kfree(qp->s_hdr);
  1039. kfree(qp);
  1040. bail_swq:
  1041. vfree(swq);
  1042. bail:
  1043. return ret;
  1044. }
  1045. /**
  1046. * qib_destroy_qp - destroy a queue pair
  1047. * @ibqp: the queue pair to destroy
  1048. *
  1049. * Returns 0 on success.
  1050. *
  1051. * Note that this can be called while the QP is actively sending or
  1052. * receiving!
  1053. */
  1054. int qib_destroy_qp(struct ib_qp *ibqp)
  1055. {
  1056. struct qib_qp *qp = to_iqp(ibqp);
  1057. struct qib_ibdev *dev = to_idev(ibqp->device);
  1058. /* Make sure HW and driver activity is stopped. */
  1059. spin_lock_irq(&qp->s_lock);
  1060. if (qp->state != IB_QPS_RESET) {
  1061. qp->state = IB_QPS_RESET;
  1062. spin_lock(&dev->pending_lock);
  1063. if (!list_empty(&qp->iowait))
  1064. list_del_init(&qp->iowait);
  1065. spin_unlock(&dev->pending_lock);
  1066. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_ANY_WAIT);
  1067. spin_unlock_irq(&qp->s_lock);
  1068. cancel_work_sync(&qp->s_work);
  1069. del_timer_sync(&qp->s_timer);
  1070. wait_event(qp->wait_dma, !atomic_read(&qp->s_dma_busy));
  1071. if (qp->s_tx) {
  1072. qib_put_txreq(qp->s_tx);
  1073. qp->s_tx = NULL;
  1074. }
  1075. remove_qp(dev, qp);
  1076. wait_event(qp->wait, !atomic_read(&qp->refcount));
  1077. clear_mr_refs(qp, 1);
  1078. } else
  1079. spin_unlock_irq(&qp->s_lock);
  1080. /* all user's cleaned up, mark it available */
  1081. free_qpn(&dev->qpn_table, qp->ibqp.qp_num);
  1082. spin_lock(&dev->n_qps_lock);
  1083. dev->n_qps_allocated--;
  1084. spin_unlock(&dev->n_qps_lock);
  1085. if (qp->ip)
  1086. kref_put(&qp->ip->ref, qib_release_mmap_info);
  1087. else
  1088. vfree(qp->r_rq.wq);
  1089. vfree(qp->s_wq);
  1090. kfree(qp->s_hdr);
  1091. kfree(qp);
  1092. return 0;
  1093. }
  1094. /**
  1095. * qib_init_qpn_table - initialize the QP number table for a device
  1096. * @qpt: the QPN table
  1097. */
  1098. void qib_init_qpn_table(struct qib_devdata *dd, struct qib_qpn_table *qpt)
  1099. {
  1100. spin_lock_init(&qpt->lock);
  1101. qpt->last = 1; /* start with QPN 2 */
  1102. qpt->nmaps = 1;
  1103. qpt->mask = dd->qpn_mask;
  1104. }
  1105. /**
  1106. * qib_free_qpn_table - free the QP number table for a device
  1107. * @qpt: the QPN table
  1108. */
  1109. void qib_free_qpn_table(struct qib_qpn_table *qpt)
  1110. {
  1111. int i;
  1112. for (i = 0; i < ARRAY_SIZE(qpt->map); i++)
  1113. if (qpt->map[i].page)
  1114. free_page((unsigned long) qpt->map[i].page);
  1115. }
  1116. /**
  1117. * qib_get_credit - flush the send work queue of a QP
  1118. * @qp: the qp who's send work queue to flush
  1119. * @aeth: the Acknowledge Extended Transport Header
  1120. *
  1121. * The QP s_lock should be held.
  1122. */
  1123. void qib_get_credit(struct qib_qp *qp, u32 aeth)
  1124. {
  1125. u32 credit = (aeth >> QIB_AETH_CREDIT_SHIFT) & QIB_AETH_CREDIT_MASK;
  1126. /*
  1127. * If the credit is invalid, we can send
  1128. * as many packets as we like. Otherwise, we have to
  1129. * honor the credit field.
  1130. */
  1131. if (credit == QIB_AETH_CREDIT_INVAL) {
  1132. if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) {
  1133. qp->s_flags |= QIB_S_UNLIMITED_CREDIT;
  1134. if (qp->s_flags & QIB_S_WAIT_SSN_CREDIT) {
  1135. qp->s_flags &= ~QIB_S_WAIT_SSN_CREDIT;
  1136. qib_schedule_send(qp);
  1137. }
  1138. }
  1139. } else if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) {
  1140. /* Compute new LSN (i.e., MSN + credit) */
  1141. credit = (aeth + credit_table[credit]) & QIB_MSN_MASK;
  1142. if (qib_cmp24(credit, qp->s_lsn) > 0) {
  1143. qp->s_lsn = credit;
  1144. if (qp->s_flags & QIB_S_WAIT_SSN_CREDIT) {
  1145. qp->s_flags &= ~QIB_S_WAIT_SSN_CREDIT;
  1146. qib_schedule_send(qp);
  1147. }
  1148. }
  1149. }
  1150. }