ebony.dts 6.7 KB

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  1. /*
  2. * Device Tree Source for IBM Ebony
  3. *
  4. * Copyright (c) 2006, 2007 IBM Corp.
  5. * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
  6. *
  7. * FIXME: Draft only!
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without
  11. * any warranty of any kind, whether express or implied.
  12. *
  13. * To build:
  14. * dtc -I dts -O asm -o ebony.S -b 0 ebony.dts
  15. * dtc -I dts -O dtb -o ebony.dtb -b 0 ebony.dts
  16. */
  17. / {
  18. #address-cells = <2>;
  19. #size-cells = <1>;
  20. model = "ibm,ebony";
  21. compatible = "ibm,ebony";
  22. dcr-parent = <&/cpus/PowerPC,440GP@0>;
  23. cpus {
  24. #address-cells = <1>;
  25. #size-cells = <0>;
  26. PowerPC,440GP@0 {
  27. device_type = "cpu";
  28. reg = <0>;
  29. clock-frequency = <0>; // Filled in by zImage
  30. timebase-frequency = <0>; // Filled in by zImage
  31. i-cache-line-size = <32>;
  32. d-cache-line-size = <32>;
  33. i-cache-size = <8000>; /* 32 kB */
  34. d-cache-size = <8000>; /* 32 kB */
  35. dcr-controller;
  36. dcr-access-method = "native";
  37. };
  38. };
  39. memory {
  40. device_type = "memory";
  41. reg = <0 0 0>; // Filled in by zImage
  42. };
  43. UIC0: interrupt-controller0 {
  44. compatible = "ibm,uic-440gp", "ibm,uic";
  45. interrupt-controller;
  46. cell-index = <0>;
  47. dcr-reg = <0c0 009>;
  48. #address-cells = <0>;
  49. #size-cells = <0>;
  50. #interrupt-cells = <2>;
  51. };
  52. UIC1: interrupt-controller1 {
  53. compatible = "ibm,uic-440gp", "ibm,uic";
  54. interrupt-controller;
  55. cell-index = <1>;
  56. dcr-reg = <0d0 009>;
  57. #address-cells = <0>;
  58. #size-cells = <0>;
  59. #interrupt-cells = <2>;
  60. interrupts = <1e 4 1f 4>; /* cascade */
  61. interrupt-parent = <&UIC0>;
  62. };
  63. CPC0: cpc {
  64. compatible = "ibm,cpc-440gp";
  65. dcr-reg = <0b0 003 0e0 010>;
  66. // FIXME: anything else?
  67. };
  68. plb {
  69. compatible = "ibm,plb-440gp", "ibm,plb4";
  70. #address-cells = <2>;
  71. #size-cells = <1>;
  72. ranges;
  73. clock-frequency = <0>; // Filled in by zImage
  74. SDRAM0: memory-controller {
  75. compatible = "ibm,sdram-440gp";
  76. dcr-reg = <010 2>;
  77. // FIXME: anything else?
  78. };
  79. SRAM0: sram {
  80. compatible = "ibm,sram-440gp";
  81. dcr-reg = <020 8 00a 1>;
  82. };
  83. DMA0: dma {
  84. // FIXME: ???
  85. compatible = "ibm,dma-440gp";
  86. dcr-reg = <100 027>;
  87. };
  88. MAL0: mcmal {
  89. compatible = "ibm,mcmal-440gp", "ibm,mcmal";
  90. dcr-reg = <180 62>;
  91. num-tx-chans = <4>;
  92. num-rx-chans = <4>;
  93. interrupt-parent = <&MAL0>;
  94. interrupts = <0 1 2 3 4>;
  95. #interrupt-cells = <1>;
  96. #address-cells = <0>;
  97. #size-cells = <0>;
  98. interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
  99. /*RXEOB*/ 1 &UIC0 b 4
  100. /*SERR*/ 2 &UIC1 0 4
  101. /*TXDE*/ 3 &UIC1 1 4
  102. /*RXDE*/ 4 &UIC1 2 4>;
  103. interrupt-map-mask = <ffffffff>;
  104. };
  105. POB0: opb {
  106. compatible = "ibm,opb-440gp", "ibm,opb";
  107. #address-cells = <1>;
  108. #size-cells = <1>;
  109. /* Wish there was a nicer way of specifying a full 32-bit
  110. range */
  111. ranges = <00000000 1 00000000 80000000
  112. 80000000 1 80000000 80000000>;
  113. dcr-reg = <090 00b>;
  114. interrupt-parent = <&UIC1>;
  115. interrupts = <7 4>;
  116. clock-frequency = <0>; // Filled in by zImage
  117. EBC0: ebc {
  118. compatible = "ibm,ebc-440gp", "ibm,ebc";
  119. dcr-reg = <012 2>;
  120. #address-cells = <2>;
  121. #size-cells = <1>;
  122. clock-frequency = <0>; // Filled in by zImage
  123. ranges = <0 00000000 fff00000 100000
  124. 1 00000000 48000000 100000
  125. 2 00000000 ff800000 400000
  126. 3 00000000 48200000 100000
  127. 7 00000000 48300000 100000>;
  128. interrupts = <5 4>;
  129. interrupt-parent = <&UIC1>;
  130. small-flash@0,80000 {
  131. device_type = "rom";
  132. compatible = "direct-mapped";
  133. probe-type = "JEDEC";
  134. bank-width = <1>;
  135. partitions = <0 80000>;
  136. partition-names = "OpenBIOS";
  137. reg = <0 80000 80000>;
  138. };
  139. ds1743@1,0 {
  140. /* NVRAM & RTC */
  141. compatible = "ds1743";
  142. reg = <1 0 2000>;
  143. };
  144. large-flash@2,0 {
  145. device_type = "rom";
  146. compatible = "direct-mapped";
  147. probe-type = "JEDEC";
  148. bank-width = <1>;
  149. partitions = <0 380000
  150. 380000 80000>;
  151. partition-names = "fs", "firmware";
  152. reg = <2 0 400000>;
  153. };
  154. ir@3,0 {
  155. reg = <3 0 10>;
  156. };
  157. fpga@7,0 {
  158. compatible = "Ebony-FPGA";
  159. reg = <7 0 10>;
  160. };
  161. };
  162. UART0: serial@40000200 {
  163. device_type = "serial";
  164. compatible = "ns16550";
  165. reg = <40000200 8>;
  166. virtual-reg = <e0000200>;
  167. clock-frequency = <A8C000>;
  168. current-speed = <2580>;
  169. interrupt-parent = <&UIC0>;
  170. interrupts = <0 4>;
  171. };
  172. UART1: serial@40000300 {
  173. device_type = "serial";
  174. compatible = "ns16550";
  175. reg = <40000300 8>;
  176. virtual-reg = <e0000300>;
  177. clock-frequency = <A8C000>;
  178. current-speed = <2580>;
  179. interrupt-parent = <&UIC0>;
  180. interrupts = <1 4>;
  181. };
  182. IIC0: i2c@40000400 {
  183. /* FIXME */
  184. device_type = "i2c";
  185. compatible = "ibm,iic-440gp", "ibm,iic";
  186. reg = <40000400 14>;
  187. interrupt-parent = <&UIC0>;
  188. interrupts = <2 4>;
  189. };
  190. IIC1: i2c@40000500 {
  191. /* FIXME */
  192. device_type = "i2c";
  193. compatible = "ibm,iic-440gp", "ibm,iic";
  194. reg = <40000500 14>;
  195. interrupt-parent = <&UIC0>;
  196. interrupts = <3 4>;
  197. };
  198. GPIO0: gpio@40000700 {
  199. /* FIXME */
  200. compatible = "ibm,gpio-440gp";
  201. reg = <40000700 20>;
  202. };
  203. ZMII0: emac-zmii@40000780 {
  204. compatible = "ibm,zmii-440gp", "ibm,zmii";
  205. reg = <40000780 c>;
  206. };
  207. EMAC0: ethernet@40000800 {
  208. linux,network-index = <0>;
  209. device_type = "network";
  210. compatible = "ibm,emac-440gp", "ibm,emac";
  211. interrupt-parent = <&UIC1>;
  212. interrupts = <1c 4 1d 4>;
  213. reg = <40000800 70>;
  214. local-mac-address = [000000000000]; // Filled in by zImage
  215. mal-device = <&MAL0>;
  216. mal-tx-channel = <0 1>;
  217. mal-rx-channel = <0>;
  218. cell-index = <0>;
  219. max-frame-size = <5dc>;
  220. rx-fifo-size = <1000>;
  221. tx-fifo-size = <800>;
  222. phy-mode = "rmii";
  223. phy-map = <00000001>;
  224. zmii-device = <&ZMII0>;
  225. zmii-channel = <0>;
  226. };
  227. EMAC1: ethernet@40000900 {
  228. linux,network-index = <1>;
  229. device_type = "network";
  230. compatible = "ibm,emac-440gp", "ibm,emac";
  231. interrupt-parent = <&UIC1>;
  232. interrupts = <1e 4 1f 4>;
  233. reg = <40000900 70>;
  234. local-mac-address = [000000000000]; // Filled in by zImage
  235. mal-device = <&MAL0>;
  236. mal-tx-channel = <2 3>;
  237. mal-rx-channel = <1>;
  238. cell-index = <1>;
  239. max-frame-size = <5dc>;
  240. rx-fifo-size = <1000>;
  241. tx-fifo-size = <800>;
  242. phy-mode = "rmii";
  243. phy-map = <00000001>;
  244. zmii-device = <&ZMII0>;
  245. zmii-channel = <1>;
  246. };
  247. GPT0: gpt@40000a00 {
  248. /* FIXME */
  249. reg = <40000a00 d4>;
  250. interrupt-parent = <&UIC0>;
  251. interrupts = <12 4 13 4 14 4 15 4 16 4>;
  252. };
  253. };
  254. PCIX0: pci@1234 {
  255. device_type = "pci";
  256. /* FIXME */
  257. reg = <2 0ec00000 8
  258. 2 0ec80000 f0
  259. 2 0ec80100 fc>;
  260. };
  261. };
  262. chosen {
  263. linux,stdout-path = "/plb/opb/serial@40000200";
  264. };
  265. };