generic.c 10 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/generic.c
  3. *
  4. * Author: Nicolas Pitre
  5. *
  6. * Code common to all SA11x0 machines.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/gpio.h>
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/pm.h>
  19. #include <linux/cpufreq.h>
  20. #include <linux/ioport.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/reboot.h>
  23. #include <video/sa1100fb.h>
  24. #include <asm/div64.h>
  25. #include <asm/mach/map.h>
  26. #include <asm/mach/flash.h>
  27. #include <asm/irq.h>
  28. #include <asm/system_misc.h>
  29. #include <mach/hardware.h>
  30. #include <mach/irqs.h>
  31. #include "generic.h"
  32. unsigned int reset_status;
  33. EXPORT_SYMBOL(reset_status);
  34. #define NR_FREQS 16
  35. /*
  36. * This table is setup for a 3.6864MHz Crystal.
  37. */
  38. struct cpufreq_frequency_table sa11x0_freq_table[NR_FREQS+1] = {
  39. { .frequency = 59000, /* 59.0 MHz */},
  40. { .frequency = 73700, /* 73.7 MHz */},
  41. { .frequency = 88500, /* 88.5 MHz */},
  42. { .frequency = 103200, /* 103.2 MHz */},
  43. { .frequency = 118000, /* 118.0 MHz */},
  44. { .frequency = 132700, /* 132.7 MHz */},
  45. { .frequency = 147500, /* 147.5 MHz */},
  46. { .frequency = 162200, /* 162.2 MHz */},
  47. { .frequency = 176900, /* 176.9 MHz */},
  48. { .frequency = 191700, /* 191.7 MHz */},
  49. { .frequency = 206400, /* 206.4 MHz */},
  50. { .frequency = 221200, /* 221.2 MHz */},
  51. { .frequency = 235900, /* 235.9 MHz */},
  52. { .frequency = 250700, /* 250.7 MHz */},
  53. { .frequency = 265400, /* 265.4 MHz */},
  54. { .frequency = 280200, /* 280.2 MHz */},
  55. { .frequency = CPUFREQ_TABLE_END, },
  56. };
  57. /* rounds up(!) */
  58. unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
  59. {
  60. int i;
  61. for (i = 0; i < NR_FREQS; i++)
  62. if (sa11x0_freq_table[i].frequency >= khz)
  63. break;
  64. return i;
  65. }
  66. unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
  67. {
  68. unsigned int freq = 0;
  69. if (idx < NR_FREQS)
  70. freq = sa11x0_freq_table[idx].frequency;
  71. return freq;
  72. }
  73. unsigned int sa11x0_getspeed(unsigned int cpu)
  74. {
  75. if (cpu)
  76. return 0;
  77. return sa11x0_freq_table[PPCR & 0xf].frequency;
  78. }
  79. /*
  80. * Default power-off for SA1100
  81. */
  82. static void sa1100_power_off(void)
  83. {
  84. mdelay(100);
  85. local_irq_disable();
  86. /* disable internal oscillator, float CS lines */
  87. PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
  88. /* enable wake-up on GPIO0 (Assabet...) */
  89. PWER = GFER = GRER = 1;
  90. /*
  91. * set scratchpad to zero, just in case it is used as a
  92. * restart address by the bootloader.
  93. */
  94. PSPR = 0;
  95. /* enter sleep mode */
  96. PMCR = PMCR_SF;
  97. }
  98. void sa11x0_restart(enum reboot_mode mode, const char *cmd)
  99. {
  100. if (mode == REBOOT_SOFT) {
  101. /* Jump into ROM at address 0 */
  102. soft_restart(0);
  103. } else {
  104. /* Use on-chip reset capability */
  105. RSRR = RSRR_SWR;
  106. }
  107. }
  108. static void sa11x0_register_device(struct platform_device *dev, void *data)
  109. {
  110. int err;
  111. dev->dev.platform_data = data;
  112. err = platform_device_register(dev);
  113. if (err)
  114. printk(KERN_ERR "Unable to register device %s: %d\n",
  115. dev->name, err);
  116. }
  117. static struct resource sa11x0udc_resources[] = {
  118. [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
  119. [1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
  120. };
  121. static u64 sa11x0udc_dma_mask = 0xffffffffUL;
  122. static struct platform_device sa11x0udc_device = {
  123. .name = "sa11x0-udc",
  124. .id = -1,
  125. .dev = {
  126. .dma_mask = &sa11x0udc_dma_mask,
  127. .coherent_dma_mask = 0xffffffff,
  128. },
  129. .num_resources = ARRAY_SIZE(sa11x0udc_resources),
  130. .resource = sa11x0udc_resources,
  131. };
  132. static struct resource sa11x0uart1_resources[] = {
  133. [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
  134. [1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
  135. };
  136. static struct platform_device sa11x0uart1_device = {
  137. .name = "sa11x0-uart",
  138. .id = 1,
  139. .num_resources = ARRAY_SIZE(sa11x0uart1_resources),
  140. .resource = sa11x0uart1_resources,
  141. };
  142. static struct resource sa11x0uart3_resources[] = {
  143. [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
  144. [1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
  145. };
  146. static struct platform_device sa11x0uart3_device = {
  147. .name = "sa11x0-uart",
  148. .id = 3,
  149. .num_resources = ARRAY_SIZE(sa11x0uart3_resources),
  150. .resource = sa11x0uart3_resources,
  151. };
  152. static struct resource sa11x0mcp_resources[] = {
  153. [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
  154. [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
  155. [2] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
  156. };
  157. static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
  158. static struct platform_device sa11x0mcp_device = {
  159. .name = "sa11x0-mcp",
  160. .id = -1,
  161. .dev = {
  162. .dma_mask = &sa11x0mcp_dma_mask,
  163. .coherent_dma_mask = 0xffffffff,
  164. },
  165. .num_resources = ARRAY_SIZE(sa11x0mcp_resources),
  166. .resource = sa11x0mcp_resources,
  167. };
  168. void __init sa11x0_ppc_configure_mcp(void)
  169. {
  170. /* Setup the PPC unit for the MCP */
  171. PPDR &= ~PPC_RXD4;
  172. PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
  173. PSDR |= PPC_RXD4;
  174. PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
  175. PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
  176. }
  177. void sa11x0_register_mcp(struct mcp_plat_data *data)
  178. {
  179. sa11x0_register_device(&sa11x0mcp_device, data);
  180. }
  181. static struct resource sa11x0ssp_resources[] = {
  182. [0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
  183. [1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
  184. };
  185. static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
  186. static struct platform_device sa11x0ssp_device = {
  187. .name = "sa11x0-ssp",
  188. .id = -1,
  189. .dev = {
  190. .dma_mask = &sa11x0ssp_dma_mask,
  191. .coherent_dma_mask = 0xffffffff,
  192. },
  193. .num_resources = ARRAY_SIZE(sa11x0ssp_resources),
  194. .resource = sa11x0ssp_resources,
  195. };
  196. static struct resource sa11x0fb_resources[] = {
  197. [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
  198. [1] = DEFINE_RES_IRQ(IRQ_LCD),
  199. };
  200. static struct platform_device sa11x0fb_device = {
  201. .name = "sa11x0-fb",
  202. .id = -1,
  203. .dev = {
  204. .coherent_dma_mask = 0xffffffff,
  205. },
  206. .num_resources = ARRAY_SIZE(sa11x0fb_resources),
  207. .resource = sa11x0fb_resources,
  208. };
  209. void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
  210. {
  211. sa11x0_register_device(&sa11x0fb_device, inf);
  212. }
  213. static struct platform_device sa11x0pcmcia_device = {
  214. .name = "sa11x0-pcmcia",
  215. .id = -1,
  216. };
  217. static struct platform_device sa11x0mtd_device = {
  218. .name = "sa1100-mtd",
  219. .id = -1,
  220. };
  221. void sa11x0_register_mtd(struct flash_platform_data *flash,
  222. struct resource *res, int nr)
  223. {
  224. flash->name = "sa1100";
  225. sa11x0mtd_device.resource = res;
  226. sa11x0mtd_device.num_resources = nr;
  227. sa11x0_register_device(&sa11x0mtd_device, flash);
  228. }
  229. static struct resource sa11x0ir_resources[] = {
  230. DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
  231. DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
  232. DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
  233. DEFINE_RES_IRQ(IRQ_Ser2ICP),
  234. };
  235. static struct platform_device sa11x0ir_device = {
  236. .name = "sa11x0-ir",
  237. .id = -1,
  238. .num_resources = ARRAY_SIZE(sa11x0ir_resources),
  239. .resource = sa11x0ir_resources,
  240. };
  241. void sa11x0_register_irda(struct irda_platform_data *irda)
  242. {
  243. sa11x0_register_device(&sa11x0ir_device, irda);
  244. }
  245. static struct resource sa1100_rtc_resources[] = {
  246. DEFINE_RES_MEM(0x90010000, 0x40),
  247. DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
  248. DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
  249. };
  250. static struct platform_device sa11x0rtc_device = {
  251. .name = "sa1100-rtc",
  252. .id = -1,
  253. .num_resources = ARRAY_SIZE(sa1100_rtc_resources),
  254. .resource = sa1100_rtc_resources,
  255. };
  256. static struct resource sa11x0dma_resources[] = {
  257. DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
  258. DEFINE_RES_IRQ(IRQ_DMA0),
  259. DEFINE_RES_IRQ(IRQ_DMA1),
  260. DEFINE_RES_IRQ(IRQ_DMA2),
  261. DEFINE_RES_IRQ(IRQ_DMA3),
  262. DEFINE_RES_IRQ(IRQ_DMA4),
  263. DEFINE_RES_IRQ(IRQ_DMA5),
  264. };
  265. static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
  266. static struct platform_device sa11x0dma_device = {
  267. .name = "sa11x0-dma",
  268. .id = -1,
  269. .dev = {
  270. .dma_mask = &sa11x0dma_dma_mask,
  271. .coherent_dma_mask = 0xffffffff,
  272. },
  273. .num_resources = ARRAY_SIZE(sa11x0dma_resources),
  274. .resource = sa11x0dma_resources,
  275. };
  276. static struct platform_device *sa11x0_devices[] __initdata = {
  277. &sa11x0udc_device,
  278. &sa11x0uart1_device,
  279. &sa11x0uart3_device,
  280. &sa11x0ssp_device,
  281. &sa11x0pcmcia_device,
  282. &sa11x0rtc_device,
  283. &sa11x0dma_device,
  284. };
  285. static int __init sa1100_init(void)
  286. {
  287. pm_power_off = sa1100_power_off;
  288. return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
  289. }
  290. arch_initcall(sa1100_init);
  291. void __init sa11x0_init_late(void)
  292. {
  293. sa11x0_pm_init();
  294. }
  295. /*
  296. * Common I/O mapping:
  297. *
  298. * Typically, static virtual address mappings are as follow:
  299. *
  300. * 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
  301. * 0xf4000000-0xf4ffffff: SA-1111
  302. * 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
  303. * 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above)
  304. * 0xffff0000-0xffff0fff: SA1100 exception vectors
  305. * 0xffff2000-0xffff2fff: Minicache copy_user_page area
  306. *
  307. * Below 0xe8000000 is reserved for vm allocation.
  308. *
  309. * The machine specific code must provide the extra mapping beside the
  310. * default mapping provided here.
  311. */
  312. static struct map_desc standard_io_desc[] __initdata = {
  313. { /* PCM */
  314. .virtual = 0xf8000000,
  315. .pfn = __phys_to_pfn(0x80000000),
  316. .length = 0x00100000,
  317. .type = MT_DEVICE
  318. }, { /* SCM */
  319. .virtual = 0xfa000000,
  320. .pfn = __phys_to_pfn(0x90000000),
  321. .length = 0x00100000,
  322. .type = MT_DEVICE
  323. }, { /* MER */
  324. .virtual = 0xfc000000,
  325. .pfn = __phys_to_pfn(0xa0000000),
  326. .length = 0x00100000,
  327. .type = MT_DEVICE
  328. }, { /* LCD + DMA */
  329. .virtual = 0xfe000000,
  330. .pfn = __phys_to_pfn(0xb0000000),
  331. .length = 0x00200000,
  332. .type = MT_DEVICE
  333. },
  334. };
  335. void __init sa1100_map_io(void)
  336. {
  337. iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
  338. }
  339. /*
  340. * Disable the memory bus request/grant signals on the SA1110 to
  341. * ensure that we don't receive spurious memory requests. We set
  342. * the MBGNT signal false to ensure the SA1111 doesn't own the
  343. * SDRAM bus.
  344. */
  345. void sa1110_mb_disable(void)
  346. {
  347. unsigned long flags;
  348. local_irq_save(flags);
  349. PGSR &= ~GPIO_MBGNT;
  350. GPCR = GPIO_MBGNT;
  351. GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
  352. GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
  353. local_irq_restore(flags);
  354. }
  355. /*
  356. * If the system is going to use the SA-1111 DMA engines, set up
  357. * the memory bus request/grant pins.
  358. */
  359. void sa1110_mb_enable(void)
  360. {
  361. unsigned long flags;
  362. local_irq_save(flags);
  363. PGSR &= ~GPIO_MBGNT;
  364. GPCR = GPIO_MBGNT;
  365. GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
  366. GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
  367. TUCR |= TUCR_MR;
  368. local_irq_restore(flags);
  369. }