pmc551.c 29 KB

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  1. /*
  2. * $Id: pmc551.c,v 1.32 2005/11/07 11:14:25 gleixner Exp $
  3. *
  4. * PMC551 PCI Mezzanine Ram Device
  5. *
  6. * Author:
  7. * Mark Ferrell <mferrell@mvista.com>
  8. * Copyright 1999,2000 Nortel Networks
  9. *
  10. * License:
  11. * As part of this driver was derived from the slram.c driver it
  12. * falls under the same license, which is GNU General Public
  13. * License v2
  14. *
  15. * Description:
  16. * This driver is intended to support the PMC551 PCI Ram device
  17. * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
  18. * cPCI embedded systems. The device contains a single SROM
  19. * that initially programs the V370PDC chipset onboard the
  20. * device, and various banks of DRAM/SDRAM onboard. This driver
  21. * implements this PCI Ram device as an MTD (Memory Technology
  22. * Device) so that it can be used to hold a file system, or for
  23. * added swap space in embedded systems. Since the memory on
  24. * this board isn't as fast as main memory we do not try to hook
  25. * it into main memory as that would simply reduce performance
  26. * on the system. Using it as a block device allows us to use
  27. * it as high speed swap or for a high speed disk device of some
  28. * sort. Which becomes very useful on diskless systems in the
  29. * embedded market I might add.
  30. *
  31. * Notes:
  32. * Due to what I assume is more buggy SROM, the 64M PMC551 I
  33. * have available claims that all 4 of it's DRAM banks have 64M
  34. * of ram configured (making a grand total of 256M onboard).
  35. * This is slightly annoying since the BAR0 size reflects the
  36. * aperture size, not the dram size, and the V370PDC supplies no
  37. * other method for memory size discovery. This problem is
  38. * mostly only relevant when compiled as a module, as the
  39. * unloading of the module with an aperture size smaller then
  40. * the ram will cause the driver to detect the onboard memory
  41. * size to be equal to the aperture size when the module is
  42. * reloaded. Soooo, to help, the module supports an msize
  43. * option to allow the specification of the onboard memory, and
  44. * an asize option, to allow the specification of the aperture
  45. * size. The aperture must be equal to or less then the memory
  46. * size, the driver will correct this if you screw it up. This
  47. * problem is not relevant for compiled in drivers as compiled
  48. * in drivers only init once.
  49. *
  50. * Credits:
  51. * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
  52. * initial example code of how to initialize this device and for
  53. * help with questions I had concerning operation of the device.
  54. *
  55. * Most of the MTD code for this driver was originally written
  56. * for the slram.o module in the MTD drivers package which
  57. * allows the mapping of system memory into an MTD device.
  58. * Since the PMC551 memory module is accessed in the same
  59. * fashion as system memory, the slram.c code became a very nice
  60. * fit to the needs of this driver. All we added was PCI
  61. * detection/initialization to the driver and automatically figure
  62. * out the size via the PCI detection.o, later changes by Corey
  63. * Minyard set up the card to utilize a 1M sliding apature.
  64. *
  65. * Corey Minyard <minyard@nortelnetworks.com>
  66. * * Modified driver to utilize a sliding aperture instead of
  67. * mapping all memory into kernel space which turned out to
  68. * be very wasteful.
  69. * * Located a bug in the SROM's initialization sequence that
  70. * made the memory unusable, added a fix to code to touch up
  71. * the DRAM some.
  72. *
  73. * Bugs/FIXME's:
  74. * * MUST fix the init function to not spin on a register
  75. * waiting for it to set .. this does not safely handle busted
  76. * devices that never reset the register correctly which will
  77. * cause the system to hang w/ a reboot being the only chance at
  78. * recover. [sort of fixed, could be better]
  79. * * Add I2C handling of the SROM so we can read the SROM's information
  80. * about the aperture size. This should always accurately reflect the
  81. * onboard memory size.
  82. * * Comb the init routine. It's still a bit cludgy on a few things.
  83. */
  84. #include <linux/kernel.h>
  85. #include <linux/module.h>
  86. #include <asm/uaccess.h>
  87. #include <linux/types.h>
  88. #include <linux/sched.h>
  89. #include <linux/init.h>
  90. #include <linux/ptrace.h>
  91. #include <linux/slab.h>
  92. #include <linux/string.h>
  93. #include <linux/timer.h>
  94. #include <linux/major.h>
  95. #include <linux/fs.h>
  96. #include <linux/ioctl.h>
  97. #include <asm/io.h>
  98. #include <asm/system.h>
  99. #include <linux/pci.h>
  100. #include <linux/mtd/mtd.h>
  101. #include <linux/mtd/pmc551.h>
  102. #include <linux/mtd/compatmac.h>
  103. static struct mtd_info *pmc551list;
  104. static int pmc551_erase (struct mtd_info *mtd, struct erase_info *instr)
  105. {
  106. struct mypriv *priv = mtd->priv;
  107. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  108. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  109. unsigned long end;
  110. u_char *ptr;
  111. size_t retlen;
  112. #ifdef CONFIG_MTD_PMC551_DEBUG
  113. printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr, (long)instr->len);
  114. #endif
  115. end = instr->addr + instr->len - 1;
  116. /* Is it past the end? */
  117. if ( end > mtd->size ) {
  118. #ifdef CONFIG_MTD_PMC551_DEBUG
  119. printk(KERN_DEBUG "pmc551_erase() out of bounds (%ld > %ld)\n", (long)end, (long)mtd->size);
  120. #endif
  121. return -EINVAL;
  122. }
  123. eoff_hi = end & ~(priv->asize - 1);
  124. soff_hi = instr->addr & ~(priv->asize - 1);
  125. eoff_lo = end & (priv->asize - 1);
  126. soff_lo = instr->addr & (priv->asize - 1);
  127. pmc551_point (mtd, instr->addr, instr->len, &retlen, &ptr);
  128. if ( soff_hi == eoff_hi || mtd->size == priv->asize) {
  129. /* The whole thing fits within one access, so just one shot
  130. will do it. */
  131. memset(ptr, 0xff, instr->len);
  132. } else {
  133. /* We have to do multiple writes to get all the data
  134. written. */
  135. while (soff_hi != eoff_hi) {
  136. #ifdef CONFIG_MTD_PMC551_DEBUG
  137. printk( KERN_DEBUG "pmc551_erase() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  138. #endif
  139. memset(ptr, 0xff, priv->asize);
  140. if (soff_hi + priv->asize >= mtd->size) {
  141. goto out;
  142. }
  143. soff_hi += priv->asize;
  144. pmc551_point (mtd,(priv->base_map0|soff_hi),
  145. priv->asize, &retlen, &ptr);
  146. }
  147. memset (ptr, 0xff, eoff_lo);
  148. }
  149. out:
  150. instr->state = MTD_ERASE_DONE;
  151. #ifdef CONFIG_MTD_PMC551_DEBUG
  152. printk(KERN_DEBUG "pmc551_erase() done\n");
  153. #endif
  154. mtd_erase_callback(instr);
  155. return 0;
  156. }
  157. static int pmc551_point (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char **mtdbuf)
  158. {
  159. struct mypriv *priv = mtd->priv;
  160. u32 soff_hi;
  161. u32 soff_lo;
  162. #ifdef CONFIG_MTD_PMC551_DEBUG
  163. printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
  164. #endif
  165. if (from + len > mtd->size) {
  166. #ifdef CONFIG_MTD_PMC551_DEBUG
  167. printk(KERN_DEBUG "pmc551_point() out of bounds (%ld > %ld)\n", (long)from+len, (long)mtd->size);
  168. #endif
  169. return -EINVAL;
  170. }
  171. soff_hi = from & ~(priv->asize - 1);
  172. soff_lo = from & (priv->asize - 1);
  173. /* Cheap hack optimization */
  174. if( priv->curr_map0 != from ) {
  175. pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0,
  176. (priv->base_map0 | soff_hi) );
  177. priv->curr_map0 = soff_hi;
  178. }
  179. *mtdbuf = priv->start + soff_lo;
  180. *retlen = len;
  181. return 0;
  182. }
  183. static void pmc551_unpoint (struct mtd_info *mtd, u_char *addr, loff_t from, size_t len)
  184. {
  185. #ifdef CONFIG_MTD_PMC551_DEBUG
  186. printk(KERN_DEBUG "pmc551_unpoint()\n");
  187. #endif
  188. }
  189. static int pmc551_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
  190. {
  191. struct mypriv *priv = mtd->priv;
  192. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  193. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  194. unsigned long end;
  195. u_char *ptr;
  196. u_char *copyto = buf;
  197. #ifdef CONFIG_MTD_PMC551_DEBUG
  198. printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n", (long)from, (long)len, (long)priv->asize);
  199. #endif
  200. end = from + len - 1;
  201. /* Is it past the end? */
  202. if (end > mtd->size) {
  203. #ifdef CONFIG_MTD_PMC551_DEBUG
  204. printk(KERN_DEBUG "pmc551_read() out of bounds (%ld > %ld)\n", (long) end, (long)mtd->size);
  205. #endif
  206. return -EINVAL;
  207. }
  208. soff_hi = from & ~(priv->asize - 1);
  209. eoff_hi = end & ~(priv->asize - 1);
  210. soff_lo = from & (priv->asize - 1);
  211. eoff_lo = end & (priv->asize - 1);
  212. pmc551_point (mtd, from, len, retlen, &ptr);
  213. if (soff_hi == eoff_hi) {
  214. /* The whole thing fits within one access, so just one shot
  215. will do it. */
  216. memcpy(copyto, ptr, len);
  217. copyto += len;
  218. } else {
  219. /* We have to do multiple writes to get all the data
  220. written. */
  221. while (soff_hi != eoff_hi) {
  222. #ifdef CONFIG_MTD_PMC551_DEBUG
  223. printk( KERN_DEBUG "pmc551_read() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  224. #endif
  225. memcpy(copyto, ptr, priv->asize);
  226. copyto += priv->asize;
  227. if (soff_hi + priv->asize >= mtd->size) {
  228. goto out;
  229. }
  230. soff_hi += priv->asize;
  231. pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr);
  232. }
  233. memcpy(copyto, ptr, eoff_lo);
  234. copyto += eoff_lo;
  235. }
  236. out:
  237. #ifdef CONFIG_MTD_PMC551_DEBUG
  238. printk(KERN_DEBUG "pmc551_read() done\n");
  239. #endif
  240. *retlen = copyto - buf;
  241. return 0;
  242. }
  243. static int pmc551_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
  244. {
  245. struct mypriv *priv = mtd->priv;
  246. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  247. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  248. unsigned long end;
  249. u_char *ptr;
  250. const u_char *copyfrom = buf;
  251. #ifdef CONFIG_MTD_PMC551_DEBUG
  252. printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n", (long)to, (long)len, (long)priv->asize);
  253. #endif
  254. end = to + len - 1;
  255. /* Is it past the end? or did the u32 wrap? */
  256. if (end > mtd->size ) {
  257. #ifdef CONFIG_MTD_PMC551_DEBUG
  258. printk(KERN_DEBUG "pmc551_write() out of bounds (end: %ld, size: %ld, to: %ld)\n", (long) end, (long)mtd->size, (long)to);
  259. #endif
  260. return -EINVAL;
  261. }
  262. soff_hi = to & ~(priv->asize - 1);
  263. eoff_hi = end & ~(priv->asize - 1);
  264. soff_lo = to & (priv->asize - 1);
  265. eoff_lo = end & (priv->asize - 1);
  266. pmc551_point (mtd, to, len, retlen, &ptr);
  267. if (soff_hi == eoff_hi) {
  268. /* The whole thing fits within one access, so just one shot
  269. will do it. */
  270. memcpy(ptr, copyfrom, len);
  271. copyfrom += len;
  272. } else {
  273. /* We have to do multiple writes to get all the data
  274. written. */
  275. while (soff_hi != eoff_hi) {
  276. #ifdef CONFIG_MTD_PMC551_DEBUG
  277. printk( KERN_DEBUG "pmc551_write() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  278. #endif
  279. memcpy(ptr, copyfrom, priv->asize);
  280. copyfrom += priv->asize;
  281. if (soff_hi >= mtd->size) {
  282. goto out;
  283. }
  284. soff_hi += priv->asize;
  285. pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr);
  286. }
  287. memcpy(ptr, copyfrom, eoff_lo);
  288. copyfrom += eoff_lo;
  289. }
  290. out:
  291. #ifdef CONFIG_MTD_PMC551_DEBUG
  292. printk(KERN_DEBUG "pmc551_write() done\n");
  293. #endif
  294. *retlen = copyfrom - buf;
  295. return 0;
  296. }
  297. /*
  298. * Fixup routines for the V370PDC
  299. * PCI device ID 0x020011b0
  300. *
  301. * This function basicly kick starts the DRAM oboard the card and gets it
  302. * ready to be used. Before this is done the device reads VERY erratic, so
  303. * much that it can crash the Linux 2.2.x series kernels when a user cat's
  304. * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
  305. * register. FIXME: stop spinning on registers .. must implement a timeout
  306. * mechanism
  307. * returns the size of the memory region found.
  308. */
  309. static u32 fixup_pmc551 (struct pci_dev *dev)
  310. {
  311. #ifdef CONFIG_MTD_PMC551_BUGFIX
  312. u32 dram_data;
  313. #endif
  314. u32 size, dcmd, cfg, dtmp;
  315. u16 cmd, tmp, i;
  316. u8 bcmd, counter;
  317. /* Sanity Check */
  318. if(!dev) {
  319. return -ENODEV;
  320. }
  321. /*
  322. * Attempt to reset the card
  323. * FIXME: Stop Spinning registers
  324. */
  325. counter=0;
  326. /* unlock registers */
  327. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5 );
  328. /* read in old data */
  329. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd );
  330. /* bang the reset line up and down for a few */
  331. for(i=0;i<10;i++) {
  332. counter=0;
  333. bcmd &= ~0x80;
  334. while(counter++ < 100) {
  335. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  336. }
  337. counter=0;
  338. bcmd |= 0x80;
  339. while(counter++ < 100) {
  340. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  341. }
  342. }
  343. bcmd |= (0x40|0x20);
  344. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  345. /*
  346. * Take care and turn off the memory on the device while we
  347. * tweak the configurations
  348. */
  349. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  350. tmp = cmd & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY);
  351. pci_write_config_word(dev, PCI_COMMAND, tmp);
  352. /*
  353. * Disable existing aperture before probing memory size
  354. */
  355. pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
  356. dtmp=(dcmd|PMC551_PCI_MEM_MAP_ENABLE|PMC551_PCI_MEM_MAP_REG_EN);
  357. pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
  358. /*
  359. * Grab old BAR0 config so that we can figure out memory size
  360. * This is another bit of kludge going on. The reason for the
  361. * redundancy is I am hoping to retain the original configuration
  362. * previously assigned to the card by the BIOS or some previous
  363. * fixup routine in the kernel. So we read the old config into cfg,
  364. * then write all 1's to the memory space, read back the result into
  365. * "size", and then write back all the old config.
  366. */
  367. pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &cfg );
  368. #ifndef CONFIG_MTD_PMC551_BUGFIX
  369. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, ~0 );
  370. pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &size );
  371. size = (size&PCI_BASE_ADDRESS_MEM_MASK);
  372. size &= ~(size-1);
  373. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
  374. #else
  375. /*
  376. * Get the size of the memory by reading all the DRAM size values
  377. * and adding them up.
  378. *
  379. * KLUDGE ALERT: the boards we are using have invalid column and
  380. * row mux values. We fix them here, but this will break other
  381. * memory configurations.
  382. */
  383. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
  384. size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
  385. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  386. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  387. pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
  388. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
  389. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  390. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  391. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  392. pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
  393. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
  394. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  395. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  396. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  397. pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
  398. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
  399. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  400. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  401. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  402. pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
  403. /*
  404. * Oops .. something went wrong
  405. */
  406. if( (size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
  407. return -ENODEV;
  408. }
  409. #endif /* CONFIG_MTD_PMC551_BUGFIX */
  410. if ((cfg&PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
  411. return -ENODEV;
  412. }
  413. /*
  414. * Precharge Dram
  415. */
  416. pci_write_config_word( dev, PMC551_SDRAM_MA, 0x0400 );
  417. pci_write_config_word( dev, PMC551_SDRAM_CMD, 0x00bf );
  418. /*
  419. * Wait until command has gone through
  420. * FIXME: register spinning issue
  421. */
  422. do { pci_read_config_word( dev, PMC551_SDRAM_CMD, &cmd );
  423. if(counter++ > 100)break;
  424. } while ( (PCI_COMMAND_IO) & cmd );
  425. /*
  426. * Turn on auto refresh
  427. * The loop is taken directly from Ramix's example code. I assume that
  428. * this must be held high for some duration of time, but I can find no
  429. * documentation refrencing the reasons why.
  430. */
  431. for ( i = 1; i<=8 ; i++) {
  432. pci_write_config_word (dev, PMC551_SDRAM_CMD, 0x0df);
  433. /*
  434. * Make certain command has gone through
  435. * FIXME: register spinning issue
  436. */
  437. counter=0;
  438. do { pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  439. if(counter++ > 100)break;
  440. } while ( (PCI_COMMAND_IO) & cmd );
  441. }
  442. pci_write_config_word ( dev, PMC551_SDRAM_MA, 0x0020);
  443. pci_write_config_word ( dev, PMC551_SDRAM_CMD, 0x0ff);
  444. /*
  445. * Wait until command completes
  446. * FIXME: register spinning issue
  447. */
  448. counter=0;
  449. do { pci_read_config_word ( dev, PMC551_SDRAM_CMD, &cmd);
  450. if(counter++ > 100)break;
  451. } while ( (PCI_COMMAND_IO) & cmd );
  452. pci_read_config_dword ( dev, PMC551_DRAM_CFG, &dcmd);
  453. dcmd |= 0x02000000;
  454. pci_write_config_dword ( dev, PMC551_DRAM_CFG, dcmd);
  455. /*
  456. * Check to make certain fast back-to-back, if not
  457. * then set it so
  458. */
  459. pci_read_config_word( dev, PCI_STATUS, &cmd);
  460. if((cmd&PCI_COMMAND_FAST_BACK) == 0) {
  461. cmd |= PCI_COMMAND_FAST_BACK;
  462. pci_write_config_word( dev, PCI_STATUS, cmd);
  463. }
  464. /*
  465. * Check to make certain the DEVSEL is set correctly, this device
  466. * has a tendancy to assert DEVSEL and TRDY when a write is performed
  467. * to the memory when memory is read-only
  468. */
  469. if((cmd&PCI_STATUS_DEVSEL_MASK) != 0x0) {
  470. cmd &= ~PCI_STATUS_DEVSEL_MASK;
  471. pci_write_config_word( dev, PCI_STATUS, cmd );
  472. }
  473. /*
  474. * Set to be prefetchable and put everything back based on old cfg.
  475. * it's possible that the reset of the V370PDC nuked the original
  476. * setup
  477. */
  478. /*
  479. cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
  480. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
  481. */
  482. /*
  483. * Turn PCI memory and I/O bus access back on
  484. */
  485. pci_write_config_word( dev, PCI_COMMAND,
  486. PCI_COMMAND_MEMORY | PCI_COMMAND_IO );
  487. #ifdef CONFIG_MTD_PMC551_DEBUG
  488. /*
  489. * Some screen fun
  490. */
  491. printk(KERN_DEBUG "pmc551: %d%c (0x%x) of %sprefetchable memory at 0x%llx\n",
  492. (size<1024)?size:(size<1048576)?size>>10:size>>20,
  493. (size<1024)?'B':(size<1048576)?'K':'M',
  494. size, ((dcmd&(0x1<<3)) == 0)?"non-":"",
  495. (unsigned long long)((dev->resource[0].start)&PCI_BASE_ADDRESS_MEM_MASK));
  496. /*
  497. * Check to see the state of the memory
  498. */
  499. pci_read_config_dword( dev, PMC551_DRAM_BLK0, &dcmd );
  500. printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
  501. "pmc551: DRAM_BLK0 Size: %d at %d\n"
  502. "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
  503. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  504. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  505. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  506. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  507. pci_read_config_dword( dev, PMC551_DRAM_BLK1, &dcmd );
  508. printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
  509. "pmc551: DRAM_BLK1 Size: %d at %d\n"
  510. "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
  511. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  512. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  513. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  514. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  515. pci_read_config_dword( dev, PMC551_DRAM_BLK2, &dcmd );
  516. printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
  517. "pmc551: DRAM_BLK2 Size: %d at %d\n"
  518. "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
  519. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  520. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  521. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  522. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  523. pci_read_config_dword( dev, PMC551_DRAM_BLK3, &dcmd );
  524. printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
  525. "pmc551: DRAM_BLK3 Size: %d at %d\n"
  526. "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
  527. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  528. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  529. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  530. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  531. pci_read_config_word( dev, PCI_COMMAND, &cmd );
  532. printk( KERN_DEBUG "pmc551: Memory Access %s\n",
  533. (((0x1<<1)&cmd) == 0)?"off":"on" );
  534. printk( KERN_DEBUG "pmc551: I/O Access %s\n",
  535. (((0x1<<0)&cmd) == 0)?"off":"on" );
  536. pci_read_config_word( dev, PCI_STATUS, &cmd );
  537. printk( KERN_DEBUG "pmc551: Devsel %s\n",
  538. ((PCI_STATUS_DEVSEL_MASK&cmd)==0x000)?"Fast":
  539. ((PCI_STATUS_DEVSEL_MASK&cmd)==0x200)?"Medium":
  540. ((PCI_STATUS_DEVSEL_MASK&cmd)==0x400)?"Slow":"Invalid" );
  541. printk( KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
  542. ((PCI_COMMAND_FAST_BACK&cmd) == 0)?"Not ":"" );
  543. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd );
  544. printk( KERN_DEBUG "pmc551: EEPROM is under %s control\n"
  545. "pmc551: System Control Register is %slocked to PCI access\n"
  546. "pmc551: System Control Register is %slocked to EEPROM access\n",
  547. (bcmd&0x1)?"software":"hardware",
  548. (bcmd&0x20)?"":"un", (bcmd&0x40)?"":"un");
  549. #endif
  550. return size;
  551. }
  552. /*
  553. * Kernel version specific module stuffages
  554. */
  555. MODULE_LICENSE("GPL");
  556. MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
  557. MODULE_DESCRIPTION(PMC551_VERSION);
  558. /*
  559. * Stuff these outside the ifdef so as to not bust compiled in driver support
  560. */
  561. static int msize=0;
  562. #if defined(CONFIG_MTD_PMC551_APERTURE_SIZE)
  563. static int asize=CONFIG_MTD_PMC551_APERTURE_SIZE
  564. #else
  565. static int asize=0;
  566. #endif
  567. module_param(msize, int, 0);
  568. MODULE_PARM_DESC(msize, "memory size in Megabytes [1 - 1024]");
  569. module_param(asize, int, 0);
  570. MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
  571. /*
  572. * PMC551 Card Initialization
  573. */
  574. static int __init init_pmc551(void)
  575. {
  576. struct pci_dev *PCI_Device = NULL;
  577. struct mypriv *priv;
  578. int count, found=0;
  579. struct mtd_info *mtd;
  580. u32 length = 0;
  581. if(msize) {
  582. msize = (1 << (ffs(msize) - 1))<<20;
  583. if (msize > (1<<30)) {
  584. printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n", msize);
  585. return -EINVAL;
  586. }
  587. }
  588. if(asize) {
  589. asize = (1 << (ffs(asize) - 1))<<20;
  590. if (asize > (1<<30) ) {
  591. printk(KERN_NOTICE "pmc551: Invalid aperture size [%d]\n", asize);
  592. return -EINVAL;
  593. }
  594. }
  595. printk(KERN_INFO PMC551_VERSION);
  596. /*
  597. * PCU-bus chipset probe.
  598. */
  599. for( count = 0; count < MAX_MTD_DEVICES; count++ ) {
  600. if ((PCI_Device = pci_get_device(PCI_VENDOR_ID_V3_SEMI,
  601. PCI_DEVICE_ID_V3_SEMI_V370PDC,
  602. PCI_Device ) ) == NULL) {
  603. break;
  604. }
  605. printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%llx\n",
  606. (unsigned long long)PCI_Device->resource[0].start);
  607. /*
  608. * The PMC551 device acts VERY weird if you don't init it
  609. * first. i.e. it will not correctly report devsel. If for
  610. * some reason the sdram is in a wrote-protected state the
  611. * device will DEVSEL when it is written to causing problems
  612. * with the oldproc.c driver in
  613. * some kernels (2.2.*)
  614. */
  615. if((length = fixup_pmc551(PCI_Device)) <= 0) {
  616. printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
  617. break;
  618. }
  619. /*
  620. * This is needed until the driver is capable of reading the
  621. * onboard I2C SROM to discover the "real" memory size.
  622. */
  623. if(msize) {
  624. length = msize;
  625. printk(KERN_NOTICE "pmc551: Using specified memory size 0x%x\n", length);
  626. } else {
  627. msize = length;
  628. }
  629. mtd = kmalloc(sizeof(struct mtd_info), GFP_KERNEL);
  630. if (!mtd) {
  631. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n");
  632. break;
  633. }
  634. memset(mtd, 0, sizeof(struct mtd_info));
  635. priv = kmalloc (sizeof(struct mypriv), GFP_KERNEL);
  636. if (!priv) {
  637. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n");
  638. kfree(mtd);
  639. break;
  640. }
  641. memset(priv, 0, sizeof(*priv));
  642. mtd->priv = priv;
  643. priv->dev = PCI_Device;
  644. if(asize > length) {
  645. printk(KERN_NOTICE "pmc551: reducing aperture size to fit %dM\n",length>>20);
  646. priv->asize = asize = length;
  647. } else if (asize == 0 || asize == length) {
  648. printk(KERN_NOTICE "pmc551: Using existing aperture size %dM\n", length>>20);
  649. priv->asize = asize = length;
  650. } else {
  651. printk(KERN_NOTICE "pmc551: Using specified aperture size %dM\n", asize>>20);
  652. priv->asize = asize;
  653. }
  654. priv->start = ioremap(((PCI_Device->resource[0].start)
  655. & PCI_BASE_ADDRESS_MEM_MASK),
  656. priv->asize);
  657. if (!priv->start) {
  658. printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
  659. kfree(mtd->priv);
  660. kfree(mtd);
  661. break;
  662. }
  663. #ifdef CONFIG_MTD_PMC551_DEBUG
  664. printk( KERN_DEBUG "pmc551: setting aperture to %d\n",
  665. ffs(priv->asize>>20)-1);
  666. #endif
  667. priv->base_map0 = ( PMC551_PCI_MEM_MAP_REG_EN
  668. | PMC551_PCI_MEM_MAP_ENABLE
  669. | (ffs(priv->asize>>20)-1)<<4 );
  670. priv->curr_map0 = priv->base_map0;
  671. pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0,
  672. priv->curr_map0 );
  673. #ifdef CONFIG_MTD_PMC551_DEBUG
  674. printk( KERN_DEBUG "pmc551: aperture set to %d\n",
  675. (priv->base_map0 & 0xF0)>>4 );
  676. #endif
  677. mtd->size = msize;
  678. mtd->flags = MTD_CAP_RAM;
  679. mtd->erase = pmc551_erase;
  680. mtd->read = pmc551_read;
  681. mtd->write = pmc551_write;
  682. mtd->point = pmc551_point;
  683. mtd->unpoint = pmc551_unpoint;
  684. mtd->type = MTD_RAM;
  685. mtd->name = "PMC551 RAM board";
  686. mtd->erasesize = 0x10000;
  687. mtd->writesize = 1;
  688. mtd->owner = THIS_MODULE;
  689. if (add_mtd_device(mtd)) {
  690. printk(KERN_NOTICE "pmc551: Failed to register new device\n");
  691. iounmap(priv->start);
  692. kfree(mtd->priv);
  693. kfree(mtd);
  694. break;
  695. }
  696. /* Keep a reference as the add_mtd_device worked */
  697. pci_dev_get(PCI_Device);
  698. printk(KERN_NOTICE "Registered pmc551 memory device.\n");
  699. printk(KERN_NOTICE "Mapped %dM of memory from 0x%p to 0x%p\n",
  700. priv->asize>>20,
  701. priv->start,
  702. priv->start + priv->asize);
  703. printk(KERN_NOTICE "Total memory is %d%c\n",
  704. (length<1024)?length:
  705. (length<1048576)?length>>10:length>>20,
  706. (length<1024)?'B':(length<1048576)?'K':'M');
  707. priv->nextpmc551 = pmc551list;
  708. pmc551list = mtd;
  709. found++;
  710. }
  711. /* Exited early, reference left over */
  712. if (PCI_Device)
  713. pci_dev_put(PCI_Device);
  714. if( !pmc551list ) {
  715. printk(KERN_NOTICE "pmc551: not detected\n");
  716. return -ENODEV;
  717. } else {
  718. printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
  719. return 0;
  720. }
  721. }
  722. /*
  723. * PMC551 Card Cleanup
  724. */
  725. static void __exit cleanup_pmc551(void)
  726. {
  727. int found=0;
  728. struct mtd_info *mtd;
  729. struct mypriv *priv;
  730. while((mtd=pmc551list)) {
  731. priv = mtd->priv;
  732. pmc551list = priv->nextpmc551;
  733. if(priv->start) {
  734. printk (KERN_DEBUG "pmc551: unmapping %dM starting at 0x%p\n",
  735. priv->asize>>20, priv->start);
  736. iounmap (priv->start);
  737. }
  738. pci_dev_put(priv->dev);
  739. kfree (mtd->priv);
  740. del_mtd_device (mtd);
  741. kfree (mtd);
  742. found++;
  743. }
  744. printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
  745. }
  746. module_init(init_pmc551);
  747. module_exit(cleanup_pmc551);