gpio.c 12 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "ath9k.h"
  17. /********************************/
  18. /* LED functions */
  19. /********************************/
  20. #ifdef CONFIG_MAC80211_LEDS
  21. static void ath_led_brightness(struct led_classdev *led_cdev,
  22. enum led_brightness brightness)
  23. {
  24. struct ath_softc *sc = container_of(led_cdev, struct ath_softc, led_cdev);
  25. ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, (brightness == LED_OFF));
  26. }
  27. void ath_deinit_leds(struct ath_softc *sc)
  28. {
  29. if (!sc->led_registered)
  30. return;
  31. ath_led_brightness(&sc->led_cdev, LED_OFF);
  32. led_classdev_unregister(&sc->led_cdev);
  33. }
  34. void ath_init_leds(struct ath_softc *sc)
  35. {
  36. int ret;
  37. if (AR_SREV_9100(sc->sc_ah))
  38. return;
  39. if (sc->sc_ah->led_pin < 0) {
  40. if (AR_SREV_9287(sc->sc_ah))
  41. sc->sc_ah->led_pin = ATH_LED_PIN_9287;
  42. else if (AR_SREV_9485(sc->sc_ah))
  43. sc->sc_ah->led_pin = ATH_LED_PIN_9485;
  44. else if (AR_SREV_9300(sc->sc_ah))
  45. sc->sc_ah->led_pin = ATH_LED_PIN_9300;
  46. else if (AR_SREV_9462(sc->sc_ah))
  47. sc->sc_ah->led_pin = ATH_LED_PIN_9462;
  48. else
  49. sc->sc_ah->led_pin = ATH_LED_PIN_DEF;
  50. }
  51. /* Configure gpio 1 for output */
  52. ath9k_hw_cfg_output(sc->sc_ah, sc->sc_ah->led_pin,
  53. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  54. /* LED off, active low */
  55. ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
  56. if (!led_blink)
  57. sc->led_cdev.default_trigger =
  58. ieee80211_get_radio_led_name(sc->hw);
  59. snprintf(sc->led_name, sizeof(sc->led_name),
  60. "ath9k-%s", wiphy_name(sc->hw->wiphy));
  61. sc->led_cdev.name = sc->led_name;
  62. sc->led_cdev.brightness_set = ath_led_brightness;
  63. ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &sc->led_cdev);
  64. if (ret < 0)
  65. return;
  66. sc->led_registered = true;
  67. }
  68. #endif
  69. /*******************/
  70. /* Rfkill */
  71. /*******************/
  72. static bool ath_is_rfkill_set(struct ath_softc *sc)
  73. {
  74. struct ath_hw *ah = sc->sc_ah;
  75. bool is_blocked;
  76. ath9k_ps_wakeup(sc);
  77. is_blocked = ath9k_hw_gpio_get(ah, ah->rfkill_gpio) ==
  78. ah->rfkill_polarity;
  79. ath9k_ps_restore(sc);
  80. return is_blocked;
  81. }
  82. void ath9k_rfkill_poll_state(struct ieee80211_hw *hw)
  83. {
  84. struct ath_softc *sc = hw->priv;
  85. bool blocked = !!ath_is_rfkill_set(sc);
  86. wiphy_rfkill_set_hw_state(hw->wiphy, blocked);
  87. }
  88. void ath_start_rfkill_poll(struct ath_softc *sc)
  89. {
  90. struct ath_hw *ah = sc->sc_ah;
  91. if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
  92. wiphy_rfkill_start_polling(sc->hw->wiphy);
  93. }
  94. #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
  95. /******************/
  96. /* BTCOEX */
  97. /******************/
  98. /*
  99. * Detects if there is any priority bt traffic
  100. */
  101. static void ath_detect_bt_priority(struct ath_softc *sc)
  102. {
  103. struct ath_btcoex *btcoex = &sc->btcoex;
  104. struct ath_hw *ah = sc->sc_ah;
  105. if (ath9k_hw_gpio_get(sc->sc_ah, ah->btcoex_hw.btpriority_gpio))
  106. btcoex->bt_priority_cnt++;
  107. if (time_after(jiffies, btcoex->bt_priority_time +
  108. msecs_to_jiffies(ATH_BT_PRIORITY_TIME_THRESHOLD))) {
  109. clear_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
  110. clear_bit(BT_OP_SCAN, &btcoex->op_flags);
  111. /* Detect if colocated bt started scanning */
  112. if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) {
  113. ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX,
  114. "BT scan detected\n");
  115. set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
  116. set_bit(BT_OP_SCAN, &btcoex->op_flags);
  117. } else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
  118. ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX,
  119. "BT priority traffic detected\n");
  120. set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
  121. }
  122. btcoex->bt_priority_cnt = 0;
  123. btcoex->bt_priority_time = jiffies;
  124. }
  125. }
  126. static void ath9k_gen_timer_start(struct ath_hw *ah,
  127. struct ath_gen_timer *timer,
  128. u32 trig_timeout,
  129. u32 timer_period)
  130. {
  131. ath9k_hw_gen_timer_start(ah, timer, trig_timeout, timer_period);
  132. if ((ah->imask & ATH9K_INT_GENTIMER) == 0) {
  133. ath9k_hw_disable_interrupts(ah);
  134. ah->imask |= ATH9K_INT_GENTIMER;
  135. ath9k_hw_set_interrupts(ah);
  136. ath9k_hw_enable_interrupts(ah);
  137. }
  138. }
  139. static void ath9k_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
  140. {
  141. struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
  142. ath9k_hw_gen_timer_stop(ah, timer);
  143. /* if no timer is enabled, turn off interrupt mask */
  144. if (timer_table->timer_mask.val == 0) {
  145. ath9k_hw_disable_interrupts(ah);
  146. ah->imask &= ~ATH9K_INT_GENTIMER;
  147. ath9k_hw_set_interrupts(ah);
  148. ath9k_hw_enable_interrupts(ah);
  149. }
  150. }
  151. /*
  152. * This is the master bt coex timer which runs for every
  153. * 45ms, bt traffic will be given priority during 55% of this
  154. * period while wlan gets remaining 45%
  155. */
  156. static void ath_btcoex_period_timer(unsigned long data)
  157. {
  158. struct ath_softc *sc = (struct ath_softc *) data;
  159. struct ath_hw *ah = sc->sc_ah;
  160. struct ath_btcoex *btcoex = &sc->btcoex;
  161. struct ath_mci_profile *mci = &btcoex->mci;
  162. u32 timer_period;
  163. bool is_btscan;
  164. ath9k_ps_wakeup(sc);
  165. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
  166. ath_detect_bt_priority(sc);
  167. is_btscan = test_bit(BT_OP_SCAN, &btcoex->op_flags);
  168. btcoex->bt_wait_time += btcoex->btcoex_period;
  169. if (btcoex->bt_wait_time > ATH_BTCOEX_RX_WAIT_TIME) {
  170. if (ar9003_mci_state(ah, MCI_STATE_NEED_FTP_STOMP) &&
  171. (mci->num_pan || mci->num_other_acl))
  172. ah->btcoex_hw.mci.stomp_ftp =
  173. (sc->rx.num_pkts < ATH_BTCOEX_STOMP_FTP_THRESH);
  174. else
  175. ah->btcoex_hw.mci.stomp_ftp = false;
  176. btcoex->bt_wait_time = 0;
  177. sc->rx.num_pkts = 0;
  178. }
  179. spin_lock_bh(&btcoex->btcoex_lock);
  180. ath9k_hw_btcoex_bt_stomp(ah, is_btscan ? ATH_BTCOEX_STOMP_ALL :
  181. btcoex->bt_stomp_type);
  182. ath9k_hw_btcoex_enable(ah);
  183. spin_unlock_bh(&btcoex->btcoex_lock);
  184. if (btcoex->btcoex_period != btcoex->btcoex_no_stomp) {
  185. if (btcoex->hw_timer_enabled)
  186. ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
  187. timer_period = is_btscan ? btcoex->btscan_no_stomp :
  188. btcoex->btcoex_no_stomp;
  189. ath9k_gen_timer_start(ah, btcoex->no_stomp_timer, timer_period,
  190. timer_period * 10);
  191. btcoex->hw_timer_enabled = true;
  192. }
  193. ath9k_ps_restore(sc);
  194. timer_period = btcoex->btcoex_period;
  195. mod_timer(&btcoex->period_timer, jiffies + msecs_to_jiffies(timer_period));
  196. }
  197. /*
  198. * Generic tsf based hw timer which configures weight
  199. * registers to time slice between wlan and bt traffic
  200. */
  201. static void ath_btcoex_no_stomp_timer(void *arg)
  202. {
  203. struct ath_softc *sc = (struct ath_softc *)arg;
  204. struct ath_hw *ah = sc->sc_ah;
  205. struct ath_btcoex *btcoex = &sc->btcoex;
  206. struct ath_common *common = ath9k_hw_common(ah);
  207. ath_dbg(common, BTCOEX, "no stomp timer running\n");
  208. ath9k_ps_wakeup(sc);
  209. spin_lock_bh(&btcoex->btcoex_lock);
  210. if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW ||
  211. test_bit(BT_OP_SCAN, &btcoex->op_flags))
  212. ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
  213. else if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_ALL)
  214. ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_LOW);
  215. ath9k_hw_btcoex_enable(ah);
  216. spin_unlock_bh(&btcoex->btcoex_lock);
  217. ath9k_ps_restore(sc);
  218. }
  219. static int ath_init_btcoex_timer(struct ath_softc *sc)
  220. {
  221. struct ath_btcoex *btcoex = &sc->btcoex;
  222. btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD;
  223. btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) * 1000 *
  224. btcoex->btcoex_period / 100;
  225. btcoex->btscan_no_stomp = (100 - ATH_BTCOEX_BTSCAN_DUTY_CYCLE) * 1000 *
  226. btcoex->btcoex_period / 100;
  227. setup_timer(&btcoex->period_timer, ath_btcoex_period_timer,
  228. (unsigned long) sc);
  229. spin_lock_init(&btcoex->btcoex_lock);
  230. btcoex->no_stomp_timer = ath_gen_timer_alloc(sc->sc_ah,
  231. ath_btcoex_no_stomp_timer,
  232. ath_btcoex_no_stomp_timer,
  233. (void *) sc, AR_FIRST_NDP_TIMER);
  234. if (!btcoex->no_stomp_timer)
  235. return -ENOMEM;
  236. return 0;
  237. }
  238. /*
  239. * (Re)start btcoex timers
  240. */
  241. void ath9k_btcoex_timer_resume(struct ath_softc *sc)
  242. {
  243. struct ath_btcoex *btcoex = &sc->btcoex;
  244. struct ath_hw *ah = sc->sc_ah;
  245. ath_dbg(ath9k_hw_common(ah), BTCOEX, "Starting btcoex timers\n");
  246. /* make sure duty cycle timer is also stopped when resuming */
  247. if (btcoex->hw_timer_enabled)
  248. ath9k_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer);
  249. btcoex->bt_priority_cnt = 0;
  250. btcoex->bt_priority_time = jiffies;
  251. btcoex->op_flags &= ~(BT_OP_PRIORITY_DETECTED | BT_OP_SCAN);
  252. mod_timer(&btcoex->period_timer, jiffies);
  253. }
  254. /*
  255. * Pause btcoex timer and bt duty cycle timer
  256. */
  257. void ath9k_btcoex_timer_pause(struct ath_softc *sc)
  258. {
  259. struct ath_btcoex *btcoex = &sc->btcoex;
  260. struct ath_hw *ah = sc->sc_ah;
  261. del_timer_sync(&btcoex->period_timer);
  262. if (btcoex->hw_timer_enabled)
  263. ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
  264. btcoex->hw_timer_enabled = false;
  265. }
  266. u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen)
  267. {
  268. struct ath_btcoex *btcoex = &sc->btcoex;
  269. struct ath_mci_profile *mci = &sc->btcoex.mci;
  270. u16 aggr_limit = 0;
  271. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && mci->aggr_limit)
  272. aggr_limit = (max_4ms_framelen * mci->aggr_limit) >> 4;
  273. else if (test_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags))
  274. aggr_limit = min((max_4ms_framelen * 3) / 8,
  275. (u32)ATH_AMPDU_LIMIT_MAX);
  276. return aggr_limit;
  277. }
  278. void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status)
  279. {
  280. struct ath_hw *ah = sc->sc_ah;
  281. if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
  282. if (status & ATH9K_INT_GENTIMER)
  283. ath_gen_timer_isr(sc->sc_ah);
  284. if (status & ATH9K_INT_MCI)
  285. ath_mci_intr(sc);
  286. }
  287. void ath9k_start_btcoex(struct ath_softc *sc)
  288. {
  289. struct ath_hw *ah = sc->sc_ah;
  290. if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
  291. !ah->btcoex_hw.enabled) {
  292. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
  293. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  294. AR_STOMP_LOW_WLAN_WGHT);
  295. ath9k_hw_btcoex_enable(ah);
  296. if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
  297. ath9k_btcoex_timer_resume(sc);
  298. }
  299. }
  300. void ath9k_stop_btcoex(struct ath_softc *sc)
  301. {
  302. struct ath_hw *ah = sc->sc_ah;
  303. if (ah->btcoex_hw.enabled &&
  304. ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) {
  305. ath9k_hw_btcoex_disable(ah);
  306. if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
  307. ath9k_btcoex_timer_pause(sc);
  308. if (AR_SREV_9462(ah))
  309. ath_mci_flush_profile(&sc->btcoex.mci);
  310. }
  311. }
  312. void ath9k_deinit_btcoex(struct ath_softc *sc)
  313. {
  314. if ((sc->btcoex.no_stomp_timer) &&
  315. ath9k_hw_get_btcoex_scheme(sc->sc_ah) == ATH_BTCOEX_CFG_3WIRE)
  316. ath_gen_timer_free(sc->sc_ah, sc->btcoex.no_stomp_timer);
  317. if (AR_SREV_9462(sc->sc_ah))
  318. ath_mci_cleanup(sc);
  319. }
  320. int ath9k_init_btcoex(struct ath_softc *sc)
  321. {
  322. struct ath_txq *txq;
  323. struct ath_hw *ah = sc->sc_ah;
  324. int r;
  325. ath9k_hw_btcoex_init_scheme(ah);
  326. switch (ath9k_hw_get_btcoex_scheme(sc->sc_ah)) {
  327. case ATH_BTCOEX_CFG_NONE:
  328. break;
  329. case ATH_BTCOEX_CFG_2WIRE:
  330. ath9k_hw_btcoex_init_2wire(sc->sc_ah);
  331. break;
  332. case ATH_BTCOEX_CFG_3WIRE:
  333. ath9k_hw_btcoex_init_3wire(sc->sc_ah);
  334. r = ath_init_btcoex_timer(sc);
  335. if (r)
  336. return -1;
  337. txq = sc->tx.txq_map[WME_AC_BE];
  338. ath9k_hw_init_btcoex_hw(sc->sc_ah, txq->axq_qnum);
  339. sc->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
  340. if (ath9k_hw_mci_is_enabled(ah)) {
  341. sc->btcoex.duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE;
  342. INIT_LIST_HEAD(&sc->btcoex.mci.info);
  343. r = ath_mci_setup(sc);
  344. if (r)
  345. return r;
  346. ath9k_hw_btcoex_init_mci(ah);
  347. }
  348. break;
  349. default:
  350. WARN_ON(1);
  351. break;
  352. }
  353. return 0;
  354. }
  355. #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */