ipath_rc.c 49 KB

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  1. /*
  2. * Copyright (c) 2006 QLogic, Inc. All rights reserved.
  3. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include "ipath_verbs.h"
  34. #include "ipath_kernel.h"
  35. /* cut down ridiculously long IB macro names */
  36. #define OP(x) IB_OPCODE_RC_##x
  37. static u32 restart_sge(struct ipath_sge_state *ss, struct ipath_swqe *wqe,
  38. u32 psn, u32 pmtu)
  39. {
  40. u32 len;
  41. len = ((psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
  42. ss->sge = wqe->sg_list[0];
  43. ss->sg_list = wqe->sg_list + 1;
  44. ss->num_sge = wqe->wr.num_sge;
  45. ipath_skip_sge(ss, len);
  46. return wqe->length - len;
  47. }
  48. /**
  49. * ipath_init_restart- initialize the qp->s_sge after a restart
  50. * @qp: the QP who's SGE we're restarting
  51. * @wqe: the work queue to initialize the QP's SGE from
  52. *
  53. * The QP s_lock should be held and interrupts disabled.
  54. */
  55. static void ipath_init_restart(struct ipath_qp *qp, struct ipath_swqe *wqe)
  56. {
  57. struct ipath_ibdev *dev;
  58. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn,
  59. ib_mtu_enum_to_int(qp->path_mtu));
  60. dev = to_idev(qp->ibqp.device);
  61. spin_lock(&dev->pending_lock);
  62. if (list_empty(&qp->timerwait))
  63. list_add_tail(&qp->timerwait,
  64. &dev->pending[dev->pending_index]);
  65. spin_unlock(&dev->pending_lock);
  66. }
  67. /**
  68. * ipath_make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
  69. * @qp: a pointer to the QP
  70. * @ohdr: a pointer to the IB header being constructed
  71. * @pmtu: the path MTU
  72. *
  73. * Return 1 if constructed; otherwise, return 0.
  74. * Note that we are in the responder's side of the QP context.
  75. * Note the QP s_lock must be held.
  76. */
  77. static int ipath_make_rc_ack(struct ipath_qp *qp,
  78. struct ipath_other_headers *ohdr,
  79. u32 pmtu, u32 *bth0p, u32 *bth2p)
  80. {
  81. struct ipath_ack_entry *e;
  82. u32 hwords;
  83. u32 len;
  84. u32 bth0;
  85. u32 bth2;
  86. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  87. hwords = 5;
  88. switch (qp->s_ack_state) {
  89. case OP(RDMA_READ_RESPONSE_LAST):
  90. case OP(RDMA_READ_RESPONSE_ONLY):
  91. case OP(ATOMIC_ACKNOWLEDGE):
  92. qp->s_ack_state = OP(ACKNOWLEDGE);
  93. /* FALLTHROUGH */
  94. case OP(ACKNOWLEDGE):
  95. /* Check for no next entry in the queue. */
  96. if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
  97. if (qp->s_flags & IPATH_S_ACK_PENDING)
  98. goto normal;
  99. goto bail;
  100. }
  101. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  102. if (e->opcode == OP(RDMA_READ_REQUEST)) {
  103. /* Copy SGE state in case we need to resend */
  104. qp->s_ack_rdma_sge = e->rdma_sge;
  105. qp->s_cur_sge = &qp->s_ack_rdma_sge;
  106. len = e->rdma_sge.sge.sge_length;
  107. if (len > pmtu) {
  108. len = pmtu;
  109. qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
  110. } else {
  111. qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
  112. if (++qp->s_tail_ack_queue >
  113. IPATH_MAX_RDMA_ATOMIC)
  114. qp->s_tail_ack_queue = 0;
  115. }
  116. ohdr->u.aeth = ipath_compute_aeth(qp);
  117. hwords++;
  118. qp->s_ack_rdma_psn = e->psn;
  119. bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
  120. } else {
  121. /* COMPARE_SWAP or FETCH_ADD */
  122. qp->s_cur_sge = NULL;
  123. len = 0;
  124. qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
  125. ohdr->u.at.aeth = ipath_compute_aeth(qp);
  126. ohdr->u.at.atomic_ack_eth[0] =
  127. cpu_to_be32(e->atomic_data >> 32);
  128. ohdr->u.at.atomic_ack_eth[1] =
  129. cpu_to_be32(e->atomic_data);
  130. hwords += sizeof(ohdr->u.at) / sizeof(u32);
  131. bth2 = e->psn;
  132. if (++qp->s_tail_ack_queue > IPATH_MAX_RDMA_ATOMIC)
  133. qp->s_tail_ack_queue = 0;
  134. }
  135. bth0 = qp->s_ack_state << 24;
  136. break;
  137. case OP(RDMA_READ_RESPONSE_FIRST):
  138. qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  139. /* FALLTHROUGH */
  140. case OP(RDMA_READ_RESPONSE_MIDDLE):
  141. len = qp->s_ack_rdma_sge.sge.sge_length;
  142. if (len > pmtu)
  143. len = pmtu;
  144. else {
  145. ohdr->u.aeth = ipath_compute_aeth(qp);
  146. hwords++;
  147. qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
  148. if (++qp->s_tail_ack_queue > IPATH_MAX_RDMA_ATOMIC)
  149. qp->s_tail_ack_queue = 0;
  150. }
  151. bth0 = qp->s_ack_state << 24;
  152. bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
  153. break;
  154. default:
  155. normal:
  156. /*
  157. * Send a regular ACK.
  158. * Set the s_ack_state so we wait until after sending
  159. * the ACK before setting s_ack_state to ACKNOWLEDGE
  160. * (see above).
  161. */
  162. qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
  163. qp->s_flags &= ~IPATH_S_ACK_PENDING;
  164. qp->s_cur_sge = NULL;
  165. if (qp->s_nak_state)
  166. ohdr->u.aeth =
  167. cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
  168. (qp->s_nak_state <<
  169. IPATH_AETH_CREDIT_SHIFT));
  170. else
  171. ohdr->u.aeth = ipath_compute_aeth(qp);
  172. hwords++;
  173. len = 0;
  174. bth0 = OP(ACKNOWLEDGE) << 24;
  175. bth2 = qp->s_ack_psn & IPATH_PSN_MASK;
  176. }
  177. qp->s_hdrwords = hwords;
  178. qp->s_cur_size = len;
  179. *bth0p = bth0;
  180. *bth2p = bth2;
  181. return 1;
  182. bail:
  183. return 0;
  184. }
  185. /**
  186. * ipath_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
  187. * @qp: a pointer to the QP
  188. * @ohdr: a pointer to the IB header being constructed
  189. * @pmtu: the path MTU
  190. * @bth0p: pointer to the BTH opcode word
  191. * @bth2p: pointer to the BTH PSN word
  192. *
  193. * Return 1 if constructed; otherwise, return 0.
  194. * Note the QP s_lock must be held and interrupts disabled.
  195. */
  196. int ipath_make_rc_req(struct ipath_qp *qp,
  197. struct ipath_other_headers *ohdr,
  198. u32 pmtu, u32 *bth0p, u32 *bth2p)
  199. {
  200. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  201. struct ipath_sge_state *ss;
  202. struct ipath_swqe *wqe;
  203. u32 hwords;
  204. u32 len;
  205. u32 bth0;
  206. u32 bth2;
  207. char newreq;
  208. /* Sending responses has higher priority over sending requests. */
  209. if ((qp->r_head_ack_queue != qp->s_tail_ack_queue ||
  210. (qp->s_flags & IPATH_S_ACK_PENDING) ||
  211. qp->s_ack_state != IB_OPCODE_RC_ACKNOWLEDGE) &&
  212. ipath_make_rc_ack(qp, ohdr, pmtu, bth0p, bth2p))
  213. goto done;
  214. if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_SEND_OK) ||
  215. qp->s_rnr_timeout)
  216. goto bail;
  217. /* Limit the number of packets sent without an ACK. */
  218. if (ipath_cmp24(qp->s_psn, qp->s_last_psn + IPATH_PSN_CREDIT) > 0) {
  219. qp->s_wait_credit = 1;
  220. dev->n_rc_stalls++;
  221. spin_lock(&dev->pending_lock);
  222. if (list_empty(&qp->timerwait))
  223. list_add_tail(&qp->timerwait,
  224. &dev->pending[dev->pending_index]);
  225. spin_unlock(&dev->pending_lock);
  226. goto bail;
  227. }
  228. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  229. hwords = 5;
  230. bth0 = 0;
  231. /* Send a request. */
  232. wqe = get_swqe_ptr(qp, qp->s_cur);
  233. switch (qp->s_state) {
  234. default:
  235. /*
  236. * Resend an old request or start a new one.
  237. *
  238. * We keep track of the current SWQE so that
  239. * we don't reset the "furthest progress" state
  240. * if we need to back up.
  241. */
  242. newreq = 0;
  243. if (qp->s_cur == qp->s_tail) {
  244. /* Check if send work queue is empty. */
  245. if (qp->s_tail == qp->s_head)
  246. goto bail;
  247. /*
  248. * If a fence is requested, wait for previous
  249. * RDMA read and atomic operations to finish.
  250. */
  251. if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
  252. qp->s_num_rd_atomic) {
  253. qp->s_flags |= IPATH_S_FENCE_PENDING;
  254. goto bail;
  255. }
  256. wqe->psn = qp->s_next_psn;
  257. newreq = 1;
  258. }
  259. /*
  260. * Note that we have to be careful not to modify the
  261. * original work request since we may need to resend
  262. * it.
  263. */
  264. len = wqe->length;
  265. ss = &qp->s_sge;
  266. bth2 = 0;
  267. switch (wqe->wr.opcode) {
  268. case IB_WR_SEND:
  269. case IB_WR_SEND_WITH_IMM:
  270. /* If no credit, return. */
  271. if (qp->s_lsn != (u32) -1 &&
  272. ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0)
  273. goto bail;
  274. wqe->lpsn = wqe->psn;
  275. if (len > pmtu) {
  276. wqe->lpsn += (len - 1) / pmtu;
  277. qp->s_state = OP(SEND_FIRST);
  278. len = pmtu;
  279. break;
  280. }
  281. if (wqe->wr.opcode == IB_WR_SEND)
  282. qp->s_state = OP(SEND_ONLY);
  283. else {
  284. qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
  285. /* Immediate data comes after the BTH */
  286. ohdr->u.imm_data = wqe->wr.imm_data;
  287. hwords += 1;
  288. }
  289. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  290. bth0 |= 1 << 23;
  291. bth2 = 1 << 31; /* Request ACK. */
  292. if (++qp->s_cur == qp->s_size)
  293. qp->s_cur = 0;
  294. break;
  295. case IB_WR_RDMA_WRITE:
  296. if (newreq && qp->s_lsn != (u32) -1)
  297. qp->s_lsn++;
  298. /* FALLTHROUGH */
  299. case IB_WR_RDMA_WRITE_WITH_IMM:
  300. /* If no credit, return. */
  301. if (qp->s_lsn != (u32) -1 &&
  302. ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0)
  303. goto bail;
  304. ohdr->u.rc.reth.vaddr =
  305. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  306. ohdr->u.rc.reth.rkey =
  307. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  308. ohdr->u.rc.reth.length = cpu_to_be32(len);
  309. hwords += sizeof(struct ib_reth) / sizeof(u32);
  310. wqe->lpsn = wqe->psn;
  311. if (len > pmtu) {
  312. wqe->lpsn += (len - 1) / pmtu;
  313. qp->s_state = OP(RDMA_WRITE_FIRST);
  314. len = pmtu;
  315. break;
  316. }
  317. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  318. qp->s_state = OP(RDMA_WRITE_ONLY);
  319. else {
  320. qp->s_state =
  321. OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  322. /* Immediate data comes after RETH */
  323. ohdr->u.rc.imm_data = wqe->wr.imm_data;
  324. hwords += 1;
  325. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  326. bth0 |= 1 << 23;
  327. }
  328. bth2 = 1 << 31; /* Request ACK. */
  329. if (++qp->s_cur == qp->s_size)
  330. qp->s_cur = 0;
  331. break;
  332. case IB_WR_RDMA_READ:
  333. /*
  334. * Don't allow more operations to be started
  335. * than the QP limits allow.
  336. */
  337. if (newreq) {
  338. if (qp->s_num_rd_atomic >=
  339. qp->s_max_rd_atomic) {
  340. qp->s_flags |= IPATH_S_RDMAR_PENDING;
  341. goto bail;
  342. }
  343. qp->s_num_rd_atomic++;
  344. if (qp->s_lsn != (u32) -1)
  345. qp->s_lsn++;
  346. /*
  347. * Adjust s_next_psn to count the
  348. * expected number of responses.
  349. */
  350. if (len > pmtu)
  351. qp->s_next_psn += (len - 1) / pmtu;
  352. wqe->lpsn = qp->s_next_psn++;
  353. }
  354. ohdr->u.rc.reth.vaddr =
  355. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  356. ohdr->u.rc.reth.rkey =
  357. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  358. ohdr->u.rc.reth.length = cpu_to_be32(len);
  359. qp->s_state = OP(RDMA_READ_REQUEST);
  360. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  361. ss = NULL;
  362. len = 0;
  363. if (++qp->s_cur == qp->s_size)
  364. qp->s_cur = 0;
  365. break;
  366. case IB_WR_ATOMIC_CMP_AND_SWP:
  367. case IB_WR_ATOMIC_FETCH_AND_ADD:
  368. /*
  369. * Don't allow more operations to be started
  370. * than the QP limits allow.
  371. */
  372. if (newreq) {
  373. if (qp->s_num_rd_atomic >=
  374. qp->s_max_rd_atomic) {
  375. qp->s_flags |= IPATH_S_RDMAR_PENDING;
  376. goto bail;
  377. }
  378. qp->s_num_rd_atomic++;
  379. if (qp->s_lsn != (u32) -1)
  380. qp->s_lsn++;
  381. wqe->lpsn = wqe->psn;
  382. }
  383. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
  384. qp->s_state = OP(COMPARE_SWAP);
  385. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  386. wqe->wr.wr.atomic.swap);
  387. ohdr->u.atomic_eth.compare_data = cpu_to_be64(
  388. wqe->wr.wr.atomic.compare_add);
  389. } else {
  390. qp->s_state = OP(FETCH_ADD);
  391. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  392. wqe->wr.wr.atomic.compare_add);
  393. ohdr->u.atomic_eth.compare_data = 0;
  394. }
  395. ohdr->u.atomic_eth.vaddr[0] = cpu_to_be32(
  396. wqe->wr.wr.atomic.remote_addr >> 32);
  397. ohdr->u.atomic_eth.vaddr[1] = cpu_to_be32(
  398. wqe->wr.wr.atomic.remote_addr);
  399. ohdr->u.atomic_eth.rkey = cpu_to_be32(
  400. wqe->wr.wr.atomic.rkey);
  401. hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
  402. ss = NULL;
  403. len = 0;
  404. if (++qp->s_cur == qp->s_size)
  405. qp->s_cur = 0;
  406. break;
  407. default:
  408. goto bail;
  409. }
  410. qp->s_sge.sge = wqe->sg_list[0];
  411. qp->s_sge.sg_list = wqe->sg_list + 1;
  412. qp->s_sge.num_sge = wqe->wr.num_sge;
  413. qp->s_len = wqe->length;
  414. if (newreq) {
  415. qp->s_tail++;
  416. if (qp->s_tail >= qp->s_size)
  417. qp->s_tail = 0;
  418. }
  419. bth2 |= qp->s_psn & IPATH_PSN_MASK;
  420. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  421. qp->s_psn = wqe->lpsn + 1;
  422. else {
  423. qp->s_psn++;
  424. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  425. qp->s_next_psn = qp->s_psn;
  426. }
  427. /*
  428. * Put the QP on the pending list so lost ACKs will cause
  429. * a retry. More than one request can be pending so the
  430. * QP may already be on the dev->pending list.
  431. */
  432. spin_lock(&dev->pending_lock);
  433. if (list_empty(&qp->timerwait))
  434. list_add_tail(&qp->timerwait,
  435. &dev->pending[dev->pending_index]);
  436. spin_unlock(&dev->pending_lock);
  437. break;
  438. case OP(RDMA_READ_RESPONSE_FIRST):
  439. /*
  440. * This case can only happen if a send is restarted.
  441. * See ipath_restart_rc().
  442. */
  443. ipath_init_restart(qp, wqe);
  444. /* FALLTHROUGH */
  445. case OP(SEND_FIRST):
  446. qp->s_state = OP(SEND_MIDDLE);
  447. /* FALLTHROUGH */
  448. case OP(SEND_MIDDLE):
  449. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  450. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  451. qp->s_next_psn = qp->s_psn;
  452. ss = &qp->s_sge;
  453. len = qp->s_len;
  454. if (len > pmtu) {
  455. len = pmtu;
  456. break;
  457. }
  458. if (wqe->wr.opcode == IB_WR_SEND)
  459. qp->s_state = OP(SEND_LAST);
  460. else {
  461. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  462. /* Immediate data comes after the BTH */
  463. ohdr->u.imm_data = wqe->wr.imm_data;
  464. hwords += 1;
  465. }
  466. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  467. bth0 |= 1 << 23;
  468. bth2 |= 1 << 31; /* Request ACK. */
  469. qp->s_cur++;
  470. if (qp->s_cur >= qp->s_size)
  471. qp->s_cur = 0;
  472. break;
  473. case OP(RDMA_READ_RESPONSE_LAST):
  474. /*
  475. * This case can only happen if a RDMA write is restarted.
  476. * See ipath_restart_rc().
  477. */
  478. ipath_init_restart(qp, wqe);
  479. /* FALLTHROUGH */
  480. case OP(RDMA_WRITE_FIRST):
  481. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  482. /* FALLTHROUGH */
  483. case OP(RDMA_WRITE_MIDDLE):
  484. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  485. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  486. qp->s_next_psn = qp->s_psn;
  487. ss = &qp->s_sge;
  488. len = qp->s_len;
  489. if (len > pmtu) {
  490. len = pmtu;
  491. break;
  492. }
  493. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  494. qp->s_state = OP(RDMA_WRITE_LAST);
  495. else {
  496. qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  497. /* Immediate data comes after the BTH */
  498. ohdr->u.imm_data = wqe->wr.imm_data;
  499. hwords += 1;
  500. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  501. bth0 |= 1 << 23;
  502. }
  503. bth2 |= 1 << 31; /* Request ACK. */
  504. qp->s_cur++;
  505. if (qp->s_cur >= qp->s_size)
  506. qp->s_cur = 0;
  507. break;
  508. case OP(RDMA_READ_RESPONSE_MIDDLE):
  509. /*
  510. * This case can only happen if a RDMA read is restarted.
  511. * See ipath_restart_rc().
  512. */
  513. ipath_init_restart(qp, wqe);
  514. len = ((qp->s_psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
  515. ohdr->u.rc.reth.vaddr =
  516. cpu_to_be64(wqe->wr.wr.rdma.remote_addr + len);
  517. ohdr->u.rc.reth.rkey =
  518. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  519. ohdr->u.rc.reth.length = cpu_to_be32(qp->s_len);
  520. qp->s_state = OP(RDMA_READ_REQUEST);
  521. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  522. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  523. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  524. qp->s_next_psn = qp->s_psn;
  525. ss = NULL;
  526. len = 0;
  527. qp->s_cur++;
  528. if (qp->s_cur == qp->s_size)
  529. qp->s_cur = 0;
  530. break;
  531. }
  532. if (ipath_cmp24(qp->s_psn, qp->s_last_psn + IPATH_PSN_CREDIT - 1) >= 0)
  533. bth2 |= 1 << 31; /* Request ACK. */
  534. qp->s_len -= len;
  535. qp->s_hdrwords = hwords;
  536. qp->s_cur_sge = ss;
  537. qp->s_cur_size = len;
  538. *bth0p = bth0 | (qp->s_state << 24);
  539. *bth2p = bth2;
  540. done:
  541. return 1;
  542. bail:
  543. return 0;
  544. }
  545. /**
  546. * send_rc_ack - Construct an ACK packet and send it
  547. * @qp: a pointer to the QP
  548. *
  549. * This is called from ipath_rc_rcv() and only uses the receive
  550. * side QP state.
  551. * Note that RDMA reads and atomics are handled in the
  552. * send side QP state and tasklet.
  553. */
  554. static void send_rc_ack(struct ipath_qp *qp)
  555. {
  556. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  557. u16 lrh0;
  558. u32 bth0;
  559. u32 hwords;
  560. struct ipath_ib_header hdr;
  561. struct ipath_other_headers *ohdr;
  562. /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
  563. if (qp->r_head_ack_queue != qp->s_tail_ack_queue)
  564. goto queue_ack;
  565. /* Construct the header. */
  566. ohdr = &hdr.u.oth;
  567. lrh0 = IPATH_LRH_BTH;
  568. /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4. */
  569. hwords = 6;
  570. if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
  571. hwords += ipath_make_grh(dev, &hdr.u.l.grh,
  572. &qp->remote_ah_attr.grh,
  573. hwords, 0);
  574. ohdr = &hdr.u.l.oth;
  575. lrh0 = IPATH_LRH_GRH;
  576. }
  577. /* read pkey_index w/o lock (its atomic) */
  578. bth0 = ipath_get_pkey(dev->dd, qp->s_pkey_index) |
  579. OP(ACKNOWLEDGE) << 24;
  580. if (qp->r_nak_state)
  581. ohdr->u.aeth = cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
  582. (qp->r_nak_state <<
  583. IPATH_AETH_CREDIT_SHIFT));
  584. else
  585. ohdr->u.aeth = ipath_compute_aeth(qp);
  586. lrh0 |= qp->remote_ah_attr.sl << 4;
  587. hdr.lrh[0] = cpu_to_be16(lrh0);
  588. hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
  589. hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
  590. hdr.lrh[3] = cpu_to_be16(dev->dd->ipath_lid);
  591. ohdr->bth[0] = cpu_to_be32(bth0);
  592. ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
  593. ohdr->bth[2] = cpu_to_be32(qp->r_ack_psn & IPATH_PSN_MASK);
  594. /*
  595. * If we can send the ACK, clear the ACK state.
  596. */
  597. if (ipath_verbs_send(dev->dd, hwords, (u32 *) &hdr, 0, NULL) == 0) {
  598. dev->n_unicast_xmit++;
  599. goto done;
  600. }
  601. /*
  602. * We are out of PIO buffers at the moment.
  603. * Pass responsibility for sending the ACK to the
  604. * send tasklet so that when a PIO buffer becomes
  605. * available, the ACK is sent ahead of other outgoing
  606. * packets.
  607. */
  608. dev->n_rc_qacks++;
  609. queue_ack:
  610. spin_lock_irq(&qp->s_lock);
  611. qp->s_flags |= IPATH_S_ACK_PENDING;
  612. qp->s_nak_state = qp->r_nak_state;
  613. qp->s_ack_psn = qp->r_ack_psn;
  614. spin_unlock_irq(&qp->s_lock);
  615. /* Call ipath_do_rc_send() in another thread. */
  616. tasklet_hi_schedule(&qp->s_task);
  617. done:
  618. return;
  619. }
  620. /**
  621. * reset_psn - reset the QP state to send starting from PSN
  622. * @qp: the QP
  623. * @psn: the packet sequence number to restart at
  624. *
  625. * This is called from ipath_rc_rcv() to process an incoming RC ACK
  626. * for the given QP.
  627. * Called at interrupt level with the QP s_lock held.
  628. */
  629. static void reset_psn(struct ipath_qp *qp, u32 psn)
  630. {
  631. u32 n = qp->s_last;
  632. struct ipath_swqe *wqe = get_swqe_ptr(qp, n);
  633. u32 opcode;
  634. qp->s_cur = n;
  635. /*
  636. * If we are starting the request from the beginning,
  637. * let the normal send code handle initialization.
  638. */
  639. if (ipath_cmp24(psn, wqe->psn) <= 0) {
  640. qp->s_state = OP(SEND_LAST);
  641. goto done;
  642. }
  643. /* Find the work request opcode corresponding to the given PSN. */
  644. opcode = wqe->wr.opcode;
  645. for (;;) {
  646. int diff;
  647. if (++n == qp->s_size)
  648. n = 0;
  649. if (n == qp->s_tail)
  650. break;
  651. wqe = get_swqe_ptr(qp, n);
  652. diff = ipath_cmp24(psn, wqe->psn);
  653. if (diff < 0)
  654. break;
  655. qp->s_cur = n;
  656. /*
  657. * If we are starting the request from the beginning,
  658. * let the normal send code handle initialization.
  659. */
  660. if (diff == 0) {
  661. qp->s_state = OP(SEND_LAST);
  662. goto done;
  663. }
  664. opcode = wqe->wr.opcode;
  665. }
  666. /*
  667. * Set the state to restart in the middle of a request.
  668. * Don't change the s_sge, s_cur_sge, or s_cur_size.
  669. * See ipath_do_rc_send().
  670. */
  671. switch (opcode) {
  672. case IB_WR_SEND:
  673. case IB_WR_SEND_WITH_IMM:
  674. qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
  675. break;
  676. case IB_WR_RDMA_WRITE:
  677. case IB_WR_RDMA_WRITE_WITH_IMM:
  678. qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
  679. break;
  680. case IB_WR_RDMA_READ:
  681. qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  682. break;
  683. default:
  684. /*
  685. * This case shouldn't happen since its only
  686. * one PSN per req.
  687. */
  688. qp->s_state = OP(SEND_LAST);
  689. }
  690. done:
  691. qp->s_psn = psn;
  692. }
  693. /**
  694. * ipath_restart_rc - back up requester to resend the last un-ACKed request
  695. * @qp: the QP to restart
  696. * @psn: packet sequence number for the request
  697. * @wc: the work completion request
  698. *
  699. * The QP s_lock should be held and interrupts disabled.
  700. */
  701. void ipath_restart_rc(struct ipath_qp *qp, u32 psn, struct ib_wc *wc)
  702. {
  703. struct ipath_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
  704. struct ipath_ibdev *dev;
  705. if (qp->s_retry == 0) {
  706. wc->wr_id = wqe->wr.wr_id;
  707. wc->status = IB_WC_RETRY_EXC_ERR;
  708. wc->opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  709. wc->vendor_err = 0;
  710. wc->byte_len = 0;
  711. wc->qp = &qp->ibqp;
  712. wc->src_qp = qp->remote_qpn;
  713. wc->pkey_index = 0;
  714. wc->slid = qp->remote_ah_attr.dlid;
  715. wc->sl = qp->remote_ah_attr.sl;
  716. wc->dlid_path_bits = 0;
  717. wc->port_num = 0;
  718. ipath_sqerror_qp(qp, wc);
  719. goto bail;
  720. }
  721. qp->s_retry--;
  722. /*
  723. * Remove the QP from the timeout queue.
  724. * Note: it may already have been removed by ipath_ib_timer().
  725. */
  726. dev = to_idev(qp->ibqp.device);
  727. spin_lock(&dev->pending_lock);
  728. if (!list_empty(&qp->timerwait))
  729. list_del_init(&qp->timerwait);
  730. spin_unlock(&dev->pending_lock);
  731. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  732. dev->n_rc_resends++;
  733. else
  734. dev->n_rc_resends += (qp->s_psn - psn) & IPATH_PSN_MASK;
  735. reset_psn(qp, psn);
  736. tasklet_hi_schedule(&qp->s_task);
  737. bail:
  738. return;
  739. }
  740. static inline void update_last_psn(struct ipath_qp *qp, u32 psn)
  741. {
  742. if (qp->s_wait_credit) {
  743. qp->s_wait_credit = 0;
  744. tasklet_hi_schedule(&qp->s_task);
  745. }
  746. qp->s_last_psn = psn;
  747. }
  748. /**
  749. * do_rc_ack - process an incoming RC ACK
  750. * @qp: the QP the ACK came in on
  751. * @psn: the packet sequence number of the ACK
  752. * @opcode: the opcode of the request that resulted in the ACK
  753. *
  754. * This is called from ipath_rc_rcv_resp() to process an incoming RC ACK
  755. * for the given QP.
  756. * Called at interrupt level with the QP s_lock held and interrupts disabled.
  757. * Returns 1 if OK, 0 if current operation should be aborted (NAK).
  758. */
  759. static int do_rc_ack(struct ipath_qp *qp, u32 aeth, u32 psn, int opcode)
  760. {
  761. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  762. struct ib_wc wc;
  763. struct ipath_swqe *wqe;
  764. int ret = 0;
  765. u32 ack_psn;
  766. /*
  767. * Remove the QP from the timeout queue (or RNR timeout queue).
  768. * If ipath_ib_timer() has already removed it,
  769. * it's OK since we hold the QP s_lock and ipath_restart_rc()
  770. * just won't find anything to restart if we ACK everything.
  771. */
  772. spin_lock(&dev->pending_lock);
  773. if (!list_empty(&qp->timerwait))
  774. list_del_init(&qp->timerwait);
  775. spin_unlock(&dev->pending_lock);
  776. /*
  777. * Note that NAKs implicitly ACK outstanding SEND and RDMA write
  778. * requests and implicitly NAK RDMA read and atomic requests issued
  779. * before the NAK'ed request. The MSN won't include the NAK'ed
  780. * request but will include an ACK'ed request(s).
  781. */
  782. ack_psn = psn;
  783. if (aeth >> 29)
  784. ack_psn--;
  785. wqe = get_swqe_ptr(qp, qp->s_last);
  786. /*
  787. * The MSN might be for a later WQE than the PSN indicates so
  788. * only complete WQEs that the PSN finishes.
  789. */
  790. while (ipath_cmp24(ack_psn, wqe->lpsn) >= 0) {
  791. /*
  792. * If this request is a RDMA read or atomic, and the ACK is
  793. * for a later operation, this ACK NAKs the RDMA read or
  794. * atomic. In other words, only a RDMA_READ_LAST or ONLY
  795. * can ACK a RDMA read and likewise for atomic ops. Note
  796. * that the NAK case can only happen if relaxed ordering is
  797. * used and requests are sent after an RDMA read or atomic
  798. * is sent but before the response is received.
  799. */
  800. if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
  801. (opcode != OP(RDMA_READ_RESPONSE_LAST) ||
  802. ipath_cmp24(ack_psn, wqe->lpsn) != 0)) ||
  803. ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  804. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
  805. (opcode != OP(ATOMIC_ACKNOWLEDGE) ||
  806. ipath_cmp24(wqe->psn, psn) != 0))) {
  807. /*
  808. * The last valid PSN seen is the previous
  809. * request's.
  810. */
  811. update_last_psn(qp, wqe->psn - 1);
  812. /* Retry this request. */
  813. ipath_restart_rc(qp, wqe->psn, &wc);
  814. /*
  815. * No need to process the ACK/NAK since we are
  816. * restarting an earlier request.
  817. */
  818. goto bail;
  819. }
  820. if (qp->s_num_rd_atomic &&
  821. (wqe->wr.opcode == IB_WR_RDMA_READ ||
  822. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  823. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
  824. qp->s_num_rd_atomic--;
  825. /* Restart sending task if fence is complete */
  826. if ((qp->s_flags & IPATH_S_FENCE_PENDING) &&
  827. !qp->s_num_rd_atomic) {
  828. qp->s_flags &= ~IPATH_S_FENCE_PENDING;
  829. tasklet_hi_schedule(&qp->s_task);
  830. } else if (qp->s_flags & IPATH_S_RDMAR_PENDING) {
  831. qp->s_flags &= ~IPATH_S_RDMAR_PENDING;
  832. tasklet_hi_schedule(&qp->s_task);
  833. }
  834. }
  835. /* Post a send completion queue entry if requested. */
  836. if (!(qp->s_flags & IPATH_S_SIGNAL_REQ_WR) ||
  837. (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
  838. wc.wr_id = wqe->wr.wr_id;
  839. wc.status = IB_WC_SUCCESS;
  840. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  841. wc.vendor_err = 0;
  842. wc.byte_len = wqe->length;
  843. wc.imm_data = 0;
  844. wc.qp = &qp->ibqp;
  845. wc.src_qp = qp->remote_qpn;
  846. wc.wc_flags = 0;
  847. wc.pkey_index = 0;
  848. wc.slid = qp->remote_ah_attr.dlid;
  849. wc.sl = qp->remote_ah_attr.sl;
  850. wc.dlid_path_bits = 0;
  851. wc.port_num = 0;
  852. ipath_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
  853. }
  854. qp->s_retry = qp->s_retry_cnt;
  855. /*
  856. * If we are completing a request which is in the process of
  857. * being resent, we can stop resending it since we know the
  858. * responder has already seen it.
  859. */
  860. if (qp->s_last == qp->s_cur) {
  861. if (++qp->s_cur >= qp->s_size)
  862. qp->s_cur = 0;
  863. qp->s_last = qp->s_cur;
  864. if (qp->s_last == qp->s_tail)
  865. break;
  866. wqe = get_swqe_ptr(qp, qp->s_cur);
  867. qp->s_state = OP(SEND_LAST);
  868. qp->s_psn = wqe->psn;
  869. } else {
  870. if (++qp->s_last >= qp->s_size)
  871. qp->s_last = 0;
  872. if (qp->s_last == qp->s_tail)
  873. break;
  874. wqe = get_swqe_ptr(qp, qp->s_last);
  875. }
  876. }
  877. switch (aeth >> 29) {
  878. case 0: /* ACK */
  879. dev->n_rc_acks++;
  880. /* If this is a partial ACK, reset the retransmit timer. */
  881. if (qp->s_last != qp->s_tail) {
  882. spin_lock(&dev->pending_lock);
  883. list_add_tail(&qp->timerwait,
  884. &dev->pending[dev->pending_index]);
  885. spin_unlock(&dev->pending_lock);
  886. /*
  887. * If we get a partial ACK for a resent operation,
  888. * we can stop resending the earlier packets and
  889. * continue with the next packet the receiver wants.
  890. */
  891. if (ipath_cmp24(qp->s_psn, psn) <= 0) {
  892. reset_psn(qp, psn + 1);
  893. tasklet_hi_schedule(&qp->s_task);
  894. }
  895. } else if (ipath_cmp24(qp->s_psn, psn) <= 0) {
  896. qp->s_state = OP(SEND_LAST);
  897. qp->s_psn = psn + 1;
  898. }
  899. ipath_get_credit(qp, aeth);
  900. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  901. qp->s_retry = qp->s_retry_cnt;
  902. update_last_psn(qp, psn);
  903. ret = 1;
  904. goto bail;
  905. case 1: /* RNR NAK */
  906. dev->n_rnr_naks++;
  907. if (qp->s_last == qp->s_tail)
  908. goto bail;
  909. if (qp->s_rnr_retry == 0) {
  910. wc.status = IB_WC_RNR_RETRY_EXC_ERR;
  911. goto class_b;
  912. }
  913. if (qp->s_rnr_retry_cnt < 7)
  914. qp->s_rnr_retry--;
  915. /* The last valid PSN is the previous PSN. */
  916. update_last_psn(qp, psn - 1);
  917. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  918. dev->n_rc_resends++;
  919. else
  920. dev->n_rc_resends +=
  921. (qp->s_psn - psn) & IPATH_PSN_MASK;
  922. reset_psn(qp, psn);
  923. qp->s_rnr_timeout =
  924. ib_ipath_rnr_table[(aeth >> IPATH_AETH_CREDIT_SHIFT) &
  925. IPATH_AETH_CREDIT_MASK];
  926. ipath_insert_rnr_queue(qp);
  927. goto bail;
  928. case 3: /* NAK */
  929. if (qp->s_last == qp->s_tail)
  930. goto bail;
  931. /* The last valid PSN is the previous PSN. */
  932. update_last_psn(qp, psn - 1);
  933. switch ((aeth >> IPATH_AETH_CREDIT_SHIFT) &
  934. IPATH_AETH_CREDIT_MASK) {
  935. case 0: /* PSN sequence error */
  936. dev->n_seq_naks++;
  937. /*
  938. * Back up to the responder's expected PSN.
  939. * Note that we might get a NAK in the middle of an
  940. * RDMA READ response which terminates the RDMA
  941. * READ.
  942. */
  943. ipath_restart_rc(qp, psn, &wc);
  944. break;
  945. case 1: /* Invalid Request */
  946. wc.status = IB_WC_REM_INV_REQ_ERR;
  947. dev->n_other_naks++;
  948. goto class_b;
  949. case 2: /* Remote Access Error */
  950. wc.status = IB_WC_REM_ACCESS_ERR;
  951. dev->n_other_naks++;
  952. goto class_b;
  953. case 3: /* Remote Operation Error */
  954. wc.status = IB_WC_REM_OP_ERR;
  955. dev->n_other_naks++;
  956. class_b:
  957. wc.wr_id = wqe->wr.wr_id;
  958. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  959. wc.vendor_err = 0;
  960. wc.byte_len = 0;
  961. wc.qp = &qp->ibqp;
  962. wc.src_qp = qp->remote_qpn;
  963. wc.pkey_index = 0;
  964. wc.slid = qp->remote_ah_attr.dlid;
  965. wc.sl = qp->remote_ah_attr.sl;
  966. wc.dlid_path_bits = 0;
  967. wc.port_num = 0;
  968. ipath_sqerror_qp(qp, &wc);
  969. break;
  970. default:
  971. /* Ignore other reserved NAK error codes */
  972. goto reserved;
  973. }
  974. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  975. goto bail;
  976. default: /* 2: reserved */
  977. reserved:
  978. /* Ignore reserved NAK codes. */
  979. goto bail;
  980. }
  981. bail:
  982. return ret;
  983. }
  984. /**
  985. * ipath_rc_rcv_resp - process an incoming RC response packet
  986. * @dev: the device this packet came in on
  987. * @ohdr: the other headers for this packet
  988. * @data: the packet data
  989. * @tlen: the packet length
  990. * @qp: the QP for this packet
  991. * @opcode: the opcode for this packet
  992. * @psn: the packet sequence number for this packet
  993. * @hdrsize: the header length
  994. * @pmtu: the path MTU
  995. * @header_in_data: true if part of the header data is in the data buffer
  996. *
  997. * This is called from ipath_rc_rcv() to process an incoming RC response
  998. * packet for the given QP.
  999. * Called at interrupt level.
  1000. */
  1001. static inline void ipath_rc_rcv_resp(struct ipath_ibdev *dev,
  1002. struct ipath_other_headers *ohdr,
  1003. void *data, u32 tlen,
  1004. struct ipath_qp *qp,
  1005. u32 opcode,
  1006. u32 psn, u32 hdrsize, u32 pmtu,
  1007. int header_in_data)
  1008. {
  1009. struct ipath_swqe *wqe;
  1010. unsigned long flags;
  1011. struct ib_wc wc;
  1012. int diff;
  1013. u32 pad;
  1014. u32 aeth;
  1015. spin_lock_irqsave(&qp->s_lock, flags);
  1016. /* Ignore invalid responses. */
  1017. if (ipath_cmp24(psn, qp->s_next_psn) >= 0)
  1018. goto ack_done;
  1019. /* Ignore duplicate responses. */
  1020. diff = ipath_cmp24(psn, qp->s_last_psn);
  1021. if (unlikely(diff <= 0)) {
  1022. /* Update credits for "ghost" ACKs */
  1023. if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
  1024. if (!header_in_data)
  1025. aeth = be32_to_cpu(ohdr->u.aeth);
  1026. else {
  1027. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1028. data += sizeof(__be32);
  1029. }
  1030. if ((aeth >> 29) == 0)
  1031. ipath_get_credit(qp, aeth);
  1032. }
  1033. goto ack_done;
  1034. }
  1035. if (unlikely(qp->s_last == qp->s_tail))
  1036. goto ack_done;
  1037. wqe = get_swqe_ptr(qp, qp->s_last);
  1038. switch (opcode) {
  1039. case OP(ACKNOWLEDGE):
  1040. case OP(ATOMIC_ACKNOWLEDGE):
  1041. case OP(RDMA_READ_RESPONSE_FIRST):
  1042. if (!header_in_data)
  1043. aeth = be32_to_cpu(ohdr->u.aeth);
  1044. else {
  1045. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1046. data += sizeof(__be32);
  1047. }
  1048. if (opcode == OP(ATOMIC_ACKNOWLEDGE)) {
  1049. u64 val;
  1050. if (!header_in_data) {
  1051. __be32 *p = ohdr->u.at.atomic_ack_eth;
  1052. val = ((u64) be32_to_cpu(p[0]) << 32) |
  1053. be32_to_cpu(p[1]);
  1054. } else
  1055. val = be64_to_cpu(((__be64 *) data)[0]);
  1056. *(u64 *) wqe->sg_list[0].vaddr = val;
  1057. }
  1058. if (!do_rc_ack(qp, aeth, psn, opcode) ||
  1059. opcode != OP(RDMA_READ_RESPONSE_FIRST))
  1060. goto ack_done;
  1061. hdrsize += 4;
  1062. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1063. goto ack_op_err;
  1064. /*
  1065. * If this is a response to a resent RDMA read, we
  1066. * have to be careful to copy the data to the right
  1067. * location.
  1068. */
  1069. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1070. wqe, psn, pmtu);
  1071. goto read_middle;
  1072. case OP(RDMA_READ_RESPONSE_MIDDLE):
  1073. /* no AETH, no ACK */
  1074. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  1075. dev->n_rdma_seq++;
  1076. ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
  1077. goto ack_done;
  1078. }
  1079. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1080. goto ack_op_err;
  1081. read_middle:
  1082. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1083. goto ack_len_err;
  1084. if (unlikely(pmtu >= qp->s_rdma_read_len))
  1085. goto ack_len_err;
  1086. /* We got a response so update the timeout. */
  1087. spin_lock(&dev->pending_lock);
  1088. if (qp->s_rnr_timeout == 0 && !list_empty(&qp->timerwait))
  1089. list_move_tail(&qp->timerwait,
  1090. &dev->pending[dev->pending_index]);
  1091. spin_unlock(&dev->pending_lock);
  1092. /*
  1093. * Update the RDMA receive state but do the copy w/o
  1094. * holding the locks and blocking interrupts.
  1095. */
  1096. qp->s_rdma_read_len -= pmtu;
  1097. update_last_psn(qp, psn);
  1098. spin_unlock_irqrestore(&qp->s_lock, flags);
  1099. ipath_copy_sge(&qp->s_rdma_read_sge, data, pmtu);
  1100. goto bail;
  1101. case OP(RDMA_READ_RESPONSE_ONLY):
  1102. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  1103. dev->n_rdma_seq++;
  1104. ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
  1105. goto ack_done;
  1106. }
  1107. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1108. goto ack_op_err;
  1109. /* Get the number of bytes the message was padded by. */
  1110. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1111. /*
  1112. * Check that the data size is >= 0 && <= pmtu.
  1113. * Remember to account for the AETH header (4) and
  1114. * ICRC (4).
  1115. */
  1116. if (unlikely(tlen < (hdrsize + pad + 8)))
  1117. goto ack_len_err;
  1118. /*
  1119. * If this is a response to a resent RDMA read, we
  1120. * have to be careful to copy the data to the right
  1121. * location.
  1122. */
  1123. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1124. wqe, psn, pmtu);
  1125. goto read_last;
  1126. case OP(RDMA_READ_RESPONSE_LAST):
  1127. /* ACKs READ req. */
  1128. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  1129. dev->n_rdma_seq++;
  1130. ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
  1131. goto ack_done;
  1132. }
  1133. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1134. goto ack_op_err;
  1135. /* Get the number of bytes the message was padded by. */
  1136. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1137. /*
  1138. * Check that the data size is >= 1 && <= pmtu.
  1139. * Remember to account for the AETH header (4) and
  1140. * ICRC (4).
  1141. */
  1142. if (unlikely(tlen <= (hdrsize + pad + 8)))
  1143. goto ack_len_err;
  1144. read_last:
  1145. tlen -= hdrsize + pad + 8;
  1146. if (unlikely(tlen != qp->s_rdma_read_len))
  1147. goto ack_len_err;
  1148. if (!header_in_data)
  1149. aeth = be32_to_cpu(ohdr->u.aeth);
  1150. else {
  1151. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1152. data += sizeof(__be32);
  1153. }
  1154. ipath_copy_sge(&qp->s_rdma_read_sge, data, tlen);
  1155. (void) do_rc_ack(qp, aeth, psn, OP(RDMA_READ_RESPONSE_LAST));
  1156. goto ack_done;
  1157. }
  1158. ack_done:
  1159. spin_unlock_irqrestore(&qp->s_lock, flags);
  1160. goto bail;
  1161. ack_op_err:
  1162. wc.status = IB_WC_LOC_QP_OP_ERR;
  1163. goto ack_err;
  1164. ack_len_err:
  1165. wc.status = IB_WC_LOC_LEN_ERR;
  1166. ack_err:
  1167. wc.wr_id = wqe->wr.wr_id;
  1168. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  1169. wc.vendor_err = 0;
  1170. wc.byte_len = 0;
  1171. wc.imm_data = 0;
  1172. wc.qp = &qp->ibqp;
  1173. wc.src_qp = qp->remote_qpn;
  1174. wc.wc_flags = 0;
  1175. wc.pkey_index = 0;
  1176. wc.slid = qp->remote_ah_attr.dlid;
  1177. wc.sl = qp->remote_ah_attr.sl;
  1178. wc.dlid_path_bits = 0;
  1179. wc.port_num = 0;
  1180. ipath_sqerror_qp(qp, &wc);
  1181. bail:
  1182. return;
  1183. }
  1184. /**
  1185. * ipath_rc_rcv_error - process an incoming duplicate or error RC packet
  1186. * @dev: the device this packet came in on
  1187. * @ohdr: the other headers for this packet
  1188. * @data: the packet data
  1189. * @qp: the QP for this packet
  1190. * @opcode: the opcode for this packet
  1191. * @psn: the packet sequence number for this packet
  1192. * @diff: the difference between the PSN and the expected PSN
  1193. * @header_in_data: true if part of the header data is in the data buffer
  1194. *
  1195. * This is called from ipath_rc_rcv() to process an unexpected
  1196. * incoming RC packet for the given QP.
  1197. * Called at interrupt level.
  1198. * Return 1 if no more processing is needed; otherwise return 0 to
  1199. * schedule a response to be sent.
  1200. */
  1201. static inline int ipath_rc_rcv_error(struct ipath_ibdev *dev,
  1202. struct ipath_other_headers *ohdr,
  1203. void *data,
  1204. struct ipath_qp *qp,
  1205. u32 opcode,
  1206. u32 psn,
  1207. int diff,
  1208. int header_in_data)
  1209. {
  1210. struct ipath_ack_entry *e;
  1211. u8 i, prev;
  1212. int old_req;
  1213. if (diff > 0) {
  1214. /*
  1215. * Packet sequence error.
  1216. * A NAK will ACK earlier sends and RDMA writes.
  1217. * Don't queue the NAK if we already sent one.
  1218. */
  1219. if (!qp->r_nak_state) {
  1220. qp->r_nak_state = IB_NAK_PSN_ERROR;
  1221. /* Use the expected PSN. */
  1222. qp->r_ack_psn = qp->r_psn;
  1223. goto send_ack;
  1224. }
  1225. goto done;
  1226. }
  1227. /*
  1228. * Handle a duplicate request. Don't re-execute SEND, RDMA
  1229. * write or atomic op. Don't NAK errors, just silently drop
  1230. * the duplicate request. Note that r_sge, r_len, and
  1231. * r_rcv_len may be in use so don't modify them.
  1232. *
  1233. * We are supposed to ACK the earliest duplicate PSN but we
  1234. * can coalesce an outstanding duplicate ACK. We have to
  1235. * send the earliest so that RDMA reads can be restarted at
  1236. * the requester's expected PSN.
  1237. *
  1238. * First, find where this duplicate PSN falls within the
  1239. * ACKs previously sent.
  1240. */
  1241. psn &= IPATH_PSN_MASK;
  1242. e = NULL;
  1243. old_req = 1;
  1244. spin_lock_irq(&qp->s_lock);
  1245. for (i = qp->r_head_ack_queue; ; i = prev) {
  1246. if (i == qp->s_tail_ack_queue)
  1247. old_req = 0;
  1248. if (i)
  1249. prev = i - 1;
  1250. else
  1251. prev = IPATH_MAX_RDMA_ATOMIC;
  1252. if (prev == qp->r_head_ack_queue) {
  1253. e = NULL;
  1254. break;
  1255. }
  1256. e = &qp->s_ack_queue[prev];
  1257. if (!e->opcode) {
  1258. e = NULL;
  1259. break;
  1260. }
  1261. if (ipath_cmp24(psn, e->psn) >= 0)
  1262. break;
  1263. }
  1264. switch (opcode) {
  1265. case OP(RDMA_READ_REQUEST): {
  1266. struct ib_reth *reth;
  1267. u32 offset;
  1268. u32 len;
  1269. /*
  1270. * If we didn't find the RDMA read request in the ack queue,
  1271. * or the send tasklet is already backed up to send an
  1272. * earlier entry, we can ignore this request.
  1273. */
  1274. if (!e || e->opcode != OP(RDMA_READ_REQUEST) || old_req)
  1275. goto unlock_done;
  1276. /* RETH comes after BTH */
  1277. if (!header_in_data)
  1278. reth = &ohdr->u.rc.reth;
  1279. else {
  1280. reth = (struct ib_reth *)data;
  1281. data += sizeof(*reth);
  1282. }
  1283. /*
  1284. * Address range must be a subset of the original
  1285. * request and start on pmtu boundaries.
  1286. * We reuse the old ack_queue slot since the requester
  1287. * should not back up and request an earlier PSN for the
  1288. * same request.
  1289. */
  1290. offset = ((psn - e->psn) & IPATH_PSN_MASK) *
  1291. ib_mtu_enum_to_int(qp->path_mtu);
  1292. len = be32_to_cpu(reth->length);
  1293. if (unlikely(offset + len > e->rdma_sge.sge.sge_length))
  1294. goto unlock_done;
  1295. if (len != 0) {
  1296. u32 rkey = be32_to_cpu(reth->rkey);
  1297. u64 vaddr = be64_to_cpu(reth->vaddr);
  1298. int ok;
  1299. ok = ipath_rkey_ok(qp, &e->rdma_sge,
  1300. len, vaddr, rkey,
  1301. IB_ACCESS_REMOTE_READ);
  1302. if (unlikely(!ok))
  1303. goto unlock_done;
  1304. } else {
  1305. e->rdma_sge.sg_list = NULL;
  1306. e->rdma_sge.num_sge = 0;
  1307. e->rdma_sge.sge.mr = NULL;
  1308. e->rdma_sge.sge.vaddr = NULL;
  1309. e->rdma_sge.sge.length = 0;
  1310. e->rdma_sge.sge.sge_length = 0;
  1311. }
  1312. e->psn = psn;
  1313. qp->s_ack_state = OP(ACKNOWLEDGE);
  1314. qp->s_tail_ack_queue = prev;
  1315. break;
  1316. }
  1317. case OP(COMPARE_SWAP):
  1318. case OP(FETCH_ADD): {
  1319. /*
  1320. * If we didn't find the atomic request in the ack queue
  1321. * or the send tasklet is already backed up to send an
  1322. * earlier entry, we can ignore this request.
  1323. */
  1324. if (!e || e->opcode != (u8) opcode || old_req)
  1325. goto unlock_done;
  1326. qp->s_ack_state = OP(ACKNOWLEDGE);
  1327. qp->s_tail_ack_queue = prev;
  1328. break;
  1329. }
  1330. default:
  1331. if (old_req)
  1332. goto unlock_done;
  1333. /*
  1334. * Resend the most recent ACK if this request is
  1335. * after all the previous RDMA reads and atomics.
  1336. */
  1337. if (i == qp->r_head_ack_queue) {
  1338. spin_unlock_irq(&qp->s_lock);
  1339. qp->r_nak_state = 0;
  1340. qp->r_ack_psn = qp->r_psn - 1;
  1341. goto send_ack;
  1342. }
  1343. /*
  1344. * Resend the RDMA read or atomic op which
  1345. * ACKs this duplicate request.
  1346. */
  1347. qp->s_ack_state = OP(ACKNOWLEDGE);
  1348. qp->s_tail_ack_queue = i;
  1349. break;
  1350. }
  1351. qp->r_nak_state = 0;
  1352. spin_unlock_irq(&qp->s_lock);
  1353. tasklet_hi_schedule(&qp->s_task);
  1354. unlock_done:
  1355. spin_unlock_irq(&qp->s_lock);
  1356. done:
  1357. return 1;
  1358. send_ack:
  1359. return 0;
  1360. }
  1361. static void ipath_rc_error(struct ipath_qp *qp, enum ib_wc_status err)
  1362. {
  1363. spin_lock_irq(&qp->s_lock);
  1364. qp->state = IB_QPS_ERR;
  1365. ipath_error_qp(qp, err);
  1366. spin_unlock_irq(&qp->s_lock);
  1367. }
  1368. /**
  1369. * ipath_rc_rcv - process an incoming RC packet
  1370. * @dev: the device this packet came in on
  1371. * @hdr: the header of this packet
  1372. * @has_grh: true if the header has a GRH
  1373. * @data: the packet data
  1374. * @tlen: the packet length
  1375. * @qp: the QP for this packet
  1376. *
  1377. * This is called from ipath_qp_rcv() to process an incoming RC packet
  1378. * for the given QP.
  1379. * Called at interrupt level.
  1380. */
  1381. void ipath_rc_rcv(struct ipath_ibdev *dev, struct ipath_ib_header *hdr,
  1382. int has_grh, void *data, u32 tlen, struct ipath_qp *qp)
  1383. {
  1384. struct ipath_other_headers *ohdr;
  1385. u32 opcode;
  1386. u32 hdrsize;
  1387. u32 psn;
  1388. u32 pad;
  1389. struct ib_wc wc;
  1390. u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
  1391. int diff;
  1392. struct ib_reth *reth;
  1393. int header_in_data;
  1394. /* Validate the SLID. See Ch. 9.6.1.5 */
  1395. if (unlikely(be16_to_cpu(hdr->lrh[3]) != qp->remote_ah_attr.dlid))
  1396. goto done;
  1397. /* Check for GRH */
  1398. if (!has_grh) {
  1399. ohdr = &hdr->u.oth;
  1400. hdrsize = 8 + 12; /* LRH + BTH */
  1401. psn = be32_to_cpu(ohdr->bth[2]);
  1402. header_in_data = 0;
  1403. } else {
  1404. ohdr = &hdr->u.l.oth;
  1405. hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */
  1406. /*
  1407. * The header with GRH is 60 bytes and the core driver sets
  1408. * the eager header buffer size to 56 bytes so the last 4
  1409. * bytes of the BTH header (PSN) is in the data buffer.
  1410. */
  1411. header_in_data = dev->dd->ipath_rcvhdrentsize == 16;
  1412. if (header_in_data) {
  1413. psn = be32_to_cpu(((__be32 *) data)[0]);
  1414. data += sizeof(__be32);
  1415. } else
  1416. psn = be32_to_cpu(ohdr->bth[2]);
  1417. }
  1418. /*
  1419. * Process responses (ACKs) before anything else. Note that the
  1420. * packet sequence number will be for something in the send work
  1421. * queue rather than the expected receive packet sequence number.
  1422. * In other words, this QP is the requester.
  1423. */
  1424. opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
  1425. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1426. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1427. ipath_rc_rcv_resp(dev, ohdr, data, tlen, qp, opcode, psn,
  1428. hdrsize, pmtu, header_in_data);
  1429. goto done;
  1430. }
  1431. /* Compute 24 bits worth of difference. */
  1432. diff = ipath_cmp24(psn, qp->r_psn);
  1433. if (unlikely(diff)) {
  1434. if (ipath_rc_rcv_error(dev, ohdr, data, qp, opcode,
  1435. psn, diff, header_in_data))
  1436. goto done;
  1437. goto send_ack;
  1438. }
  1439. /* Check for opcode sequence errors. */
  1440. switch (qp->r_state) {
  1441. case OP(SEND_FIRST):
  1442. case OP(SEND_MIDDLE):
  1443. if (opcode == OP(SEND_MIDDLE) ||
  1444. opcode == OP(SEND_LAST) ||
  1445. opcode == OP(SEND_LAST_WITH_IMMEDIATE))
  1446. break;
  1447. nack_inv:
  1448. ipath_rc_error(qp, IB_WC_REM_INV_REQ_ERR);
  1449. qp->r_nak_state = IB_NAK_INVALID_REQUEST;
  1450. qp->r_ack_psn = qp->r_psn;
  1451. goto send_ack;
  1452. case OP(RDMA_WRITE_FIRST):
  1453. case OP(RDMA_WRITE_MIDDLE):
  1454. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  1455. opcode == OP(RDMA_WRITE_LAST) ||
  1456. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1457. break;
  1458. goto nack_inv;
  1459. default:
  1460. if (opcode == OP(SEND_MIDDLE) ||
  1461. opcode == OP(SEND_LAST) ||
  1462. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1463. opcode == OP(RDMA_WRITE_MIDDLE) ||
  1464. opcode == OP(RDMA_WRITE_LAST) ||
  1465. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1466. goto nack_inv;
  1467. /*
  1468. * Note that it is up to the requester to not send a new
  1469. * RDMA read or atomic operation before receiving an ACK
  1470. * for the previous operation.
  1471. */
  1472. break;
  1473. }
  1474. wc.imm_data = 0;
  1475. wc.wc_flags = 0;
  1476. /* OK, process the packet. */
  1477. switch (opcode) {
  1478. case OP(SEND_FIRST):
  1479. if (!ipath_get_rwqe(qp, 0)) {
  1480. rnr_nak:
  1481. /*
  1482. * A RNR NAK will ACK earlier sends and RDMA writes.
  1483. * Don't queue the NAK if a RDMA read or atomic
  1484. * is pending though.
  1485. */
  1486. if (qp->r_nak_state)
  1487. goto done;
  1488. qp->r_nak_state = IB_RNR_NAK | qp->r_min_rnr_timer;
  1489. qp->r_ack_psn = qp->r_psn;
  1490. goto send_ack;
  1491. }
  1492. qp->r_rcv_len = 0;
  1493. /* FALLTHROUGH */
  1494. case OP(SEND_MIDDLE):
  1495. case OP(RDMA_WRITE_MIDDLE):
  1496. send_middle:
  1497. /* Check for invalid length PMTU or posted rwqe len. */
  1498. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1499. goto nack_inv;
  1500. qp->r_rcv_len += pmtu;
  1501. if (unlikely(qp->r_rcv_len > qp->r_len))
  1502. goto nack_inv;
  1503. ipath_copy_sge(&qp->r_sge, data, pmtu);
  1504. break;
  1505. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  1506. /* consume RWQE */
  1507. if (!ipath_get_rwqe(qp, 1))
  1508. goto rnr_nak;
  1509. goto send_last_imm;
  1510. case OP(SEND_ONLY):
  1511. case OP(SEND_ONLY_WITH_IMMEDIATE):
  1512. if (!ipath_get_rwqe(qp, 0))
  1513. goto rnr_nak;
  1514. qp->r_rcv_len = 0;
  1515. if (opcode == OP(SEND_ONLY))
  1516. goto send_last;
  1517. /* FALLTHROUGH */
  1518. case OP(SEND_LAST_WITH_IMMEDIATE):
  1519. send_last_imm:
  1520. if (header_in_data) {
  1521. wc.imm_data = *(__be32 *) data;
  1522. data += sizeof(__be32);
  1523. } else {
  1524. /* Immediate data comes after BTH */
  1525. wc.imm_data = ohdr->u.imm_data;
  1526. }
  1527. hdrsize += 4;
  1528. wc.wc_flags = IB_WC_WITH_IMM;
  1529. /* FALLTHROUGH */
  1530. case OP(SEND_LAST):
  1531. case OP(RDMA_WRITE_LAST):
  1532. send_last:
  1533. /* Get the number of bytes the message was padded by. */
  1534. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1535. /* Check for invalid length. */
  1536. /* XXX LAST len should be >= 1 */
  1537. if (unlikely(tlen < (hdrsize + pad + 4)))
  1538. goto nack_inv;
  1539. /* Don't count the CRC. */
  1540. tlen -= (hdrsize + pad + 4);
  1541. wc.byte_len = tlen + qp->r_rcv_len;
  1542. if (unlikely(wc.byte_len > qp->r_len))
  1543. goto nack_inv;
  1544. ipath_copy_sge(&qp->r_sge, data, tlen);
  1545. qp->r_msn++;
  1546. if (!qp->r_wrid_valid)
  1547. break;
  1548. qp->r_wrid_valid = 0;
  1549. wc.wr_id = qp->r_wr_id;
  1550. wc.status = IB_WC_SUCCESS;
  1551. wc.opcode = IB_WC_RECV;
  1552. wc.vendor_err = 0;
  1553. wc.qp = &qp->ibqp;
  1554. wc.src_qp = qp->remote_qpn;
  1555. wc.pkey_index = 0;
  1556. wc.slid = qp->remote_ah_attr.dlid;
  1557. wc.sl = qp->remote_ah_attr.sl;
  1558. wc.dlid_path_bits = 0;
  1559. wc.port_num = 0;
  1560. /* Signal completion event if the solicited bit is set. */
  1561. ipath_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
  1562. (ohdr->bth[0] &
  1563. __constant_cpu_to_be32(1 << 23)) != 0);
  1564. break;
  1565. case OP(RDMA_WRITE_FIRST):
  1566. case OP(RDMA_WRITE_ONLY):
  1567. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  1568. /* consume RWQE */
  1569. /* RETH comes after BTH */
  1570. if (!header_in_data)
  1571. reth = &ohdr->u.rc.reth;
  1572. else {
  1573. reth = (struct ib_reth *)data;
  1574. data += sizeof(*reth);
  1575. }
  1576. hdrsize += sizeof(*reth);
  1577. qp->r_len = be32_to_cpu(reth->length);
  1578. qp->r_rcv_len = 0;
  1579. if (qp->r_len != 0) {
  1580. u32 rkey = be32_to_cpu(reth->rkey);
  1581. u64 vaddr = be64_to_cpu(reth->vaddr);
  1582. int ok;
  1583. /* Check rkey & NAK */
  1584. ok = ipath_rkey_ok(qp, &qp->r_sge,
  1585. qp->r_len, vaddr, rkey,
  1586. IB_ACCESS_REMOTE_WRITE);
  1587. if (unlikely(!ok))
  1588. goto nack_acc;
  1589. } else {
  1590. qp->r_sge.sg_list = NULL;
  1591. qp->r_sge.sge.mr = NULL;
  1592. qp->r_sge.sge.vaddr = NULL;
  1593. qp->r_sge.sge.length = 0;
  1594. qp->r_sge.sge.sge_length = 0;
  1595. }
  1596. if (unlikely(!(qp->qp_access_flags &
  1597. IB_ACCESS_REMOTE_WRITE)))
  1598. goto nack_acc;
  1599. if (opcode == OP(RDMA_WRITE_FIRST))
  1600. goto send_middle;
  1601. else if (opcode == OP(RDMA_WRITE_ONLY))
  1602. goto send_last;
  1603. if (!ipath_get_rwqe(qp, 1))
  1604. goto rnr_nak;
  1605. goto send_last_imm;
  1606. case OP(RDMA_READ_REQUEST): {
  1607. struct ipath_ack_entry *e;
  1608. u32 len;
  1609. u8 next;
  1610. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
  1611. goto nack_acc;
  1612. next = qp->r_head_ack_queue + 1;
  1613. if (next > IPATH_MAX_RDMA_ATOMIC)
  1614. next = 0;
  1615. if (unlikely(next == qp->s_tail_ack_queue))
  1616. goto nack_inv;
  1617. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  1618. /* RETH comes after BTH */
  1619. if (!header_in_data)
  1620. reth = &ohdr->u.rc.reth;
  1621. else {
  1622. reth = (struct ib_reth *)data;
  1623. data += sizeof(*reth);
  1624. }
  1625. len = be32_to_cpu(reth->length);
  1626. if (len) {
  1627. u32 rkey = be32_to_cpu(reth->rkey);
  1628. u64 vaddr = be64_to_cpu(reth->vaddr);
  1629. int ok;
  1630. /* Check rkey & NAK */
  1631. ok = ipath_rkey_ok(qp, &e->rdma_sge, len, vaddr,
  1632. rkey, IB_ACCESS_REMOTE_READ);
  1633. if (unlikely(!ok))
  1634. goto nack_acc;
  1635. /*
  1636. * Update the next expected PSN. We add 1 later
  1637. * below, so only add the remainder here.
  1638. */
  1639. if (len > pmtu)
  1640. qp->r_psn += (len - 1) / pmtu;
  1641. } else {
  1642. e->rdma_sge.sg_list = NULL;
  1643. e->rdma_sge.num_sge = 0;
  1644. e->rdma_sge.sge.mr = NULL;
  1645. e->rdma_sge.sge.vaddr = NULL;
  1646. e->rdma_sge.sge.length = 0;
  1647. e->rdma_sge.sge.sge_length = 0;
  1648. }
  1649. e->opcode = opcode;
  1650. e->psn = psn;
  1651. /*
  1652. * We need to increment the MSN here instead of when we
  1653. * finish sending the result since a duplicate request would
  1654. * increment it more than once.
  1655. */
  1656. qp->r_msn++;
  1657. qp->r_psn++;
  1658. qp->r_state = opcode;
  1659. qp->r_nak_state = 0;
  1660. barrier();
  1661. qp->r_head_ack_queue = next;
  1662. /* Call ipath_do_rc_send() in another thread. */
  1663. tasklet_hi_schedule(&qp->s_task);
  1664. goto done;
  1665. }
  1666. case OP(COMPARE_SWAP):
  1667. case OP(FETCH_ADD): {
  1668. struct ib_atomic_eth *ateth;
  1669. struct ipath_ack_entry *e;
  1670. u64 vaddr;
  1671. atomic64_t *maddr;
  1672. u64 sdata;
  1673. u32 rkey;
  1674. u8 next;
  1675. if (unlikely(!(qp->qp_access_flags &
  1676. IB_ACCESS_REMOTE_ATOMIC)))
  1677. goto nack_acc;
  1678. next = qp->r_head_ack_queue + 1;
  1679. if (next > IPATH_MAX_RDMA_ATOMIC)
  1680. next = 0;
  1681. if (unlikely(next == qp->s_tail_ack_queue))
  1682. goto nack_inv;
  1683. if (!header_in_data)
  1684. ateth = &ohdr->u.atomic_eth;
  1685. else
  1686. ateth = (struct ib_atomic_eth *)data;
  1687. vaddr = ((u64) be32_to_cpu(ateth->vaddr[0]) << 32) |
  1688. be32_to_cpu(ateth->vaddr[1]);
  1689. if (unlikely(vaddr & (sizeof(u64) - 1)))
  1690. goto nack_inv;
  1691. rkey = be32_to_cpu(ateth->rkey);
  1692. /* Check rkey & NAK */
  1693. if (unlikely(!ipath_rkey_ok(qp, &qp->r_sge,
  1694. sizeof(u64), vaddr, rkey,
  1695. IB_ACCESS_REMOTE_ATOMIC)))
  1696. goto nack_acc;
  1697. /* Perform atomic OP and save result. */
  1698. maddr = (atomic64_t *) qp->r_sge.sge.vaddr;
  1699. sdata = be64_to_cpu(ateth->swap_data);
  1700. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  1701. e->atomic_data = (opcode == OP(FETCH_ADD)) ?
  1702. (u64) atomic64_add_return(sdata, maddr) - sdata :
  1703. (u64) cmpxchg((u64 *) qp->r_sge.sge.vaddr,
  1704. be64_to_cpu(ateth->compare_data),
  1705. sdata);
  1706. e->opcode = opcode;
  1707. e->psn = psn & IPATH_PSN_MASK;
  1708. qp->r_msn++;
  1709. qp->r_psn++;
  1710. qp->r_state = opcode;
  1711. qp->r_nak_state = 0;
  1712. barrier();
  1713. qp->r_head_ack_queue = next;
  1714. /* Call ipath_do_rc_send() in another thread. */
  1715. tasklet_hi_schedule(&qp->s_task);
  1716. goto done;
  1717. }
  1718. default:
  1719. /* NAK unknown opcodes. */
  1720. goto nack_inv;
  1721. }
  1722. qp->r_psn++;
  1723. qp->r_state = opcode;
  1724. qp->r_ack_psn = psn;
  1725. qp->r_nak_state = 0;
  1726. /* Send an ACK if requested or required. */
  1727. if (psn & (1 << 31))
  1728. goto send_ack;
  1729. goto done;
  1730. nack_acc:
  1731. ipath_rc_error(qp, IB_WC_REM_ACCESS_ERR);
  1732. qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
  1733. qp->r_ack_psn = qp->r_psn;
  1734. send_ack:
  1735. send_rc_ack(qp);
  1736. done:
  1737. return;
  1738. }