sh_mobile_lcdcfb.c 34 KB

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  1. /*
  2. * SuperH Mobile LCDC Framebuffer
  3. *
  4. * Copyright (c) 2008 Magnus Damm
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/delay.h>
  13. #include <linux/mm.h>
  14. #include <linux/clk.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/vmalloc.h>
  20. #include <linux/ioctl.h>
  21. #include <linux/slab.h>
  22. #include <linux/console.h>
  23. #include <video/sh_mobile_lcdc.h>
  24. #include <asm/atomic.h>
  25. #include "sh_mobile_lcdcfb.h"
  26. #define SIDE_B_OFFSET 0x1000
  27. #define MIRROR_OFFSET 0x2000
  28. /* shared registers */
  29. #define _LDDCKR 0x410
  30. #define _LDDCKSTPR 0x414
  31. #define _LDINTR 0x468
  32. #define _LDSR 0x46c
  33. #define _LDCNT1R 0x470
  34. #define _LDCNT2R 0x474
  35. #define _LDRCNTR 0x478
  36. #define _LDDDSR 0x47c
  37. #define _LDDWD0R 0x800
  38. #define _LDDRDR 0x840
  39. #define _LDDWAR 0x900
  40. #define _LDDRAR 0x904
  41. /* shared registers and their order for context save/restore */
  42. static int lcdc_shared_regs[] = {
  43. _LDDCKR,
  44. _LDDCKSTPR,
  45. _LDINTR,
  46. _LDDDSR,
  47. _LDCNT1R,
  48. _LDCNT2R,
  49. };
  50. #define NR_SHARED_REGS ARRAY_SIZE(lcdc_shared_regs)
  51. static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
  52. [LDDCKPAT1R] = 0x400,
  53. [LDDCKPAT2R] = 0x404,
  54. [LDMT1R] = 0x418,
  55. [LDMT2R] = 0x41c,
  56. [LDMT3R] = 0x420,
  57. [LDDFR] = 0x424,
  58. [LDSM1R] = 0x428,
  59. [LDSM2R] = 0x42c,
  60. [LDSA1R] = 0x430,
  61. [LDMLSR] = 0x438,
  62. [LDHCNR] = 0x448,
  63. [LDHSYNR] = 0x44c,
  64. [LDVLNR] = 0x450,
  65. [LDVSYNR] = 0x454,
  66. [LDPMR] = 0x460,
  67. [LDHAJR] = 0x4a0,
  68. };
  69. static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
  70. [LDDCKPAT1R] = 0x408,
  71. [LDDCKPAT2R] = 0x40c,
  72. [LDMT1R] = 0x600,
  73. [LDMT2R] = 0x604,
  74. [LDMT3R] = 0x608,
  75. [LDDFR] = 0x60c,
  76. [LDSM1R] = 0x610,
  77. [LDSM2R] = 0x614,
  78. [LDSA1R] = 0x618,
  79. [LDMLSR] = 0x620,
  80. [LDHCNR] = 0x624,
  81. [LDHSYNR] = 0x628,
  82. [LDVLNR] = 0x62c,
  83. [LDVSYNR] = 0x630,
  84. [LDPMR] = 0x63c,
  85. };
  86. #define START_LCDC 0x00000001
  87. #define LCDC_RESET 0x00000100
  88. #define DISPLAY_BEU 0x00000008
  89. #define LCDC_ENABLE 0x00000001
  90. #define LDINTR_FE 0x00000400
  91. #define LDINTR_VSE 0x00000200
  92. #define LDINTR_VEE 0x00000100
  93. #define LDINTR_FS 0x00000004
  94. #define LDINTR_VSS 0x00000002
  95. #define LDINTR_VES 0x00000001
  96. #define LDRCNTR_SRS 0x00020000
  97. #define LDRCNTR_SRC 0x00010000
  98. #define LDRCNTR_MRS 0x00000002
  99. #define LDRCNTR_MRC 0x00000001
  100. #define LDSR_MRS 0x00000100
  101. struct sh_mobile_lcdc_priv {
  102. void __iomem *base;
  103. int irq;
  104. atomic_t hw_usecnt;
  105. struct device *dev;
  106. struct clk *dot_clk;
  107. unsigned long lddckr;
  108. struct sh_mobile_lcdc_chan ch[2];
  109. struct notifier_block notifier;
  110. unsigned long saved_shared_regs[NR_SHARED_REGS];
  111. int started;
  112. };
  113. static bool banked(int reg_nr)
  114. {
  115. switch (reg_nr) {
  116. case LDMT1R:
  117. case LDMT2R:
  118. case LDMT3R:
  119. case LDDFR:
  120. case LDSM1R:
  121. case LDSA1R:
  122. case LDMLSR:
  123. case LDHCNR:
  124. case LDHSYNR:
  125. case LDVLNR:
  126. case LDVSYNR:
  127. return true;
  128. }
  129. return false;
  130. }
  131. static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
  132. int reg_nr, unsigned long data)
  133. {
  134. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
  135. if (banked(reg_nr))
  136. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
  137. SIDE_B_OFFSET);
  138. }
  139. static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
  140. int reg_nr, unsigned long data)
  141. {
  142. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
  143. MIRROR_OFFSET);
  144. }
  145. static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
  146. int reg_nr)
  147. {
  148. return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
  149. }
  150. static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
  151. unsigned long reg_offs, unsigned long data)
  152. {
  153. iowrite32(data, priv->base + reg_offs);
  154. }
  155. static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
  156. unsigned long reg_offs)
  157. {
  158. return ioread32(priv->base + reg_offs);
  159. }
  160. static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
  161. unsigned long reg_offs,
  162. unsigned long mask, unsigned long until)
  163. {
  164. while ((lcdc_read(priv, reg_offs) & mask) != until)
  165. cpu_relax();
  166. }
  167. static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
  168. {
  169. return chan->cfg.chan == LCDC_CHAN_SUBLCD;
  170. }
  171. static void lcdc_sys_write_index(void *handle, unsigned long data)
  172. {
  173. struct sh_mobile_lcdc_chan *ch = handle;
  174. lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000);
  175. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  176. lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  177. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  178. }
  179. static void lcdc_sys_write_data(void *handle, unsigned long data)
  180. {
  181. struct sh_mobile_lcdc_chan *ch = handle;
  182. lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000);
  183. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  184. lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  185. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  186. }
  187. static unsigned long lcdc_sys_read_data(void *handle)
  188. {
  189. struct sh_mobile_lcdc_chan *ch = handle;
  190. lcdc_write(ch->lcdc, _LDDRDR, 0x01000000);
  191. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  192. lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  193. udelay(1);
  194. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  195. return lcdc_read(ch->lcdc, _LDDRDR) & 0x3ffff;
  196. }
  197. struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
  198. lcdc_sys_write_index,
  199. lcdc_sys_write_data,
  200. lcdc_sys_read_data,
  201. };
  202. static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
  203. {
  204. if (atomic_inc_and_test(&priv->hw_usecnt)) {
  205. pm_runtime_get_sync(priv->dev);
  206. if (priv->dot_clk)
  207. clk_enable(priv->dot_clk);
  208. }
  209. }
  210. static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
  211. {
  212. if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
  213. if (priv->dot_clk)
  214. clk_disable(priv->dot_clk);
  215. pm_runtime_put(priv->dev);
  216. }
  217. }
  218. static int sh_mobile_lcdc_sginit(struct fb_info *info,
  219. struct list_head *pagelist)
  220. {
  221. struct sh_mobile_lcdc_chan *ch = info->par;
  222. unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT;
  223. struct page *page;
  224. int nr_pages = 0;
  225. sg_init_table(ch->sglist, nr_pages_max);
  226. list_for_each_entry(page, pagelist, lru)
  227. sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
  228. return nr_pages;
  229. }
  230. static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
  231. struct list_head *pagelist)
  232. {
  233. struct sh_mobile_lcdc_chan *ch = info->par;
  234. struct sh_mobile_lcdc_board_cfg *bcfg = &ch->cfg.board_cfg;
  235. /* enable clocks before accessing hardware */
  236. sh_mobile_lcdc_clk_on(ch->lcdc);
  237. /*
  238. * It's possible to get here without anything on the pagelist via
  239. * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
  240. * invocation. In the former case, the acceleration routines are
  241. * stepped in to when using the framebuffer console causing the
  242. * workqueue to be scheduled without any dirty pages on the list.
  243. *
  244. * Despite this, a panel update is still needed given that the
  245. * acceleration routines have their own methods for writing in
  246. * that still need to be updated.
  247. *
  248. * The fsync() and empty pagelist case could be optimized for,
  249. * but we don't bother, as any application exhibiting such
  250. * behaviour is fundamentally broken anyways.
  251. */
  252. if (!list_empty(pagelist)) {
  253. unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
  254. /* trigger panel update */
  255. dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
  256. if (bcfg->start_transfer)
  257. bcfg->start_transfer(bcfg->board_data, ch,
  258. &sh_mobile_lcdc_sys_bus_ops);
  259. lcdc_write_chan(ch, LDSM2R, 1);
  260. dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
  261. } else {
  262. if (bcfg->start_transfer)
  263. bcfg->start_transfer(bcfg->board_data, ch,
  264. &sh_mobile_lcdc_sys_bus_ops);
  265. lcdc_write_chan(ch, LDSM2R, 1);
  266. }
  267. }
  268. static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
  269. {
  270. struct fb_deferred_io *fbdefio = info->fbdefio;
  271. if (fbdefio)
  272. schedule_delayed_work(&info->deferred_work, fbdefio->delay);
  273. }
  274. static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
  275. {
  276. struct sh_mobile_lcdc_priv *priv = data;
  277. struct sh_mobile_lcdc_chan *ch;
  278. unsigned long tmp;
  279. unsigned long ldintr;
  280. int is_sub;
  281. int k;
  282. /* acknowledge interrupt */
  283. ldintr = tmp = lcdc_read(priv, _LDINTR);
  284. /*
  285. * disable further VSYNC End IRQs, preserve all other enabled IRQs,
  286. * write 0 to bits 0-6 to ack all triggered IRQs.
  287. */
  288. tmp &= 0xffffff00 & ~LDINTR_VEE;
  289. lcdc_write(priv, _LDINTR, tmp);
  290. /* figure out if this interrupt is for main or sub lcd */
  291. is_sub = (lcdc_read(priv, _LDSR) & (1 << 10)) ? 1 : 0;
  292. /* wake up channel and disable clocks */
  293. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  294. ch = &priv->ch[k];
  295. if (!ch->enabled)
  296. continue;
  297. /* Frame Start */
  298. if (ldintr & LDINTR_FS) {
  299. if (is_sub == lcdc_chan_is_sublcd(ch)) {
  300. ch->frame_end = 1;
  301. wake_up(&ch->frame_end_wait);
  302. sh_mobile_lcdc_clk_off(priv);
  303. }
  304. }
  305. /* VSYNC End */
  306. if (ldintr & LDINTR_VES)
  307. complete(&ch->vsync_completion);
  308. }
  309. return IRQ_HANDLED;
  310. }
  311. static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
  312. int start)
  313. {
  314. unsigned long tmp = lcdc_read(priv, _LDCNT2R);
  315. int k;
  316. /* start or stop the lcdc */
  317. if (start)
  318. lcdc_write(priv, _LDCNT2R, tmp | START_LCDC);
  319. else
  320. lcdc_write(priv, _LDCNT2R, tmp & ~START_LCDC);
  321. /* wait until power is applied/stopped on all channels */
  322. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  323. if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
  324. while (1) {
  325. tmp = lcdc_read_chan(&priv->ch[k], LDPMR) & 3;
  326. if (start && tmp == 3)
  327. break;
  328. if (!start && tmp == 0)
  329. break;
  330. cpu_relax();
  331. }
  332. if (!start)
  333. lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
  334. }
  335. static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
  336. {
  337. struct fb_var_screeninfo *var = &ch->info->var, *display_var = &ch->display_var;
  338. unsigned long h_total, hsync_pos, display_h_total;
  339. u32 tmp;
  340. tmp = ch->ldmt1r_value;
  341. tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1 << 28;
  342. tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1 << 27;
  343. tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? 1 << 26 : 0;
  344. tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? 1 << 25 : 0;
  345. tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? 1 << 24 : 0;
  346. tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? 1 << 17 : 0;
  347. tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? 1 << 16 : 0;
  348. lcdc_write_chan(ch, LDMT1R, tmp);
  349. /* setup SYS bus */
  350. lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
  351. lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
  352. /* horizontal configuration */
  353. h_total = display_var->xres + display_var->hsync_len +
  354. display_var->left_margin + display_var->right_margin;
  355. tmp = h_total / 8; /* HTCN */
  356. tmp |= (min(display_var->xres, var->xres) / 8) << 16; /* HDCN */
  357. lcdc_write_chan(ch, LDHCNR, tmp);
  358. hsync_pos = display_var->xres + display_var->right_margin;
  359. tmp = hsync_pos / 8; /* HSYNP */
  360. tmp |= (display_var->hsync_len / 8) << 16; /* HSYNW */
  361. lcdc_write_chan(ch, LDHSYNR, tmp);
  362. /* vertical configuration */
  363. tmp = display_var->yres + display_var->vsync_len +
  364. display_var->upper_margin + display_var->lower_margin; /* VTLN */
  365. tmp |= min(display_var->yres, var->yres) << 16; /* VDLN */
  366. lcdc_write_chan(ch, LDVLNR, tmp);
  367. tmp = display_var->yres + display_var->lower_margin; /* VSYNP */
  368. tmp |= display_var->vsync_len << 16; /* VSYNW */
  369. lcdc_write_chan(ch, LDVSYNR, tmp);
  370. /* Adjust horizontal synchronisation for HDMI */
  371. display_h_total = display_var->xres + display_var->hsync_len +
  372. display_var->left_margin + display_var->right_margin;
  373. tmp = ((display_var->xres & 7) << 24) |
  374. ((display_h_total & 7) << 16) |
  375. ((display_var->hsync_len & 7) << 8) |
  376. hsync_pos;
  377. lcdc_write_chan(ch, LDHAJR, tmp);
  378. }
  379. static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
  380. {
  381. struct sh_mobile_lcdc_chan *ch;
  382. struct sh_mobile_lcdc_board_cfg *board_cfg;
  383. unsigned long tmp;
  384. int k, m;
  385. int ret = 0;
  386. /* enable clocks before accessing the hardware */
  387. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  388. if (priv->ch[k].enabled)
  389. sh_mobile_lcdc_clk_on(priv);
  390. /* reset */
  391. lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LCDC_RESET);
  392. lcdc_wait_bit(priv, _LDCNT2R, LCDC_RESET, 0);
  393. /* enable LCDC channels */
  394. tmp = lcdc_read(priv, _LDCNT2R);
  395. tmp |= priv->ch[0].enabled;
  396. tmp |= priv->ch[1].enabled;
  397. lcdc_write(priv, _LDCNT2R, tmp);
  398. /* read data from external memory, avoid using the BEU for now */
  399. lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) & ~DISPLAY_BEU);
  400. /* stop the lcdc first */
  401. sh_mobile_lcdc_start_stop(priv, 0);
  402. /* configure clocks */
  403. tmp = priv->lddckr;
  404. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  405. ch = &priv->ch[k];
  406. if (!priv->ch[k].enabled)
  407. continue;
  408. m = ch->cfg.clock_divider;
  409. if (!m)
  410. continue;
  411. if (m == 1)
  412. m = 1 << 6;
  413. tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
  414. /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider denominator */
  415. lcdc_write_chan(ch, LDDCKPAT1R, 0);
  416. lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
  417. }
  418. lcdc_write(priv, _LDDCKR, tmp);
  419. /* start dotclock again */
  420. lcdc_write(priv, _LDDCKSTPR, 0);
  421. lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
  422. /* interrupts are disabled to begin with */
  423. lcdc_write(priv, _LDINTR, 0);
  424. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  425. ch = &priv->ch[k];
  426. if (!ch->enabled)
  427. continue;
  428. sh_mobile_lcdc_geometry(ch);
  429. /* power supply */
  430. lcdc_write_chan(ch, LDPMR, 0);
  431. board_cfg = &ch->cfg.board_cfg;
  432. if (board_cfg->setup_sys)
  433. ret = board_cfg->setup_sys(board_cfg->board_data, ch,
  434. &sh_mobile_lcdc_sys_bus_ops);
  435. if (ret)
  436. return ret;
  437. }
  438. /* word and long word swap */
  439. lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 6);
  440. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  441. ch = &priv->ch[k];
  442. if (!priv->ch[k].enabled)
  443. continue;
  444. /* set bpp format in PKF[4:0] */
  445. tmp = lcdc_read_chan(ch, LDDFR);
  446. tmp &= ~0x0001001f;
  447. tmp |= (ch->info->var.bits_per_pixel == 16) ? 3 : 0;
  448. lcdc_write_chan(ch, LDDFR, tmp);
  449. /* point out our frame buffer */
  450. lcdc_write_chan(ch, LDSA1R, ch->info->fix.smem_start);
  451. /* set line size */
  452. lcdc_write_chan(ch, LDMLSR, ch->info->fix.line_length);
  453. /* setup deferred io if SYS bus */
  454. tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
  455. if (ch->ldmt1r_value & (1 << 12) && tmp) {
  456. ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
  457. ch->defio.delay = msecs_to_jiffies(tmp);
  458. ch->info->fbdefio = &ch->defio;
  459. fb_deferred_io_init(ch->info);
  460. /* one-shot mode */
  461. lcdc_write_chan(ch, LDSM1R, 1);
  462. /* enable "Frame End Interrupt Enable" bit */
  463. lcdc_write(priv, _LDINTR, LDINTR_FE);
  464. } else {
  465. /* continuous read mode */
  466. lcdc_write_chan(ch, LDSM1R, 0);
  467. }
  468. }
  469. /* display output */
  470. lcdc_write(priv, _LDCNT1R, LCDC_ENABLE);
  471. /* start the lcdc */
  472. sh_mobile_lcdc_start_stop(priv, 1);
  473. priv->started = 1;
  474. /* tell the board code to enable the panel */
  475. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  476. ch = &priv->ch[k];
  477. if (!ch->enabled)
  478. continue;
  479. board_cfg = &ch->cfg.board_cfg;
  480. if (try_module_get(board_cfg->owner) && board_cfg->display_on) {
  481. board_cfg->display_on(board_cfg->board_data, ch->info);
  482. module_put(board_cfg->owner);
  483. }
  484. }
  485. return 0;
  486. }
  487. static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
  488. {
  489. struct sh_mobile_lcdc_chan *ch;
  490. struct sh_mobile_lcdc_board_cfg *board_cfg;
  491. int k;
  492. /* clean up deferred io and ask board code to disable panel */
  493. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  494. ch = &priv->ch[k];
  495. if (!ch->enabled)
  496. continue;
  497. /* deferred io mode:
  498. * flush frame, and wait for frame end interrupt
  499. * clean up deferred io and enable clock
  500. */
  501. if (ch->info && ch->info->fbdefio) {
  502. ch->frame_end = 0;
  503. schedule_delayed_work(&ch->info->deferred_work, 0);
  504. wait_event(ch->frame_end_wait, ch->frame_end);
  505. fb_deferred_io_cleanup(ch->info);
  506. ch->info->fbdefio = NULL;
  507. sh_mobile_lcdc_clk_on(priv);
  508. }
  509. board_cfg = &ch->cfg.board_cfg;
  510. if (try_module_get(board_cfg->owner) && board_cfg->display_off) {
  511. board_cfg->display_off(board_cfg->board_data);
  512. module_put(board_cfg->owner);
  513. }
  514. }
  515. /* stop the lcdc */
  516. if (priv->started) {
  517. sh_mobile_lcdc_start_stop(priv, 0);
  518. priv->started = 0;
  519. }
  520. /* stop clocks */
  521. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  522. if (priv->ch[k].enabled)
  523. sh_mobile_lcdc_clk_off(priv);
  524. }
  525. static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
  526. {
  527. int ifm, miftyp;
  528. switch (ch->cfg.interface_type) {
  529. case RGB8: ifm = 0; miftyp = 0; break;
  530. case RGB9: ifm = 0; miftyp = 4; break;
  531. case RGB12A: ifm = 0; miftyp = 5; break;
  532. case RGB12B: ifm = 0; miftyp = 6; break;
  533. case RGB16: ifm = 0; miftyp = 7; break;
  534. case RGB18: ifm = 0; miftyp = 10; break;
  535. case RGB24: ifm = 0; miftyp = 11; break;
  536. case SYS8A: ifm = 1; miftyp = 0; break;
  537. case SYS8B: ifm = 1; miftyp = 1; break;
  538. case SYS8C: ifm = 1; miftyp = 2; break;
  539. case SYS8D: ifm = 1; miftyp = 3; break;
  540. case SYS9: ifm = 1; miftyp = 4; break;
  541. case SYS12: ifm = 1; miftyp = 5; break;
  542. case SYS16A: ifm = 1; miftyp = 7; break;
  543. case SYS16B: ifm = 1; miftyp = 8; break;
  544. case SYS16C: ifm = 1; miftyp = 9; break;
  545. case SYS18: ifm = 1; miftyp = 10; break;
  546. case SYS24: ifm = 1; miftyp = 11; break;
  547. default: goto bad;
  548. }
  549. /* SUBLCD only supports SYS interface */
  550. if (lcdc_chan_is_sublcd(ch)) {
  551. if (ifm == 0)
  552. goto bad;
  553. else
  554. ifm = 0;
  555. }
  556. ch->ldmt1r_value = (ifm << 12) | miftyp;
  557. return 0;
  558. bad:
  559. return -EINVAL;
  560. }
  561. static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
  562. int clock_source,
  563. struct sh_mobile_lcdc_priv *priv)
  564. {
  565. char *str;
  566. int icksel;
  567. switch (clock_source) {
  568. case LCDC_CLK_BUS: str = "bus_clk"; icksel = 0; break;
  569. case LCDC_CLK_PERIPHERAL: str = "peripheral_clk"; icksel = 1; break;
  570. case LCDC_CLK_EXTERNAL: str = NULL; icksel = 2; break;
  571. default:
  572. return -EINVAL;
  573. }
  574. priv->lddckr = icksel << 16;
  575. if (str) {
  576. priv->dot_clk = clk_get(&pdev->dev, str);
  577. if (IS_ERR(priv->dot_clk)) {
  578. dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
  579. return PTR_ERR(priv->dot_clk);
  580. }
  581. }
  582. /* Runtime PM support involves two step for this driver:
  583. * 1) Enable Runtime PM
  584. * 2) Force Runtime PM Resume since hardware is accessed from probe()
  585. */
  586. priv->dev = &pdev->dev;
  587. pm_runtime_enable(priv->dev);
  588. pm_runtime_resume(priv->dev);
  589. return 0;
  590. }
  591. static int sh_mobile_lcdc_setcolreg(u_int regno,
  592. u_int red, u_int green, u_int blue,
  593. u_int transp, struct fb_info *info)
  594. {
  595. u32 *palette = info->pseudo_palette;
  596. if (regno >= PALETTE_NR)
  597. return -EINVAL;
  598. /* only FB_VISUAL_TRUECOLOR supported */
  599. red >>= 16 - info->var.red.length;
  600. green >>= 16 - info->var.green.length;
  601. blue >>= 16 - info->var.blue.length;
  602. transp >>= 16 - info->var.transp.length;
  603. palette[regno] = (red << info->var.red.offset) |
  604. (green << info->var.green.offset) |
  605. (blue << info->var.blue.offset) |
  606. (transp << info->var.transp.offset);
  607. return 0;
  608. }
  609. static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
  610. .id = "SH Mobile LCDC",
  611. .type = FB_TYPE_PACKED_PIXELS,
  612. .visual = FB_VISUAL_TRUECOLOR,
  613. .accel = FB_ACCEL_NONE,
  614. .xpanstep = 0,
  615. .ypanstep = 1,
  616. .ywrapstep = 0,
  617. };
  618. static void sh_mobile_lcdc_fillrect(struct fb_info *info,
  619. const struct fb_fillrect *rect)
  620. {
  621. sys_fillrect(info, rect);
  622. sh_mobile_lcdc_deferred_io_touch(info);
  623. }
  624. static void sh_mobile_lcdc_copyarea(struct fb_info *info,
  625. const struct fb_copyarea *area)
  626. {
  627. sys_copyarea(info, area);
  628. sh_mobile_lcdc_deferred_io_touch(info);
  629. }
  630. static void sh_mobile_lcdc_imageblit(struct fb_info *info,
  631. const struct fb_image *image)
  632. {
  633. sys_imageblit(info, image);
  634. sh_mobile_lcdc_deferred_io_touch(info);
  635. }
  636. static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
  637. struct fb_info *info)
  638. {
  639. struct sh_mobile_lcdc_chan *ch = info->par;
  640. struct sh_mobile_lcdc_priv *priv = ch->lcdc;
  641. unsigned long ldrcntr;
  642. unsigned long new_pan_offset;
  643. new_pan_offset = (var->yoffset * info->fix.line_length) +
  644. (var->xoffset * (info->var.bits_per_pixel / 8));
  645. if (new_pan_offset == ch->pan_offset)
  646. return 0; /* No change, do nothing */
  647. ldrcntr = lcdc_read(priv, _LDRCNTR);
  648. /* Set the source address for the next refresh */
  649. lcdc_write_chan_mirror(ch, LDSA1R, ch->dma_handle + new_pan_offset);
  650. if (lcdc_chan_is_sublcd(ch))
  651. lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
  652. else
  653. lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
  654. ch->pan_offset = new_pan_offset;
  655. sh_mobile_lcdc_deferred_io_touch(info);
  656. return 0;
  657. }
  658. static int sh_mobile_wait_for_vsync(struct fb_info *info)
  659. {
  660. struct sh_mobile_lcdc_chan *ch = info->par;
  661. unsigned long ldintr;
  662. int ret;
  663. /* Enable VSync End interrupt */
  664. ldintr = lcdc_read(ch->lcdc, _LDINTR);
  665. ldintr |= LDINTR_VEE;
  666. lcdc_write(ch->lcdc, _LDINTR, ldintr);
  667. ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
  668. msecs_to_jiffies(100));
  669. if (!ret)
  670. return -ETIMEDOUT;
  671. return 0;
  672. }
  673. static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
  674. unsigned long arg)
  675. {
  676. int retval;
  677. switch (cmd) {
  678. case FBIO_WAITFORVSYNC:
  679. retval = sh_mobile_wait_for_vsync(info);
  680. break;
  681. default:
  682. retval = -ENOIOCTLCMD;
  683. break;
  684. }
  685. return retval;
  686. }
  687. static void sh_mobile_fb_reconfig(struct fb_info *info)
  688. {
  689. struct sh_mobile_lcdc_chan *ch = info->par;
  690. struct fb_videomode mode1, mode2;
  691. struct fb_event event;
  692. int evnt = FB_EVENT_MODE_CHANGE_ALL;
  693. if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par))
  694. /* More framebuffer users are active */
  695. return;
  696. fb_var_to_videomode(&mode1, &ch->display_var);
  697. fb_var_to_videomode(&mode2, &info->var);
  698. if (fb_mode_is_equal(&mode1, &mode2))
  699. return;
  700. /* Display has been re-plugged, framebuffer is free now, reconfigure */
  701. if (fb_set_var(info, &ch->display_var) < 0)
  702. /* Couldn't reconfigure, hopefully, can continue as before */
  703. return;
  704. info->fix.line_length = mode2.xres * (ch->cfg.bpp / 8);
  705. /*
  706. * fb_set_var() calls the notifier change internally, only if
  707. * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a
  708. * user event, we have to call the chain ourselves.
  709. */
  710. event.info = info;
  711. event.data = &mode2;
  712. fb_notifier_call_chain(evnt, &event);
  713. }
  714. /*
  715. * Locking: both .fb_release() and .fb_open() are called with info->lock held if
  716. * user == 1, or with console sem held, if user == 0.
  717. */
  718. static int sh_mobile_release(struct fb_info *info, int user)
  719. {
  720. struct sh_mobile_lcdc_chan *ch = info->par;
  721. mutex_lock(&ch->open_lock);
  722. dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
  723. ch->use_count--;
  724. /* Nothing to reconfigure, when called from fbcon */
  725. if (user) {
  726. acquire_console_sem();
  727. sh_mobile_fb_reconfig(info);
  728. release_console_sem();
  729. }
  730. mutex_unlock(&ch->open_lock);
  731. return 0;
  732. }
  733. static int sh_mobile_open(struct fb_info *info, int user)
  734. {
  735. struct sh_mobile_lcdc_chan *ch = info->par;
  736. mutex_lock(&ch->open_lock);
  737. ch->use_count++;
  738. dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
  739. mutex_unlock(&ch->open_lock);
  740. return 0;
  741. }
  742. static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  743. {
  744. struct sh_mobile_lcdc_chan *ch = info->par;
  745. if (var->xres < 160 || var->xres > 1920 ||
  746. var->yres < 120 || var->yres > 1080 ||
  747. var->left_margin < 32 || var->left_margin > 320 ||
  748. var->right_margin < 12 || var->right_margin > 240 ||
  749. var->upper_margin < 12 || var->upper_margin > 120 ||
  750. var->lower_margin < 1 || var->lower_margin > 64 ||
  751. var->hsync_len < 32 || var->hsync_len > 120 ||
  752. var->vsync_len < 2 || var->vsync_len > 64 ||
  753. var->pixclock < 6000 || var->pixclock > 40000 ||
  754. var->xres * var->yres * (ch->cfg.bpp / 8) * 2 > info->fix.smem_len) {
  755. dev_warn(info->dev, "Invalid info: %u %u %u %u %u %u %u %u %u!\n",
  756. var->xres, var->yres,
  757. var->left_margin, var->right_margin,
  758. var->upper_margin, var->lower_margin,
  759. var->hsync_len, var->vsync_len,
  760. var->pixclock);
  761. return -EINVAL;
  762. }
  763. return 0;
  764. }
  765. static struct fb_ops sh_mobile_lcdc_ops = {
  766. .owner = THIS_MODULE,
  767. .fb_setcolreg = sh_mobile_lcdc_setcolreg,
  768. .fb_read = fb_sys_read,
  769. .fb_write = fb_sys_write,
  770. .fb_fillrect = sh_mobile_lcdc_fillrect,
  771. .fb_copyarea = sh_mobile_lcdc_copyarea,
  772. .fb_imageblit = sh_mobile_lcdc_imageblit,
  773. .fb_pan_display = sh_mobile_fb_pan_display,
  774. .fb_ioctl = sh_mobile_ioctl,
  775. .fb_open = sh_mobile_open,
  776. .fb_release = sh_mobile_release,
  777. .fb_check_var = sh_mobile_check_var,
  778. };
  779. static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp)
  780. {
  781. switch (bpp) {
  782. case 16: /* PKF[4:0] = 00011 - RGB 565 */
  783. var->red.offset = 11;
  784. var->red.length = 5;
  785. var->green.offset = 5;
  786. var->green.length = 6;
  787. var->blue.offset = 0;
  788. var->blue.length = 5;
  789. var->transp.offset = 0;
  790. var->transp.length = 0;
  791. break;
  792. case 32: /* PKF[4:0] = 00000 - RGB 888
  793. * sh7722 pdf says 00RRGGBB but reality is GGBB00RR
  794. * this may be because LDDDSR has word swap enabled..
  795. */
  796. var->red.offset = 0;
  797. var->red.length = 8;
  798. var->green.offset = 24;
  799. var->green.length = 8;
  800. var->blue.offset = 16;
  801. var->blue.length = 8;
  802. var->transp.offset = 0;
  803. var->transp.length = 0;
  804. break;
  805. default:
  806. return -EINVAL;
  807. }
  808. var->bits_per_pixel = bpp;
  809. var->red.msb_right = 0;
  810. var->green.msb_right = 0;
  811. var->blue.msb_right = 0;
  812. var->transp.msb_right = 0;
  813. return 0;
  814. }
  815. static int sh_mobile_lcdc_suspend(struct device *dev)
  816. {
  817. struct platform_device *pdev = to_platform_device(dev);
  818. sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
  819. return 0;
  820. }
  821. static int sh_mobile_lcdc_resume(struct device *dev)
  822. {
  823. struct platform_device *pdev = to_platform_device(dev);
  824. return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
  825. }
  826. static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
  827. {
  828. struct platform_device *pdev = to_platform_device(dev);
  829. struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
  830. struct sh_mobile_lcdc_chan *ch;
  831. int k, n;
  832. /* save per-channel registers */
  833. for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
  834. ch = &p->ch[k];
  835. if (!ch->enabled)
  836. continue;
  837. for (n = 0; n < NR_CH_REGS; n++)
  838. ch->saved_ch_regs[n] = lcdc_read_chan(ch, n);
  839. }
  840. /* save shared registers */
  841. for (n = 0; n < NR_SHARED_REGS; n++)
  842. p->saved_shared_regs[n] = lcdc_read(p, lcdc_shared_regs[n]);
  843. /* turn off LCDC hardware */
  844. lcdc_write(p, _LDCNT1R, 0);
  845. return 0;
  846. }
  847. static int sh_mobile_lcdc_runtime_resume(struct device *dev)
  848. {
  849. struct platform_device *pdev = to_platform_device(dev);
  850. struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
  851. struct sh_mobile_lcdc_chan *ch;
  852. int k, n;
  853. /* restore per-channel registers */
  854. for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
  855. ch = &p->ch[k];
  856. if (!ch->enabled)
  857. continue;
  858. for (n = 0; n < NR_CH_REGS; n++)
  859. lcdc_write_chan(ch, n, ch->saved_ch_regs[n]);
  860. }
  861. /* restore shared registers */
  862. for (n = 0; n < NR_SHARED_REGS; n++)
  863. lcdc_write(p, lcdc_shared_regs[n], p->saved_shared_regs[n]);
  864. return 0;
  865. }
  866. static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
  867. .suspend = sh_mobile_lcdc_suspend,
  868. .resume = sh_mobile_lcdc_resume,
  869. .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
  870. .runtime_resume = sh_mobile_lcdc_runtime_resume,
  871. };
  872. /* locking: called with info->lock held */
  873. static int sh_mobile_lcdc_notify(struct notifier_block *nb,
  874. unsigned long action, void *data)
  875. {
  876. struct fb_event *event = data;
  877. struct fb_info *info = event->info;
  878. struct sh_mobile_lcdc_chan *ch = info->par;
  879. struct sh_mobile_lcdc_board_cfg *board_cfg = &ch->cfg.board_cfg;
  880. struct fb_var_screeninfo *var;
  881. int ret;
  882. if (&ch->lcdc->notifier != nb)
  883. return NOTIFY_DONE;
  884. dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
  885. __func__, action, event->data);
  886. switch(action) {
  887. case FB_EVENT_SUSPEND:
  888. if (try_module_get(board_cfg->owner) && board_cfg->display_off) {
  889. board_cfg->display_off(board_cfg->board_data);
  890. module_put(board_cfg->owner);
  891. }
  892. pm_runtime_put(info->device);
  893. sh_mobile_lcdc_stop(ch->lcdc);
  894. break;
  895. case FB_EVENT_RESUME:
  896. var = &info->var;
  897. mutex_lock(&ch->open_lock);
  898. sh_mobile_fb_reconfig(info);
  899. mutex_unlock(&ch->open_lock);
  900. /* HDMI must be enabled before LCDC configuration */
  901. if (try_module_get(board_cfg->owner) && board_cfg->display_on) {
  902. board_cfg->display_on(board_cfg->board_data, info);
  903. module_put(board_cfg->owner);
  904. }
  905. ret = sh_mobile_lcdc_start(ch->lcdc);
  906. if (!ret)
  907. pm_runtime_get_sync(info->device);
  908. }
  909. return NOTIFY_OK;
  910. }
  911. static int sh_mobile_lcdc_remove(struct platform_device *pdev);
  912. static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
  913. {
  914. struct fb_info *info;
  915. struct sh_mobile_lcdc_priv *priv;
  916. struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
  917. struct sh_mobile_lcdc_chan_cfg *cfg;
  918. struct resource *res;
  919. int error;
  920. void *buf;
  921. int i, j;
  922. if (!pdata) {
  923. dev_err(&pdev->dev, "no platform data defined\n");
  924. return -EINVAL;
  925. }
  926. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  927. i = platform_get_irq(pdev, 0);
  928. if (!res || i < 0) {
  929. dev_err(&pdev->dev, "cannot get platform resources\n");
  930. return -ENOENT;
  931. }
  932. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  933. if (!priv) {
  934. dev_err(&pdev->dev, "cannot allocate device data\n");
  935. return -ENOMEM;
  936. }
  937. platform_set_drvdata(pdev, priv);
  938. error = request_irq(i, sh_mobile_lcdc_irq, IRQF_DISABLED,
  939. dev_name(&pdev->dev), priv);
  940. if (error) {
  941. dev_err(&pdev->dev, "unable to request irq\n");
  942. goto err1;
  943. }
  944. priv->irq = i;
  945. atomic_set(&priv->hw_usecnt, -1);
  946. j = 0;
  947. for (i = 0; i < ARRAY_SIZE(pdata->ch); i++) {
  948. struct sh_mobile_lcdc_chan *ch = priv->ch + j;
  949. ch->lcdc = priv;
  950. memcpy(&ch->cfg, &pdata->ch[i], sizeof(pdata->ch[i]));
  951. error = sh_mobile_lcdc_check_interface(ch);
  952. if (error) {
  953. dev_err(&pdev->dev, "unsupported interface type\n");
  954. goto err1;
  955. }
  956. init_waitqueue_head(&ch->frame_end_wait);
  957. init_completion(&ch->vsync_completion);
  958. ch->pan_offset = 0;
  959. switch (pdata->ch[i].chan) {
  960. case LCDC_CHAN_MAINLCD:
  961. ch->enabled = 1 << 1;
  962. ch->reg_offs = lcdc_offs_mainlcd;
  963. j++;
  964. break;
  965. case LCDC_CHAN_SUBLCD:
  966. ch->enabled = 1 << 2;
  967. ch->reg_offs = lcdc_offs_sublcd;
  968. j++;
  969. break;
  970. }
  971. }
  972. if (!j) {
  973. dev_err(&pdev->dev, "no channels defined\n");
  974. error = -EINVAL;
  975. goto err1;
  976. }
  977. priv->base = ioremap_nocache(res->start, resource_size(res));
  978. if (!priv->base)
  979. goto err1;
  980. error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv);
  981. if (error) {
  982. dev_err(&pdev->dev, "unable to setup clocks\n");
  983. goto err1;
  984. }
  985. for (i = 0; i < j; i++) {
  986. struct fb_var_screeninfo *var;
  987. const struct fb_videomode *lcd_cfg, *max_cfg = NULL;
  988. struct sh_mobile_lcdc_chan *ch = priv->ch + i;
  989. unsigned long max_size = 0;
  990. int k;
  991. cfg = &ch->cfg;
  992. ch->info = framebuffer_alloc(0, &pdev->dev);
  993. if (!ch->info) {
  994. dev_err(&pdev->dev, "unable to allocate fb_info\n");
  995. error = -ENOMEM;
  996. break;
  997. }
  998. info = ch->info;
  999. var = &info->var;
  1000. info->fbops = &sh_mobile_lcdc_ops;
  1001. mutex_init(&ch->open_lock);
  1002. fb_videomode_to_var(var, &cfg->lcd_cfg[0]);
  1003. /* Default Y virtual resolution is 2x panel size */
  1004. var->yres_virtual = var->yres * 2;
  1005. var->activate = FB_ACTIVATE_NOW;
  1006. error = sh_mobile_lcdc_set_bpp(var, cfg->bpp);
  1007. if (error)
  1008. break;
  1009. for (k = 0, lcd_cfg = cfg->lcd_cfg;
  1010. k < cfg->num_cfg;
  1011. k++, lcd_cfg++) {
  1012. unsigned long size = lcd_cfg->yres * lcd_cfg->xres;
  1013. if (size > max_size) {
  1014. max_cfg = lcd_cfg;
  1015. max_size = size;
  1016. }
  1017. }
  1018. dev_dbg(&pdev->dev, "Found largest videomode %ux%u\n",
  1019. max_cfg->xres, max_cfg->yres);
  1020. info->fix = sh_mobile_lcdc_fix;
  1021. info->fix.line_length = cfg->lcd_cfg[0].xres * (cfg->bpp / 8);
  1022. info->fix.smem_len = max_size * (cfg->bpp / 8) * 2;
  1023. buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len,
  1024. &ch->dma_handle, GFP_KERNEL);
  1025. if (!buf) {
  1026. dev_err(&pdev->dev, "unable to allocate buffer\n");
  1027. error = -ENOMEM;
  1028. break;
  1029. }
  1030. info->pseudo_palette = &ch->pseudo_palette;
  1031. info->flags = FBINFO_FLAG_DEFAULT;
  1032. error = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
  1033. if (error < 0) {
  1034. dev_err(&pdev->dev, "unable to allocate cmap\n");
  1035. dma_free_coherent(&pdev->dev, info->fix.smem_len,
  1036. buf, ch->dma_handle);
  1037. break;
  1038. }
  1039. info->fix.smem_start = ch->dma_handle;
  1040. info->screen_base = buf;
  1041. info->device = &pdev->dev;
  1042. info->par = ch;
  1043. ch->display_var = *var;
  1044. }
  1045. if (error)
  1046. goto err1;
  1047. error = sh_mobile_lcdc_start(priv);
  1048. if (error) {
  1049. dev_err(&pdev->dev, "unable to start hardware\n");
  1050. goto err1;
  1051. }
  1052. for (i = 0; i < j; i++) {
  1053. struct sh_mobile_lcdc_chan *ch = priv->ch + i;
  1054. info = ch->info;
  1055. if (info->fbdefio) {
  1056. ch->sglist = vmalloc(sizeof(struct scatterlist) *
  1057. info->fix.smem_len >> PAGE_SHIFT);
  1058. if (!ch->sglist) {
  1059. dev_err(&pdev->dev, "cannot allocate sglist\n");
  1060. goto err1;
  1061. }
  1062. }
  1063. fb_videomode_to_modelist(ch->cfg.lcd_cfg, ch->cfg.num_cfg, &info->modelist);
  1064. error = register_framebuffer(info);
  1065. if (error < 0)
  1066. goto err1;
  1067. dev_info(info->dev,
  1068. "registered %s/%s as %dx%d %dbpp.\n",
  1069. pdev->name,
  1070. (ch->cfg.chan == LCDC_CHAN_MAINLCD) ?
  1071. "mainlcd" : "sublcd",
  1072. (int) ch->cfg.lcd_cfg[0].xres,
  1073. (int) ch->cfg.lcd_cfg[0].yres,
  1074. ch->cfg.bpp);
  1075. /* deferred io mode: disable clock to save power */
  1076. if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
  1077. sh_mobile_lcdc_clk_off(priv);
  1078. }
  1079. /* Failure ignored */
  1080. priv->notifier.notifier_call = sh_mobile_lcdc_notify;
  1081. fb_register_client(&priv->notifier);
  1082. return 0;
  1083. err1:
  1084. sh_mobile_lcdc_remove(pdev);
  1085. return error;
  1086. }
  1087. static int sh_mobile_lcdc_remove(struct platform_device *pdev)
  1088. {
  1089. struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
  1090. struct fb_info *info;
  1091. int i;
  1092. fb_unregister_client(&priv->notifier);
  1093. for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
  1094. if (priv->ch[i].info && priv->ch[i].info->dev)
  1095. unregister_framebuffer(priv->ch[i].info);
  1096. sh_mobile_lcdc_stop(priv);
  1097. for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
  1098. info = priv->ch[i].info;
  1099. if (!info || !info->device)
  1100. continue;
  1101. if (priv->ch[i].sglist)
  1102. vfree(priv->ch[i].sglist);
  1103. dma_free_coherent(&pdev->dev, info->fix.smem_len,
  1104. info->screen_base, priv->ch[i].dma_handle);
  1105. fb_dealloc_cmap(&info->cmap);
  1106. framebuffer_release(info);
  1107. }
  1108. if (priv->dot_clk)
  1109. clk_put(priv->dot_clk);
  1110. if (priv->dev)
  1111. pm_runtime_disable(priv->dev);
  1112. if (priv->base)
  1113. iounmap(priv->base);
  1114. if (priv->irq)
  1115. free_irq(priv->irq, priv);
  1116. kfree(priv);
  1117. return 0;
  1118. }
  1119. static struct platform_driver sh_mobile_lcdc_driver = {
  1120. .driver = {
  1121. .name = "sh_mobile_lcdc_fb",
  1122. .owner = THIS_MODULE,
  1123. .pm = &sh_mobile_lcdc_dev_pm_ops,
  1124. },
  1125. .probe = sh_mobile_lcdc_probe,
  1126. .remove = sh_mobile_lcdc_remove,
  1127. };
  1128. static int __init sh_mobile_lcdc_init(void)
  1129. {
  1130. return platform_driver_register(&sh_mobile_lcdc_driver);
  1131. }
  1132. static void __exit sh_mobile_lcdc_exit(void)
  1133. {
  1134. platform_driver_unregister(&sh_mobile_lcdc_driver);
  1135. }
  1136. module_init(sh_mobile_lcdc_init);
  1137. module_exit(sh_mobile_lcdc_exit);
  1138. MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
  1139. MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
  1140. MODULE_LICENSE("GPL v2");