debug-macro.S 4.6 KB

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  1. /* arch/arm/mach-omap2/include/mach/debug-macro.S
  2. *
  3. * Debugging macro include header
  4. *
  5. * Copyright (C) 1994-1999 Russell King
  6. * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/serial_reg.h>
  14. #include <asm/memory.h>
  15. #include <plat/serial.h>
  16. #define UART_OFFSET(addr) ((addr) & 0x00ffffff)
  17. #define omap_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET)
  18. #define omap_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET)
  19. .pushsection .data
  20. omap_uart_phys: .word 0
  21. omap_uart_virt: .word 0
  22. omap_uart_lsr: .word 0
  23. .popsection
  24. /*
  25. * Note that this code won't work if the bootloader passes
  26. * a wrong machine ID number in r1. To debug, just hardcode
  27. * the desired UART phys and virt addresses temporarily into
  28. * the omap_uart_phys and omap_uart_virt above.
  29. */
  30. .macro addruart, rp, rv, tmp
  31. /* Use omap_uart_phys/virt if already configured */
  32. 10: mrc p15, 0, \rp, c1, c0
  33. tst \rp, #1 @ MMU enabled?
  34. ldreq \rp, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
  35. ldrne \rp, =omap_uart_phys @ MMU enabled
  36. add \rv, \rp, #4 @ omap_uart_virt
  37. ldr \rp, [\rp, #0]
  38. ldr \rv, [\rv, #0]
  39. cmp \rp, #0 @ is port configured?
  40. cmpne \rv, #0
  41. bne 99f @ already configured
  42. /* Check the debug UART configuration set in uncompress.h */
  43. mov \rp, pc
  44. ldr \rv, =OMAP_UART_INFO_OFS
  45. and \rp, \rp, #0xff000000
  46. ldr \rp, [\rp, \rv]
  47. /* Select the UART to use based on the UART1 scratchpad value */
  48. cmp \rp, #0 @ no port configured?
  49. beq 21f @ if none, try to use UART1
  50. cmp \rp, #OMAP2UART1 @ OMAP2/3/4UART1
  51. beq 21f @ configure OMAP2/3/4UART1
  52. cmp \rp, #OMAP2UART2 @ OMAP2/3/4UART2
  53. beq 22f @ configure OMAP2/3/4UART2
  54. cmp \rp, #OMAP2UART3 @ only on 24xx
  55. beq 23f @ configure OMAP2UART3
  56. cmp \rp, #OMAP3UART3 @ only on 34xx
  57. beq 33f @ configure OMAP3UART3
  58. cmp \rp, #OMAP4UART3 @ only on 44xx
  59. beq 43f @ configure OMAP4UART3
  60. cmp \rp, #OMAP3UART4 @ only on 36xx
  61. beq 34f @ configure OMAP3UART4
  62. cmp \rp, #OMAP4UART4 @ only on 44xx
  63. beq 44f @ configure OMAP4UART4
  64. cmp \rp, #TI816XUART1 @ ti816x UART offsets different
  65. beq 81f @ configure UART1
  66. cmp \rp, #TI816XUART2 @ ti816x UART offsets different
  67. beq 82f @ configure UART2
  68. cmp \rp, #TI816XUART3 @ ti816x UART offsets different
  69. beq 83f @ configure UART3
  70. cmp \rp, #ZOOM_UART @ only on zoom2/3
  71. beq 95f @ configure ZOOM_UART
  72. /* Configure the UART offset from the phys/virt base */
  73. 21: mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4
  74. b 98f
  75. 22: mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4
  76. b 98f
  77. 23: mov \rp, #UART_OFFSET(OMAP2_UART3_BASE)
  78. b 98f
  79. 33: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
  80. add \rp, \rp, #0x00fb0000
  81. add \rp, \rp, #0x00006000 @ OMAP3_UART3_BASE
  82. b 98f
  83. 34: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
  84. add \rp, \rp, #0x00fb0000
  85. add \rp, \rp, #0x00028000 @ OMAP3_UART4_BASE
  86. b 98f
  87. 43: mov \rp, #UART_OFFSET(OMAP4_UART3_BASE)
  88. b 98f
  89. 44: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
  90. b 98f
  91. 81: mov \rp, #UART_OFFSET(TI816X_UART1_BASE)
  92. b 98f
  93. 82: mov \rp, #UART_OFFSET(TI816X_UART2_BASE)
  94. b 98f
  95. 83: mov \rp, #UART_OFFSET(TI816X_UART3_BASE)
  96. b 98f
  97. 95: ldr \rp, =ZOOM_UART_BASE
  98. mrc p15, 0, \rv, c1, c0
  99. tst \rv, #1 @ MMU enabled?
  100. ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
  101. ldrne \rv, =omap_uart_phys @ MMU enabled
  102. str \rp, [\rv, #0]
  103. ldr \rp, =ZOOM_UART_VIRT
  104. add \rv, \rv, #4 @ omap_uart_virt
  105. str \rp, [\rv, #0]
  106. mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT)
  107. add \rv, \rv, #4 @ omap_uart_lsr
  108. str \rp, [\rv, #0]
  109. b 10b
  110. /* Store both phys and virt address for the uart */
  111. 98: add \rp, \rp, #0x48000000 @ phys base
  112. mrc p15, 0, \rv, c1, c0
  113. tst \rv, #1 @ MMU enabled?
  114. ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
  115. ldrne \rv, =omap_uart_phys @ MMU enabled
  116. str \rp, [\rv, #0]
  117. sub \rp, \rp, #0x48000000 @ phys base
  118. add \rp, \rp, #0xfa000000 @ virt base
  119. add \rv, \rv, #4 @ omap_uart_virt
  120. str \rp, [\rv, #0]
  121. mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
  122. add \rv, \rv, #4 @ omap_uart_lsr
  123. str \rp, [\rv, #0]
  124. b 10b
  125. 99:
  126. .endm
  127. .macro senduart,rd,rx
  128. strb \rd, [\rx]
  129. .endm
  130. .macro busyuart,rd,rx
  131. 1001: mrc p15, 0, \rd, c1, c0
  132. tst \rd, #1 @ MMU enabled?
  133. ldreq \rd, =omap_uart_v2p(omap_uart_lsr) @ MMU disabled
  134. ldrne \rd, =omap_uart_lsr @ MMU enabled
  135. ldr \rd, [\rd, #0]
  136. ldrb \rd, [\rx, \rd]
  137. and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
  138. teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
  139. bne 1001b
  140. .endm
  141. .macro waituart,rd,rx
  142. .endm