tilegx.c 53 KB

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  1. /*
  2. * Copyright 2012 Tilera Corporation. All Rights Reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation, version 2.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11. * NON INFRINGEMENT. See the GNU General Public License for
  12. * more details.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/init.h>
  16. #include <linux/moduleparam.h>
  17. #include <linux/sched.h>
  18. #include <linux/kernel.h> /* printk() */
  19. #include <linux/slab.h> /* kmalloc() */
  20. #include <linux/errno.h> /* error codes */
  21. #include <linux/types.h> /* size_t */
  22. #include <linux/interrupt.h>
  23. #include <linux/in.h>
  24. #include <linux/irq.h>
  25. #include <linux/netdevice.h> /* struct device, and other headers */
  26. #include <linux/etherdevice.h> /* eth_type_trans */
  27. #include <linux/skbuff.h>
  28. #include <linux/ioctl.h>
  29. #include <linux/cdev.h>
  30. #include <linux/hugetlb.h>
  31. #include <linux/in6.h>
  32. #include <linux/timer.h>
  33. #include <linux/hrtimer.h>
  34. #include <linux/ktime.h>
  35. #include <linux/io.h>
  36. #include <linux/ctype.h>
  37. #include <linux/ip.h>
  38. #include <linux/tcp.h>
  39. #include <asm/checksum.h>
  40. #include <asm/homecache.h>
  41. #include <gxio/mpipe.h>
  42. #include <arch/sim.h>
  43. /* Default transmit lockup timeout period, in jiffies. */
  44. #define TILE_NET_TIMEOUT (5 * HZ)
  45. /* The maximum number of distinct channels (idesc.channel is 5 bits). */
  46. #define TILE_NET_CHANNELS 32
  47. /* Maximum number of idescs to handle per "poll". */
  48. #define TILE_NET_BATCH 128
  49. /* Maximum number of packets to handle per "poll". */
  50. #define TILE_NET_WEIGHT 64
  51. /* Number of entries in each iqueue. */
  52. #define IQUEUE_ENTRIES 512
  53. /* Number of entries in each equeue. */
  54. #define EQUEUE_ENTRIES 2048
  55. /* Total header bytes per equeue slot. Must be big enough for 2 bytes
  56. * of NET_IP_ALIGN alignment, plus 14 bytes (?) of L2 header, plus up to
  57. * 60 bytes of actual TCP header. We round up to align to cache lines.
  58. */
  59. #define HEADER_BYTES 128
  60. /* Maximum completions per cpu per device (must be a power of two).
  61. * ISSUE: What is the right number here? If this is too small, then
  62. * egress might block waiting for free space in a completions array.
  63. * ISSUE: At the least, allocate these only for initialized echannels.
  64. */
  65. #define TILE_NET_MAX_COMPS 64
  66. #define MAX_FRAGS (MAX_SKB_FRAGS + 1)
  67. /* Size of completions data to allocate.
  68. * ISSUE: Probably more than needed since we don't use all the channels.
  69. */
  70. #define COMPS_SIZE (TILE_NET_CHANNELS * sizeof(struct tile_net_comps))
  71. /* Size of NotifRing data to allocate. */
  72. #define NOTIF_RING_SIZE (IQUEUE_ENTRIES * sizeof(gxio_mpipe_idesc_t))
  73. /* Timeout to wake the per-device TX timer after we stop the queue.
  74. * We don't want the timeout too short (adds overhead, and might end
  75. * up causing stop/wake/stop/wake cycles) or too long (affects performance).
  76. * For the 10 Gb NIC, 30 usec means roughly 30+ 1500-byte packets.
  77. */
  78. #define TX_TIMER_DELAY_USEC 30
  79. /* Timeout to wake the per-cpu egress timer to free completions. */
  80. #define EGRESS_TIMER_DELAY_USEC 1000
  81. MODULE_AUTHOR("Tilera Corporation");
  82. MODULE_LICENSE("GPL");
  83. /* A "packet fragment" (a chunk of memory). */
  84. struct frag {
  85. void *buf;
  86. size_t length;
  87. };
  88. /* A single completion. */
  89. struct tile_net_comp {
  90. /* The "complete_count" when the completion will be complete. */
  91. s64 when;
  92. /* The buffer to be freed when the completion is complete. */
  93. struct sk_buff *skb;
  94. };
  95. /* The completions for a given cpu and echannel. */
  96. struct tile_net_comps {
  97. /* The completions. */
  98. struct tile_net_comp comp_queue[TILE_NET_MAX_COMPS];
  99. /* The number of completions used. */
  100. unsigned long comp_next;
  101. /* The number of completions freed. */
  102. unsigned long comp_last;
  103. };
  104. /* The transmit wake timer for a given cpu and echannel. */
  105. struct tile_net_tx_wake {
  106. int tx_queue_idx;
  107. struct hrtimer timer;
  108. struct net_device *dev;
  109. };
  110. /* Info for a specific cpu. */
  111. struct tile_net_info {
  112. /* The NAPI struct. */
  113. struct napi_struct napi;
  114. /* Packet queue. */
  115. gxio_mpipe_iqueue_t iqueue;
  116. /* Our cpu. */
  117. int my_cpu;
  118. /* True if iqueue is valid. */
  119. bool has_iqueue;
  120. /* NAPI flags. */
  121. bool napi_added;
  122. bool napi_enabled;
  123. /* Number of small sk_buffs which must still be provided. */
  124. unsigned int num_needed_small_buffers;
  125. /* Number of large sk_buffs which must still be provided. */
  126. unsigned int num_needed_large_buffers;
  127. /* A timer for handling egress completions. */
  128. struct hrtimer egress_timer;
  129. /* True if "egress_timer" is scheduled. */
  130. bool egress_timer_scheduled;
  131. /* Comps for each egress channel. */
  132. struct tile_net_comps *comps_for_echannel[TILE_NET_CHANNELS];
  133. /* Transmit wake timer for each egress channel. */
  134. struct tile_net_tx_wake tx_wake[TILE_NET_CHANNELS];
  135. };
  136. /* Info for egress on a particular egress channel. */
  137. struct tile_net_egress {
  138. /* The "equeue". */
  139. gxio_mpipe_equeue_t *equeue;
  140. /* The headers for TSO. */
  141. unsigned char *headers;
  142. };
  143. /* Info for a specific device. */
  144. struct tile_net_priv {
  145. /* Our network device. */
  146. struct net_device *dev;
  147. /* The primary link. */
  148. gxio_mpipe_link_t link;
  149. /* The primary channel, if open, else -1. */
  150. int channel;
  151. /* The "loopify" egress link, if needed. */
  152. gxio_mpipe_link_t loopify_link;
  153. /* The "loopify" egress channel, if open, else -1. */
  154. int loopify_channel;
  155. /* The egress channel (channel or loopify_channel). */
  156. int echannel;
  157. /* Total stats. */
  158. struct net_device_stats stats;
  159. };
  160. /* Egress info, indexed by "priv->echannel" (lazily created as needed). */
  161. static struct tile_net_egress egress_for_echannel[TILE_NET_CHANNELS];
  162. /* Devices currently associated with each channel.
  163. * NOTE: The array entry can become NULL after ifconfig down, but
  164. * we do not free the underlying net_device structures, so it is
  165. * safe to use a pointer after reading it from this array.
  166. */
  167. static struct net_device *tile_net_devs_for_channel[TILE_NET_CHANNELS];
  168. /* A mutex for "tile_net_devs_for_channel". */
  169. static DEFINE_MUTEX(tile_net_devs_for_channel_mutex);
  170. /* The per-cpu info. */
  171. static DEFINE_PER_CPU(struct tile_net_info, per_cpu_info);
  172. /* The "context" for all devices. */
  173. static gxio_mpipe_context_t context;
  174. /* Buffer sizes and mpipe enum codes for buffer stacks.
  175. * See arch/tile/include/gxio/mpipe.h for the set of possible values.
  176. */
  177. #define BUFFER_SIZE_SMALL_ENUM GXIO_MPIPE_BUFFER_SIZE_128
  178. #define BUFFER_SIZE_SMALL 128
  179. #define BUFFER_SIZE_LARGE_ENUM GXIO_MPIPE_BUFFER_SIZE_1664
  180. #define BUFFER_SIZE_LARGE 1664
  181. /* The small/large "buffer stacks". */
  182. static int small_buffer_stack = -1;
  183. static int large_buffer_stack = -1;
  184. /* Amount of memory allocated for each buffer stack. */
  185. static size_t buffer_stack_size;
  186. /* The actual memory allocated for the buffer stacks. */
  187. static void *small_buffer_stack_va;
  188. static void *large_buffer_stack_va;
  189. /* The buckets. */
  190. static int first_bucket = -1;
  191. static int num_buckets = 1;
  192. /* The ingress irq. */
  193. static int ingress_irq = -1;
  194. /* Text value of tile_net.cpus if passed as a module parameter. */
  195. static char *network_cpus_string;
  196. /* The actual cpus in "network_cpus". */
  197. static struct cpumask network_cpus_map;
  198. /* If "loopify=LINK" was specified, this is "LINK". */
  199. static char *loopify_link_name;
  200. /* If "tile_net.custom" was specified, this is non-NULL. */
  201. static char *custom_str;
  202. /* The "tile_net.cpus" argument specifies the cpus that are dedicated
  203. * to handle ingress packets.
  204. *
  205. * The parameter should be in the form "tile_net.cpus=m-n[,x-y]", where
  206. * m, n, x, y are integer numbers that represent the cpus that can be
  207. * neither a dedicated cpu nor a dataplane cpu.
  208. */
  209. static bool network_cpus_init(void)
  210. {
  211. char buf[1024];
  212. int rc;
  213. if (network_cpus_string == NULL)
  214. return false;
  215. rc = cpulist_parse_crop(network_cpus_string, &network_cpus_map);
  216. if (rc != 0) {
  217. pr_warn("tile_net.cpus=%s: malformed cpu list\n",
  218. network_cpus_string);
  219. return false;
  220. }
  221. /* Remove dedicated cpus. */
  222. cpumask_and(&network_cpus_map, &network_cpus_map, cpu_possible_mask);
  223. if (cpumask_empty(&network_cpus_map)) {
  224. pr_warn("Ignoring empty tile_net.cpus='%s'.\n",
  225. network_cpus_string);
  226. return false;
  227. }
  228. cpulist_scnprintf(buf, sizeof(buf), &network_cpus_map);
  229. pr_info("Linux network CPUs: %s\n", buf);
  230. return true;
  231. }
  232. module_param_named(cpus, network_cpus_string, charp, 0444);
  233. MODULE_PARM_DESC(cpus, "cpulist of cores that handle network interrupts");
  234. /* The "tile_net.loopify=LINK" argument causes the named device to
  235. * actually use "loop0" for ingress, and "loop1" for egress. This
  236. * allows an app to sit between the actual link and linux, passing
  237. * (some) packets along to linux, and forwarding (some) packets sent
  238. * out by linux.
  239. */
  240. module_param_named(loopify, loopify_link_name, charp, 0444);
  241. MODULE_PARM_DESC(loopify, "name the device to use loop0/1 for ingress/egress");
  242. /* The "tile_net.custom" argument causes us to ignore the "conventional"
  243. * classifier metadata, in particular, the "l2_offset".
  244. */
  245. module_param_named(custom, custom_str, charp, 0444);
  246. MODULE_PARM_DESC(custom, "indicates a (heavily) customized classifier");
  247. /* Atomically update a statistics field.
  248. * Note that on TILE-Gx, this operation is fire-and-forget on the
  249. * issuing core (single-cycle dispatch) and takes only a few cycles
  250. * longer than a regular store when the request reaches the home cache.
  251. * No expensive bus management overhead is required.
  252. */
  253. static void tile_net_stats_add(unsigned long value, unsigned long *field)
  254. {
  255. BUILD_BUG_ON(sizeof(atomic_long_t) != sizeof(unsigned long));
  256. atomic_long_add(value, (atomic_long_t *)field);
  257. }
  258. /* Allocate and push a buffer. */
  259. static bool tile_net_provide_buffer(bool small)
  260. {
  261. int stack = small ? small_buffer_stack : large_buffer_stack;
  262. const unsigned long buffer_alignment = 128;
  263. struct sk_buff *skb;
  264. int len;
  265. len = sizeof(struct sk_buff **) + buffer_alignment;
  266. len += (small ? BUFFER_SIZE_SMALL : BUFFER_SIZE_LARGE);
  267. skb = dev_alloc_skb(len);
  268. if (skb == NULL)
  269. return false;
  270. /* Make room for a back-pointer to 'skb' and guarantee alignment. */
  271. skb_reserve(skb, sizeof(struct sk_buff **));
  272. skb_reserve(skb, -(long)skb->data & (buffer_alignment - 1));
  273. /* Save a back-pointer to 'skb'. */
  274. *(struct sk_buff **)(skb->data - sizeof(struct sk_buff **)) = skb;
  275. /* Make sure "skb" and the back-pointer have been flushed. */
  276. wmb();
  277. gxio_mpipe_push_buffer(&context, stack,
  278. (void *)va_to_tile_io_addr(skb->data));
  279. return true;
  280. }
  281. /* Convert a raw mpipe buffer to its matching skb pointer. */
  282. static struct sk_buff *mpipe_buf_to_skb(void *va)
  283. {
  284. /* Acquire the associated "skb". */
  285. struct sk_buff **skb_ptr = va - sizeof(*skb_ptr);
  286. struct sk_buff *skb = *skb_ptr;
  287. /* Paranoia. */
  288. if (skb->data != va) {
  289. /* Panic here since there's a reasonable chance
  290. * that corrupt buffers means generic memory
  291. * corruption, with unpredictable system effects.
  292. */
  293. panic("Corrupt linux buffer! va=%p, skb=%p, skb->data=%p",
  294. va, skb, skb->data);
  295. }
  296. return skb;
  297. }
  298. static void tile_net_pop_all_buffers(int stack)
  299. {
  300. for (;;) {
  301. tile_io_addr_t addr =
  302. (tile_io_addr_t)gxio_mpipe_pop_buffer(&context, stack);
  303. if (addr == 0)
  304. break;
  305. dev_kfree_skb_irq(mpipe_buf_to_skb(tile_io_addr_to_va(addr)));
  306. }
  307. }
  308. /* Provide linux buffers to mPIPE. */
  309. static void tile_net_provide_needed_buffers(void)
  310. {
  311. struct tile_net_info *info = &__get_cpu_var(per_cpu_info);
  312. while (info->num_needed_small_buffers != 0) {
  313. if (!tile_net_provide_buffer(true))
  314. goto oops;
  315. info->num_needed_small_buffers--;
  316. }
  317. while (info->num_needed_large_buffers != 0) {
  318. if (!tile_net_provide_buffer(false))
  319. goto oops;
  320. info->num_needed_large_buffers--;
  321. }
  322. return;
  323. oops:
  324. /* Add a description to the page allocation failure dump. */
  325. pr_notice("Tile %d still needs some buffers\n", info->my_cpu);
  326. }
  327. static inline bool filter_packet(struct net_device *dev, void *buf)
  328. {
  329. /* Filter packets received before we're up. */
  330. if (dev == NULL || !(dev->flags & IFF_UP))
  331. return true;
  332. /* Filter out packets that aren't for us. */
  333. if (!(dev->flags & IFF_PROMISC) &&
  334. !is_multicast_ether_addr(buf) &&
  335. compare_ether_addr(dev->dev_addr, buf) != 0)
  336. return true;
  337. return false;
  338. }
  339. static void tile_net_receive_skb(struct net_device *dev, struct sk_buff *skb,
  340. gxio_mpipe_idesc_t *idesc, unsigned long len)
  341. {
  342. struct tile_net_info *info = &__get_cpu_var(per_cpu_info);
  343. struct tile_net_priv *priv = netdev_priv(dev);
  344. /* Encode the actual packet length. */
  345. skb_put(skb, len);
  346. skb->protocol = eth_type_trans(skb, dev);
  347. /* Acknowledge "good" hardware checksums. */
  348. if (idesc->cs && idesc->csum_seed_val == 0xFFFF)
  349. skb->ip_summed = CHECKSUM_UNNECESSARY;
  350. netif_receive_skb(skb);
  351. /* Update stats. */
  352. tile_net_stats_add(1, &priv->stats.rx_packets);
  353. tile_net_stats_add(len, &priv->stats.rx_bytes);
  354. /* Need a new buffer. */
  355. if (idesc->size == BUFFER_SIZE_SMALL_ENUM)
  356. info->num_needed_small_buffers++;
  357. else
  358. info->num_needed_large_buffers++;
  359. }
  360. /* Handle a packet. Return true if "processed", false if "filtered". */
  361. static bool tile_net_handle_packet(gxio_mpipe_idesc_t *idesc)
  362. {
  363. struct tile_net_info *info = &__get_cpu_var(per_cpu_info);
  364. struct net_device *dev = tile_net_devs_for_channel[idesc->channel];
  365. uint8_t l2_offset;
  366. void *va;
  367. void *buf;
  368. unsigned long len;
  369. bool filter;
  370. /* Drop packets for which no buffer was available.
  371. * NOTE: This happens under heavy load.
  372. */
  373. if (idesc->be) {
  374. struct tile_net_priv *priv = netdev_priv(dev);
  375. tile_net_stats_add(1, &priv->stats.rx_dropped);
  376. gxio_mpipe_iqueue_consume(&info->iqueue, idesc);
  377. if (net_ratelimit())
  378. pr_info("Dropping packet (insufficient buffers).\n");
  379. return false;
  380. }
  381. /* Get the "l2_offset", if allowed. */
  382. l2_offset = custom_str ? 0 : gxio_mpipe_idesc_get_l2_offset(idesc);
  383. /* Get the raw buffer VA (includes "headroom"). */
  384. va = tile_io_addr_to_va((unsigned long)(long)idesc->va);
  385. /* Get the actual packet start/length. */
  386. buf = va + l2_offset;
  387. len = idesc->l2_size - l2_offset;
  388. /* Point "va" at the raw buffer. */
  389. va -= NET_IP_ALIGN;
  390. filter = filter_packet(dev, buf);
  391. if (filter) {
  392. gxio_mpipe_iqueue_drop(&info->iqueue, idesc);
  393. } else {
  394. struct sk_buff *skb = mpipe_buf_to_skb(va);
  395. /* Skip headroom, and any custom header. */
  396. skb_reserve(skb, NET_IP_ALIGN + l2_offset);
  397. tile_net_receive_skb(dev, skb, idesc, len);
  398. }
  399. gxio_mpipe_iqueue_consume(&info->iqueue, idesc);
  400. return !filter;
  401. }
  402. /* Handle some packets for the current CPU.
  403. *
  404. * This function handles up to TILE_NET_BATCH idescs per call.
  405. *
  406. * ISSUE: Since we do not provide new buffers until this function is
  407. * complete, we must initially provide enough buffers for each network
  408. * cpu to fill its iqueue and also its batched idescs.
  409. *
  410. * ISSUE: The "rotting packet" race condition occurs if a packet
  411. * arrives after the queue appears to be empty, and before the
  412. * hypervisor interrupt is re-enabled.
  413. */
  414. static int tile_net_poll(struct napi_struct *napi, int budget)
  415. {
  416. struct tile_net_info *info = &__get_cpu_var(per_cpu_info);
  417. unsigned int work = 0;
  418. gxio_mpipe_idesc_t *idesc;
  419. int i, n;
  420. /* Process packets. */
  421. while ((n = gxio_mpipe_iqueue_try_peek(&info->iqueue, &idesc)) > 0) {
  422. for (i = 0; i < n; i++) {
  423. if (i == TILE_NET_BATCH)
  424. goto done;
  425. if (tile_net_handle_packet(idesc + i)) {
  426. if (++work >= budget)
  427. goto done;
  428. }
  429. }
  430. }
  431. /* There are no packets left. */
  432. napi_complete(&info->napi);
  433. /* Re-enable hypervisor interrupts. */
  434. gxio_mpipe_enable_notif_ring_interrupt(&context, info->iqueue.ring);
  435. /* HACK: Avoid the "rotting packet" problem. */
  436. if (gxio_mpipe_iqueue_try_peek(&info->iqueue, &idesc) > 0)
  437. napi_schedule(&info->napi);
  438. /* ISSUE: Handle completions? */
  439. done:
  440. tile_net_provide_needed_buffers();
  441. return work;
  442. }
  443. /* Handle an ingress interrupt on the current cpu. */
  444. static irqreturn_t tile_net_handle_ingress_irq(int irq, void *unused)
  445. {
  446. struct tile_net_info *info = &__get_cpu_var(per_cpu_info);
  447. napi_schedule(&info->napi);
  448. return IRQ_HANDLED;
  449. }
  450. /* Free some completions. This must be called with interrupts blocked. */
  451. static int tile_net_free_comps(gxio_mpipe_equeue_t *equeue,
  452. struct tile_net_comps *comps,
  453. int limit, bool force_update)
  454. {
  455. int n = 0;
  456. while (comps->comp_last < comps->comp_next) {
  457. unsigned int cid = comps->comp_last % TILE_NET_MAX_COMPS;
  458. struct tile_net_comp *comp = &comps->comp_queue[cid];
  459. if (!gxio_mpipe_equeue_is_complete(equeue, comp->when,
  460. force_update || n == 0))
  461. break;
  462. dev_kfree_skb_irq(comp->skb);
  463. comps->comp_last++;
  464. if (++n == limit)
  465. break;
  466. }
  467. return n;
  468. }
  469. /* Add a completion. This must be called with interrupts blocked.
  470. * tile_net_equeue_try_reserve() will have ensured a free completion entry.
  471. */
  472. static void add_comp(gxio_mpipe_equeue_t *equeue,
  473. struct tile_net_comps *comps,
  474. uint64_t when, struct sk_buff *skb)
  475. {
  476. int cid = comps->comp_next % TILE_NET_MAX_COMPS;
  477. comps->comp_queue[cid].when = when;
  478. comps->comp_queue[cid].skb = skb;
  479. comps->comp_next++;
  480. }
  481. static void tile_net_schedule_tx_wake_timer(struct net_device *dev,
  482. int tx_queue_idx)
  483. {
  484. struct tile_net_info *info = &per_cpu(per_cpu_info, tx_queue_idx);
  485. struct tile_net_priv *priv = netdev_priv(dev);
  486. struct tile_net_tx_wake *tx_wake = &info->tx_wake[priv->echannel];
  487. hrtimer_start(&tx_wake->timer,
  488. ktime_set(0, TX_TIMER_DELAY_USEC * 1000UL),
  489. HRTIMER_MODE_REL_PINNED);
  490. }
  491. static enum hrtimer_restart tile_net_handle_tx_wake_timer(struct hrtimer *t)
  492. {
  493. struct tile_net_tx_wake *tx_wake =
  494. container_of(t, struct tile_net_tx_wake, timer);
  495. netif_wake_subqueue(tx_wake->dev, tx_wake->tx_queue_idx);
  496. return HRTIMER_NORESTART;
  497. }
  498. /* Make sure the egress timer is scheduled. */
  499. static void tile_net_schedule_egress_timer(void)
  500. {
  501. struct tile_net_info *info = &__get_cpu_var(per_cpu_info);
  502. if (!info->egress_timer_scheduled) {
  503. hrtimer_start(&info->egress_timer,
  504. ktime_set(0, EGRESS_TIMER_DELAY_USEC * 1000UL),
  505. HRTIMER_MODE_REL_PINNED);
  506. info->egress_timer_scheduled = true;
  507. }
  508. }
  509. /* The "function" for "info->egress_timer".
  510. *
  511. * This timer will reschedule itself as long as there are any pending
  512. * completions expected for this tile.
  513. */
  514. static enum hrtimer_restart tile_net_handle_egress_timer(struct hrtimer *t)
  515. {
  516. struct tile_net_info *info = &__get_cpu_var(per_cpu_info);
  517. unsigned long irqflags;
  518. bool pending = false;
  519. int i;
  520. local_irq_save(irqflags);
  521. /* The timer is no longer scheduled. */
  522. info->egress_timer_scheduled = false;
  523. /* Free all possible comps for this tile. */
  524. for (i = 0; i < TILE_NET_CHANNELS; i++) {
  525. struct tile_net_egress *egress = &egress_for_echannel[i];
  526. struct tile_net_comps *comps = info->comps_for_echannel[i];
  527. if (comps->comp_last >= comps->comp_next)
  528. continue;
  529. tile_net_free_comps(egress->equeue, comps, -1, true);
  530. pending = pending || (comps->comp_last < comps->comp_next);
  531. }
  532. /* Reschedule timer if needed. */
  533. if (pending)
  534. tile_net_schedule_egress_timer();
  535. local_irq_restore(irqflags);
  536. return HRTIMER_NORESTART;
  537. }
  538. /* Helper function for "tile_net_update()".
  539. * "dev" (i.e. arg) is the device being brought up or down,
  540. * or NULL if all devices are now down.
  541. */
  542. static void tile_net_update_cpu(void *arg)
  543. {
  544. struct tile_net_info *info = &__get_cpu_var(per_cpu_info);
  545. struct net_device *dev = arg;
  546. if (!info->has_iqueue)
  547. return;
  548. if (dev != NULL) {
  549. if (!info->napi_added) {
  550. netif_napi_add(dev, &info->napi,
  551. tile_net_poll, TILE_NET_WEIGHT);
  552. info->napi_added = true;
  553. }
  554. if (!info->napi_enabled) {
  555. napi_enable(&info->napi);
  556. info->napi_enabled = true;
  557. }
  558. enable_percpu_irq(ingress_irq, 0);
  559. } else {
  560. disable_percpu_irq(ingress_irq);
  561. if (info->napi_enabled) {
  562. napi_disable(&info->napi);
  563. info->napi_enabled = false;
  564. }
  565. /* FIXME: Drain the iqueue. */
  566. }
  567. }
  568. /* Helper function for tile_net_open() and tile_net_stop().
  569. * Always called under tile_net_devs_for_channel_mutex.
  570. */
  571. static int tile_net_update(struct net_device *dev)
  572. {
  573. static gxio_mpipe_rules_t rules; /* too big to fit on the stack */
  574. bool saw_channel = false;
  575. int channel;
  576. int rc;
  577. int cpu;
  578. gxio_mpipe_rules_init(&rules, &context);
  579. for (channel = 0; channel < TILE_NET_CHANNELS; channel++) {
  580. if (tile_net_devs_for_channel[channel] == NULL)
  581. continue;
  582. if (!saw_channel) {
  583. saw_channel = true;
  584. gxio_mpipe_rules_begin(&rules, first_bucket,
  585. num_buckets, NULL);
  586. gxio_mpipe_rules_set_headroom(&rules, NET_IP_ALIGN);
  587. }
  588. gxio_mpipe_rules_add_channel(&rules, channel);
  589. }
  590. /* NOTE: This can fail if there is no classifier.
  591. * ISSUE: Can anything else cause it to fail?
  592. */
  593. rc = gxio_mpipe_rules_commit(&rules);
  594. if (rc != 0) {
  595. netdev_warn(dev, "gxio_mpipe_rules_commit failed: %d\n", rc);
  596. return -EIO;
  597. }
  598. /* Update all cpus, sequentially (to protect "netif_napi_add()"). */
  599. for_each_online_cpu(cpu)
  600. smp_call_function_single(cpu, tile_net_update_cpu,
  601. (saw_channel ? dev : NULL), 1);
  602. /* HACK: Allow packets to flow in the simulator. */
  603. if (saw_channel)
  604. sim_enable_mpipe_links(0, -1);
  605. return 0;
  606. }
  607. /* Allocate and initialize mpipe buffer stacks, and register them in
  608. * the mPIPE TLBs, for both small and large packet sizes.
  609. * This routine supports tile_net_init_mpipe(), below.
  610. */
  611. static int init_buffer_stacks(struct net_device *dev, int num_buffers)
  612. {
  613. pte_t hash_pte = pte_set_home((pte_t) { 0 }, PAGE_HOME_HASH);
  614. int rc;
  615. /* Compute stack bytes; we round up to 64KB and then use
  616. * alloc_pages() so we get the required 64KB alignment as well.
  617. */
  618. buffer_stack_size =
  619. ALIGN(gxio_mpipe_calc_buffer_stack_bytes(num_buffers),
  620. 64 * 1024);
  621. /* Allocate two buffer stack indices. */
  622. rc = gxio_mpipe_alloc_buffer_stacks(&context, 2, 0, 0);
  623. if (rc < 0) {
  624. netdev_err(dev, "gxio_mpipe_alloc_buffer_stacks failed: %d\n",
  625. rc);
  626. return rc;
  627. }
  628. small_buffer_stack = rc;
  629. large_buffer_stack = rc + 1;
  630. /* Allocate the small memory stack. */
  631. small_buffer_stack_va =
  632. alloc_pages_exact(buffer_stack_size, GFP_KERNEL);
  633. if (small_buffer_stack_va == NULL) {
  634. netdev_err(dev,
  635. "Could not alloc %zd bytes for buffer stacks\n",
  636. buffer_stack_size);
  637. return -ENOMEM;
  638. }
  639. rc = gxio_mpipe_init_buffer_stack(&context, small_buffer_stack,
  640. BUFFER_SIZE_SMALL_ENUM,
  641. small_buffer_stack_va,
  642. buffer_stack_size, 0);
  643. if (rc != 0) {
  644. netdev_err(dev, "gxio_mpipe_init_buffer_stack: %d\n", rc);
  645. return rc;
  646. }
  647. rc = gxio_mpipe_register_client_memory(&context, small_buffer_stack,
  648. hash_pte, 0);
  649. if (rc != 0) {
  650. netdev_err(dev,
  651. "gxio_mpipe_register_buffer_memory failed: %d\n",
  652. rc);
  653. return rc;
  654. }
  655. /* Allocate the large buffer stack. */
  656. large_buffer_stack_va =
  657. alloc_pages_exact(buffer_stack_size, GFP_KERNEL);
  658. if (large_buffer_stack_va == NULL) {
  659. netdev_err(dev,
  660. "Could not alloc %zd bytes for buffer stacks\n",
  661. buffer_stack_size);
  662. return -ENOMEM;
  663. }
  664. rc = gxio_mpipe_init_buffer_stack(&context, large_buffer_stack,
  665. BUFFER_SIZE_LARGE_ENUM,
  666. large_buffer_stack_va,
  667. buffer_stack_size, 0);
  668. if (rc != 0) {
  669. netdev_err(dev, "gxio_mpipe_init_buffer_stack failed: %d\n",
  670. rc);
  671. return rc;
  672. }
  673. rc = gxio_mpipe_register_client_memory(&context, large_buffer_stack,
  674. hash_pte, 0);
  675. if (rc != 0) {
  676. netdev_err(dev,
  677. "gxio_mpipe_register_buffer_memory failed: %d\n",
  678. rc);
  679. return rc;
  680. }
  681. return 0;
  682. }
  683. /* Allocate per-cpu resources (memory for completions and idescs).
  684. * This routine supports tile_net_init_mpipe(), below.
  685. */
  686. static int alloc_percpu_mpipe_resources(struct net_device *dev,
  687. int cpu, int ring)
  688. {
  689. struct tile_net_info *info = &per_cpu(per_cpu_info, cpu);
  690. int order, i, rc;
  691. struct page *page;
  692. void *addr;
  693. /* Allocate the "comps". */
  694. order = get_order(COMPS_SIZE);
  695. page = homecache_alloc_pages(GFP_KERNEL, order, cpu);
  696. if (page == NULL) {
  697. netdev_err(dev, "Failed to alloc %zd bytes comps memory\n",
  698. COMPS_SIZE);
  699. return -ENOMEM;
  700. }
  701. addr = pfn_to_kaddr(page_to_pfn(page));
  702. memset(addr, 0, COMPS_SIZE);
  703. for (i = 0; i < TILE_NET_CHANNELS; i++)
  704. info->comps_for_echannel[i] =
  705. addr + i * sizeof(struct tile_net_comps);
  706. /* If this is a network cpu, create an iqueue. */
  707. if (cpu_isset(cpu, network_cpus_map)) {
  708. order = get_order(NOTIF_RING_SIZE);
  709. page = homecache_alloc_pages(GFP_KERNEL, order, cpu);
  710. if (page == NULL) {
  711. netdev_err(dev,
  712. "Failed to alloc %zd bytes iqueue memory\n",
  713. NOTIF_RING_SIZE);
  714. return -ENOMEM;
  715. }
  716. addr = pfn_to_kaddr(page_to_pfn(page));
  717. rc = gxio_mpipe_iqueue_init(&info->iqueue, &context, ring++,
  718. addr, NOTIF_RING_SIZE, 0);
  719. if (rc < 0) {
  720. netdev_err(dev,
  721. "gxio_mpipe_iqueue_init failed: %d\n", rc);
  722. return rc;
  723. }
  724. info->has_iqueue = true;
  725. }
  726. return ring;
  727. }
  728. /* Initialize NotifGroup and buckets.
  729. * This routine supports tile_net_init_mpipe(), below.
  730. */
  731. static int init_notif_group_and_buckets(struct net_device *dev,
  732. int ring, int network_cpus_count)
  733. {
  734. int group, rc;
  735. /* Allocate one NotifGroup. */
  736. rc = gxio_mpipe_alloc_notif_groups(&context, 1, 0, 0);
  737. if (rc < 0) {
  738. netdev_err(dev, "gxio_mpipe_alloc_notif_groups failed: %d\n",
  739. rc);
  740. return rc;
  741. }
  742. group = rc;
  743. /* Initialize global num_buckets value. */
  744. if (network_cpus_count > 4)
  745. num_buckets = 256;
  746. else if (network_cpus_count > 1)
  747. num_buckets = 16;
  748. /* Allocate some buckets, and set global first_bucket value. */
  749. rc = gxio_mpipe_alloc_buckets(&context, num_buckets, 0, 0);
  750. if (rc < 0) {
  751. netdev_err(dev, "gxio_mpipe_alloc_buckets failed: %d\n", rc);
  752. return rc;
  753. }
  754. first_bucket = rc;
  755. /* Init group and buckets. */
  756. rc = gxio_mpipe_init_notif_group_and_buckets(
  757. &context, group, ring, network_cpus_count,
  758. first_bucket, num_buckets,
  759. GXIO_MPIPE_BUCKET_STICKY_FLOW_LOCALITY);
  760. if (rc != 0) {
  761. netdev_err(
  762. dev,
  763. "gxio_mpipe_init_notif_group_and_buckets failed: %d\n",
  764. rc);
  765. return rc;
  766. }
  767. return 0;
  768. }
  769. /* Create an irq and register it, then activate the irq and request
  770. * interrupts on all cores. Note that "ingress_irq" being initialized
  771. * is how we know not to call tile_net_init_mpipe() again.
  772. * This routine supports tile_net_init_mpipe(), below.
  773. */
  774. static int tile_net_setup_interrupts(struct net_device *dev)
  775. {
  776. int cpu, rc;
  777. rc = create_irq();
  778. if (rc < 0) {
  779. netdev_err(dev, "create_irq failed: %d\n", rc);
  780. return rc;
  781. }
  782. ingress_irq = rc;
  783. tile_irq_activate(ingress_irq, TILE_IRQ_PERCPU);
  784. rc = request_irq(ingress_irq, tile_net_handle_ingress_irq,
  785. 0, "tile_net", NULL);
  786. if (rc != 0) {
  787. netdev_err(dev, "request_irq failed: %d\n", rc);
  788. destroy_irq(ingress_irq);
  789. ingress_irq = -1;
  790. return rc;
  791. }
  792. for_each_online_cpu(cpu) {
  793. struct tile_net_info *info = &per_cpu(per_cpu_info, cpu);
  794. if (info->has_iqueue) {
  795. gxio_mpipe_request_notif_ring_interrupt(
  796. &context, cpu_x(cpu), cpu_y(cpu),
  797. KERNEL_PL, ingress_irq, info->iqueue.ring);
  798. }
  799. }
  800. return 0;
  801. }
  802. /* Undo any state set up partially by a failed call to tile_net_init_mpipe. */
  803. static void tile_net_init_mpipe_fail(void)
  804. {
  805. int cpu;
  806. /* Do cleanups that require the mpipe context first. */
  807. if (small_buffer_stack >= 0)
  808. tile_net_pop_all_buffers(small_buffer_stack);
  809. if (large_buffer_stack >= 0)
  810. tile_net_pop_all_buffers(large_buffer_stack);
  811. /* Destroy mpipe context so the hardware no longer owns any memory. */
  812. gxio_mpipe_destroy(&context);
  813. for_each_online_cpu(cpu) {
  814. struct tile_net_info *info = &per_cpu(per_cpu_info, cpu);
  815. free_pages((unsigned long)(info->comps_for_echannel[0]),
  816. get_order(COMPS_SIZE));
  817. info->comps_for_echannel[0] = NULL;
  818. free_pages((unsigned long)(info->iqueue.idescs),
  819. get_order(NOTIF_RING_SIZE));
  820. info->iqueue.idescs = NULL;
  821. }
  822. if (small_buffer_stack_va)
  823. free_pages_exact(small_buffer_stack_va, buffer_stack_size);
  824. if (large_buffer_stack_va)
  825. free_pages_exact(large_buffer_stack_va, buffer_stack_size);
  826. small_buffer_stack_va = NULL;
  827. large_buffer_stack_va = NULL;
  828. large_buffer_stack = -1;
  829. small_buffer_stack = -1;
  830. first_bucket = -1;
  831. }
  832. /* The first time any tilegx network device is opened, we initialize
  833. * the global mpipe state. If this step fails, we fail to open the
  834. * device, but if it succeeds, we never need to do it again, and since
  835. * tile_net can't be unloaded, we never undo it.
  836. *
  837. * Note that some resources in this path (buffer stack indices,
  838. * bindings from init_buffer_stack, etc.) are hypervisor resources
  839. * that are freed implicitly by gxio_mpipe_destroy().
  840. */
  841. static int tile_net_init_mpipe(struct net_device *dev)
  842. {
  843. int i, num_buffers, rc;
  844. int cpu;
  845. int first_ring, ring;
  846. int network_cpus_count = cpus_weight(network_cpus_map);
  847. if (!hash_default) {
  848. netdev_err(dev, "Networking requires hash_default!\n");
  849. return -EIO;
  850. }
  851. rc = gxio_mpipe_init(&context, 0);
  852. if (rc != 0) {
  853. netdev_err(dev, "gxio_mpipe_init failed: %d\n", rc);
  854. return -EIO;
  855. }
  856. /* Set up the buffer stacks. */
  857. num_buffers =
  858. network_cpus_count * (IQUEUE_ENTRIES + TILE_NET_BATCH);
  859. rc = init_buffer_stacks(dev, num_buffers);
  860. if (rc != 0)
  861. goto fail;
  862. /* Provide initial buffers. */
  863. rc = -ENOMEM;
  864. for (i = 0; i < num_buffers; i++) {
  865. if (!tile_net_provide_buffer(true)) {
  866. netdev_err(dev, "Cannot allocate initial sk_bufs!\n");
  867. goto fail;
  868. }
  869. }
  870. for (i = 0; i < num_buffers; i++) {
  871. if (!tile_net_provide_buffer(false)) {
  872. netdev_err(dev, "Cannot allocate initial sk_bufs!\n");
  873. goto fail;
  874. }
  875. }
  876. /* Allocate one NotifRing for each network cpu. */
  877. rc = gxio_mpipe_alloc_notif_rings(&context, network_cpus_count, 0, 0);
  878. if (rc < 0) {
  879. netdev_err(dev, "gxio_mpipe_alloc_notif_rings failed %d\n",
  880. rc);
  881. goto fail;
  882. }
  883. /* Init NotifRings per-cpu. */
  884. first_ring = rc;
  885. ring = first_ring;
  886. for_each_online_cpu(cpu) {
  887. rc = alloc_percpu_mpipe_resources(dev, cpu, ring);
  888. if (rc < 0)
  889. goto fail;
  890. ring = rc;
  891. }
  892. /* Initialize NotifGroup and buckets. */
  893. rc = init_notif_group_and_buckets(dev, first_ring, network_cpus_count);
  894. if (rc != 0)
  895. goto fail;
  896. /* Create and enable interrupts. */
  897. rc = tile_net_setup_interrupts(dev);
  898. if (rc != 0)
  899. goto fail;
  900. return 0;
  901. fail:
  902. tile_net_init_mpipe_fail();
  903. return rc;
  904. }
  905. /* Create persistent egress info for a given egress channel.
  906. * Note that this may be shared between, say, "gbe0" and "xgbe0".
  907. * ISSUE: Defer header allocation until TSO is actually needed?
  908. */
  909. static int tile_net_init_egress(struct net_device *dev, int echannel)
  910. {
  911. struct page *headers_page, *edescs_page, *equeue_page;
  912. gxio_mpipe_edesc_t *edescs;
  913. gxio_mpipe_equeue_t *equeue;
  914. unsigned char *headers;
  915. int headers_order, edescs_order, equeue_order;
  916. size_t edescs_size;
  917. int edma;
  918. int rc = -ENOMEM;
  919. /* Only initialize once. */
  920. if (egress_for_echannel[echannel].equeue != NULL)
  921. return 0;
  922. /* Allocate memory for the "headers". */
  923. headers_order = get_order(EQUEUE_ENTRIES * HEADER_BYTES);
  924. headers_page = alloc_pages(GFP_KERNEL, headers_order);
  925. if (headers_page == NULL) {
  926. netdev_warn(dev,
  927. "Could not alloc %zd bytes for TSO headers.\n",
  928. PAGE_SIZE << headers_order);
  929. goto fail;
  930. }
  931. headers = pfn_to_kaddr(page_to_pfn(headers_page));
  932. /* Allocate memory for the "edescs". */
  933. edescs_size = EQUEUE_ENTRIES * sizeof(*edescs);
  934. edescs_order = get_order(edescs_size);
  935. edescs_page = alloc_pages(GFP_KERNEL, edescs_order);
  936. if (edescs_page == NULL) {
  937. netdev_warn(dev,
  938. "Could not alloc %zd bytes for eDMA ring.\n",
  939. edescs_size);
  940. goto fail_headers;
  941. }
  942. edescs = pfn_to_kaddr(page_to_pfn(edescs_page));
  943. /* Allocate memory for the "equeue". */
  944. equeue_order = get_order(sizeof(*equeue));
  945. equeue_page = alloc_pages(GFP_KERNEL, equeue_order);
  946. if (equeue_page == NULL) {
  947. netdev_warn(dev,
  948. "Could not alloc %zd bytes for equeue info.\n",
  949. PAGE_SIZE << equeue_order);
  950. goto fail_edescs;
  951. }
  952. equeue = pfn_to_kaddr(page_to_pfn(equeue_page));
  953. /* Allocate an edma ring. Note that in practice this can't
  954. * fail, which is good, because we will leak an edma ring if so.
  955. */
  956. rc = gxio_mpipe_alloc_edma_rings(&context, 1, 0, 0);
  957. if (rc < 0) {
  958. netdev_warn(dev, "gxio_mpipe_alloc_edma_rings failed: %d\n",
  959. rc);
  960. goto fail_equeue;
  961. }
  962. edma = rc;
  963. /* Initialize the equeue. */
  964. rc = gxio_mpipe_equeue_init(equeue, &context, edma, echannel,
  965. edescs, edescs_size, 0);
  966. if (rc != 0) {
  967. netdev_err(dev, "gxio_mpipe_equeue_init failed: %d\n", rc);
  968. goto fail_equeue;
  969. }
  970. /* Done. */
  971. egress_for_echannel[echannel].equeue = equeue;
  972. egress_for_echannel[echannel].headers = headers;
  973. return 0;
  974. fail_equeue:
  975. __free_pages(equeue_page, equeue_order);
  976. fail_edescs:
  977. __free_pages(edescs_page, edescs_order);
  978. fail_headers:
  979. __free_pages(headers_page, headers_order);
  980. fail:
  981. return rc;
  982. }
  983. /* Return channel number for a newly-opened link. */
  984. static int tile_net_link_open(struct net_device *dev, gxio_mpipe_link_t *link,
  985. const char *link_name)
  986. {
  987. int rc = gxio_mpipe_link_open(link, &context, link_name, 0);
  988. if (rc < 0) {
  989. netdev_err(dev, "Failed to open '%s'\n", link_name);
  990. return rc;
  991. }
  992. rc = gxio_mpipe_link_channel(link);
  993. if (rc < 0 || rc >= TILE_NET_CHANNELS) {
  994. netdev_err(dev, "gxio_mpipe_link_channel bad value: %d\n", rc);
  995. gxio_mpipe_link_close(link);
  996. return -EINVAL;
  997. }
  998. return rc;
  999. }
  1000. /* Help the kernel activate the given network interface. */
  1001. static int tile_net_open(struct net_device *dev)
  1002. {
  1003. struct tile_net_priv *priv = netdev_priv(dev);
  1004. int cpu, rc;
  1005. mutex_lock(&tile_net_devs_for_channel_mutex);
  1006. /* Do one-time initialization the first time any device is opened. */
  1007. if (ingress_irq < 0) {
  1008. rc = tile_net_init_mpipe(dev);
  1009. if (rc != 0)
  1010. goto fail;
  1011. }
  1012. /* Determine if this is the "loopify" device. */
  1013. if (unlikely((loopify_link_name != NULL) &&
  1014. !strcmp(dev->name, loopify_link_name))) {
  1015. rc = tile_net_link_open(dev, &priv->link, "loop0");
  1016. if (rc < 0)
  1017. goto fail;
  1018. priv->channel = rc;
  1019. rc = tile_net_link_open(dev, &priv->loopify_link, "loop1");
  1020. if (rc < 0)
  1021. goto fail;
  1022. priv->loopify_channel = rc;
  1023. priv->echannel = rc;
  1024. } else {
  1025. rc = tile_net_link_open(dev, &priv->link, dev->name);
  1026. if (rc < 0)
  1027. goto fail;
  1028. priv->channel = rc;
  1029. priv->echannel = rc;
  1030. }
  1031. /* Initialize egress info (if needed). Once ever, per echannel. */
  1032. rc = tile_net_init_egress(dev, priv->echannel);
  1033. if (rc != 0)
  1034. goto fail;
  1035. tile_net_devs_for_channel[priv->channel] = dev;
  1036. rc = tile_net_update(dev);
  1037. if (rc != 0)
  1038. goto fail;
  1039. mutex_unlock(&tile_net_devs_for_channel_mutex);
  1040. /* Initialize the transmit wake timer for this device for each cpu. */
  1041. for_each_online_cpu(cpu) {
  1042. struct tile_net_info *info = &per_cpu(per_cpu_info, cpu);
  1043. struct tile_net_tx_wake *tx_wake =
  1044. &info->tx_wake[priv->echannel];
  1045. hrtimer_init(&tx_wake->timer, CLOCK_MONOTONIC,
  1046. HRTIMER_MODE_REL);
  1047. tx_wake->tx_queue_idx = cpu;
  1048. tx_wake->timer.function = tile_net_handle_tx_wake_timer;
  1049. tx_wake->dev = dev;
  1050. }
  1051. for_each_online_cpu(cpu)
  1052. netif_start_subqueue(dev, cpu);
  1053. netif_carrier_on(dev);
  1054. return 0;
  1055. fail:
  1056. if (priv->loopify_channel >= 0) {
  1057. if (gxio_mpipe_link_close(&priv->loopify_link) != 0)
  1058. netdev_warn(dev, "Failed to close loopify link!\n");
  1059. priv->loopify_channel = -1;
  1060. }
  1061. if (priv->channel >= 0) {
  1062. if (gxio_mpipe_link_close(&priv->link) != 0)
  1063. netdev_warn(dev, "Failed to close link!\n");
  1064. priv->channel = -1;
  1065. }
  1066. priv->echannel = -1;
  1067. tile_net_devs_for_channel[priv->channel] = NULL;
  1068. mutex_unlock(&tile_net_devs_for_channel_mutex);
  1069. /* Don't return raw gxio error codes to generic Linux. */
  1070. return (rc > -512) ? rc : -EIO;
  1071. }
  1072. /* Help the kernel deactivate the given network interface. */
  1073. static int tile_net_stop(struct net_device *dev)
  1074. {
  1075. struct tile_net_priv *priv = netdev_priv(dev);
  1076. int cpu;
  1077. for_each_online_cpu(cpu) {
  1078. struct tile_net_info *info = &per_cpu(per_cpu_info, cpu);
  1079. struct tile_net_tx_wake *tx_wake =
  1080. &info->tx_wake[priv->echannel];
  1081. hrtimer_cancel(&tx_wake->timer);
  1082. netif_stop_subqueue(dev, cpu);
  1083. }
  1084. mutex_lock(&tile_net_devs_for_channel_mutex);
  1085. tile_net_devs_for_channel[priv->channel] = NULL;
  1086. (void)tile_net_update(dev);
  1087. if (priv->loopify_channel >= 0) {
  1088. if (gxio_mpipe_link_close(&priv->loopify_link) != 0)
  1089. netdev_warn(dev, "Failed to close loopify link!\n");
  1090. priv->loopify_channel = -1;
  1091. }
  1092. if (priv->channel >= 0) {
  1093. if (gxio_mpipe_link_close(&priv->link) != 0)
  1094. netdev_warn(dev, "Failed to close link!\n");
  1095. priv->channel = -1;
  1096. }
  1097. priv->echannel = -1;
  1098. mutex_unlock(&tile_net_devs_for_channel_mutex);
  1099. return 0;
  1100. }
  1101. /* Determine the VA for a fragment. */
  1102. static inline void *tile_net_frag_buf(skb_frag_t *f)
  1103. {
  1104. unsigned long pfn = page_to_pfn(skb_frag_page(f));
  1105. return pfn_to_kaddr(pfn) + f->page_offset;
  1106. }
  1107. /* Acquire a completion entry and an egress slot, or if we can't,
  1108. * stop the queue and schedule the tx_wake timer.
  1109. */
  1110. static s64 tile_net_equeue_try_reserve(struct net_device *dev,
  1111. int tx_queue_idx,
  1112. struct tile_net_comps *comps,
  1113. gxio_mpipe_equeue_t *equeue,
  1114. int num_edescs)
  1115. {
  1116. /* Try to acquire a completion entry. */
  1117. if (comps->comp_next - comps->comp_last < TILE_NET_MAX_COMPS - 1 ||
  1118. tile_net_free_comps(equeue, comps, 32, false) != 0) {
  1119. /* Try to acquire an egress slot. */
  1120. s64 slot = gxio_mpipe_equeue_try_reserve(equeue, num_edescs);
  1121. if (slot >= 0)
  1122. return slot;
  1123. /* Freeing some completions gives the equeue time to drain. */
  1124. tile_net_free_comps(equeue, comps, TILE_NET_MAX_COMPS, false);
  1125. slot = gxio_mpipe_equeue_try_reserve(equeue, num_edescs);
  1126. if (slot >= 0)
  1127. return slot;
  1128. }
  1129. /* Still nothing; give up and stop the queue for a short while. */
  1130. netif_stop_subqueue(dev, tx_queue_idx);
  1131. tile_net_schedule_tx_wake_timer(dev, tx_queue_idx);
  1132. return -1;
  1133. }
  1134. /* Determine how many edesc's are needed for TSO.
  1135. *
  1136. * Sometimes, if "sendfile()" requires copying, we will be called with
  1137. * "data" containing the header and payload, with "frags" being empty.
  1138. * Sometimes, for example when using NFS over TCP, a single segment can
  1139. * span 3 fragments. This requires special care.
  1140. */
  1141. static int tso_count_edescs(struct sk_buff *skb)
  1142. {
  1143. struct skb_shared_info *sh = skb_shinfo(skb);
  1144. unsigned int sh_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1145. unsigned int data_len = skb->len - sh_len;
  1146. unsigned int p_len = sh->gso_size;
  1147. long f_id = -1; /* id of the current fragment */
  1148. long f_size = skb_headlen(skb) - sh_len; /* current fragment size */
  1149. long f_used = 0; /* bytes used from the current fragment */
  1150. long n; /* size of the current piece of payload */
  1151. int num_edescs = 0;
  1152. int segment;
  1153. for (segment = 0; segment < sh->gso_segs; segment++) {
  1154. unsigned int p_used = 0;
  1155. /* One edesc for header and for each piece of the payload. */
  1156. for (num_edescs++; p_used < p_len; num_edescs++) {
  1157. /* Advance as needed. */
  1158. while (f_used >= f_size) {
  1159. f_id++;
  1160. f_size = skb_frag_size(&sh->frags[f_id]);
  1161. f_used = 0;
  1162. }
  1163. /* Use bytes from the current fragment. */
  1164. n = p_len - p_used;
  1165. if (n > f_size - f_used)
  1166. n = f_size - f_used;
  1167. f_used += n;
  1168. p_used += n;
  1169. }
  1170. /* The last segment may be less than gso_size. */
  1171. data_len -= p_len;
  1172. if (data_len < p_len)
  1173. p_len = data_len;
  1174. }
  1175. return num_edescs;
  1176. }
  1177. /* Prepare modified copies of the skbuff headers.
  1178. * FIXME: add support for IPv6.
  1179. */
  1180. static void tso_headers_prepare(struct sk_buff *skb, unsigned char *headers,
  1181. s64 slot)
  1182. {
  1183. struct skb_shared_info *sh = skb_shinfo(skb);
  1184. struct iphdr *ih;
  1185. struct tcphdr *th;
  1186. unsigned int sh_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1187. unsigned int data_len = skb->len - sh_len;
  1188. unsigned char *data = skb->data;
  1189. unsigned int ih_off, th_off, p_len;
  1190. unsigned int isum_seed, tsum_seed, id, seq;
  1191. long f_id = -1; /* id of the current fragment */
  1192. long f_size = skb_headlen(skb) - sh_len; /* current fragment size */
  1193. long f_used = 0; /* bytes used from the current fragment */
  1194. long n; /* size of the current piece of payload */
  1195. int segment;
  1196. /* Locate original headers and compute various lengths. */
  1197. ih = ip_hdr(skb);
  1198. th = tcp_hdr(skb);
  1199. ih_off = skb_network_offset(skb);
  1200. th_off = skb_transport_offset(skb);
  1201. p_len = sh->gso_size;
  1202. /* Set up seed values for IP and TCP csum and initialize id and seq. */
  1203. isum_seed = ((0xFFFF - ih->check) +
  1204. (0xFFFF - ih->tot_len) +
  1205. (0xFFFF - ih->id));
  1206. tsum_seed = th->check + (0xFFFF ^ htons(skb->len));
  1207. id = ntohs(ih->id);
  1208. seq = ntohl(th->seq);
  1209. /* Prepare all the headers. */
  1210. for (segment = 0; segment < sh->gso_segs; segment++) {
  1211. unsigned char *buf;
  1212. unsigned int p_used = 0;
  1213. /* Copy to the header memory for this segment. */
  1214. buf = headers + (slot % EQUEUE_ENTRIES) * HEADER_BYTES +
  1215. NET_IP_ALIGN;
  1216. memcpy(buf, data, sh_len);
  1217. /* Update copied ip header. */
  1218. ih = (struct iphdr *)(buf + ih_off);
  1219. ih->tot_len = htons(sh_len + p_len - ih_off);
  1220. ih->id = htons(id);
  1221. ih->check = csum_long(isum_seed + ih->tot_len +
  1222. ih->id) ^ 0xffff;
  1223. /* Update copied tcp header. */
  1224. th = (struct tcphdr *)(buf + th_off);
  1225. th->seq = htonl(seq);
  1226. th->check = csum_long(tsum_seed + htons(sh_len + p_len));
  1227. if (segment != sh->gso_segs - 1) {
  1228. th->fin = 0;
  1229. th->psh = 0;
  1230. }
  1231. /* Skip past the header. */
  1232. slot++;
  1233. /* Skip past the payload. */
  1234. while (p_used < p_len) {
  1235. /* Advance as needed. */
  1236. while (f_used >= f_size) {
  1237. f_id++;
  1238. f_size = skb_frag_size(&sh->frags[f_id]);
  1239. f_used = 0;
  1240. }
  1241. /* Use bytes from the current fragment. */
  1242. n = p_len - p_used;
  1243. if (n > f_size - f_used)
  1244. n = f_size - f_used;
  1245. f_used += n;
  1246. p_used += n;
  1247. slot++;
  1248. }
  1249. id++;
  1250. seq += p_len;
  1251. /* The last segment may be less than gso_size. */
  1252. data_len -= p_len;
  1253. if (data_len < p_len)
  1254. p_len = data_len;
  1255. }
  1256. /* Flush the headers so they are ready for hardware DMA. */
  1257. wmb();
  1258. }
  1259. /* Pass all the data to mpipe for egress. */
  1260. static void tso_egress(struct net_device *dev, gxio_mpipe_equeue_t *equeue,
  1261. struct sk_buff *skb, unsigned char *headers, s64 slot)
  1262. {
  1263. struct tile_net_priv *priv = netdev_priv(dev);
  1264. struct skb_shared_info *sh = skb_shinfo(skb);
  1265. unsigned int sh_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1266. unsigned int data_len = skb->len - sh_len;
  1267. unsigned int p_len = sh->gso_size;
  1268. gxio_mpipe_edesc_t edesc_head = { { 0 } };
  1269. gxio_mpipe_edesc_t edesc_body = { { 0 } };
  1270. long f_id = -1; /* id of the current fragment */
  1271. long f_size = skb_headlen(skb) - sh_len; /* current fragment size */
  1272. long f_used = 0; /* bytes used from the current fragment */
  1273. void *f_data = skb->data + sh_len;
  1274. long n; /* size of the current piece of payload */
  1275. unsigned long tx_packets = 0, tx_bytes = 0;
  1276. unsigned int csum_start;
  1277. int segment;
  1278. /* Prepare to egress the headers: set up header edesc. */
  1279. csum_start = skb_checksum_start_offset(skb);
  1280. edesc_head.csum = 1;
  1281. edesc_head.csum_start = csum_start;
  1282. edesc_head.csum_dest = csum_start + skb->csum_offset;
  1283. edesc_head.xfer_size = sh_len;
  1284. /* This is only used to specify the TLB. */
  1285. edesc_head.stack_idx = large_buffer_stack;
  1286. edesc_body.stack_idx = large_buffer_stack;
  1287. /* Egress all the edescs. */
  1288. for (segment = 0; segment < sh->gso_segs; segment++) {
  1289. unsigned char *buf;
  1290. unsigned int p_used = 0;
  1291. /* Egress the header. */
  1292. buf = headers + (slot % EQUEUE_ENTRIES) * HEADER_BYTES +
  1293. NET_IP_ALIGN;
  1294. edesc_head.va = va_to_tile_io_addr(buf);
  1295. gxio_mpipe_equeue_put_at(equeue, edesc_head, slot);
  1296. slot++;
  1297. /* Egress the payload. */
  1298. while (p_used < p_len) {
  1299. void *va;
  1300. /* Advance as needed. */
  1301. while (f_used >= f_size) {
  1302. f_id++;
  1303. f_size = skb_frag_size(&sh->frags[f_id]);
  1304. f_data = tile_net_frag_buf(&sh->frags[f_id]);
  1305. f_used = 0;
  1306. }
  1307. va = f_data + f_used;
  1308. /* Use bytes from the current fragment. */
  1309. n = p_len - p_used;
  1310. if (n > f_size - f_used)
  1311. n = f_size - f_used;
  1312. f_used += n;
  1313. p_used += n;
  1314. /* Egress a piece of the payload. */
  1315. edesc_body.va = va_to_tile_io_addr(va);
  1316. edesc_body.xfer_size = n;
  1317. edesc_body.bound = !(p_used < p_len);
  1318. gxio_mpipe_equeue_put_at(equeue, edesc_body, slot);
  1319. slot++;
  1320. }
  1321. tx_packets++;
  1322. tx_bytes += sh_len + p_len;
  1323. /* The last segment may be less than gso_size. */
  1324. data_len -= p_len;
  1325. if (data_len < p_len)
  1326. p_len = data_len;
  1327. }
  1328. /* Update stats. */
  1329. tile_net_stats_add(tx_packets, &priv->stats.tx_packets);
  1330. tile_net_stats_add(tx_bytes, &priv->stats.tx_bytes);
  1331. }
  1332. /* Do "TSO" handling for egress.
  1333. *
  1334. * Normally drivers set NETIF_F_TSO only to support hardware TSO;
  1335. * otherwise the stack uses scatter-gather to implement GSO in software.
  1336. * On our testing, enabling GSO support (via NETIF_F_SG) drops network
  1337. * performance down to around 7.5 Gbps on the 10G interfaces, although
  1338. * also dropping cpu utilization way down, to under 8%. But
  1339. * implementing "TSO" in the driver brings performance back up to line
  1340. * rate, while dropping cpu usage even further, to less than 4%. In
  1341. * practice, profiling of GSO shows that skb_segment() is what causes
  1342. * the performance overheads; we benefit in the driver from using
  1343. * preallocated memory to duplicate the TCP/IP headers.
  1344. */
  1345. static int tile_net_tx_tso(struct sk_buff *skb, struct net_device *dev)
  1346. {
  1347. struct tile_net_info *info = &__get_cpu_var(per_cpu_info);
  1348. struct tile_net_priv *priv = netdev_priv(dev);
  1349. int channel = priv->echannel;
  1350. struct tile_net_egress *egress = &egress_for_echannel[channel];
  1351. struct tile_net_comps *comps = info->comps_for_echannel[channel];
  1352. gxio_mpipe_equeue_t *equeue = egress->equeue;
  1353. unsigned long irqflags;
  1354. int num_edescs;
  1355. s64 slot;
  1356. /* Determine how many mpipe edesc's are needed. */
  1357. num_edescs = tso_count_edescs(skb);
  1358. local_irq_save(irqflags);
  1359. /* Try to acquire a completion entry and an egress slot. */
  1360. slot = tile_net_equeue_try_reserve(dev, skb->queue_mapping, comps,
  1361. equeue, num_edescs);
  1362. if (slot < 0) {
  1363. local_irq_restore(irqflags);
  1364. return NETDEV_TX_BUSY;
  1365. }
  1366. /* Set up copies of header data properly. */
  1367. tso_headers_prepare(skb, egress->headers, slot);
  1368. /* Actually pass the data to the network hardware. */
  1369. tso_egress(dev, equeue, skb, egress->headers, slot);
  1370. /* Add a completion record. */
  1371. add_comp(equeue, comps, slot + num_edescs - 1, skb);
  1372. local_irq_restore(irqflags);
  1373. /* Make sure the egress timer is scheduled. */
  1374. tile_net_schedule_egress_timer();
  1375. return NETDEV_TX_OK;
  1376. }
  1377. /* Analyze the body and frags for a transmit request. */
  1378. static unsigned int tile_net_tx_frags(struct frag *frags,
  1379. struct sk_buff *skb,
  1380. void *b_data, unsigned int b_len)
  1381. {
  1382. unsigned int i, n = 0;
  1383. struct skb_shared_info *sh = skb_shinfo(skb);
  1384. if (b_len != 0) {
  1385. frags[n].buf = b_data;
  1386. frags[n++].length = b_len;
  1387. }
  1388. for (i = 0; i < sh->nr_frags; i++) {
  1389. skb_frag_t *f = &sh->frags[i];
  1390. frags[n].buf = tile_net_frag_buf(f);
  1391. frags[n++].length = skb_frag_size(f);
  1392. }
  1393. return n;
  1394. }
  1395. /* Help the kernel transmit a packet. */
  1396. static int tile_net_tx(struct sk_buff *skb, struct net_device *dev)
  1397. {
  1398. struct tile_net_info *info = &__get_cpu_var(per_cpu_info);
  1399. struct tile_net_priv *priv = netdev_priv(dev);
  1400. struct tile_net_egress *egress = &egress_for_echannel[priv->echannel];
  1401. gxio_mpipe_equeue_t *equeue = egress->equeue;
  1402. struct tile_net_comps *comps =
  1403. info->comps_for_echannel[priv->echannel];
  1404. unsigned int len = skb->len;
  1405. unsigned char *data = skb->data;
  1406. unsigned int num_edescs;
  1407. struct frag frags[MAX_FRAGS];
  1408. gxio_mpipe_edesc_t edescs[MAX_FRAGS];
  1409. unsigned long irqflags;
  1410. gxio_mpipe_edesc_t edesc = { { 0 } };
  1411. unsigned int i;
  1412. s64 slot;
  1413. if (skb_is_gso(skb))
  1414. return tile_net_tx_tso(skb, dev);
  1415. num_edescs = tile_net_tx_frags(frags, skb, data, skb_headlen(skb));
  1416. /* This is only used to specify the TLB. */
  1417. edesc.stack_idx = large_buffer_stack;
  1418. /* Prepare the edescs. */
  1419. for (i = 0; i < num_edescs; i++) {
  1420. edesc.xfer_size = frags[i].length;
  1421. edesc.va = va_to_tile_io_addr(frags[i].buf);
  1422. edescs[i] = edesc;
  1423. }
  1424. /* Mark the final edesc. */
  1425. edescs[num_edescs - 1].bound = 1;
  1426. /* Add checksum info to the initial edesc, if needed. */
  1427. if (skb->ip_summed == CHECKSUM_PARTIAL) {
  1428. unsigned int csum_start = skb_checksum_start_offset(skb);
  1429. edescs[0].csum = 1;
  1430. edescs[0].csum_start = csum_start;
  1431. edescs[0].csum_dest = csum_start + skb->csum_offset;
  1432. }
  1433. local_irq_save(irqflags);
  1434. /* Try to acquire a completion entry and an egress slot. */
  1435. slot = tile_net_equeue_try_reserve(dev, skb->queue_mapping, comps,
  1436. equeue, num_edescs);
  1437. if (slot < 0) {
  1438. local_irq_restore(irqflags);
  1439. return NETDEV_TX_BUSY;
  1440. }
  1441. for (i = 0; i < num_edescs; i++)
  1442. gxio_mpipe_equeue_put_at(equeue, edescs[i], slot++);
  1443. /* Add a completion record. */
  1444. add_comp(equeue, comps, slot - 1, skb);
  1445. /* NOTE: Use ETH_ZLEN for short packets (e.g. 42 < 60). */
  1446. tile_net_stats_add(1, &priv->stats.tx_packets);
  1447. tile_net_stats_add(max_t(unsigned int, len, ETH_ZLEN),
  1448. &priv->stats.tx_bytes);
  1449. local_irq_restore(irqflags);
  1450. /* Make sure the egress timer is scheduled. */
  1451. tile_net_schedule_egress_timer();
  1452. return NETDEV_TX_OK;
  1453. }
  1454. /* Return subqueue id on this core (one per core). */
  1455. static u16 tile_net_select_queue(struct net_device *dev, struct sk_buff *skb)
  1456. {
  1457. return smp_processor_id();
  1458. }
  1459. /* Deal with a transmit timeout. */
  1460. static void tile_net_tx_timeout(struct net_device *dev)
  1461. {
  1462. int cpu;
  1463. for_each_online_cpu(cpu)
  1464. netif_wake_subqueue(dev, cpu);
  1465. }
  1466. /* Ioctl commands. */
  1467. static int tile_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1468. {
  1469. return -EOPNOTSUPP;
  1470. }
  1471. /* Get system network statistics for device. */
  1472. static struct net_device_stats *tile_net_get_stats(struct net_device *dev)
  1473. {
  1474. struct tile_net_priv *priv = netdev_priv(dev);
  1475. return &priv->stats;
  1476. }
  1477. /* Change the MTU. */
  1478. static int tile_net_change_mtu(struct net_device *dev, int new_mtu)
  1479. {
  1480. if ((new_mtu < 68) || (new_mtu > 1500))
  1481. return -EINVAL;
  1482. dev->mtu = new_mtu;
  1483. return 0;
  1484. }
  1485. /* Change the Ethernet address of the NIC.
  1486. *
  1487. * The hypervisor driver does not support changing MAC address. However,
  1488. * the hardware does not do anything with the MAC address, so the address
  1489. * which gets used on outgoing packets, and which is accepted on incoming
  1490. * packets, is completely up to us.
  1491. *
  1492. * Returns 0 on success, negative on failure.
  1493. */
  1494. static int tile_net_set_mac_address(struct net_device *dev, void *p)
  1495. {
  1496. struct sockaddr *addr = p;
  1497. if (!is_valid_ether_addr(addr->sa_data))
  1498. return -EINVAL;
  1499. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  1500. return 0;
  1501. }
  1502. #ifdef CONFIG_NET_POLL_CONTROLLER
  1503. /* Polling 'interrupt' - used by things like netconsole to send skbs
  1504. * without having to re-enable interrupts. It's not called while
  1505. * the interrupt routine is executing.
  1506. */
  1507. static void tile_net_netpoll(struct net_device *dev)
  1508. {
  1509. disable_percpu_irq(ingress_irq);
  1510. tile_net_handle_ingress_irq(ingress_irq, NULL);
  1511. enable_percpu_irq(ingress_irq, 0);
  1512. }
  1513. #endif
  1514. static const struct net_device_ops tile_net_ops = {
  1515. .ndo_open = tile_net_open,
  1516. .ndo_stop = tile_net_stop,
  1517. .ndo_start_xmit = tile_net_tx,
  1518. .ndo_select_queue = tile_net_select_queue,
  1519. .ndo_do_ioctl = tile_net_ioctl,
  1520. .ndo_get_stats = tile_net_get_stats,
  1521. .ndo_change_mtu = tile_net_change_mtu,
  1522. .ndo_tx_timeout = tile_net_tx_timeout,
  1523. .ndo_set_mac_address = tile_net_set_mac_address,
  1524. #ifdef CONFIG_NET_POLL_CONTROLLER
  1525. .ndo_poll_controller = tile_net_netpoll,
  1526. #endif
  1527. };
  1528. /* The setup function.
  1529. *
  1530. * This uses ether_setup() to assign various fields in dev, including
  1531. * setting IFF_BROADCAST and IFF_MULTICAST, then sets some extra fields.
  1532. */
  1533. static void tile_net_setup(struct net_device *dev)
  1534. {
  1535. ether_setup(dev);
  1536. dev->netdev_ops = &tile_net_ops;
  1537. dev->watchdog_timeo = TILE_NET_TIMEOUT;
  1538. dev->features |= NETIF_F_LLTX;
  1539. dev->features |= NETIF_F_HW_CSUM;
  1540. dev->features |= NETIF_F_SG;
  1541. dev->features |= NETIF_F_TSO;
  1542. dev->mtu = 1500;
  1543. }
  1544. /* Allocate the device structure, register the device, and obtain the
  1545. * MAC address from the hypervisor.
  1546. */
  1547. static void tile_net_dev_init(const char *name, const uint8_t *mac)
  1548. {
  1549. int ret;
  1550. int i;
  1551. int nz_addr = 0;
  1552. struct net_device *dev;
  1553. struct tile_net_priv *priv;
  1554. /* HACK: Ignore "loop" links. */
  1555. if (strncmp(name, "loop", 4) == 0)
  1556. return;
  1557. /* Allocate the device structure. Normally, "name" is a
  1558. * template, instantiated by register_netdev(), but not for us.
  1559. */
  1560. dev = alloc_netdev_mqs(sizeof(*priv), name, tile_net_setup,
  1561. NR_CPUS, 1);
  1562. if (!dev) {
  1563. pr_err("alloc_netdev_mqs(%s) failed\n", name);
  1564. return;
  1565. }
  1566. /* Initialize "priv". */
  1567. priv = netdev_priv(dev);
  1568. memset(priv, 0, sizeof(*priv));
  1569. priv->dev = dev;
  1570. priv->channel = -1;
  1571. priv->loopify_channel = -1;
  1572. priv->echannel = -1;
  1573. /* Get the MAC address and set it in the device struct; this must
  1574. * be done before the device is opened. If the MAC is all zeroes,
  1575. * we use a random address, since we're probably on the simulator.
  1576. */
  1577. for (i = 0; i < 6; i++)
  1578. nz_addr |= mac[i];
  1579. if (nz_addr) {
  1580. memcpy(dev->dev_addr, mac, 6);
  1581. dev->addr_len = 6;
  1582. } else {
  1583. eth_hw_addr_random(dev);
  1584. }
  1585. /* Register the network device. */
  1586. ret = register_netdev(dev);
  1587. if (ret) {
  1588. netdev_err(dev, "register_netdev failed %d\n", ret);
  1589. free_netdev(dev);
  1590. return;
  1591. }
  1592. }
  1593. /* Per-cpu module initialization. */
  1594. static void tile_net_init_module_percpu(void *unused)
  1595. {
  1596. struct tile_net_info *info = &__get_cpu_var(per_cpu_info);
  1597. int my_cpu = smp_processor_id();
  1598. info->has_iqueue = false;
  1599. info->my_cpu = my_cpu;
  1600. /* Initialize the egress timer. */
  1601. hrtimer_init(&info->egress_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  1602. info->egress_timer.function = tile_net_handle_egress_timer;
  1603. }
  1604. /* Module initialization. */
  1605. static int __init tile_net_init_module(void)
  1606. {
  1607. int i;
  1608. char name[GXIO_MPIPE_LINK_NAME_LEN];
  1609. uint8_t mac[6];
  1610. pr_info("Tilera Network Driver\n");
  1611. mutex_init(&tile_net_devs_for_channel_mutex);
  1612. /* Initialize each CPU. */
  1613. on_each_cpu(tile_net_init_module_percpu, NULL, 1);
  1614. /* Find out what devices we have, and initialize them. */
  1615. for (i = 0; gxio_mpipe_link_enumerate_mac(i, name, mac) >= 0; i++)
  1616. tile_net_dev_init(name, mac);
  1617. if (!network_cpus_init())
  1618. network_cpus_map = *cpu_online_mask;
  1619. return 0;
  1620. }
  1621. module_init(tile_net_init_module);