at91_ether.c 12 KB

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  1. /*
  2. * Ethernet driver for the Atmel AT91RM9200 (Thunder)
  3. *
  4. * Copyright (C) 2003 SAN People (Pty) Ltd
  5. *
  6. * Based on an earlier Atmel EMAC macrocell driver by Atmel and Lineo Inc.
  7. * Initial version by Rick Bronson 01/11/2003
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/init.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/netdevice.h>
  18. #include <linux/etherdevice.h>
  19. #include <linux/skbuff.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/ethtool.h>
  22. #include <linux/platform_data/macb.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/clk.h>
  25. #include <linux/gfp.h>
  26. #include <linux/phy.h>
  27. #include <linux/io.h>
  28. #include <linux/of.h>
  29. #include <linux/of_device.h>
  30. #include <linux/of_net.h>
  31. #include <linux/pinctrl/consumer.h>
  32. #include "macb.h"
  33. /* 1518 rounded up */
  34. #define MAX_RBUFF_SZ 0x600
  35. /* max number of receive buffers */
  36. #define MAX_RX_DESCR 9
  37. /* Initialize and start the Receiver and Transmit subsystems */
  38. static int at91ether_start(struct net_device *dev)
  39. {
  40. struct macb *lp = netdev_priv(dev);
  41. dma_addr_t addr;
  42. u32 ctl;
  43. int i;
  44. lp->rx_ring = dma_alloc_coherent(&lp->pdev->dev,
  45. (MAX_RX_DESCR *
  46. sizeof(struct macb_dma_desc)),
  47. &lp->rx_ring_dma, GFP_KERNEL);
  48. if (!lp->rx_ring)
  49. return -ENOMEM;
  50. lp->rx_buffers = dma_alloc_coherent(&lp->pdev->dev,
  51. MAX_RX_DESCR * MAX_RBUFF_SZ,
  52. &lp->rx_buffers_dma, GFP_KERNEL);
  53. if (!lp->rx_buffers) {
  54. dma_free_coherent(&lp->pdev->dev,
  55. MAX_RX_DESCR * sizeof(struct macb_dma_desc),
  56. lp->rx_ring, lp->rx_ring_dma);
  57. lp->rx_ring = NULL;
  58. return -ENOMEM;
  59. }
  60. addr = lp->rx_buffers_dma;
  61. for (i = 0; i < MAX_RX_DESCR; i++) {
  62. lp->rx_ring[i].addr = addr;
  63. lp->rx_ring[i].ctrl = 0;
  64. addr += MAX_RBUFF_SZ;
  65. }
  66. /* Set the Wrap bit on the last descriptor */
  67. lp->rx_ring[MAX_RX_DESCR - 1].addr |= MACB_BIT(RX_WRAP);
  68. /* Reset buffer index */
  69. lp->rx_tail = 0;
  70. /* Program address of descriptor list in Rx Buffer Queue register */
  71. macb_writel(lp, RBQP, lp->rx_ring_dma);
  72. /* Enable Receive and Transmit */
  73. ctl = macb_readl(lp, NCR);
  74. macb_writel(lp, NCR, ctl | MACB_BIT(RE) | MACB_BIT(TE));
  75. return 0;
  76. }
  77. /* Open the ethernet interface */
  78. static int at91ether_open(struct net_device *dev)
  79. {
  80. struct macb *lp = netdev_priv(dev);
  81. u32 ctl;
  82. int ret;
  83. /* Clear internal statistics */
  84. ctl = macb_readl(lp, NCR);
  85. macb_writel(lp, NCR, ctl | MACB_BIT(CLRSTAT));
  86. macb_set_hwaddr(lp);
  87. ret = at91ether_start(dev);
  88. if (ret)
  89. return ret;
  90. /* Enable MAC interrupts */
  91. macb_writel(lp, IER, MACB_BIT(RCOMP) |
  92. MACB_BIT(RXUBR) |
  93. MACB_BIT(ISR_TUND) |
  94. MACB_BIT(ISR_RLE) |
  95. MACB_BIT(TCOMP) |
  96. MACB_BIT(ISR_ROVR) |
  97. MACB_BIT(HRESP));
  98. /* schedule a link state check */
  99. phy_start(lp->phy_dev);
  100. netif_start_queue(dev);
  101. return 0;
  102. }
  103. /* Close the interface */
  104. static int at91ether_close(struct net_device *dev)
  105. {
  106. struct macb *lp = netdev_priv(dev);
  107. u32 ctl;
  108. /* Disable Receiver and Transmitter */
  109. ctl = macb_readl(lp, NCR);
  110. macb_writel(lp, NCR, ctl & ~(MACB_BIT(TE) | MACB_BIT(RE)));
  111. /* Disable MAC interrupts */
  112. macb_writel(lp, IDR, MACB_BIT(RCOMP) |
  113. MACB_BIT(RXUBR) |
  114. MACB_BIT(ISR_TUND) |
  115. MACB_BIT(ISR_RLE) |
  116. MACB_BIT(TCOMP) |
  117. MACB_BIT(ISR_ROVR) |
  118. MACB_BIT(HRESP));
  119. netif_stop_queue(dev);
  120. dma_free_coherent(&lp->pdev->dev,
  121. MAX_RX_DESCR * sizeof(struct macb_dma_desc),
  122. lp->rx_ring, lp->rx_ring_dma);
  123. lp->rx_ring = NULL;
  124. dma_free_coherent(&lp->pdev->dev,
  125. MAX_RX_DESCR * MAX_RBUFF_SZ,
  126. lp->rx_buffers, lp->rx_buffers_dma);
  127. lp->rx_buffers = NULL;
  128. return 0;
  129. }
  130. /* Transmit packet */
  131. static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev)
  132. {
  133. struct macb *lp = netdev_priv(dev);
  134. if (macb_readl(lp, TSR) & MACB_BIT(RM9200_BNQ)) {
  135. netif_stop_queue(dev);
  136. /* Store packet information (to free when Tx completed) */
  137. lp->skb = skb;
  138. lp->skb_length = skb->len;
  139. lp->skb_physaddr = dma_map_single(NULL, skb->data, skb->len,
  140. DMA_TO_DEVICE);
  141. /* Set address of the data in the Transmit Address register */
  142. macb_writel(lp, TAR, lp->skb_physaddr);
  143. /* Set length of the packet in the Transmit Control register */
  144. macb_writel(lp, TCR, skb->len);
  145. } else {
  146. netdev_err(dev, "%s called, but device is busy!\n", __func__);
  147. return NETDEV_TX_BUSY;
  148. }
  149. return NETDEV_TX_OK;
  150. }
  151. /* Extract received frame from buffer descriptors and sent to upper layers.
  152. * (Called from interrupt context)
  153. */
  154. static void at91ether_rx(struct net_device *dev)
  155. {
  156. struct macb *lp = netdev_priv(dev);
  157. unsigned char *p_recv;
  158. struct sk_buff *skb;
  159. unsigned int pktlen;
  160. while (lp->rx_ring[lp->rx_tail].addr & MACB_BIT(RX_USED)) {
  161. p_recv = lp->rx_buffers + lp->rx_tail * MAX_RBUFF_SZ;
  162. pktlen = MACB_BF(RX_FRMLEN, lp->rx_ring[lp->rx_tail].ctrl);
  163. skb = netdev_alloc_skb(dev, pktlen + 2);
  164. if (skb) {
  165. skb_reserve(skb, 2);
  166. memcpy(skb_put(skb, pktlen), p_recv, pktlen);
  167. skb->protocol = eth_type_trans(skb, dev);
  168. lp->stats.rx_packets++;
  169. lp->stats.rx_bytes += pktlen;
  170. netif_rx(skb);
  171. } else {
  172. lp->stats.rx_dropped++;
  173. }
  174. if (lp->rx_ring[lp->rx_tail].ctrl & MACB_BIT(RX_MHASH_MATCH))
  175. lp->stats.multicast++;
  176. /* reset ownership bit */
  177. lp->rx_ring[lp->rx_tail].addr &= ~MACB_BIT(RX_USED);
  178. /* wrap after last buffer */
  179. if (lp->rx_tail == MAX_RX_DESCR - 1)
  180. lp->rx_tail = 0;
  181. else
  182. lp->rx_tail++;
  183. }
  184. }
  185. /* MAC interrupt handler */
  186. static irqreturn_t at91ether_interrupt(int irq, void *dev_id)
  187. {
  188. struct net_device *dev = dev_id;
  189. struct macb *lp = netdev_priv(dev);
  190. u32 intstatus, ctl;
  191. /* MAC Interrupt Status register indicates what interrupts are pending.
  192. * It is automatically cleared once read.
  193. */
  194. intstatus = macb_readl(lp, ISR);
  195. /* Receive complete */
  196. if (intstatus & MACB_BIT(RCOMP))
  197. at91ether_rx(dev);
  198. /* Transmit complete */
  199. if (intstatus & MACB_BIT(TCOMP)) {
  200. /* The TCOM bit is set even if the transmission failed */
  201. if (intstatus & (MACB_BIT(ISR_TUND) | MACB_BIT(ISR_RLE)))
  202. lp->stats.tx_errors++;
  203. if (lp->skb) {
  204. dev_kfree_skb_irq(lp->skb);
  205. lp->skb = NULL;
  206. dma_unmap_single(NULL, lp->skb_physaddr, lp->skb_length, DMA_TO_DEVICE);
  207. lp->stats.tx_packets++;
  208. lp->stats.tx_bytes += lp->skb_length;
  209. }
  210. netif_wake_queue(dev);
  211. }
  212. /* Work-around for EMAC Errata section 41.3.1 */
  213. if (intstatus & MACB_BIT(RXUBR)) {
  214. ctl = macb_readl(lp, NCR);
  215. macb_writel(lp, NCR, ctl & ~MACB_BIT(RE));
  216. macb_writel(lp, NCR, ctl | MACB_BIT(RE));
  217. }
  218. if (intstatus & MACB_BIT(ISR_ROVR))
  219. netdev_err(dev, "ROVR error\n");
  220. return IRQ_HANDLED;
  221. }
  222. #ifdef CONFIG_NET_POLL_CONTROLLER
  223. static void at91ether_poll_controller(struct net_device *dev)
  224. {
  225. unsigned long flags;
  226. local_irq_save(flags);
  227. at91ether_interrupt(dev->irq, dev);
  228. local_irq_restore(flags);
  229. }
  230. #endif
  231. static const struct net_device_ops at91ether_netdev_ops = {
  232. .ndo_open = at91ether_open,
  233. .ndo_stop = at91ether_close,
  234. .ndo_start_xmit = at91ether_start_xmit,
  235. .ndo_get_stats = macb_get_stats,
  236. .ndo_set_rx_mode = macb_set_rx_mode,
  237. .ndo_set_mac_address = eth_mac_addr,
  238. .ndo_do_ioctl = macb_ioctl,
  239. .ndo_validate_addr = eth_validate_addr,
  240. .ndo_change_mtu = eth_change_mtu,
  241. #ifdef CONFIG_NET_POLL_CONTROLLER
  242. .ndo_poll_controller = at91ether_poll_controller,
  243. #endif
  244. };
  245. #if defined(CONFIG_OF)
  246. static const struct of_device_id at91ether_dt_ids[] = {
  247. { .compatible = "cdns,at91rm9200-emac" },
  248. { .compatible = "cdns,emac" },
  249. { /* sentinel */ }
  250. };
  251. MODULE_DEVICE_TABLE(of, at91ether_dt_ids);
  252. #endif
  253. /* Detect MAC & PHY and perform ethernet interface initialization */
  254. static int __init at91ether_probe(struct platform_device *pdev)
  255. {
  256. struct macb_platform_data *board_data = pdev->dev.platform_data;
  257. struct resource *regs;
  258. struct net_device *dev;
  259. struct phy_device *phydev;
  260. struct pinctrl *pinctrl;
  261. struct macb *lp;
  262. int res;
  263. u32 reg;
  264. const char *mac;
  265. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  266. if (!regs)
  267. return -ENOENT;
  268. pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
  269. if (IS_ERR(pinctrl)) {
  270. res = PTR_ERR(pinctrl);
  271. if (res == -EPROBE_DEFER)
  272. return res;
  273. dev_warn(&pdev->dev, "No pinctrl provided\n");
  274. }
  275. dev = alloc_etherdev(sizeof(struct macb));
  276. if (!dev)
  277. return -ENOMEM;
  278. lp = netdev_priv(dev);
  279. lp->pdev = pdev;
  280. lp->dev = dev;
  281. spin_lock_init(&lp->lock);
  282. /* physical base address */
  283. dev->base_addr = regs->start;
  284. lp->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs));
  285. if (!lp->regs) {
  286. res = -ENOMEM;
  287. goto err_free_dev;
  288. }
  289. /* Clock */
  290. lp->pclk = devm_clk_get(&pdev->dev, "ether_clk");
  291. if (IS_ERR(lp->pclk)) {
  292. res = PTR_ERR(lp->pclk);
  293. goto err_free_dev;
  294. }
  295. clk_enable(lp->pclk);
  296. /* Install the interrupt handler */
  297. dev->irq = platform_get_irq(pdev, 0);
  298. res = devm_request_irq(&pdev->dev, dev->irq, at91ether_interrupt, 0, dev->name, dev);
  299. if (res)
  300. goto err_disable_clock;
  301. ether_setup(dev);
  302. dev->netdev_ops = &at91ether_netdev_ops;
  303. dev->ethtool_ops = &macb_ethtool_ops;
  304. platform_set_drvdata(pdev, dev);
  305. SET_NETDEV_DEV(dev, &pdev->dev);
  306. mac = of_get_mac_address(pdev->dev.of_node);
  307. if (mac)
  308. memcpy(lp->dev->dev_addr, mac, ETH_ALEN);
  309. else
  310. macb_get_hwaddr(lp);
  311. res = of_get_phy_mode(pdev->dev.of_node);
  312. if (res < 0) {
  313. if (board_data && board_data->is_rmii)
  314. lp->phy_interface = PHY_INTERFACE_MODE_RMII;
  315. else
  316. lp->phy_interface = PHY_INTERFACE_MODE_MII;
  317. } else {
  318. lp->phy_interface = res;
  319. }
  320. macb_writel(lp, NCR, 0);
  321. reg = MACB_BF(CLK, MACB_CLK_DIV32) | MACB_BIT(BIG);
  322. if (lp->phy_interface == PHY_INTERFACE_MODE_RMII)
  323. reg |= MACB_BIT(RM9200_RMII);
  324. macb_writel(lp, NCFGR, reg);
  325. /* Register the network interface */
  326. res = register_netdev(dev);
  327. if (res)
  328. goto err_disable_clock;
  329. res = macb_mii_init(lp);
  330. if (res)
  331. goto err_out_unregister_netdev;
  332. /* will be enabled in open() */
  333. netif_carrier_off(dev);
  334. phydev = lp->phy_dev;
  335. netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
  336. phydev->drv->name, dev_name(&phydev->dev),
  337. phydev->irq);
  338. /* Display ethernet banner */
  339. netdev_info(dev, "AT91 ethernet at 0x%08lx int=%d (%pM)\n",
  340. dev->base_addr, dev->irq, dev->dev_addr);
  341. return 0;
  342. err_out_unregister_netdev:
  343. unregister_netdev(dev);
  344. err_disable_clock:
  345. clk_disable(lp->pclk);
  346. err_free_dev:
  347. free_netdev(dev);
  348. return res;
  349. }
  350. static int at91ether_remove(struct platform_device *pdev)
  351. {
  352. struct net_device *dev = platform_get_drvdata(pdev);
  353. struct macb *lp = netdev_priv(dev);
  354. if (lp->phy_dev)
  355. phy_disconnect(lp->phy_dev);
  356. mdiobus_unregister(lp->mii_bus);
  357. kfree(lp->mii_bus->irq);
  358. mdiobus_free(lp->mii_bus);
  359. unregister_netdev(dev);
  360. clk_disable(lp->pclk);
  361. free_netdev(dev);
  362. platform_set_drvdata(pdev, NULL);
  363. return 0;
  364. }
  365. #ifdef CONFIG_PM
  366. static int at91ether_suspend(struct platform_device *pdev, pm_message_t mesg)
  367. {
  368. struct net_device *net_dev = platform_get_drvdata(pdev);
  369. struct macb *lp = netdev_priv(net_dev);
  370. if (netif_running(net_dev)) {
  371. netif_stop_queue(net_dev);
  372. netif_device_detach(net_dev);
  373. clk_disable(lp->pclk);
  374. }
  375. return 0;
  376. }
  377. static int at91ether_resume(struct platform_device *pdev)
  378. {
  379. struct net_device *net_dev = platform_get_drvdata(pdev);
  380. struct macb *lp = netdev_priv(net_dev);
  381. if (netif_running(net_dev)) {
  382. clk_enable(lp->pclk);
  383. netif_device_attach(net_dev);
  384. netif_start_queue(net_dev);
  385. }
  386. return 0;
  387. }
  388. #else
  389. #define at91ether_suspend NULL
  390. #define at91ether_resume NULL
  391. #endif
  392. static struct platform_driver at91ether_driver = {
  393. .remove = at91ether_remove,
  394. .suspend = at91ether_suspend,
  395. .resume = at91ether_resume,
  396. .driver = {
  397. .name = "at91_ether",
  398. .owner = THIS_MODULE,
  399. .of_match_table = of_match_ptr(at91ether_dt_ids),
  400. },
  401. };
  402. module_platform_driver_probe(at91ether_driver, at91ether_probe);
  403. MODULE_LICENSE("GPL");
  404. MODULE_DESCRIPTION("AT91RM9200 EMAC Ethernet driver");
  405. MODULE_AUTHOR("Andrew Victor");
  406. MODULE_ALIAS("platform:at91_ether");