storcenter.dts 3.0 KB

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  1. /*
  2. * Device Tree Source for IOMEGA StorCenter
  3. *
  4. * Copyright 2007 Oyvind Repvik
  5. * Copyright 2007 Jon Loeliger
  6. *
  7. * Based on the Kurobox DTS by G. Liakhovetski <g.liakhovetski@gmx.de>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. / {
  14. model = "StorCenter";
  15. compatible = "storcenter";
  16. #address-cells = <1>;
  17. #size-cells = <1>;
  18. aliases {
  19. serial0 = &serial0;
  20. serial1 = &serial1;
  21. pci0 = &pci0;
  22. };
  23. cpus {
  24. #address-cells = <1>;
  25. #size-cells = <0>;
  26. PowerPC,8241@0 {
  27. device_type = "cpu";
  28. reg = <0>;
  29. clock-frequency = <d# 200000000>; /* Hz */
  30. timebase-frequency = <d# 25000000>; /* Hz */
  31. bus-frequency = <0>; /* from bootwrapper */
  32. i-cache-line-size = <d# 32>; /* bytes */
  33. d-cache-line-size = <d# 32>; /* bytes */
  34. i-cache-size = <4000>;
  35. d-cache-size = <4000>;
  36. };
  37. };
  38. memory {
  39. device_type = "memory";
  40. reg = <00000000 04000000>; /* 64MB @ 0x0 */
  41. };
  42. soc@fc000000 {
  43. #address-cells = <1>;
  44. #size-cells = <1>;
  45. device_type = "soc";
  46. compatible = "fsl,mpc8241", "mpc10x";
  47. store-gathering = <0>; /* 0 == off, !0 == on */
  48. ranges = <0 fc000000 100000>;
  49. reg = <fc000000 100000>; /* EUMB */
  50. bus-frequency = <0>; /* fixed by loader */
  51. i2c@3000 {
  52. #address-cells = <1>;
  53. #size-cells = <0>;
  54. compatible = "fsl-i2c";
  55. reg = <3000 100>;
  56. interrupts = <5 2>;
  57. interrupt-parent = <&mpic>;
  58. rtc@68 {
  59. compatible = "dallas,ds1337";
  60. reg = <68>;
  61. };
  62. };
  63. serial0: serial@4500 {
  64. cell-index = <0>;
  65. device_type = "serial";
  66. compatible = "ns16550";
  67. reg = <4500 20>;
  68. clock-frequency = <d# 97553800>; /* Hz */
  69. current-speed = <d# 115200>;
  70. interrupts = <9 2>;
  71. interrupt-parent = <&mpic>;
  72. };
  73. serial1: serial@4600 {
  74. cell-index = <1>;
  75. device_type = "serial";
  76. compatible = "ns16550";
  77. reg = <4600 20>;
  78. clock-frequency = <d# 97553800>; /* Hz */
  79. current-speed = <d# 9600>;
  80. interrupts = <a 2>;
  81. interrupt-parent = <&mpic>;
  82. };
  83. mpic: interrupt-controller@40000 {
  84. #interrupt-cells = <2>;
  85. device_type = "open-pic";
  86. compatible = "chrp,open-pic";
  87. interrupt-controller;
  88. reg = <40000 40000>;
  89. };
  90. };
  91. pci0: pci@fe800000 {
  92. #address-cells = <3>;
  93. #size-cells = <2>;
  94. #interrupt-cells = <1>;
  95. device_type = "pci";
  96. compatible = "mpc10x-pci";
  97. reg = <fe800000 1000>;
  98. ranges = <01000000 0 0 fe000000 0 00c00000
  99. 02000000 0 80000000 80000000 0 70000000>;
  100. bus-range = <0 ff>;
  101. clock-frequency = <d# 97553800>; /* Hz */
  102. interrupt-parent = <&mpic>;
  103. interrupt-map-mask = <f800 0 0 7>;
  104. interrupt-map = <
  105. /* IDSEL 13 - IDE */
  106. 6800 0 0 1 &mpic 0 1
  107. 6800 0 0 2 &mpic 0 1
  108. 6800 0 0 3 &mpic 0 1
  109. /* IDSEL 14 - USB */
  110. 7000 0 0 1 &mpic 0 1
  111. 7000 0 0 2 &mpic 0 1
  112. 7000 0 0 3 &mpic 0 1
  113. 7000 0 0 4 &mpic 0 1
  114. /* IDSEL 15 - ETH */
  115. 7800 0 0 1 &mpic 0 1
  116. 7800 0 0 2 &mpic 0 1
  117. 7800 0 0 3 &mpic 0 1
  118. 7800 0 0 4 &mpic 0 1
  119. >;
  120. };
  121. chosen {
  122. linux,stdout-path = "/soc/serial@4500";
  123. };
  124. };