proc.c 9.8 KB

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  1. /*
  2. * Procfs interface for the PCI bus.
  3. *
  4. * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
  5. */
  6. #include <linux/init.h>
  7. #include <linux/pci.h>
  8. #include <linux/module.h>
  9. #include <linux/proc_fs.h>
  10. #include <linux/seq_file.h>
  11. #include <linux/smp_lock.h>
  12. #include <linux/capability.h>
  13. #include <asm/uaccess.h>
  14. #include <asm/byteorder.h>
  15. #include "pci.h"
  16. static int proc_initialized; /* = 0 */
  17. static loff_t
  18. proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
  19. {
  20. loff_t new = -1;
  21. struct inode *inode = file->f_path.dentry->d_inode;
  22. mutex_lock(&inode->i_mutex);
  23. switch (whence) {
  24. case 0:
  25. new = off;
  26. break;
  27. case 1:
  28. new = file->f_pos + off;
  29. break;
  30. case 2:
  31. new = inode->i_size + off;
  32. break;
  33. }
  34. if (new < 0 || new > inode->i_size)
  35. new = -EINVAL;
  36. else
  37. file->f_pos = new;
  38. mutex_unlock(&inode->i_mutex);
  39. return new;
  40. }
  41. static ssize_t
  42. proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *ppos)
  43. {
  44. const struct inode *ino = file->f_path.dentry->d_inode;
  45. const struct proc_dir_entry *dp = PDE(ino);
  46. struct pci_dev *dev = dp->data;
  47. unsigned int pos = *ppos;
  48. unsigned int cnt, size;
  49. /*
  50. * Normal users can read only the standardized portion of the
  51. * configuration space as several chips lock up when trying to read
  52. * undefined locations (think of Intel PIIX4 as a typical example).
  53. */
  54. if (capable(CAP_SYS_ADMIN))
  55. size = dp->size;
  56. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  57. size = 128;
  58. else
  59. size = 64;
  60. if (pos >= size)
  61. return 0;
  62. if (nbytes >= size)
  63. nbytes = size;
  64. if (pos + nbytes > size)
  65. nbytes = size - pos;
  66. cnt = nbytes;
  67. if (!access_ok(VERIFY_WRITE, buf, cnt))
  68. return -EINVAL;
  69. if ((pos & 1) && cnt) {
  70. unsigned char val;
  71. pci_user_read_config_byte(dev, pos, &val);
  72. __put_user(val, buf);
  73. buf++;
  74. pos++;
  75. cnt--;
  76. }
  77. if ((pos & 3) && cnt > 2) {
  78. unsigned short val;
  79. pci_user_read_config_word(dev, pos, &val);
  80. __put_user(cpu_to_le16(val), (unsigned short __user *) buf);
  81. buf += 2;
  82. pos += 2;
  83. cnt -= 2;
  84. }
  85. while (cnt >= 4) {
  86. unsigned int val;
  87. pci_user_read_config_dword(dev, pos, &val);
  88. __put_user(cpu_to_le32(val), (unsigned int __user *) buf);
  89. buf += 4;
  90. pos += 4;
  91. cnt -= 4;
  92. }
  93. if (cnt >= 2) {
  94. unsigned short val;
  95. pci_user_read_config_word(dev, pos, &val);
  96. __put_user(cpu_to_le16(val), (unsigned short __user *) buf);
  97. buf += 2;
  98. pos += 2;
  99. cnt -= 2;
  100. }
  101. if (cnt) {
  102. unsigned char val;
  103. pci_user_read_config_byte(dev, pos, &val);
  104. __put_user(val, buf);
  105. buf++;
  106. pos++;
  107. cnt--;
  108. }
  109. *ppos = pos;
  110. return nbytes;
  111. }
  112. static ssize_t
  113. proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos)
  114. {
  115. struct inode *ino = file->f_path.dentry->d_inode;
  116. const struct proc_dir_entry *dp = PDE(ino);
  117. struct pci_dev *dev = dp->data;
  118. int pos = *ppos;
  119. int size = dp->size;
  120. int cnt;
  121. if (pos >= size)
  122. return 0;
  123. if (nbytes >= size)
  124. nbytes = size;
  125. if (pos + nbytes > size)
  126. nbytes = size - pos;
  127. cnt = nbytes;
  128. if (!access_ok(VERIFY_READ, buf, cnt))
  129. return -EINVAL;
  130. if ((pos & 1) && cnt) {
  131. unsigned char val;
  132. __get_user(val, buf);
  133. pci_user_write_config_byte(dev, pos, val);
  134. buf++;
  135. pos++;
  136. cnt--;
  137. }
  138. if ((pos & 3) && cnt > 2) {
  139. unsigned short val;
  140. __get_user(val, (unsigned short __user *) buf);
  141. pci_user_write_config_word(dev, pos, le16_to_cpu(val));
  142. buf += 2;
  143. pos += 2;
  144. cnt -= 2;
  145. }
  146. while (cnt >= 4) {
  147. unsigned int val;
  148. __get_user(val, (unsigned int __user *) buf);
  149. pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
  150. buf += 4;
  151. pos += 4;
  152. cnt -= 4;
  153. }
  154. if (cnt >= 2) {
  155. unsigned short val;
  156. __get_user(val, (unsigned short __user *) buf);
  157. pci_user_write_config_word(dev, pos, le16_to_cpu(val));
  158. buf += 2;
  159. pos += 2;
  160. cnt -= 2;
  161. }
  162. if (cnt) {
  163. unsigned char val;
  164. __get_user(val, buf);
  165. pci_user_write_config_byte(dev, pos, val);
  166. buf++;
  167. pos++;
  168. cnt--;
  169. }
  170. *ppos = pos;
  171. i_size_write(ino, dp->size);
  172. return nbytes;
  173. }
  174. struct pci_filp_private {
  175. enum pci_mmap_state mmap_state;
  176. int write_combine;
  177. };
  178. static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
  179. unsigned long arg)
  180. {
  181. const struct proc_dir_entry *dp = PDE(file->f_dentry->d_inode);
  182. struct pci_dev *dev = dp->data;
  183. #ifdef HAVE_PCI_MMAP
  184. struct pci_filp_private *fpriv = file->private_data;
  185. #endif /* HAVE_PCI_MMAP */
  186. int ret = 0;
  187. lock_kernel();
  188. switch (cmd) {
  189. case PCIIOC_CONTROLLER:
  190. ret = pci_domain_nr(dev->bus);
  191. break;
  192. #ifdef HAVE_PCI_MMAP
  193. case PCIIOC_MMAP_IS_IO:
  194. fpriv->mmap_state = pci_mmap_io;
  195. break;
  196. case PCIIOC_MMAP_IS_MEM:
  197. fpriv->mmap_state = pci_mmap_mem;
  198. break;
  199. case PCIIOC_WRITE_COMBINE:
  200. if (arg)
  201. fpriv->write_combine = 1;
  202. else
  203. fpriv->write_combine = 0;
  204. break;
  205. #endif /* HAVE_PCI_MMAP */
  206. default:
  207. ret = -EINVAL;
  208. break;
  209. };
  210. unlock_kernel();
  211. return ret;
  212. }
  213. #ifdef HAVE_PCI_MMAP
  214. static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
  215. {
  216. struct inode *inode = file->f_path.dentry->d_inode;
  217. const struct proc_dir_entry *dp = PDE(inode);
  218. struct pci_dev *dev = dp->data;
  219. struct pci_filp_private *fpriv = file->private_data;
  220. int ret;
  221. if (!capable(CAP_SYS_RAWIO))
  222. return -EPERM;
  223. ret = pci_mmap_page_range(dev, vma,
  224. fpriv->mmap_state,
  225. fpriv->write_combine);
  226. if (ret < 0)
  227. return ret;
  228. return 0;
  229. }
  230. static int proc_bus_pci_open(struct inode *inode, struct file *file)
  231. {
  232. struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
  233. if (!fpriv)
  234. return -ENOMEM;
  235. fpriv->mmap_state = pci_mmap_io;
  236. fpriv->write_combine = 0;
  237. file->private_data = fpriv;
  238. return 0;
  239. }
  240. static int proc_bus_pci_release(struct inode *inode, struct file *file)
  241. {
  242. kfree(file->private_data);
  243. file->private_data = NULL;
  244. return 0;
  245. }
  246. #endif /* HAVE_PCI_MMAP */
  247. static const struct file_operations proc_bus_pci_operations = {
  248. .owner = THIS_MODULE,
  249. .llseek = proc_bus_pci_lseek,
  250. .read = proc_bus_pci_read,
  251. .write = proc_bus_pci_write,
  252. .unlocked_ioctl = proc_bus_pci_ioctl,
  253. #ifdef HAVE_PCI_MMAP
  254. .open = proc_bus_pci_open,
  255. .release = proc_bus_pci_release,
  256. .mmap = proc_bus_pci_mmap,
  257. #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
  258. .get_unmapped_area = get_pci_unmapped_area,
  259. #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
  260. #endif /* HAVE_PCI_MMAP */
  261. };
  262. /* iterator */
  263. static void *pci_seq_start(struct seq_file *m, loff_t *pos)
  264. {
  265. struct pci_dev *dev = NULL;
  266. loff_t n = *pos;
  267. for_each_pci_dev(dev) {
  268. if (!n--)
  269. break;
  270. }
  271. return dev;
  272. }
  273. static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
  274. {
  275. struct pci_dev *dev = v;
  276. (*pos)++;
  277. dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
  278. return dev;
  279. }
  280. static void pci_seq_stop(struct seq_file *m, void *v)
  281. {
  282. if (v) {
  283. struct pci_dev *dev = v;
  284. pci_dev_put(dev);
  285. }
  286. }
  287. static int show_device(struct seq_file *m, void *v)
  288. {
  289. const struct pci_dev *dev = v;
  290. const struct pci_driver *drv;
  291. int i;
  292. if (dev == NULL)
  293. return 0;
  294. drv = pci_dev_driver(dev);
  295. seq_printf(m, "%02x%02x\t%04x%04x\t%x",
  296. dev->bus->number,
  297. dev->devfn,
  298. dev->vendor,
  299. dev->device,
  300. dev->irq);
  301. /* Here should be 7 and not PCI_NUM_RESOURCES as we need to preserve compatibility */
  302. for (i=0; i<7; i++) {
  303. resource_size_t start, end;
  304. pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
  305. seq_printf(m, "\t%16llx",
  306. (unsigned long long)(start |
  307. (dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
  308. }
  309. for (i=0; i<7; i++) {
  310. resource_size_t start, end;
  311. pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
  312. seq_printf(m, "\t%16llx",
  313. dev->resource[i].start < dev->resource[i].end ?
  314. (unsigned long long)(end - start) + 1 : 0);
  315. }
  316. seq_putc(m, '\t');
  317. if (drv)
  318. seq_printf(m, "%s", drv->name);
  319. seq_putc(m, '\n');
  320. return 0;
  321. }
  322. static const struct seq_operations proc_bus_pci_devices_op = {
  323. .start = pci_seq_start,
  324. .next = pci_seq_next,
  325. .stop = pci_seq_stop,
  326. .show = show_device
  327. };
  328. static struct proc_dir_entry *proc_bus_pci_dir;
  329. int pci_proc_attach_device(struct pci_dev *dev)
  330. {
  331. struct pci_bus *bus = dev->bus;
  332. struct proc_dir_entry *e;
  333. char name[16];
  334. if (!proc_initialized)
  335. return -EACCES;
  336. if (!bus->procdir) {
  337. if (pci_proc_domain(bus)) {
  338. sprintf(name, "%04x:%02x", pci_domain_nr(bus),
  339. bus->number);
  340. } else {
  341. sprintf(name, "%02x", bus->number);
  342. }
  343. bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
  344. if (!bus->procdir)
  345. return -ENOMEM;
  346. }
  347. sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  348. e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir,
  349. &proc_bus_pci_operations, dev);
  350. if (!e)
  351. return -ENOMEM;
  352. e->size = dev->cfg_size;
  353. dev->procent = e;
  354. return 0;
  355. }
  356. int pci_proc_detach_device(struct pci_dev *dev)
  357. {
  358. struct proc_dir_entry *e;
  359. if ((e = dev->procent)) {
  360. if (atomic_read(&e->count) > 1)
  361. return -EBUSY;
  362. remove_proc_entry(e->name, dev->bus->procdir);
  363. dev->procent = NULL;
  364. }
  365. return 0;
  366. }
  367. #if 0
  368. int pci_proc_attach_bus(struct pci_bus* bus)
  369. {
  370. struct proc_dir_entry *de = bus->procdir;
  371. if (!proc_initialized)
  372. return -EACCES;
  373. if (!de) {
  374. char name[16];
  375. sprintf(name, "%02x", bus->number);
  376. de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
  377. if (!de)
  378. return -ENOMEM;
  379. }
  380. return 0;
  381. }
  382. #endif /* 0 */
  383. int pci_proc_detach_bus(struct pci_bus* bus)
  384. {
  385. struct proc_dir_entry *de = bus->procdir;
  386. if (de)
  387. remove_proc_entry(de->name, proc_bus_pci_dir);
  388. return 0;
  389. }
  390. static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
  391. {
  392. return seq_open(file, &proc_bus_pci_devices_op);
  393. }
  394. static const struct file_operations proc_bus_pci_dev_operations = {
  395. .owner = THIS_MODULE,
  396. .open = proc_bus_pci_dev_open,
  397. .read = seq_read,
  398. .llseek = seq_lseek,
  399. .release = seq_release,
  400. };
  401. static int __init pci_proc_init(void)
  402. {
  403. struct pci_dev *dev = NULL;
  404. proc_bus_pci_dir = proc_mkdir("bus/pci", NULL);
  405. proc_create("devices", 0, proc_bus_pci_dir,
  406. &proc_bus_pci_dev_operations);
  407. proc_initialized = 1;
  408. while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
  409. pci_proc_attach_device(dev);
  410. }
  411. return 0;
  412. }
  413. device_initcall(pci_proc_init);