Kconfig 57 KB

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  1. config ARM
  2. bool
  3. default y
  4. select HAVE_AOUT
  5. select HAVE_DMA_API_DEBUG
  6. select HAVE_IDE
  7. select HAVE_MEMBLOCK
  8. select RTC_LIB
  9. select SYS_SUPPORTS_APM_EMULATION
  10. select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11. select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12. select HAVE_ARCH_KGDB
  13. select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
  14. select HAVE_KRETPROBES if (HAVE_KPROBES)
  15. select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16. select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17. select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18. select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19. select HAVE_GENERIC_DMA_COHERENT
  20. select HAVE_KERNEL_GZIP
  21. select HAVE_KERNEL_LZO
  22. select HAVE_KERNEL_LZMA
  23. select HAVE_IRQ_WORK
  24. select HAVE_PERF_EVENTS
  25. select PERF_USE_VMALLOC
  26. select HAVE_REGS_AND_STACK_ACCESS_API
  27. select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  28. select HAVE_C_RECORDMCOUNT
  29. select HAVE_GENERIC_HARDIRQS
  30. select HAVE_SPARSE_IRQ
  31. select GENERIC_IRQ_SHOW
  32. help
  33. The ARM series is a line of low-power-consumption RISC chip designs
  34. licensed by ARM Ltd and targeted at embedded applications and
  35. handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
  36. manufactured, but legacy ARM-based PC hardware remains popular in
  37. Europe. There is an ARM Linux project with a web page at
  38. <http://www.arm.linux.org.uk/>.
  39. config HAVE_PWM
  40. bool
  41. config MIGHT_HAVE_PCI
  42. bool
  43. config SYS_SUPPORTS_APM_EMULATION
  44. bool
  45. config HAVE_SCHED_CLOCK
  46. bool
  47. config GENERIC_GPIO
  48. bool
  49. config ARCH_USES_GETTIMEOFFSET
  50. bool
  51. default n
  52. config GENERIC_CLOCKEVENTS
  53. bool
  54. config GENERIC_CLOCKEVENTS_BROADCAST
  55. bool
  56. depends on GENERIC_CLOCKEVENTS
  57. default y if SMP
  58. config KTIME_SCALAR
  59. bool
  60. default y
  61. config HAVE_TCM
  62. bool
  63. select GENERIC_ALLOCATOR
  64. config HAVE_PROC_CPU
  65. bool
  66. config NO_IOPORT
  67. bool
  68. config EISA
  69. bool
  70. ---help---
  71. The Extended Industry Standard Architecture (EISA) bus was
  72. developed as an open alternative to the IBM MicroChannel bus.
  73. The EISA bus provided some of the features of the IBM MicroChannel
  74. bus while maintaining backward compatibility with cards made for
  75. the older ISA bus. The EISA bus saw limited use between 1988 and
  76. 1995 when it was made obsolete by the PCI bus.
  77. Say Y here if you are building a kernel for an EISA-based machine.
  78. Otherwise, say N.
  79. config SBUS
  80. bool
  81. config MCA
  82. bool
  83. help
  84. MicroChannel Architecture is found in some IBM PS/2 machines and
  85. laptops. It is a bus system similar to PCI or ISA. See
  86. <file:Documentation/mca.txt> (and especially the web page given
  87. there) before attempting to build an MCA bus kernel.
  88. config STACKTRACE_SUPPORT
  89. bool
  90. default y
  91. config HAVE_LATENCYTOP_SUPPORT
  92. bool
  93. depends on !SMP
  94. default y
  95. config LOCKDEP_SUPPORT
  96. bool
  97. default y
  98. config TRACE_IRQFLAGS_SUPPORT
  99. bool
  100. default y
  101. config HARDIRQS_SW_RESEND
  102. bool
  103. default y
  104. config GENERIC_IRQ_PROBE
  105. bool
  106. default y
  107. config GENERIC_LOCKBREAK
  108. bool
  109. default y
  110. depends on SMP && PREEMPT
  111. config RWSEM_GENERIC_SPINLOCK
  112. bool
  113. default y
  114. config RWSEM_XCHGADD_ALGORITHM
  115. bool
  116. config ARCH_HAS_ILOG2_U32
  117. bool
  118. config ARCH_HAS_ILOG2_U64
  119. bool
  120. config ARCH_HAS_CPUFREQ
  121. bool
  122. help
  123. Internal node to signify that the ARCH has CPUFREQ support
  124. and that the relevant menu configurations are displayed for
  125. it.
  126. config ARCH_HAS_CPU_IDLE_WAIT
  127. def_bool y
  128. config GENERIC_HWEIGHT
  129. bool
  130. default y
  131. config GENERIC_CALIBRATE_DELAY
  132. bool
  133. default y
  134. config ARCH_MAY_HAVE_PC_FDC
  135. bool
  136. config ZONE_DMA
  137. bool
  138. config NEED_DMA_MAP_STATE
  139. def_bool y
  140. config GENERIC_ISA_DMA
  141. bool
  142. config FIQ
  143. bool
  144. config ARCH_MTD_XIP
  145. bool
  146. config VECTORS_BASE
  147. hex
  148. default 0xffff0000 if MMU || CPU_HIGH_VECTOR
  149. default DRAM_BASE if REMAP_VECTORS_TO_RAM
  150. default 0x00000000
  151. help
  152. The base address of exception vectors.
  153. config ARM_PATCH_PHYS_VIRT
  154. bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
  155. depends on EXPERIMENTAL
  156. depends on !XIP_KERNEL && MMU
  157. depends on !ARCH_REALVIEW || !SPARSEMEM
  158. help
  159. Patch phys-to-virt translation functions at runtime according to
  160. the position of the kernel in system memory.
  161. This can only be used with non-XIP with MMU kernels where
  162. the base of physical memory is at a 16MB boundary.
  163. config ARM_PATCH_PHYS_VIRT_16BIT
  164. def_bool y
  165. depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
  166. source "init/Kconfig"
  167. source "kernel/Kconfig.freezer"
  168. menu "System Type"
  169. config MMU
  170. bool "MMU-based Paged Memory Management Support"
  171. default y
  172. help
  173. Select if you want MMU-based virtualised addressing space
  174. support by paged memory management. If unsure, say 'Y'.
  175. #
  176. # The "ARM system type" choice list is ordered alphabetically by option
  177. # text. Please add new entries in the option alphabetic order.
  178. #
  179. choice
  180. prompt "ARM system type"
  181. default ARCH_VERSATILE
  182. config ARCH_INTEGRATOR
  183. bool "ARM Ltd. Integrator family"
  184. select ARM_AMBA
  185. select ARCH_HAS_CPUFREQ
  186. select CLKDEV_LOOKUP
  187. select ICST
  188. select GENERIC_CLOCKEVENTS
  189. select PLAT_VERSATILE
  190. select PLAT_VERSATILE_FPGA_IRQ
  191. help
  192. Support for ARM's Integrator platform.
  193. config ARCH_REALVIEW
  194. bool "ARM Ltd. RealView family"
  195. select ARM_AMBA
  196. select CLKDEV_LOOKUP
  197. select ICST
  198. select GENERIC_CLOCKEVENTS
  199. select ARCH_WANT_OPTIONAL_GPIOLIB
  200. select PLAT_VERSATILE
  201. select PLAT_VERSATILE_CLCD
  202. select ARM_TIMER_SP804
  203. select GPIO_PL061 if GPIOLIB
  204. help
  205. This enables support for ARM Ltd RealView boards.
  206. config ARCH_VERSATILE
  207. bool "ARM Ltd. Versatile family"
  208. select ARM_AMBA
  209. select ARM_VIC
  210. select CLKDEV_LOOKUP
  211. select ICST
  212. select GENERIC_CLOCKEVENTS
  213. select ARCH_WANT_OPTIONAL_GPIOLIB
  214. select PLAT_VERSATILE
  215. select PLAT_VERSATILE_CLCD
  216. select PLAT_VERSATILE_FPGA_IRQ
  217. select ARM_TIMER_SP804
  218. help
  219. This enables support for ARM Ltd Versatile board.
  220. config ARCH_VEXPRESS
  221. bool "ARM Ltd. Versatile Express family"
  222. select ARCH_WANT_OPTIONAL_GPIOLIB
  223. select ARM_AMBA
  224. select ARM_TIMER_SP804
  225. select CLKDEV_LOOKUP
  226. select GENERIC_CLOCKEVENTS
  227. select HAVE_CLK
  228. select HAVE_PATA_PLATFORM
  229. select ICST
  230. select PLAT_VERSATILE
  231. select PLAT_VERSATILE_CLCD
  232. help
  233. This enables support for the ARM Ltd Versatile Express boards.
  234. config ARCH_AT91
  235. bool "Atmel AT91"
  236. select ARCH_REQUIRE_GPIOLIB
  237. select HAVE_CLK
  238. help
  239. This enables support for systems based on the Atmel AT91RM9200,
  240. AT91SAM9 and AT91CAP9 processors.
  241. config ARCH_BCMRING
  242. bool "Broadcom BCMRING"
  243. depends on MMU
  244. select CPU_V6
  245. select ARM_AMBA
  246. select CLKDEV_LOOKUP
  247. select GENERIC_CLOCKEVENTS
  248. select ARCH_WANT_OPTIONAL_GPIOLIB
  249. help
  250. Support for Broadcom's BCMRing platform.
  251. config ARCH_CLPS711X
  252. bool "Cirrus Logic CLPS711x/EP721x-based"
  253. select CPU_ARM720T
  254. select ARCH_USES_GETTIMEOFFSET
  255. help
  256. Support for Cirrus Logic 711x/721x based boards.
  257. config ARCH_CNS3XXX
  258. bool "Cavium Networks CNS3XXX family"
  259. select CPU_V6
  260. select GENERIC_CLOCKEVENTS
  261. select ARM_GIC
  262. select MIGHT_HAVE_PCI
  263. select PCI_DOMAINS if PCI
  264. help
  265. Support for Cavium Networks CNS3XXX platform.
  266. config ARCH_GEMINI
  267. bool "Cortina Systems Gemini"
  268. select CPU_FA526
  269. select ARCH_REQUIRE_GPIOLIB
  270. select ARCH_USES_GETTIMEOFFSET
  271. help
  272. Support for the Cortina Systems Gemini family SoCs
  273. config ARCH_EBSA110
  274. bool "EBSA-110"
  275. select CPU_SA110
  276. select ISA
  277. select NO_IOPORT
  278. select ARCH_USES_GETTIMEOFFSET
  279. help
  280. This is an evaluation board for the StrongARM processor available
  281. from Digital. It has limited hardware on-board, including an
  282. Ethernet interface, two PCMCIA sockets, two serial ports and a
  283. parallel port.
  284. config ARCH_EP93XX
  285. bool "EP93xx-based"
  286. select CPU_ARM920T
  287. select ARM_AMBA
  288. select ARM_VIC
  289. select CLKDEV_LOOKUP
  290. select ARCH_REQUIRE_GPIOLIB
  291. select ARCH_HAS_HOLES_MEMORYMODEL
  292. select ARCH_USES_GETTIMEOFFSET
  293. help
  294. This enables support for the Cirrus EP93xx series of CPUs.
  295. config ARCH_FOOTBRIDGE
  296. bool "FootBridge"
  297. select CPU_SA110
  298. select FOOTBRIDGE
  299. select GENERIC_CLOCKEVENTS
  300. help
  301. Support for systems based on the DC21285 companion chip
  302. ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
  303. config ARCH_MXC
  304. bool "Freescale MXC/iMX-based"
  305. select GENERIC_CLOCKEVENTS
  306. select ARCH_REQUIRE_GPIOLIB
  307. select CLKDEV_LOOKUP
  308. select HAVE_SCHED_CLOCK
  309. help
  310. Support for Freescale MXC/iMX-based family of processors
  311. config ARCH_MXS
  312. bool "Freescale MXS-based"
  313. select GENERIC_CLOCKEVENTS
  314. select ARCH_REQUIRE_GPIOLIB
  315. select CLKDEV_LOOKUP
  316. help
  317. Support for Freescale MXS-based family of processors
  318. config ARCH_STMP3XXX
  319. bool "Freescale STMP3xxx"
  320. select CPU_ARM926T
  321. select CLKDEV_LOOKUP
  322. select ARCH_REQUIRE_GPIOLIB
  323. select GENERIC_CLOCKEVENTS
  324. select USB_ARCH_HAS_EHCI
  325. help
  326. Support for systems based on the Freescale 3xxx CPUs.
  327. config ARCH_NETX
  328. bool "Hilscher NetX based"
  329. select CPU_ARM926T
  330. select ARM_VIC
  331. select GENERIC_CLOCKEVENTS
  332. help
  333. This enables support for systems based on the Hilscher NetX Soc
  334. config ARCH_H720X
  335. bool "Hynix HMS720x-based"
  336. select CPU_ARM720T
  337. select ISA_DMA_API
  338. select ARCH_USES_GETTIMEOFFSET
  339. help
  340. This enables support for systems based on the Hynix HMS720x
  341. config ARCH_IOP13XX
  342. bool "IOP13xx-based"
  343. depends on MMU
  344. select CPU_XSC3
  345. select PLAT_IOP
  346. select PCI
  347. select ARCH_SUPPORTS_MSI
  348. select VMSPLIT_1G
  349. help
  350. Support for Intel's IOP13XX (XScale) family of processors.
  351. config ARCH_IOP32X
  352. bool "IOP32x-based"
  353. depends on MMU
  354. select CPU_XSCALE
  355. select PLAT_IOP
  356. select PCI
  357. select ARCH_REQUIRE_GPIOLIB
  358. help
  359. Support for Intel's 80219 and IOP32X (XScale) family of
  360. processors.
  361. config ARCH_IOP33X
  362. bool "IOP33x-based"
  363. depends on MMU
  364. select CPU_XSCALE
  365. select PLAT_IOP
  366. select PCI
  367. select ARCH_REQUIRE_GPIOLIB
  368. help
  369. Support for Intel's IOP33X (XScale) family of processors.
  370. config ARCH_IXP23XX
  371. bool "IXP23XX-based"
  372. depends on MMU
  373. select CPU_XSC3
  374. select PCI
  375. select ARCH_USES_GETTIMEOFFSET
  376. help
  377. Support for Intel's IXP23xx (XScale) family of processors.
  378. config ARCH_IXP2000
  379. bool "IXP2400/2800-based"
  380. depends on MMU
  381. select CPU_XSCALE
  382. select PCI
  383. select ARCH_USES_GETTIMEOFFSET
  384. help
  385. Support for Intel's IXP2400/2800 (XScale) family of processors.
  386. config ARCH_IXP4XX
  387. bool "IXP4xx-based"
  388. depends on MMU
  389. select CPU_XSCALE
  390. select GENERIC_GPIO
  391. select GENERIC_CLOCKEVENTS
  392. select HAVE_SCHED_CLOCK
  393. select MIGHT_HAVE_PCI
  394. select DMABOUNCE if PCI
  395. help
  396. Support for Intel's IXP4XX (XScale) family of processors.
  397. config ARCH_DOVE
  398. bool "Marvell Dove"
  399. select CPU_V7
  400. select PCI
  401. select ARCH_REQUIRE_GPIOLIB
  402. select GENERIC_CLOCKEVENTS
  403. select PLAT_ORION
  404. help
  405. Support for the Marvell Dove SoC 88AP510
  406. config ARCH_KIRKWOOD
  407. bool "Marvell Kirkwood"
  408. select CPU_FEROCEON
  409. select PCI
  410. select ARCH_REQUIRE_GPIOLIB
  411. select GENERIC_CLOCKEVENTS
  412. select PLAT_ORION
  413. help
  414. Support for the following Marvell Kirkwood series SoCs:
  415. 88F6180, 88F6192 and 88F6281.
  416. config ARCH_LOKI
  417. bool "Marvell Loki (88RC8480)"
  418. select CPU_FEROCEON
  419. select GENERIC_CLOCKEVENTS
  420. select PLAT_ORION
  421. help
  422. Support for the Marvell Loki (88RC8480) SoC.
  423. config ARCH_LPC32XX
  424. bool "NXP LPC32XX"
  425. select CPU_ARM926T
  426. select ARCH_REQUIRE_GPIOLIB
  427. select HAVE_IDE
  428. select ARM_AMBA
  429. select USB_ARCH_HAS_OHCI
  430. select CLKDEV_LOOKUP
  431. select GENERIC_TIME
  432. select GENERIC_CLOCKEVENTS
  433. help
  434. Support for the NXP LPC32XX family of processors
  435. config ARCH_MV78XX0
  436. bool "Marvell MV78xx0"
  437. select CPU_FEROCEON
  438. select PCI
  439. select ARCH_REQUIRE_GPIOLIB
  440. select GENERIC_CLOCKEVENTS
  441. select PLAT_ORION
  442. help
  443. Support for the following Marvell MV78xx0 series SoCs:
  444. MV781x0, MV782x0.
  445. config ARCH_ORION5X
  446. bool "Marvell Orion"
  447. depends on MMU
  448. select CPU_FEROCEON
  449. select PCI
  450. select ARCH_REQUIRE_GPIOLIB
  451. select GENERIC_CLOCKEVENTS
  452. select PLAT_ORION
  453. help
  454. Support for the following Marvell Orion 5x series SoCs:
  455. Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
  456. Orion-2 (5281), Orion-1-90 (6183).
  457. config ARCH_MMP
  458. bool "Marvell PXA168/910/MMP2"
  459. depends on MMU
  460. select ARCH_REQUIRE_GPIOLIB
  461. select CLKDEV_LOOKUP
  462. select GENERIC_CLOCKEVENTS
  463. select HAVE_SCHED_CLOCK
  464. select TICK_ONESHOT
  465. select PLAT_PXA
  466. select SPARSE_IRQ
  467. help
  468. Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
  469. config ARCH_KS8695
  470. bool "Micrel/Kendin KS8695"
  471. select CPU_ARM922T
  472. select ARCH_REQUIRE_GPIOLIB
  473. select ARCH_USES_GETTIMEOFFSET
  474. help
  475. Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
  476. System-on-Chip devices.
  477. config ARCH_NS9XXX
  478. bool "NetSilicon NS9xxx"
  479. select CPU_ARM926T
  480. select GENERIC_GPIO
  481. select GENERIC_CLOCKEVENTS
  482. select HAVE_CLK
  483. help
  484. Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
  485. System.
  486. <http://www.digi.com/products/microprocessors/index.jsp>
  487. config ARCH_W90X900
  488. bool "Nuvoton W90X900 CPU"
  489. select CPU_ARM926T
  490. select ARCH_REQUIRE_GPIOLIB
  491. select CLKDEV_LOOKUP
  492. select GENERIC_CLOCKEVENTS
  493. help
  494. Support for Nuvoton (Winbond logic dept.) ARM9 processor,
  495. At present, the w90x900 has been renamed nuc900, regarding
  496. the ARM series product line, you can login the following
  497. link address to know more.
  498. <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
  499. ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
  500. config ARCH_NUC93X
  501. bool "Nuvoton NUC93X CPU"
  502. select CPU_ARM926T
  503. select CLKDEV_LOOKUP
  504. help
  505. Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
  506. low-power and high performance MPEG-4/JPEG multimedia controller chip.
  507. config ARCH_TEGRA
  508. bool "NVIDIA Tegra"
  509. select CLKDEV_LOOKUP
  510. select GENERIC_TIME
  511. select GENERIC_CLOCKEVENTS
  512. select GENERIC_GPIO
  513. select HAVE_CLK
  514. select HAVE_SCHED_CLOCK
  515. select ARCH_HAS_BARRIERS if CACHE_L2X0
  516. select ARCH_HAS_CPUFREQ
  517. help
  518. This enables support for NVIDIA Tegra based systems (Tegra APX,
  519. Tegra 6xx and Tegra 2 series).
  520. config ARCH_PNX4008
  521. bool "Philips Nexperia PNX4008 Mobile"
  522. select CPU_ARM926T
  523. select CLKDEV_LOOKUP
  524. select ARCH_USES_GETTIMEOFFSET
  525. help
  526. This enables support for Philips PNX4008 mobile platform.
  527. config ARCH_PXA
  528. bool "PXA2xx/PXA3xx-based"
  529. depends on MMU
  530. select ARCH_MTD_XIP
  531. select ARCH_HAS_CPUFREQ
  532. select CLKDEV_LOOKUP
  533. select ARCH_REQUIRE_GPIOLIB
  534. select GENERIC_CLOCKEVENTS
  535. select HAVE_SCHED_CLOCK
  536. select TICK_ONESHOT
  537. select PLAT_PXA
  538. select SPARSE_IRQ
  539. help
  540. Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
  541. config ARCH_MSM
  542. bool "Qualcomm MSM"
  543. select HAVE_CLK
  544. select GENERIC_CLOCKEVENTS
  545. select ARCH_REQUIRE_GPIOLIB
  546. select CLKDEV_LOOKUP
  547. help
  548. Support for Qualcomm MSM/QSD based systems. This runs on the
  549. apps processor of the MSM/QSD and depends on a shared memory
  550. interface to the modem processor which runs the baseband
  551. stack and controls some vital subsystems
  552. (clock and power control, etc).
  553. config ARCH_SHMOBILE
  554. bool "Renesas SH-Mobile / R-Mobile"
  555. select HAVE_CLK
  556. select CLKDEV_LOOKUP
  557. select GENERIC_CLOCKEVENTS
  558. select NO_IOPORT
  559. select SPARSE_IRQ
  560. select MULTI_IRQ_HANDLER
  561. help
  562. Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
  563. config ARCH_RPC
  564. bool "RiscPC"
  565. select ARCH_ACORN
  566. select FIQ
  567. select TIMER_ACORN
  568. select ARCH_MAY_HAVE_PC_FDC
  569. select HAVE_PATA_PLATFORM
  570. select ISA_DMA_API
  571. select NO_IOPORT
  572. select ARCH_SPARSEMEM_ENABLE
  573. select ARCH_USES_GETTIMEOFFSET
  574. help
  575. On the Acorn Risc-PC, Linux can support the internal IDE disk and
  576. CD-ROM interface, serial and parallel port, and the floppy drive.
  577. config ARCH_SA1100
  578. bool "SA1100-based"
  579. select CPU_SA1100
  580. select ISA
  581. select ARCH_SPARSEMEM_ENABLE
  582. select ARCH_MTD_XIP
  583. select ARCH_HAS_CPUFREQ
  584. select CPU_FREQ
  585. select GENERIC_CLOCKEVENTS
  586. select HAVE_CLK
  587. select HAVE_SCHED_CLOCK
  588. select TICK_ONESHOT
  589. select ARCH_REQUIRE_GPIOLIB
  590. help
  591. Support for StrongARM 11x0 based boards.
  592. config ARCH_S3C2410
  593. bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
  594. select GENERIC_GPIO
  595. select ARCH_HAS_CPUFREQ
  596. select HAVE_CLK
  597. select ARCH_USES_GETTIMEOFFSET
  598. select HAVE_S3C2410_I2C if I2C
  599. help
  600. Samsung S3C2410X CPU based systems, such as the Simtec Electronics
  601. BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
  602. the Samsung SMDK2410 development board (and derivatives).
  603. Note, the S3C2416 and the S3C2450 are so close that they even share
  604. the same SoC ID code. This means that there is no separate machine
  605. directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
  606. config ARCH_S3C64XX
  607. bool "Samsung S3C64XX"
  608. select PLAT_SAMSUNG
  609. select CPU_V6
  610. select ARM_VIC
  611. select HAVE_CLK
  612. select NO_IOPORT
  613. select ARCH_USES_GETTIMEOFFSET
  614. select ARCH_HAS_CPUFREQ
  615. select ARCH_REQUIRE_GPIOLIB
  616. select SAMSUNG_CLKSRC
  617. select SAMSUNG_IRQ_VIC_TIMER
  618. select SAMSUNG_IRQ_UART
  619. select S3C_GPIO_TRACK
  620. select S3C_GPIO_PULL_UPDOWN
  621. select S3C_GPIO_CFG_S3C24XX
  622. select S3C_GPIO_CFG_S3C64XX
  623. select S3C_DEV_NAND
  624. select USB_ARCH_HAS_OHCI
  625. select SAMSUNG_GPIOLIB_4BIT
  626. select HAVE_S3C2410_I2C if I2C
  627. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  628. help
  629. Samsung S3C64XX series based systems
  630. config ARCH_S5P64X0
  631. bool "Samsung S5P6440 S5P6450"
  632. select CPU_V6
  633. select GENERIC_GPIO
  634. select HAVE_CLK
  635. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  636. select GENERIC_CLOCKEVENTS
  637. select HAVE_SCHED_CLOCK
  638. select HAVE_S3C2410_I2C if I2C
  639. select HAVE_S3C_RTC if RTC_CLASS
  640. help
  641. Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
  642. SMDK6450.
  643. config ARCH_S5P6442
  644. bool "Samsung S5P6442"
  645. select CPU_V6
  646. select GENERIC_GPIO
  647. select HAVE_CLK
  648. select ARCH_USES_GETTIMEOFFSET
  649. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  650. help
  651. Samsung S5P6442 CPU based systems
  652. config ARCH_S5PC100
  653. bool "Samsung S5PC100"
  654. select GENERIC_GPIO
  655. select HAVE_CLK
  656. select CPU_V7
  657. select ARM_L1_CACHE_SHIFT_6
  658. select ARCH_USES_GETTIMEOFFSET
  659. select HAVE_S3C2410_I2C if I2C
  660. select HAVE_S3C_RTC if RTC_CLASS
  661. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  662. help
  663. Samsung S5PC100 series based systems
  664. config ARCH_S5PV210
  665. bool "Samsung S5PV210/S5PC110"
  666. select CPU_V7
  667. select ARCH_SPARSEMEM_ENABLE
  668. select GENERIC_GPIO
  669. select HAVE_CLK
  670. select ARM_L1_CACHE_SHIFT_6
  671. select ARCH_HAS_CPUFREQ
  672. select GENERIC_CLOCKEVENTS
  673. select HAVE_SCHED_CLOCK
  674. select HAVE_S3C2410_I2C if I2C
  675. select HAVE_S3C_RTC if RTC_CLASS
  676. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  677. help
  678. Samsung S5PV210/S5PC110 series based systems
  679. config ARCH_EXYNOS4
  680. bool "Samsung EXYNOS4"
  681. select CPU_V7
  682. select ARCH_SPARSEMEM_ENABLE
  683. select GENERIC_GPIO
  684. select HAVE_CLK
  685. select ARCH_HAS_CPUFREQ
  686. select GENERIC_CLOCKEVENTS
  687. select HAVE_S3C_RTC if RTC_CLASS
  688. select HAVE_S3C2410_I2C if I2C
  689. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  690. help
  691. Samsung EXYNOS4 series based systems
  692. config ARCH_SHARK
  693. bool "Shark"
  694. select CPU_SA110
  695. select ISA
  696. select ISA_DMA
  697. select ZONE_DMA
  698. select PCI
  699. select ARCH_USES_GETTIMEOFFSET
  700. help
  701. Support for the StrongARM based Digital DNARD machine, also known
  702. as "Shark" (<http://www.shark-linux.de/shark.html>).
  703. config ARCH_TCC_926
  704. bool "Telechips TCC ARM926-based systems"
  705. select CPU_ARM926T
  706. select HAVE_CLK
  707. select CLKDEV_LOOKUP
  708. select GENERIC_CLOCKEVENTS
  709. help
  710. Support for Telechips TCC ARM926-based systems.
  711. config ARCH_U300
  712. bool "ST-Ericsson U300 Series"
  713. depends on MMU
  714. select CPU_ARM926T
  715. select HAVE_SCHED_CLOCK
  716. select HAVE_TCM
  717. select ARM_AMBA
  718. select ARM_VIC
  719. select GENERIC_CLOCKEVENTS
  720. select CLKDEV_LOOKUP
  721. select GENERIC_GPIO
  722. help
  723. Support for ST-Ericsson U300 series mobile platforms.
  724. config ARCH_U8500
  725. bool "ST-Ericsson U8500 Series"
  726. select CPU_V7
  727. select ARM_AMBA
  728. select GENERIC_CLOCKEVENTS
  729. select CLKDEV_LOOKUP
  730. select ARCH_REQUIRE_GPIOLIB
  731. select ARCH_HAS_CPUFREQ
  732. help
  733. Support for ST-Ericsson's Ux500 architecture
  734. config ARCH_NOMADIK
  735. bool "STMicroelectronics Nomadik"
  736. select ARM_AMBA
  737. select ARM_VIC
  738. select CPU_ARM926T
  739. select CLKDEV_LOOKUP
  740. select GENERIC_CLOCKEVENTS
  741. select ARCH_REQUIRE_GPIOLIB
  742. help
  743. Support for the Nomadik platform by ST-Ericsson
  744. config ARCH_DAVINCI
  745. bool "TI DaVinci"
  746. select GENERIC_CLOCKEVENTS
  747. select ARCH_REQUIRE_GPIOLIB
  748. select ZONE_DMA
  749. select HAVE_IDE
  750. select CLKDEV_LOOKUP
  751. select GENERIC_ALLOCATOR
  752. select GENERIC_IRQ_CHIP
  753. select ARCH_HAS_HOLES_MEMORYMODEL
  754. help
  755. Support for TI's DaVinci platform.
  756. config ARCH_OMAP
  757. bool "TI OMAP"
  758. select HAVE_CLK
  759. select ARCH_REQUIRE_GPIOLIB
  760. select ARCH_HAS_CPUFREQ
  761. select GENERIC_CLOCKEVENTS
  762. select HAVE_SCHED_CLOCK
  763. select ARCH_HAS_HOLES_MEMORYMODEL
  764. help
  765. Support for TI's OMAP platform (OMAP1/2/3/4).
  766. config PLAT_SPEAR
  767. bool "ST SPEAr"
  768. select ARM_AMBA
  769. select ARCH_REQUIRE_GPIOLIB
  770. select CLKDEV_LOOKUP
  771. select GENERIC_CLOCKEVENTS
  772. select HAVE_CLK
  773. help
  774. Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
  775. config ARCH_VT8500
  776. bool "VIA/WonderMedia 85xx"
  777. select CPU_ARM926T
  778. select GENERIC_GPIO
  779. select ARCH_HAS_CPUFREQ
  780. select GENERIC_CLOCKEVENTS
  781. select ARCH_REQUIRE_GPIOLIB
  782. select HAVE_PWM
  783. help
  784. Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
  785. endchoice
  786. #
  787. # This is sorted alphabetically by mach-* pathname. However, plat-*
  788. # Kconfigs may be included either alphabetically (according to the
  789. # plat- suffix) or along side the corresponding mach-* source.
  790. #
  791. source "arch/arm/mach-at91/Kconfig"
  792. source "arch/arm/mach-bcmring/Kconfig"
  793. source "arch/arm/mach-clps711x/Kconfig"
  794. source "arch/arm/mach-cns3xxx/Kconfig"
  795. source "arch/arm/mach-davinci/Kconfig"
  796. source "arch/arm/mach-dove/Kconfig"
  797. source "arch/arm/mach-ep93xx/Kconfig"
  798. source "arch/arm/mach-footbridge/Kconfig"
  799. source "arch/arm/mach-gemini/Kconfig"
  800. source "arch/arm/mach-h720x/Kconfig"
  801. source "arch/arm/mach-integrator/Kconfig"
  802. source "arch/arm/mach-iop32x/Kconfig"
  803. source "arch/arm/mach-iop33x/Kconfig"
  804. source "arch/arm/mach-iop13xx/Kconfig"
  805. source "arch/arm/mach-ixp4xx/Kconfig"
  806. source "arch/arm/mach-ixp2000/Kconfig"
  807. source "arch/arm/mach-ixp23xx/Kconfig"
  808. source "arch/arm/mach-kirkwood/Kconfig"
  809. source "arch/arm/mach-ks8695/Kconfig"
  810. source "arch/arm/mach-loki/Kconfig"
  811. source "arch/arm/mach-lpc32xx/Kconfig"
  812. source "arch/arm/mach-msm/Kconfig"
  813. source "arch/arm/mach-mv78xx0/Kconfig"
  814. source "arch/arm/plat-mxc/Kconfig"
  815. source "arch/arm/mach-mxs/Kconfig"
  816. source "arch/arm/mach-netx/Kconfig"
  817. source "arch/arm/mach-nomadik/Kconfig"
  818. source "arch/arm/plat-nomadik/Kconfig"
  819. source "arch/arm/mach-ns9xxx/Kconfig"
  820. source "arch/arm/mach-nuc93x/Kconfig"
  821. source "arch/arm/plat-omap/Kconfig"
  822. source "arch/arm/mach-omap1/Kconfig"
  823. source "arch/arm/mach-omap2/Kconfig"
  824. source "arch/arm/mach-orion5x/Kconfig"
  825. source "arch/arm/mach-pxa/Kconfig"
  826. source "arch/arm/plat-pxa/Kconfig"
  827. source "arch/arm/mach-mmp/Kconfig"
  828. source "arch/arm/mach-realview/Kconfig"
  829. source "arch/arm/mach-sa1100/Kconfig"
  830. source "arch/arm/plat-samsung/Kconfig"
  831. source "arch/arm/plat-s3c24xx/Kconfig"
  832. source "arch/arm/plat-s5p/Kconfig"
  833. source "arch/arm/plat-spear/Kconfig"
  834. source "arch/arm/plat-tcc/Kconfig"
  835. if ARCH_S3C2410
  836. source "arch/arm/mach-s3c2400/Kconfig"
  837. source "arch/arm/mach-s3c2410/Kconfig"
  838. source "arch/arm/mach-s3c2412/Kconfig"
  839. source "arch/arm/mach-s3c2416/Kconfig"
  840. source "arch/arm/mach-s3c2440/Kconfig"
  841. source "arch/arm/mach-s3c2443/Kconfig"
  842. endif
  843. if ARCH_S3C64XX
  844. source "arch/arm/mach-s3c64xx/Kconfig"
  845. endif
  846. source "arch/arm/mach-s5p64x0/Kconfig"
  847. source "arch/arm/mach-s5p6442/Kconfig"
  848. source "arch/arm/mach-s5pc100/Kconfig"
  849. source "arch/arm/mach-s5pv210/Kconfig"
  850. source "arch/arm/mach-exynos4/Kconfig"
  851. source "arch/arm/mach-shmobile/Kconfig"
  852. source "arch/arm/plat-stmp3xxx/Kconfig"
  853. source "arch/arm/mach-tegra/Kconfig"
  854. source "arch/arm/mach-u300/Kconfig"
  855. source "arch/arm/mach-ux500/Kconfig"
  856. source "arch/arm/mach-versatile/Kconfig"
  857. source "arch/arm/mach-vexpress/Kconfig"
  858. source "arch/arm/plat-versatile/Kconfig"
  859. source "arch/arm/mach-vt8500/Kconfig"
  860. source "arch/arm/mach-w90x900/Kconfig"
  861. # Definitions to make life easier
  862. config ARCH_ACORN
  863. bool
  864. config PLAT_IOP
  865. bool
  866. select GENERIC_CLOCKEVENTS
  867. select HAVE_SCHED_CLOCK
  868. config PLAT_ORION
  869. bool
  870. select GENERIC_IRQ_CHIP
  871. select HAVE_SCHED_CLOCK
  872. config PLAT_PXA
  873. bool
  874. config PLAT_VERSATILE
  875. bool
  876. config ARM_TIMER_SP804
  877. bool
  878. source arch/arm/mm/Kconfig
  879. config IWMMXT
  880. bool "Enable iWMMXt support"
  881. depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
  882. default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
  883. help
  884. Enable support for iWMMXt context switching at run time if
  885. running on a CPU that supports it.
  886. # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
  887. config XSCALE_PMU
  888. bool
  889. depends on CPU_XSCALE && !XSCALE_PMU_TIMER
  890. default y
  891. config CPU_HAS_PMU
  892. depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
  893. (!ARCH_OMAP3 || OMAP3_EMU)
  894. default y
  895. bool
  896. config MULTI_IRQ_HANDLER
  897. bool
  898. help
  899. Allow each machine to specify it's own IRQ handler at run time.
  900. if !MMU
  901. source "arch/arm/Kconfig-nommu"
  902. endif
  903. config ARM_ERRATA_411920
  904. bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
  905. depends on CPU_V6 || CPU_V6K
  906. help
  907. Invalidation of the Instruction Cache operation can
  908. fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
  909. It does not affect the MPCore. This option enables the ARM Ltd.
  910. recommended workaround.
  911. config ARM_ERRATA_430973
  912. bool "ARM errata: Stale prediction on replaced interworking branch"
  913. depends on CPU_V7
  914. help
  915. This option enables the workaround for the 430973 Cortex-A8
  916. (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
  917. interworking branch is replaced with another code sequence at the
  918. same virtual address, whether due to self-modifying code or virtual
  919. to physical address re-mapping, Cortex-A8 does not recover from the
  920. stale interworking branch prediction. This results in Cortex-A8
  921. executing the new code sequence in the incorrect ARM or Thumb state.
  922. The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
  923. and also flushes the branch target cache at every context switch.
  924. Note that setting specific bits in the ACTLR register may not be
  925. available in non-secure mode.
  926. config ARM_ERRATA_458693
  927. bool "ARM errata: Processor deadlock when a false hazard is created"
  928. depends on CPU_V7
  929. help
  930. This option enables the workaround for the 458693 Cortex-A8 (r2p0)
  931. erratum. For very specific sequences of memory operations, it is
  932. possible for a hazard condition intended for a cache line to instead
  933. be incorrectly associated with a different cache line. This false
  934. hazard might then cause a processor deadlock. The workaround enables
  935. the L1 caching of the NEON accesses and disables the PLD instruction
  936. in the ACTLR register. Note that setting specific bits in the ACTLR
  937. register may not be available in non-secure mode.
  938. config ARM_ERRATA_460075
  939. bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
  940. depends on CPU_V7
  941. help
  942. This option enables the workaround for the 460075 Cortex-A8 (r2p0)
  943. erratum. Any asynchronous access to the L2 cache may encounter a
  944. situation in which recent store transactions to the L2 cache are lost
  945. and overwritten with stale memory contents from external memory. The
  946. workaround disables the write-allocate mode for the L2 cache via the
  947. ACTLR register. Note that setting specific bits in the ACTLR register
  948. may not be available in non-secure mode.
  949. config ARM_ERRATA_742230
  950. bool "ARM errata: DMB operation may be faulty"
  951. depends on CPU_V7 && SMP
  952. help
  953. This option enables the workaround for the 742230 Cortex-A9
  954. (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
  955. between two write operations may not ensure the correct visibility
  956. ordering of the two writes. This workaround sets a specific bit in
  957. the diagnostic register of the Cortex-A9 which causes the DMB
  958. instruction to behave as a DSB, ensuring the correct behaviour of
  959. the two writes.
  960. config ARM_ERRATA_742231
  961. bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
  962. depends on CPU_V7 && SMP
  963. help
  964. This option enables the workaround for the 742231 Cortex-A9
  965. (r2p0..r2p2) erratum. Under certain conditions, specific to the
  966. Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
  967. accessing some data located in the same cache line, may get corrupted
  968. data due to bad handling of the address hazard when the line gets
  969. replaced from one of the CPUs at the same time as another CPU is
  970. accessing it. This workaround sets specific bits in the diagnostic
  971. register of the Cortex-A9 which reduces the linefill issuing
  972. capabilities of the processor.
  973. config PL310_ERRATA_588369
  974. bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
  975. depends on CACHE_L2X0
  976. help
  977. The PL310 L2 cache controller implements three types of Clean &
  978. Invalidate maintenance operations: by Physical Address
  979. (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
  980. They are architecturally defined to behave as the execution of a
  981. clean operation followed immediately by an invalidate operation,
  982. both performing to the same memory location. This functionality
  983. is not correctly implemented in PL310 as clean lines are not
  984. invalidated as a result of these operations.
  985. config ARM_ERRATA_720789
  986. bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
  987. depends on CPU_V7 && SMP
  988. help
  989. This option enables the workaround for the 720789 Cortex-A9 (prior to
  990. r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
  991. broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
  992. As a consequence of this erratum, some TLB entries which should be
  993. invalidated are not, resulting in an incoherency in the system page
  994. tables. The workaround changes the TLB flushing routines to invalidate
  995. entries regardless of the ASID.
  996. config PL310_ERRATA_727915
  997. bool "Background Clean & Invalidate by Way operation can cause data corruption"
  998. depends on CACHE_L2X0
  999. help
  1000. PL310 implements the Clean & Invalidate by Way L2 cache maintenance
  1001. operation (offset 0x7FC). This operation runs in background so that
  1002. PL310 can handle normal accesses while it is in progress. Under very
  1003. rare circumstances, due to this erratum, write data can be lost when
  1004. PL310 treats a cacheable write transaction during a Clean &
  1005. Invalidate by Way operation.
  1006. config ARM_ERRATA_743622
  1007. bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
  1008. depends on CPU_V7
  1009. help
  1010. This option enables the workaround for the 743622 Cortex-A9
  1011. (r2p0..r2p2) erratum. Under very rare conditions, a faulty
  1012. optimisation in the Cortex-A9 Store Buffer may lead to data
  1013. corruption. This workaround sets a specific bit in the diagnostic
  1014. register of the Cortex-A9 which disables the Store Buffer
  1015. optimisation, preventing the defect from occurring. This has no
  1016. visible impact on the overall performance or power consumption of the
  1017. processor.
  1018. config ARM_ERRATA_751472
  1019. bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
  1020. depends on CPU_V7 && SMP
  1021. help
  1022. This option enables the workaround for the 751472 Cortex-A9 (prior
  1023. to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
  1024. completion of a following broadcasted operation if the second
  1025. operation is received by a CPU before the ICIALLUIS has completed,
  1026. potentially leading to corrupted entries in the cache or TLB.
  1027. config ARM_ERRATA_753970
  1028. bool "ARM errata: cache sync operation may be faulty"
  1029. depends on CACHE_PL310
  1030. help
  1031. This option enables the workaround for the 753970 PL310 (r3p0) erratum.
  1032. Under some condition the effect of cache sync operation on
  1033. the store buffer still remains when the operation completes.
  1034. This means that the store buffer is always asked to drain and
  1035. this prevents it from merging any further writes. The workaround
  1036. is to replace the normal offset of cache sync operation (0x730)
  1037. by another offset targeting an unmapped PL310 register 0x740.
  1038. This has the same effect as the cache sync operation: store buffer
  1039. drain and waiting for all buffers empty.
  1040. config ARM_ERRATA_754322
  1041. bool "ARM errata: possible faulty MMU translations following an ASID switch"
  1042. depends on CPU_V7
  1043. help
  1044. This option enables the workaround for the 754322 Cortex-A9 (r2p*,
  1045. r3p*) erratum. A speculative memory access may cause a page table walk
  1046. which starts prior to an ASID switch but completes afterwards. This
  1047. can populate the micro-TLB with a stale entry which may be hit with
  1048. the new ASID. This workaround places two dsb instructions in the mm
  1049. switching code so that no page table walks can cross the ASID switch.
  1050. config ARM_ERRATA_754327
  1051. bool "ARM errata: no automatic Store Buffer drain"
  1052. depends on CPU_V7 && SMP
  1053. help
  1054. This option enables the workaround for the 754327 Cortex-A9 (prior to
  1055. r2p0) erratum. The Store Buffer does not have any automatic draining
  1056. mechanism and therefore a livelock may occur if an external agent
  1057. continuously polls a memory location waiting to observe an update.
  1058. This workaround defines cpu_relax() as smp_mb(), preventing correctly
  1059. written polling loops from denying visibility of updates to memory.
  1060. endmenu
  1061. source "arch/arm/common/Kconfig"
  1062. menu "Bus support"
  1063. config ARM_AMBA
  1064. bool
  1065. config ISA
  1066. bool
  1067. help
  1068. Find out whether you have ISA slots on your motherboard. ISA is the
  1069. name of a bus system, i.e. the way the CPU talks to the other stuff
  1070. inside your box. Other bus systems are PCI, EISA, MicroChannel
  1071. (MCA) or VESA. ISA is an older system, now being displaced by PCI;
  1072. newer boards don't support it. If you have ISA, say Y, otherwise N.
  1073. # Select ISA DMA controller support
  1074. config ISA_DMA
  1075. bool
  1076. select ISA_DMA_API
  1077. # Select ISA DMA interface
  1078. config ISA_DMA_API
  1079. bool
  1080. config PCI
  1081. bool "PCI support" if MIGHT_HAVE_PCI
  1082. help
  1083. Find out whether you have a PCI motherboard. PCI is the name of a
  1084. bus system, i.e. the way the CPU talks to the other stuff inside
  1085. your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
  1086. VESA. If you have PCI, say Y, otherwise N.
  1087. config PCI_DOMAINS
  1088. bool
  1089. depends on PCI
  1090. config PCI_NANOENGINE
  1091. bool "BSE nanoEngine PCI support"
  1092. depends on SA1100_NANOENGINE
  1093. help
  1094. Enable PCI on the BSE nanoEngine board.
  1095. config PCI_SYSCALL
  1096. def_bool PCI
  1097. # Select the host bridge type
  1098. config PCI_HOST_VIA82C505
  1099. bool
  1100. depends on PCI && ARCH_SHARK
  1101. default y
  1102. config PCI_HOST_ITE8152
  1103. bool
  1104. depends on PCI && MACH_ARMCORE
  1105. default y
  1106. select DMABOUNCE
  1107. source "drivers/pci/Kconfig"
  1108. source "drivers/pcmcia/Kconfig"
  1109. endmenu
  1110. menu "Kernel Features"
  1111. source "kernel/time/Kconfig"
  1112. config SMP
  1113. bool "Symmetric Multi-Processing (EXPERIMENTAL)"
  1114. depends on EXPERIMENTAL
  1115. depends on CPU_V6K || CPU_V7
  1116. depends on GENERIC_CLOCKEVENTS
  1117. depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
  1118. MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
  1119. ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
  1120. ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
  1121. select USE_GENERIC_SMP_HELPERS
  1122. select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
  1123. help
  1124. This enables support for systems with more than one CPU. If you have
  1125. a system with only one CPU, like most personal computers, say N. If
  1126. you have a system with more than one CPU, say Y.
  1127. If you say N here, the kernel will run on single and multiprocessor
  1128. machines, but will use only one CPU of a multiprocessor machine. If
  1129. you say Y here, the kernel will run on many, but not all, single
  1130. processor machines. On a single processor machine, the kernel will
  1131. run faster if you say N here.
  1132. See also <file:Documentation/i386/IO-APIC.txt>,
  1133. <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
  1134. <http://tldp.org/HOWTO/SMP-HOWTO.html>.
  1135. If you don't know what to do here, say N.
  1136. config SMP_ON_UP
  1137. bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
  1138. depends on EXPERIMENTAL
  1139. depends on SMP && !XIP_KERNEL
  1140. default y
  1141. help
  1142. SMP kernels contain instructions which fail on non-SMP processors.
  1143. Enabling this option allows the kernel to modify itself to make
  1144. these instructions safe. Disabling it allows about 1K of space
  1145. savings.
  1146. If you don't know what to do here, say Y.
  1147. config HAVE_ARM_SCU
  1148. bool
  1149. depends on SMP
  1150. help
  1151. This option enables support for the ARM system coherency unit
  1152. config HAVE_ARM_TWD
  1153. bool
  1154. depends on SMP
  1155. select TICK_ONESHOT
  1156. help
  1157. This options enables support for the ARM timer and watchdog unit
  1158. choice
  1159. prompt "Memory split"
  1160. default VMSPLIT_3G
  1161. help
  1162. Select the desired split between kernel and user memory.
  1163. If you are not absolutely sure what you are doing, leave this
  1164. option alone!
  1165. config VMSPLIT_3G
  1166. bool "3G/1G user/kernel split"
  1167. config VMSPLIT_2G
  1168. bool "2G/2G user/kernel split"
  1169. config VMSPLIT_1G
  1170. bool "1G/3G user/kernel split"
  1171. endchoice
  1172. config PAGE_OFFSET
  1173. hex
  1174. default 0x40000000 if VMSPLIT_1G
  1175. default 0x80000000 if VMSPLIT_2G
  1176. default 0xC0000000
  1177. config NR_CPUS
  1178. int "Maximum number of CPUs (2-32)"
  1179. range 2 32
  1180. depends on SMP
  1181. default "4"
  1182. config HOTPLUG_CPU
  1183. bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
  1184. depends on SMP && HOTPLUG && EXPERIMENTAL
  1185. depends on !ARCH_MSM
  1186. help
  1187. Say Y here to experiment with turning CPUs off and on. CPUs
  1188. can be controlled through /sys/devices/system/cpu.
  1189. config LOCAL_TIMERS
  1190. bool "Use local timer interrupts"
  1191. depends on SMP
  1192. default y
  1193. select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
  1194. help
  1195. Enable support for local timers on SMP platforms, rather then the
  1196. legacy IPI broadcast method. Local timers allows the system
  1197. accounting to be spread across the timer interval, preventing a
  1198. "thundering herd" at every timer tick.
  1199. source kernel/Kconfig.preempt
  1200. config HZ
  1201. int
  1202. default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
  1203. ARCH_S5P6442 || ARCH_S5PV210 || ARCH_EXYNOS4
  1204. default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
  1205. default AT91_TIMER_HZ if ARCH_AT91
  1206. default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
  1207. default 100
  1208. config THUMB2_KERNEL
  1209. bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
  1210. depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
  1211. select AEABI
  1212. select ARM_ASM_UNIFIED
  1213. help
  1214. By enabling this option, the kernel will be compiled in
  1215. Thumb-2 mode. A compiler/assembler that understand the unified
  1216. ARM-Thumb syntax is needed.
  1217. If unsure, say N.
  1218. config THUMB2_AVOID_R_ARM_THM_JUMP11
  1219. bool "Work around buggy Thumb-2 short branch relocations in gas"
  1220. depends on THUMB2_KERNEL && MODULES
  1221. default y
  1222. help
  1223. Various binutils versions can resolve Thumb-2 branches to
  1224. locally-defined, preemptible global symbols as short-range "b.n"
  1225. branch instructions.
  1226. This is a problem, because there's no guarantee the final
  1227. destination of the symbol, or any candidate locations for a
  1228. trampoline, are within range of the branch. For this reason, the
  1229. kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
  1230. relocation in modules at all, and it makes little sense to add
  1231. support.
  1232. The symptom is that the kernel fails with an "unsupported
  1233. relocation" error when loading some modules.
  1234. Until fixed tools are available, passing
  1235. -fno-optimize-sibling-calls to gcc should prevent gcc generating
  1236. code which hits this problem, at the cost of a bit of extra runtime
  1237. stack usage in some cases.
  1238. The problem is described in more detail at:
  1239. https://bugs.launchpad.net/binutils-linaro/+bug/725126
  1240. Only Thumb-2 kernels are affected.
  1241. Unless you are sure your tools don't have this problem, say Y.
  1242. config ARM_ASM_UNIFIED
  1243. bool
  1244. config AEABI
  1245. bool "Use the ARM EABI to compile the kernel"
  1246. help
  1247. This option allows for the kernel to be compiled using the latest
  1248. ARM ABI (aka EABI). This is only useful if you are using a user
  1249. space environment that is also compiled with EABI.
  1250. Since there are major incompatibilities between the legacy ABI and
  1251. EABI, especially with regard to structure member alignment, this
  1252. option also changes the kernel syscall calling convention to
  1253. disambiguate both ABIs and allow for backward compatibility support
  1254. (selected with CONFIG_OABI_COMPAT).
  1255. To use this you need GCC version 4.0.0 or later.
  1256. config OABI_COMPAT
  1257. bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
  1258. depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
  1259. default y
  1260. help
  1261. This option preserves the old syscall interface along with the
  1262. new (ARM EABI) one. It also provides a compatibility layer to
  1263. intercept syscalls that have structure arguments which layout
  1264. in memory differs between the legacy ABI and the new ARM EABI
  1265. (only for non "thumb" binaries). This option adds a tiny
  1266. overhead to all syscalls and produces a slightly larger kernel.
  1267. If you know you'll be using only pure EABI user space then you
  1268. can say N here. If this option is not selected and you attempt
  1269. to execute a legacy ABI binary then the result will be
  1270. UNPREDICTABLE (in fact it can be predicted that it won't work
  1271. at all). If in doubt say Y.
  1272. config ARCH_HAS_HOLES_MEMORYMODEL
  1273. bool
  1274. config ARCH_SPARSEMEM_ENABLE
  1275. bool
  1276. config ARCH_SPARSEMEM_DEFAULT
  1277. def_bool ARCH_SPARSEMEM_ENABLE
  1278. config ARCH_SELECT_MEMORY_MODEL
  1279. def_bool ARCH_SPARSEMEM_ENABLE
  1280. config HIGHMEM
  1281. bool "High Memory Support (EXPERIMENTAL)"
  1282. depends on MMU && EXPERIMENTAL
  1283. help
  1284. The address space of ARM processors is only 4 Gigabytes large
  1285. and it has to accommodate user address space, kernel address
  1286. space as well as some memory mapped IO. That means that, if you
  1287. have a large amount of physical memory and/or IO, not all of the
  1288. memory can be "permanently mapped" by the kernel. The physical
  1289. memory that is not permanently mapped is called "high memory".
  1290. Depending on the selected kernel/user memory split, minimum
  1291. vmalloc space and actual amount of RAM, you may not need this
  1292. option which should result in a slightly faster kernel.
  1293. If unsure, say n.
  1294. config HIGHPTE
  1295. bool "Allocate 2nd-level pagetables from highmem"
  1296. depends on HIGHMEM
  1297. config HW_PERF_EVENTS
  1298. bool "Enable hardware performance counter support for perf events"
  1299. depends on PERF_EVENTS && CPU_HAS_PMU
  1300. default y
  1301. help
  1302. Enable hardware performance counter support for perf events. If
  1303. disabled, perf events will use software events only.
  1304. source "mm/Kconfig"
  1305. config FORCE_MAX_ZONEORDER
  1306. int "Maximum zone order" if ARCH_SHMOBILE
  1307. range 11 64 if ARCH_SHMOBILE
  1308. default "9" if SA1111
  1309. default "11"
  1310. help
  1311. The kernel memory allocator divides physically contiguous memory
  1312. blocks into "zones", where each zone is a power of two number of
  1313. pages. This option selects the largest power of two that the kernel
  1314. keeps in the memory allocator. If you need to allocate very large
  1315. blocks of physically contiguous memory, then you may need to
  1316. increase this value.
  1317. This config option is actually maximum order plus one. For example,
  1318. a value of 11 means that the largest free memory block is 2^10 pages.
  1319. config LEDS
  1320. bool "Timer and CPU usage LEDs"
  1321. depends on ARCH_CDB89712 || ARCH_EBSA110 || \
  1322. ARCH_EBSA285 || ARCH_INTEGRATOR || \
  1323. ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
  1324. ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
  1325. ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
  1326. ARCH_AT91 || ARCH_DAVINCI || \
  1327. ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
  1328. help
  1329. If you say Y here, the LEDs on your machine will be used
  1330. to provide useful information about your current system status.
  1331. If you are compiling a kernel for a NetWinder or EBSA-285, you will
  1332. be able to select which LEDs are active using the options below. If
  1333. you are compiling a kernel for the EBSA-110 or the LART however, the
  1334. red LED will simply flash regularly to indicate that the system is
  1335. still functional. It is safe to say Y here if you have a CATS
  1336. system, but the driver will do nothing.
  1337. config LEDS_TIMER
  1338. bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
  1339. OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1340. || MACH_OMAP_PERSEUS2
  1341. depends on LEDS
  1342. depends on !GENERIC_CLOCKEVENTS
  1343. default y if ARCH_EBSA110
  1344. help
  1345. If you say Y here, one of the system LEDs (the green one on the
  1346. NetWinder, the amber one on the EBSA285, or the red one on the LART)
  1347. will flash regularly to indicate that the system is still
  1348. operational. This is mainly useful to kernel hackers who are
  1349. debugging unstable kernels.
  1350. The LART uses the same LED for both Timer LED and CPU usage LED
  1351. functions. You may choose to use both, but the Timer LED function
  1352. will overrule the CPU usage LED.
  1353. config LEDS_CPU
  1354. bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
  1355. !ARCH_OMAP) \
  1356. || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1357. || MACH_OMAP_PERSEUS2
  1358. depends on LEDS
  1359. help
  1360. If you say Y here, the red LED will be used to give a good real
  1361. time indication of CPU usage, by lighting whenever the idle task
  1362. is not currently executing.
  1363. The LART uses the same LED for both Timer LED and CPU usage LED
  1364. functions. You may choose to use both, but the Timer LED function
  1365. will overrule the CPU usage LED.
  1366. config ALIGNMENT_TRAP
  1367. bool
  1368. depends on CPU_CP15_MMU
  1369. default y if !ARCH_EBSA110
  1370. select HAVE_PROC_CPU if PROC_FS
  1371. help
  1372. ARM processors cannot fetch/store information which is not
  1373. naturally aligned on the bus, i.e., a 4 byte fetch must start at an
  1374. address divisible by 4. On 32-bit ARM processors, these non-aligned
  1375. fetch/store instructions will be emulated in software if you say
  1376. here, which has a severe performance impact. This is necessary for
  1377. correct operation of some network protocols. With an IP-only
  1378. configuration it is safe to say N, otherwise say Y.
  1379. config UACCESS_WITH_MEMCPY
  1380. bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
  1381. depends on MMU && EXPERIMENTAL
  1382. default y if CPU_FEROCEON
  1383. help
  1384. Implement faster copy_to_user and clear_user methods for CPU
  1385. cores where a 8-word STM instruction give significantly higher
  1386. memory write throughput than a sequence of individual 32bit stores.
  1387. A possible side effect is a slight increase in scheduling latency
  1388. between threads sharing the same address space if they invoke
  1389. such copy operations with large buffers.
  1390. However, if the CPU data cache is using a write-allocate mode,
  1391. this option is unlikely to provide any performance gain.
  1392. config SECCOMP
  1393. bool
  1394. prompt "Enable seccomp to safely compute untrusted bytecode"
  1395. ---help---
  1396. This kernel feature is useful for number crunching applications
  1397. that may need to compute untrusted bytecode during their
  1398. execution. By using pipes or other transports made available to
  1399. the process as file descriptors supporting the read/write
  1400. syscalls, it's possible to isolate those applications in
  1401. their own address space using seccomp. Once seccomp is
  1402. enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
  1403. and the task is only allowed to execute a few safe syscalls
  1404. defined by each seccomp mode.
  1405. config CC_STACKPROTECTOR
  1406. bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
  1407. depends on EXPERIMENTAL
  1408. help
  1409. This option turns on the -fstack-protector GCC feature. This
  1410. feature puts, at the beginning of functions, a canary value on
  1411. the stack just before the return address, and validates
  1412. the value just before actually returning. Stack based buffer
  1413. overflows (that need to overwrite this return address) now also
  1414. overwrite the canary, which gets detected and the attack is then
  1415. neutralized via a kernel panic.
  1416. This feature requires gcc version 4.2 or above.
  1417. config DEPRECATED_PARAM_STRUCT
  1418. bool "Provide old way to pass kernel parameters"
  1419. help
  1420. This was deprecated in 2001 and announced to live on for 5 years.
  1421. Some old boot loaders still use this way.
  1422. endmenu
  1423. menu "Boot options"
  1424. # Compressed boot loader in ROM. Yes, we really want to ask about
  1425. # TEXT and BSS so we preserve their values in the config files.
  1426. config ZBOOT_ROM_TEXT
  1427. hex "Compressed ROM boot loader base address"
  1428. default "0"
  1429. help
  1430. The physical address at which the ROM-able zImage is to be
  1431. placed in the target. Platforms which normally make use of
  1432. ROM-able zImage formats normally set this to a suitable
  1433. value in their defconfig file.
  1434. If ZBOOT_ROM is not enabled, this has no effect.
  1435. config ZBOOT_ROM_BSS
  1436. hex "Compressed ROM boot loader BSS address"
  1437. default "0"
  1438. help
  1439. The base address of an area of read/write memory in the target
  1440. for the ROM-able zImage which must be available while the
  1441. decompressor is running. It must be large enough to hold the
  1442. entire decompressed kernel plus an additional 128 KiB.
  1443. Platforms which normally make use of ROM-able zImage formats
  1444. normally set this to a suitable value in their defconfig file.
  1445. If ZBOOT_ROM is not enabled, this has no effect.
  1446. config ZBOOT_ROM
  1447. bool "Compressed boot loader in ROM/flash"
  1448. depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
  1449. help
  1450. Say Y here if you intend to execute your compressed kernel image
  1451. (zImage) directly from ROM or flash. If unsure, say N.
  1452. config ZBOOT_ROM_MMCIF
  1453. bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
  1454. depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
  1455. help
  1456. Say Y here to include experimental MMCIF loading code in the
  1457. ROM-able zImage. With this enabled it is possible to write the
  1458. the ROM-able zImage kernel image to an MMC card and boot the
  1459. kernel straight from the reset vector. At reset the processor
  1460. Mask ROM will load the first part of the the ROM-able zImage
  1461. which in turn loads the rest the kernel image to RAM using the
  1462. MMCIF hardware block.
  1463. config CMDLINE
  1464. string "Default kernel command string"
  1465. default ""
  1466. help
  1467. On some architectures (EBSA110 and CATS), there is currently no way
  1468. for the boot loader to pass arguments to the kernel. For these
  1469. architectures, you should supply some command-line options at build
  1470. time by entering them here. As a minimum, you should specify the
  1471. memory size and the root device (e.g., mem=64M root=/dev/nfs).
  1472. config CMDLINE_FORCE
  1473. bool "Always use the default kernel command string"
  1474. depends on CMDLINE != ""
  1475. help
  1476. Always use the default kernel command string, even if the boot
  1477. loader passes other arguments to the kernel.
  1478. This is useful if you cannot or don't want to change the
  1479. command-line options your boot loader passes to the kernel.
  1480. If unsure, say N.
  1481. config XIP_KERNEL
  1482. bool "Kernel Execute-In-Place from ROM"
  1483. depends on !ZBOOT_ROM
  1484. help
  1485. Execute-In-Place allows the kernel to run from non-volatile storage
  1486. directly addressable by the CPU, such as NOR flash. This saves RAM
  1487. space since the text section of the kernel is not loaded from flash
  1488. to RAM. Read-write sections, such as the data section and stack,
  1489. are still copied to RAM. The XIP kernel is not compressed since
  1490. it has to run directly from flash, so it will take more space to
  1491. store it. The flash address used to link the kernel object files,
  1492. and for storing it, is configuration dependent. Therefore, if you
  1493. say Y here, you must know the proper physical address where to
  1494. store the kernel image depending on your own flash memory usage.
  1495. Also note that the make target becomes "make xipImage" rather than
  1496. "make zImage" or "make Image". The final kernel binary to put in
  1497. ROM memory will be arch/arm/boot/xipImage.
  1498. If unsure, say N.
  1499. config XIP_PHYS_ADDR
  1500. hex "XIP Kernel Physical Location"
  1501. depends on XIP_KERNEL
  1502. default "0x00080000"
  1503. help
  1504. This is the physical address in your flash memory the kernel will
  1505. be linked for and stored to. This address is dependent on your
  1506. own flash usage.
  1507. config KEXEC
  1508. bool "Kexec system call (EXPERIMENTAL)"
  1509. depends on EXPERIMENTAL
  1510. help
  1511. kexec is a system call that implements the ability to shutdown your
  1512. current kernel, and to start another kernel. It is like a reboot
  1513. but it is independent of the system firmware. And like a reboot
  1514. you can start any kernel with it, not just Linux.
  1515. It is an ongoing process to be certain the hardware in a machine
  1516. is properly shutdown, so do not be surprised if this code does not
  1517. initially work for you. It may help to enable device hotplugging
  1518. support.
  1519. config ATAGS_PROC
  1520. bool "Export atags in procfs"
  1521. depends on KEXEC
  1522. default y
  1523. help
  1524. Should the atags used to boot the kernel be exported in an "atags"
  1525. file in procfs. Useful with kexec.
  1526. config CRASH_DUMP
  1527. bool "Build kdump crash kernel (EXPERIMENTAL)"
  1528. depends on EXPERIMENTAL
  1529. help
  1530. Generate crash dump after being started by kexec. This should
  1531. be normally only set in special crash dump kernels which are
  1532. loaded in the main kernel with kexec-tools into a specially
  1533. reserved region and then later executed after a crash by
  1534. kdump/kexec. The crash dump kernel must be compiled to a
  1535. memory address not used by the main kernel
  1536. For more details see Documentation/kdump/kdump.txt
  1537. config AUTO_ZRELADDR
  1538. bool "Auto calculation of the decompressed kernel image address"
  1539. depends on !ZBOOT_ROM && !ARCH_U300
  1540. help
  1541. ZRELADDR is the physical address where the decompressed kernel
  1542. image will be placed. If AUTO_ZRELADDR is selected, the address
  1543. will be determined at run-time by masking the current IP with
  1544. 0xf8000000. This assumes the zImage being placed in the first 128MB
  1545. from start of memory.
  1546. endmenu
  1547. menu "CPU Power Management"
  1548. if ARCH_HAS_CPUFREQ
  1549. source "drivers/cpufreq/Kconfig"
  1550. config CPU_FREQ_IMX
  1551. tristate "CPUfreq driver for i.MX CPUs"
  1552. depends on ARCH_MXC && CPU_FREQ
  1553. help
  1554. This enables the CPUfreq driver for i.MX CPUs.
  1555. config CPU_FREQ_SA1100
  1556. bool
  1557. config CPU_FREQ_SA1110
  1558. bool
  1559. config CPU_FREQ_INTEGRATOR
  1560. tristate "CPUfreq driver for ARM Integrator CPUs"
  1561. depends on ARCH_INTEGRATOR && CPU_FREQ
  1562. default y
  1563. help
  1564. This enables the CPUfreq driver for ARM Integrator CPUs.
  1565. For details, take a look at <file:Documentation/cpu-freq>.
  1566. If in doubt, say Y.
  1567. config CPU_FREQ_PXA
  1568. bool
  1569. depends on CPU_FREQ && ARCH_PXA && PXA25x
  1570. default y
  1571. select CPU_FREQ_DEFAULT_GOV_USERSPACE
  1572. config CPU_FREQ_S3C64XX
  1573. bool "CPUfreq support for Samsung S3C64XX CPUs"
  1574. depends on CPU_FREQ && CPU_S3C6410
  1575. config CPU_FREQ_S3C
  1576. bool
  1577. help
  1578. Internal configuration node for common cpufreq on Samsung SoC
  1579. config CPU_FREQ_S3C24XX
  1580. bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
  1581. depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
  1582. select CPU_FREQ_S3C
  1583. help
  1584. This enables the CPUfreq driver for the Samsung S3C24XX family
  1585. of CPUs.
  1586. For details, take a look at <file:Documentation/cpu-freq>.
  1587. If in doubt, say N.
  1588. config CPU_FREQ_S3C24XX_PLL
  1589. bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
  1590. depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
  1591. help
  1592. Compile in support for changing the PLL frequency from the
  1593. S3C24XX series CPUfreq driver. The PLL takes time to settle
  1594. after a frequency change, so by default it is not enabled.
  1595. This also means that the PLL tables for the selected CPU(s) will
  1596. be built which may increase the size of the kernel image.
  1597. config CPU_FREQ_S3C24XX_DEBUG
  1598. bool "Debug CPUfreq Samsung driver core"
  1599. depends on CPU_FREQ_S3C24XX
  1600. help
  1601. Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
  1602. config CPU_FREQ_S3C24XX_IODEBUG
  1603. bool "Debug CPUfreq Samsung driver IO timing"
  1604. depends on CPU_FREQ_S3C24XX
  1605. help
  1606. Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
  1607. config CPU_FREQ_S3C24XX_DEBUGFS
  1608. bool "Export debugfs for CPUFreq"
  1609. depends on CPU_FREQ_S3C24XX && DEBUG_FS
  1610. help
  1611. Export status information via debugfs.
  1612. endif
  1613. source "drivers/cpuidle/Kconfig"
  1614. endmenu
  1615. menu "Floating point emulation"
  1616. comment "At least one emulation must be selected"
  1617. config FPE_NWFPE
  1618. bool "NWFPE math emulation"
  1619. depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
  1620. ---help---
  1621. Say Y to include the NWFPE floating point emulator in the kernel.
  1622. This is necessary to run most binaries. Linux does not currently
  1623. support floating point hardware so you need to say Y here even if
  1624. your machine has an FPA or floating point co-processor podule.
  1625. You may say N here if you are going to load the Acorn FPEmulator
  1626. early in the bootup.
  1627. config FPE_NWFPE_XP
  1628. bool "Support extended precision"
  1629. depends on FPE_NWFPE
  1630. help
  1631. Say Y to include 80-bit support in the kernel floating-point
  1632. emulator. Otherwise, only 32 and 64-bit support is compiled in.
  1633. Note that gcc does not generate 80-bit operations by default,
  1634. so in most cases this option only enlarges the size of the
  1635. floating point emulator without any good reason.
  1636. You almost surely want to say N here.
  1637. config FPE_FASTFPE
  1638. bool "FastFPE math emulation (EXPERIMENTAL)"
  1639. depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
  1640. ---help---
  1641. Say Y here to include the FAST floating point emulator in the kernel.
  1642. This is an experimental much faster emulator which now also has full
  1643. precision for the mantissa. It does not support any exceptions.
  1644. It is very simple, and approximately 3-6 times faster than NWFPE.
  1645. It should be sufficient for most programs. It may be not suitable
  1646. for scientific calculations, but you have to check this for yourself.
  1647. If you do not feel you need a faster FP emulation you should better
  1648. choose NWFPE.
  1649. config VFP
  1650. bool "VFP-format floating point maths"
  1651. depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
  1652. help
  1653. Say Y to include VFP support code in the kernel. This is needed
  1654. if your hardware includes a VFP unit.
  1655. Please see <file:Documentation/arm/VFP/release-notes.txt> for
  1656. release notes and additional status information.
  1657. Say N if your target does not have VFP hardware.
  1658. config VFPv3
  1659. bool
  1660. depends on VFP
  1661. default y if CPU_V7
  1662. config NEON
  1663. bool "Advanced SIMD (NEON) Extension support"
  1664. depends on VFPv3 && CPU_V7
  1665. help
  1666. Say Y to include support code for NEON, the ARMv7 Advanced SIMD
  1667. Extension.
  1668. endmenu
  1669. menu "Userspace binary formats"
  1670. source "fs/Kconfig.binfmt"
  1671. config ARTHUR
  1672. tristate "RISC OS personality"
  1673. depends on !AEABI
  1674. help
  1675. Say Y here to include the kernel code necessary if you want to run
  1676. Acorn RISC OS/Arthur binaries under Linux. This code is still very
  1677. experimental; if this sounds frightening, say N and sleep in peace.
  1678. You can also say M here to compile this support as a module (which
  1679. will be called arthur).
  1680. endmenu
  1681. menu "Power management options"
  1682. source "kernel/power/Kconfig"
  1683. config ARCH_SUSPEND_POSSIBLE
  1684. depends on !ARCH_S5P64X0 && !ARCH_S5P6442
  1685. depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
  1686. CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
  1687. def_bool y
  1688. endmenu
  1689. source "net/Kconfig"
  1690. source "drivers/Kconfig"
  1691. source "fs/Kconfig"
  1692. source "arch/arm/Kconfig.debug"
  1693. source "security/Kconfig"
  1694. source "crypto/Kconfig"
  1695. source "lib/Kconfig"