lis3lv02d.h 4.8 KB

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  1. /*
  2. * lis3lv02d.h - ST LIS3LV02DL accelerometer driver
  3. *
  4. * Copyright (C) 2007-2008 Yan Burman
  5. * Copyright (C) 2008 Eric Piel
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/platform_device.h>
  22. #include <linux/input-polldev.h>
  23. /*
  24. * The actual chip is STMicroelectronics LIS3LV02DL or LIS3LV02DQ that seems to
  25. * be connected via SPI. There exists also several similar chips (such as LIS302DL or
  26. * LIS3L02DQ) and they have slightly different registers, but we can provide a
  27. * common interface for all of them.
  28. * They can also be connected via I²C.
  29. */
  30. /* 2-byte registers */
  31. #define LIS_DOUBLE_ID 0x3A /* LIS3LV02D[LQ] */
  32. /* 1-byte registers */
  33. #define LIS_SINGLE_ID 0x3B /* LIS[32]02DL and others */
  34. enum lis3lv02d_reg {
  35. WHO_AM_I = 0x0F,
  36. OFFSET_X = 0x16,
  37. OFFSET_Y = 0x17,
  38. OFFSET_Z = 0x18,
  39. GAIN_X = 0x19,
  40. GAIN_Y = 0x1A,
  41. GAIN_Z = 0x1B,
  42. CTRL_REG1 = 0x20,
  43. CTRL_REG2 = 0x21,
  44. CTRL_REG3 = 0x22,
  45. HP_FILTER_RESET = 0x23,
  46. STATUS_REG = 0x27,
  47. OUTX_L = 0x28,
  48. OUTX_H = 0x29,
  49. OUTX = 0x29,
  50. OUTY_L = 0x2A,
  51. OUTY_H = 0x2B,
  52. OUTY = 0x2B,
  53. OUTZ_L = 0x2C,
  54. OUTZ_H = 0x2D,
  55. OUTZ = 0x2D,
  56. FF_WU_CFG = 0x30,
  57. FF_WU_SRC = 0x31,
  58. FF_WU_ACK = 0x32,
  59. FF_WU_THS_L = 0x34,
  60. FF_WU_THS_H = 0x35,
  61. FF_WU_DURATION = 0x36,
  62. DD_CFG = 0x38,
  63. DD_SRC = 0x39,
  64. DD_ACK = 0x3A,
  65. DD_THSI_L = 0x3C,
  66. DD_THSI_H = 0x3D,
  67. DD_THSE_L = 0x3E,
  68. DD_THSE_H = 0x3F,
  69. };
  70. enum lis3lv02d_ctrl1 {
  71. CTRL1_Xen = 0x01,
  72. CTRL1_Yen = 0x02,
  73. CTRL1_Zen = 0x04,
  74. CTRL1_ST = 0x08,
  75. CTRL1_DF0 = 0x10,
  76. CTRL1_DF1 = 0x20,
  77. CTRL1_PD0 = 0x40,
  78. CTRL1_PD1 = 0x80,
  79. };
  80. enum lis3lv02d_ctrl2 {
  81. CTRL2_DAS = 0x01,
  82. CTRL2_SIM = 0x02,
  83. CTRL2_DRDY = 0x04,
  84. CTRL2_IEN = 0x08,
  85. CTRL2_BOOT = 0x10,
  86. CTRL2_BLE = 0x20,
  87. CTRL2_BDU = 0x40, /* Block Data Update */
  88. CTRL2_FS = 0x80, /* Full Scale selection */
  89. };
  90. enum lis3lv02d_ctrl3 {
  91. CTRL3_CFS0 = 0x01,
  92. CTRL3_CFS1 = 0x02,
  93. CTRL3_FDS = 0x10,
  94. CTRL3_HPFF = 0x20,
  95. CTRL3_HPDD = 0x40,
  96. CTRL3_ECK = 0x80,
  97. };
  98. enum lis3lv02d_status_reg {
  99. STATUS_XDA = 0x01,
  100. STATUS_YDA = 0x02,
  101. STATUS_ZDA = 0x04,
  102. STATUS_XYZDA = 0x08,
  103. STATUS_XOR = 0x10,
  104. STATUS_YOR = 0x20,
  105. STATUS_ZOR = 0x40,
  106. STATUS_XYZOR = 0x80,
  107. };
  108. enum lis3lv02d_ff_wu_cfg {
  109. FF_WU_CFG_XLIE = 0x01,
  110. FF_WU_CFG_XHIE = 0x02,
  111. FF_WU_CFG_YLIE = 0x04,
  112. FF_WU_CFG_YHIE = 0x08,
  113. FF_WU_CFG_ZLIE = 0x10,
  114. FF_WU_CFG_ZHIE = 0x20,
  115. FF_WU_CFG_LIR = 0x40,
  116. FF_WU_CFG_AOI = 0x80,
  117. };
  118. enum lis3lv02d_ff_wu_src {
  119. FF_WU_SRC_XL = 0x01,
  120. FF_WU_SRC_XH = 0x02,
  121. FF_WU_SRC_YL = 0x04,
  122. FF_WU_SRC_YH = 0x08,
  123. FF_WU_SRC_ZL = 0x10,
  124. FF_WU_SRC_ZH = 0x20,
  125. FF_WU_SRC_IA = 0x40,
  126. };
  127. enum lis3lv02d_dd_cfg {
  128. DD_CFG_XLIE = 0x01,
  129. DD_CFG_XHIE = 0x02,
  130. DD_CFG_YLIE = 0x04,
  131. DD_CFG_YHIE = 0x08,
  132. DD_CFG_ZLIE = 0x10,
  133. DD_CFG_ZHIE = 0x20,
  134. DD_CFG_LIR = 0x40,
  135. DD_CFG_IEND = 0x80,
  136. };
  137. enum lis3lv02d_dd_src {
  138. DD_SRC_XL = 0x01,
  139. DD_SRC_XH = 0x02,
  140. DD_SRC_YL = 0x04,
  141. DD_SRC_YH = 0x08,
  142. DD_SRC_ZL = 0x10,
  143. DD_SRC_ZH = 0x20,
  144. DD_SRC_IA = 0x40,
  145. };
  146. struct axis_conversion {
  147. s8 x;
  148. s8 y;
  149. s8 z;
  150. };
  151. struct lis3lv02d {
  152. void *bus_priv; /* used by the bus layer only */
  153. int (*init) (struct lis3lv02d *lis3);
  154. int (*write) (struct lis3lv02d *lis3, int reg, u8 val);
  155. int (*read) (struct lis3lv02d *lis3, int reg, u8 *ret);
  156. u8 whoami; /* 3Ah: 2-byte registries, 3Bh: 1-byte registries */
  157. s16 (*read_data) (struct lis3lv02d *lis3, int reg);
  158. int mdps_max_val;
  159. struct input_polled_dev *idev; /* input device */
  160. struct platform_device *pdev; /* platform device */
  161. atomic_t count; /* interrupt count after last read */
  162. int xcalib; /* calibrated null value for x */
  163. int ycalib; /* calibrated null value for y */
  164. int zcalib; /* calibrated null value for z */
  165. struct axis_conversion ac; /* hw -> logical axis */
  166. u32 irq; /* IRQ number */
  167. struct fasync_struct *async_queue; /* queue for the misc device */
  168. wait_queue_head_t misc_wait; /* Wait queue for the misc device */
  169. unsigned long misc_opened; /* bit0: whether the device is open */
  170. };
  171. int lis3lv02d_init_device(struct lis3lv02d *lis3);
  172. int lis3lv02d_joystick_enable(void);
  173. void lis3lv02d_joystick_disable(void);
  174. void lis3lv02d_poweroff(struct lis3lv02d *lis3);
  175. void lis3lv02d_poweron(struct lis3lv02d *lis3);
  176. int lis3lv02d_remove_fs(struct lis3lv02d *lis3);
  177. extern struct lis3lv02d lis3_dev;