omap_hwmod.c 59 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2010 Nokia Corporation
  5. *
  6. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  7. *
  8. * Created in collaboration with (alphabetical order): Thara Gopinath,
  9. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  10. * Sawant, Santosh Shilimkar, Richard Woodruff
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * Introduction
  17. * ------------
  18. * One way to view an OMAP SoC is as a collection of largely unrelated
  19. * IP blocks connected by interconnects. The IP blocks include
  20. * devices such as ARM processors, audio serial interfaces, UARTs,
  21. * etc. Some of these devices, like the DSP, are created by TI;
  22. * others, like the SGX, largely originate from external vendors. In
  23. * TI's documentation, on-chip devices are referred to as "OMAP
  24. * modules." Some of these IP blocks are identical across several
  25. * OMAP versions. Others are revised frequently.
  26. *
  27. * These OMAP modules are tied together by various interconnects.
  28. * Most of the address and data flow between modules is via OCP-based
  29. * interconnects such as the L3 and L4 buses; but there are other
  30. * interconnects that distribute the hardware clock tree, handle idle
  31. * and reset signaling, supply power, and connect the modules to
  32. * various pads or balls on the OMAP package.
  33. *
  34. * OMAP hwmod provides a consistent way to describe the on-chip
  35. * hardware blocks and their integration into the rest of the chip.
  36. * This description can be automatically generated from the TI
  37. * hardware database. OMAP hwmod provides a standard, consistent API
  38. * to reset, enable, idle, and disable these hardware blocks. And
  39. * hwmod provides a way for other core code, such as the Linux device
  40. * code or the OMAP power management and address space mapping code,
  41. * to query the hardware database.
  42. *
  43. * Using hwmod
  44. * -----------
  45. * Drivers won't call hwmod functions directly. That is done by the
  46. * omap_device code, and in rare occasions, by custom integration code
  47. * in arch/arm/ *omap*. The omap_device code includes functions to
  48. * build a struct platform_device using omap_hwmod data, and that is
  49. * currently how hwmod data is communicated to drivers and to the
  50. * Linux driver model. Most drivers will call omap_hwmod functions only
  51. * indirectly, via pm_runtime*() functions.
  52. *
  53. * From a layering perspective, here is where the OMAP hwmod code
  54. * fits into the kernel software stack:
  55. *
  56. * +-------------------------------+
  57. * | Device driver code |
  58. * | (e.g., drivers/) |
  59. * +-------------------------------+
  60. * | Linux driver model |
  61. * | (platform_device / |
  62. * | platform_driver data/code) |
  63. * +-------------------------------+
  64. * | OMAP core-driver integration |
  65. * |(arch/arm/mach-omap2/devices.c)|
  66. * +-------------------------------+
  67. * | omap_device code |
  68. * | (../plat-omap/omap_device.c) |
  69. * +-------------------------------+
  70. * ----> | omap_hwmod code/data | <-----
  71. * | (../mach-omap2/omap_hwmod*) |
  72. * +-------------------------------+
  73. * | OMAP clock/PRCM/register fns |
  74. * | (__raw_{read,write}l, clk*) |
  75. * +-------------------------------+
  76. *
  77. * Device drivers should not contain any OMAP-specific code or data in
  78. * them. They should only contain code to operate the IP block that
  79. * the driver is responsible for. This is because these IP blocks can
  80. * also appear in other SoCs, either from TI (such as DaVinci) or from
  81. * other manufacturers; and drivers should be reusable across other
  82. * platforms.
  83. *
  84. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  85. * devices upon boot. The goal here is for the kernel to be
  86. * completely self-reliant and independent from bootloaders. This is
  87. * to ensure a repeatable configuration, both to ensure consistent
  88. * runtime behavior, and to make it easier for others to reproduce
  89. * bugs.
  90. *
  91. * OMAP module activity states
  92. * ---------------------------
  93. * The hwmod code considers modules to be in one of several activity
  94. * states. IP blocks start out in an UNKNOWN state, then once they
  95. * are registered via the hwmod code, proceed to the REGISTERED state.
  96. * Once their clock names are resolved to clock pointers, the module
  97. * enters the CLKS_INITED state; and finally, once the module has been
  98. * reset and the integration registers programmed, the INITIALIZED state
  99. * is entered. The hwmod code will then place the module into either
  100. * the IDLE state to save power, or in the case of a critical system
  101. * module, the ENABLED state.
  102. *
  103. * OMAP core integration code can then call omap_hwmod*() functions
  104. * directly to move the module between the IDLE, ENABLED, and DISABLED
  105. * states, as needed. This is done during both the PM idle loop, and
  106. * in the OMAP core integration code's implementation of the PM runtime
  107. * functions.
  108. *
  109. * References
  110. * ----------
  111. * This is a partial list.
  112. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  113. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  114. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  115. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  116. * - Open Core Protocol Specification 2.2
  117. *
  118. * To do:
  119. * - pin mux handling
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <plat/common.h>
  139. #include <plat/cpu.h>
  140. #include <plat/clockdomain.h>
  141. #include <plat/powerdomain.h>
  142. #include <plat/clock.h>
  143. #include <plat/omap_hwmod.h>
  144. #include <plat/prcm.h>
  145. #include "cm.h"
  146. #include "prm.h"
  147. /* Maximum microseconds to wait for OMAP module to softreset */
  148. #define MAX_MODULE_SOFTRESET_WAIT 10000
  149. /* Name of the OMAP hwmod for the MPU */
  150. #define MPU_INITIATOR_NAME "mpu"
  151. /* omap_hwmod_list contains all registered struct omap_hwmods */
  152. static LIST_HEAD(omap_hwmod_list);
  153. static DEFINE_MUTEX(omap_hwmod_mutex);
  154. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  155. static struct omap_hwmod *mpu_oh;
  156. /* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
  157. static u8 inited;
  158. /* Private functions */
  159. /**
  160. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  161. * @oh: struct omap_hwmod *
  162. *
  163. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  164. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  165. * OCP_SYSCONFIG register or 0 upon success.
  166. */
  167. static int _update_sysc_cache(struct omap_hwmod *oh)
  168. {
  169. if (!oh->class->sysc) {
  170. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  171. return -EINVAL;
  172. }
  173. /* XXX ensure module interface clock is up */
  174. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  175. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  176. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  177. return 0;
  178. }
  179. /**
  180. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  181. * @v: OCP_SYSCONFIG value to write
  182. * @oh: struct omap_hwmod *
  183. *
  184. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  185. * one. No return value.
  186. */
  187. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  188. {
  189. if (!oh->class->sysc) {
  190. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  191. return;
  192. }
  193. /* XXX ensure module interface clock is up */
  194. if (oh->_sysc_cache != v) {
  195. oh->_sysc_cache = v;
  196. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  197. }
  198. }
  199. /**
  200. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  201. * @oh: struct omap_hwmod *
  202. * @standbymode: MIDLEMODE field bits
  203. * @v: pointer to register contents to modify
  204. *
  205. * Update the master standby mode bits in @v to be @standbymode for
  206. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  207. * upon error or 0 upon success.
  208. */
  209. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  210. u32 *v)
  211. {
  212. u32 mstandby_mask;
  213. u8 mstandby_shift;
  214. if (!oh->class->sysc ||
  215. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  216. return -EINVAL;
  217. if (!oh->class->sysc->sysc_fields) {
  218. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  219. return -EINVAL;
  220. }
  221. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  222. mstandby_mask = (0x3 << mstandby_shift);
  223. *v &= ~mstandby_mask;
  224. *v |= __ffs(standbymode) << mstandby_shift;
  225. return 0;
  226. }
  227. /**
  228. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  229. * @oh: struct omap_hwmod *
  230. * @idlemode: SIDLEMODE field bits
  231. * @v: pointer to register contents to modify
  232. *
  233. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  234. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  235. * or 0 upon success.
  236. */
  237. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  238. {
  239. u32 sidle_mask;
  240. u8 sidle_shift;
  241. if (!oh->class->sysc ||
  242. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  243. return -EINVAL;
  244. if (!oh->class->sysc->sysc_fields) {
  245. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  246. return -EINVAL;
  247. }
  248. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  249. sidle_mask = (0x3 << sidle_shift);
  250. *v &= ~sidle_mask;
  251. *v |= __ffs(idlemode) << sidle_shift;
  252. return 0;
  253. }
  254. /**
  255. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  256. * @oh: struct omap_hwmod *
  257. * @clockact: CLOCKACTIVITY field bits
  258. * @v: pointer to register contents to modify
  259. *
  260. * Update the clockactivity mode bits in @v to be @clockact for the
  261. * @oh hwmod. Used for additional powersaving on some modules. Does
  262. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  263. * success.
  264. */
  265. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  266. {
  267. u32 clkact_mask;
  268. u8 clkact_shift;
  269. if (!oh->class->sysc ||
  270. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  271. return -EINVAL;
  272. if (!oh->class->sysc->sysc_fields) {
  273. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  274. return -EINVAL;
  275. }
  276. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  277. clkact_mask = (0x3 << clkact_shift);
  278. *v &= ~clkact_mask;
  279. *v |= clockact << clkact_shift;
  280. return 0;
  281. }
  282. /**
  283. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  284. * @oh: struct omap_hwmod *
  285. * @v: pointer to register contents to modify
  286. *
  287. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  288. * error or 0 upon success.
  289. */
  290. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  291. {
  292. u32 softrst_mask;
  293. if (!oh->class->sysc ||
  294. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  295. return -EINVAL;
  296. if (!oh->class->sysc->sysc_fields) {
  297. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  298. return -EINVAL;
  299. }
  300. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  301. *v |= softrst_mask;
  302. return 0;
  303. }
  304. /**
  305. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  306. * @oh: struct omap_hwmod *
  307. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  308. * @v: pointer to register contents to modify
  309. *
  310. * Update the module autoidle bit in @v to be @autoidle for the @oh
  311. * hwmod. The autoidle bit controls whether the module can gate
  312. * internal clocks automatically when it isn't doing anything; the
  313. * exact function of this bit varies on a per-module basis. This
  314. * function does not write to the hardware. Returns -EINVAL upon
  315. * error or 0 upon success.
  316. */
  317. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  318. u32 *v)
  319. {
  320. u32 autoidle_mask;
  321. u8 autoidle_shift;
  322. if (!oh->class->sysc ||
  323. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  324. return -EINVAL;
  325. if (!oh->class->sysc->sysc_fields) {
  326. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  327. return -EINVAL;
  328. }
  329. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  330. autoidle_mask = (0x3 << autoidle_shift);
  331. *v &= ~autoidle_mask;
  332. *v |= autoidle << autoidle_shift;
  333. return 0;
  334. }
  335. /**
  336. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  337. * @oh: struct omap_hwmod *
  338. *
  339. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  340. * upon error or 0 upon success.
  341. */
  342. static int _enable_wakeup(struct omap_hwmod *oh)
  343. {
  344. u32 v, wakeup_mask;
  345. if (!oh->class->sysc ||
  346. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  347. return -EINVAL;
  348. if (!oh->class->sysc->sysc_fields) {
  349. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  350. return -EINVAL;
  351. }
  352. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  353. v = oh->_sysc_cache;
  354. v |= wakeup_mask;
  355. _write_sysconfig(v, oh);
  356. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  357. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  358. return 0;
  359. }
  360. /**
  361. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  362. * @oh: struct omap_hwmod *
  363. *
  364. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  365. * upon error or 0 upon success.
  366. */
  367. static int _disable_wakeup(struct omap_hwmod *oh)
  368. {
  369. u32 v, wakeup_mask;
  370. if (!oh->class->sysc ||
  371. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  372. return -EINVAL;
  373. if (!oh->class->sysc->sysc_fields) {
  374. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  375. return -EINVAL;
  376. }
  377. wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  378. v = oh->_sysc_cache;
  379. v &= ~wakeup_mask;
  380. _write_sysconfig(v, oh);
  381. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  382. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  383. return 0;
  384. }
  385. /**
  386. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  387. * @oh: struct omap_hwmod *
  388. *
  389. * Prevent the hardware module @oh from entering idle while the
  390. * hardare module initiator @init_oh is active. Useful when a module
  391. * will be accessed by a particular initiator (e.g., if a module will
  392. * be accessed by the IVA, there should be a sleepdep between the IVA
  393. * initiator and the module). Only applies to modules in smart-idle
  394. * mode. Returns -EINVAL upon error or passes along
  395. * clkdm_add_sleepdep() value upon success.
  396. */
  397. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  398. {
  399. if (!oh->_clk)
  400. return -EINVAL;
  401. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  402. }
  403. /**
  404. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  405. * @oh: struct omap_hwmod *
  406. *
  407. * Allow the hardware module @oh to enter idle while the hardare
  408. * module initiator @init_oh is active. Useful when a module will not
  409. * be accessed by a particular initiator (e.g., if a module will not
  410. * be accessed by the IVA, there should be no sleepdep between the IVA
  411. * initiator and the module). Only applies to modules in smart-idle
  412. * mode. Returns -EINVAL upon error or passes along
  413. * clkdm_del_sleepdep() value upon success.
  414. */
  415. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  416. {
  417. if (!oh->_clk)
  418. return -EINVAL;
  419. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  420. }
  421. /**
  422. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  423. * @oh: struct omap_hwmod *
  424. *
  425. * Called from _init_clocks(). Populates the @oh _clk (main
  426. * functional clock pointer) if a main_clk is present. Returns 0 on
  427. * success or -EINVAL on error.
  428. */
  429. static int _init_main_clk(struct omap_hwmod *oh)
  430. {
  431. int ret = 0;
  432. if (!oh->main_clk)
  433. return 0;
  434. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  435. if (!oh->_clk) {
  436. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  437. oh->name, oh->main_clk);
  438. return -EINVAL;
  439. }
  440. if (!oh->_clk->clkdm)
  441. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  442. oh->main_clk, oh->_clk->name);
  443. return ret;
  444. }
  445. /**
  446. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  447. * @oh: struct omap_hwmod *
  448. *
  449. * Called from _init_clocks(). Populates the @oh OCP slave interface
  450. * clock pointers. Returns 0 on success or -EINVAL on error.
  451. */
  452. static int _init_interface_clks(struct omap_hwmod *oh)
  453. {
  454. struct clk *c;
  455. int i;
  456. int ret = 0;
  457. if (oh->slaves_cnt == 0)
  458. return 0;
  459. for (i = 0; i < oh->slaves_cnt; i++) {
  460. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  461. if (!os->clk)
  462. continue;
  463. c = omap_clk_get_by_name(os->clk);
  464. if (!c) {
  465. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  466. oh->name, os->clk);
  467. ret = -EINVAL;
  468. }
  469. os->_clk = c;
  470. }
  471. return ret;
  472. }
  473. /**
  474. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  475. * @oh: struct omap_hwmod *
  476. *
  477. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  478. * clock pointers. Returns 0 on success or -EINVAL on error.
  479. */
  480. static int _init_opt_clks(struct omap_hwmod *oh)
  481. {
  482. struct omap_hwmod_opt_clk *oc;
  483. struct clk *c;
  484. int i;
  485. int ret = 0;
  486. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  487. c = omap_clk_get_by_name(oc->clk);
  488. if (!c) {
  489. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  490. oh->name, oc->clk);
  491. ret = -EINVAL;
  492. }
  493. oc->_clk = c;
  494. }
  495. return ret;
  496. }
  497. /**
  498. * _enable_clocks - enable hwmod main clock and interface clocks
  499. * @oh: struct omap_hwmod *
  500. *
  501. * Enables all clocks necessary for register reads and writes to succeed
  502. * on the hwmod @oh. Returns 0.
  503. */
  504. static int _enable_clocks(struct omap_hwmod *oh)
  505. {
  506. int i;
  507. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  508. if (oh->_clk)
  509. clk_enable(oh->_clk);
  510. if (oh->slaves_cnt > 0) {
  511. for (i = 0; i < oh->slaves_cnt; i++) {
  512. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  513. struct clk *c = os->_clk;
  514. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  515. clk_enable(c);
  516. }
  517. }
  518. /* The opt clocks are controlled by the device driver. */
  519. return 0;
  520. }
  521. /**
  522. * _disable_clocks - disable hwmod main clock and interface clocks
  523. * @oh: struct omap_hwmod *
  524. *
  525. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  526. */
  527. static int _disable_clocks(struct omap_hwmod *oh)
  528. {
  529. int i;
  530. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  531. if (oh->_clk)
  532. clk_disable(oh->_clk);
  533. if (oh->slaves_cnt > 0) {
  534. for (i = 0; i < oh->slaves_cnt; i++) {
  535. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  536. struct clk *c = os->_clk;
  537. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  538. clk_disable(c);
  539. }
  540. }
  541. /* The opt clocks are controlled by the device driver. */
  542. return 0;
  543. }
  544. static void _enable_optional_clocks(struct omap_hwmod *oh)
  545. {
  546. struct omap_hwmod_opt_clk *oc;
  547. int i;
  548. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  549. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  550. if (oc->_clk) {
  551. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  552. oc->_clk->name);
  553. clk_enable(oc->_clk);
  554. }
  555. }
  556. static void _disable_optional_clocks(struct omap_hwmod *oh)
  557. {
  558. struct omap_hwmod_opt_clk *oc;
  559. int i;
  560. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  561. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  562. if (oc->_clk) {
  563. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  564. oc->_clk->name);
  565. clk_disable(oc->_clk);
  566. }
  567. }
  568. /**
  569. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  570. * @oh: struct omap_hwmod *
  571. *
  572. * Returns the array index of the OCP slave port that the MPU
  573. * addresses the device on, or -EINVAL upon error or not found.
  574. */
  575. static int _find_mpu_port_index(struct omap_hwmod *oh)
  576. {
  577. int i;
  578. int found = 0;
  579. if (!oh || oh->slaves_cnt == 0)
  580. return -EINVAL;
  581. for (i = 0; i < oh->slaves_cnt; i++) {
  582. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  583. if (os->user & OCP_USER_MPU) {
  584. found = 1;
  585. break;
  586. }
  587. }
  588. if (found)
  589. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  590. oh->name, i);
  591. else
  592. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  593. oh->name);
  594. return (found) ? i : -EINVAL;
  595. }
  596. /**
  597. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  598. * @oh: struct omap_hwmod *
  599. *
  600. * Return the virtual address of the base of the register target of
  601. * device @oh, or NULL on error.
  602. */
  603. static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  604. {
  605. struct omap_hwmod_ocp_if *os;
  606. struct omap_hwmod_addr_space *mem;
  607. int i;
  608. int found = 0;
  609. void __iomem *va_start;
  610. if (!oh || oh->slaves_cnt == 0)
  611. return NULL;
  612. os = oh->slaves[index];
  613. for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
  614. if (mem->flags & ADDR_TYPE_RT) {
  615. found = 1;
  616. break;
  617. }
  618. }
  619. if (found) {
  620. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  621. if (!va_start) {
  622. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  623. return NULL;
  624. }
  625. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  626. oh->name, va_start);
  627. } else {
  628. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  629. oh->name);
  630. }
  631. return (found) ? va_start : NULL;
  632. }
  633. /**
  634. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  635. * @oh: struct omap_hwmod *
  636. *
  637. * If module is marked as SWSUP_SIDLE, force the module out of slave
  638. * idle; otherwise, configure it for smart-idle. If module is marked
  639. * as SWSUP_MSUSPEND, force the module out of master standby;
  640. * otherwise, configure it for smart-standby. No return value.
  641. */
  642. static void _enable_sysc(struct omap_hwmod *oh)
  643. {
  644. u8 idlemode, sf;
  645. u32 v;
  646. if (!oh->class->sysc)
  647. return;
  648. v = oh->_sysc_cache;
  649. sf = oh->class->sysc->sysc_flags;
  650. if (sf & SYSC_HAS_SIDLEMODE) {
  651. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  652. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  653. _set_slave_idlemode(oh, idlemode, &v);
  654. }
  655. if (sf & SYSC_HAS_MIDLEMODE) {
  656. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  657. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  658. _set_master_standbymode(oh, idlemode, &v);
  659. }
  660. /*
  661. * XXX The clock framework should handle this, by
  662. * calling into this code. But this must wait until the
  663. * clock structures are tagged with omap_hwmod entries
  664. */
  665. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  666. (sf & SYSC_HAS_CLOCKACTIVITY))
  667. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  668. _write_sysconfig(v, oh);
  669. /* If slave is in SMARTIDLE, also enable wakeup */
  670. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  671. _enable_wakeup(oh);
  672. /*
  673. * Set the autoidle bit only after setting the smartidle bit
  674. * Setting this will not have any impact on the other modules.
  675. */
  676. if (sf & SYSC_HAS_AUTOIDLE) {
  677. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  678. 0 : 1;
  679. _set_module_autoidle(oh, idlemode, &v);
  680. _write_sysconfig(v, oh);
  681. }
  682. }
  683. /**
  684. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  685. * @oh: struct omap_hwmod *
  686. *
  687. * If module is marked as SWSUP_SIDLE, force the module into slave
  688. * idle; otherwise, configure it for smart-idle. If module is marked
  689. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  690. * configure it for smart-standby. No return value.
  691. */
  692. static void _idle_sysc(struct omap_hwmod *oh)
  693. {
  694. u8 idlemode, sf;
  695. u32 v;
  696. if (!oh->class->sysc)
  697. return;
  698. v = oh->_sysc_cache;
  699. sf = oh->class->sysc->sysc_flags;
  700. if (sf & SYSC_HAS_SIDLEMODE) {
  701. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  702. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  703. _set_slave_idlemode(oh, idlemode, &v);
  704. }
  705. if (sf & SYSC_HAS_MIDLEMODE) {
  706. idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
  707. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  708. _set_master_standbymode(oh, idlemode, &v);
  709. }
  710. _write_sysconfig(v, oh);
  711. }
  712. /**
  713. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  714. * @oh: struct omap_hwmod *
  715. *
  716. * Force the module into slave idle and master suspend. No return
  717. * value.
  718. */
  719. static void _shutdown_sysc(struct omap_hwmod *oh)
  720. {
  721. u32 v;
  722. u8 sf;
  723. if (!oh->class->sysc)
  724. return;
  725. v = oh->_sysc_cache;
  726. sf = oh->class->sysc->sysc_flags;
  727. if (sf & SYSC_HAS_SIDLEMODE)
  728. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  729. if (sf & SYSC_HAS_MIDLEMODE)
  730. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  731. if (sf & SYSC_HAS_AUTOIDLE)
  732. _set_module_autoidle(oh, 1, &v);
  733. _write_sysconfig(v, oh);
  734. }
  735. /**
  736. * _lookup - find an omap_hwmod by name
  737. * @name: find an omap_hwmod by name
  738. *
  739. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  740. * Caller must hold omap_hwmod_mutex.
  741. */
  742. static struct omap_hwmod *_lookup(const char *name)
  743. {
  744. struct omap_hwmod *oh, *temp_oh;
  745. oh = NULL;
  746. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  747. if (!strcmp(name, temp_oh->name)) {
  748. oh = temp_oh;
  749. break;
  750. }
  751. }
  752. return oh;
  753. }
  754. /**
  755. * _init_clocks - clk_get() all clocks associated with this hwmod
  756. * @oh: struct omap_hwmod *
  757. * @data: not used; pass NULL
  758. *
  759. * Called by omap_hwmod_late_init() (after omap2_clk_init()).
  760. * Resolves all clock names embedded in the hwmod. Returns -EINVAL if
  761. * the omap_hwmod has not yet been registered or if the clocks have
  762. * already been initialized, 0 on success, or a non-zero error on
  763. * failure.
  764. */
  765. static int _init_clocks(struct omap_hwmod *oh, void *data)
  766. {
  767. int ret = 0;
  768. if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
  769. return -EINVAL;
  770. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  771. ret |= _init_main_clk(oh);
  772. ret |= _init_interface_clks(oh);
  773. ret |= _init_opt_clks(oh);
  774. if (!ret)
  775. oh->_state = _HWMOD_STATE_CLKS_INITED;
  776. return 0;
  777. }
  778. /**
  779. * _wait_target_ready - wait for a module to leave slave idle
  780. * @oh: struct omap_hwmod *
  781. *
  782. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  783. * does not have an IDLEST bit or if the module successfully leaves
  784. * slave idle; otherwise, pass along the return value of the
  785. * appropriate *_cm_wait_module_ready() function.
  786. */
  787. static int _wait_target_ready(struct omap_hwmod *oh)
  788. {
  789. struct omap_hwmod_ocp_if *os;
  790. int ret;
  791. if (!oh)
  792. return -EINVAL;
  793. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  794. return 0;
  795. os = oh->slaves[oh->_mpu_port_index];
  796. if (oh->flags & HWMOD_NO_IDLEST)
  797. return 0;
  798. /* XXX check module SIDLEMODE */
  799. /* XXX check clock enable states */
  800. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  801. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  802. oh->prcm.omap2.idlest_reg_id,
  803. oh->prcm.omap2.idlest_idle_bit);
  804. } else if (cpu_is_omap44xx()) {
  805. ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
  806. } else {
  807. BUG();
  808. };
  809. return ret;
  810. }
  811. /**
  812. * _lookup_hardreset - return the register bit shift for this hwmod/reset line
  813. * @oh: struct omap_hwmod *
  814. * @name: name of the reset line in the context of this hwmod
  815. *
  816. * Return the bit position of the reset line that match the
  817. * input name. Return -ENOENT if not found.
  818. */
  819. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
  820. {
  821. int i;
  822. for (i = 0; i < oh->rst_lines_cnt; i++) {
  823. const char *rst_line = oh->rst_lines[i].name;
  824. if (!strcmp(rst_line, name)) {
  825. u8 shift = oh->rst_lines[i].rst_shift;
  826. pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
  827. oh->name, rst_line, shift);
  828. return shift;
  829. }
  830. }
  831. return -ENOENT;
  832. }
  833. /**
  834. * _assert_hardreset - assert the HW reset line of submodules
  835. * contained in the hwmod module.
  836. * @oh: struct omap_hwmod *
  837. * @name: name of the reset line to lookup and assert
  838. *
  839. * Some IP like dsp, ipu or iva contain processor that require
  840. * an HW reset line to be assert / deassert in order to enable fully
  841. * the IP.
  842. */
  843. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  844. {
  845. u8 shift;
  846. if (!oh)
  847. return -EINVAL;
  848. shift = _lookup_hardreset(oh, name);
  849. if (IS_ERR_VALUE(shift))
  850. return shift;
  851. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  852. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  853. shift);
  854. else if (cpu_is_omap44xx())
  855. return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
  856. shift);
  857. else
  858. return -EINVAL;
  859. }
  860. /**
  861. * _deassert_hardreset - deassert the HW reset line of submodules contained
  862. * in the hwmod module.
  863. * @oh: struct omap_hwmod *
  864. * @name: name of the reset line to look up and deassert
  865. *
  866. * Some IP like dsp, ipu or iva contain processor that require
  867. * an HW reset line to be assert / deassert in order to enable fully
  868. * the IP.
  869. */
  870. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  871. {
  872. u8 shift;
  873. int r;
  874. if (!oh)
  875. return -EINVAL;
  876. shift = _lookup_hardreset(oh, name);
  877. if (IS_ERR_VALUE(shift))
  878. return shift;
  879. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  880. r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  881. shift);
  882. else if (cpu_is_omap44xx())
  883. r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
  884. shift);
  885. else
  886. return -EINVAL;
  887. if (r == -EBUSY)
  888. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  889. return r;
  890. }
  891. /**
  892. * _read_hardreset - read the HW reset line state of submodules
  893. * contained in the hwmod module
  894. * @oh: struct omap_hwmod *
  895. * @name: name of the reset line to look up and read
  896. *
  897. * Return the state of the reset line.
  898. */
  899. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  900. {
  901. u8 shift;
  902. if (!oh)
  903. return -EINVAL;
  904. shift = _lookup_hardreset(oh, name);
  905. if (IS_ERR_VALUE(shift))
  906. return shift;
  907. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  908. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  909. shift);
  910. } else if (cpu_is_omap44xx()) {
  911. return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
  912. shift);
  913. } else {
  914. return -EINVAL;
  915. }
  916. }
  917. /**
  918. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  919. * @oh: struct omap_hwmod *
  920. *
  921. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  922. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  923. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  924. * the module did not reset in time, or 0 upon success.
  925. *
  926. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  927. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  928. * use the SYSCONFIG softreset bit to provide the status.
  929. *
  930. * Note that some IP like McBSP do have reset control but don't have
  931. * reset status.
  932. */
  933. static int _ocp_softreset(struct omap_hwmod *oh)
  934. {
  935. u32 v;
  936. int c = 0;
  937. int ret = 0;
  938. if (!oh->class->sysc ||
  939. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  940. return -EINVAL;
  941. /* clocks must be on for this operation */
  942. if (oh->_state != _HWMOD_STATE_ENABLED) {
  943. pr_warning("omap_hwmod: %s: reset can only be entered from "
  944. "enabled state\n", oh->name);
  945. return -EINVAL;
  946. }
  947. /* For some modules, all optionnal clocks need to be enabled as well */
  948. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  949. _enable_optional_clocks(oh);
  950. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  951. v = oh->_sysc_cache;
  952. ret = _set_softreset(oh, &v);
  953. if (ret)
  954. goto dis_opt_clks;
  955. _write_sysconfig(v, oh);
  956. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  957. omap_test_timeout((omap_hwmod_read(oh,
  958. oh->class->sysc->syss_offs)
  959. & SYSS_RESETDONE_MASK),
  960. MAX_MODULE_SOFTRESET_WAIT, c);
  961. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  962. omap_test_timeout(!(omap_hwmod_read(oh,
  963. oh->class->sysc->sysc_offs)
  964. & SYSC_TYPE2_SOFTRESET_MASK),
  965. MAX_MODULE_SOFTRESET_WAIT, c);
  966. if (c == MAX_MODULE_SOFTRESET_WAIT)
  967. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  968. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  969. else
  970. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  971. /*
  972. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  973. * _wait_target_ready() or _reset()
  974. */
  975. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  976. dis_opt_clks:
  977. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  978. _disable_optional_clocks(oh);
  979. return ret;
  980. }
  981. /**
  982. * _reset - reset an omap_hwmod
  983. * @oh: struct omap_hwmod *
  984. *
  985. * Resets an omap_hwmod @oh. The default software reset mechanism for
  986. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  987. * bit. However, some hwmods cannot be reset via this method: some
  988. * are not targets and therefore have no OCP header registers to
  989. * access; others (like the IVA) have idiosyncratic reset sequences.
  990. * So for these relatively rare cases, custom reset code can be
  991. * supplied in the struct omap_hwmod_class .reset function pointer.
  992. * Passes along the return value from either _reset() or the custom
  993. * reset function - these must return -EINVAL if the hwmod cannot be
  994. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  995. * the module did not reset in time, or 0 upon success.
  996. */
  997. static int _reset(struct omap_hwmod *oh)
  998. {
  999. int ret;
  1000. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1001. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1002. return ret;
  1003. }
  1004. /**
  1005. * _enable - enable an omap_hwmod
  1006. * @oh: struct omap_hwmod *
  1007. *
  1008. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1009. * register target. Returns -EINVAL if the hwmod is in the wrong
  1010. * state or passes along the return value of _wait_target_ready().
  1011. */
  1012. static int _enable(struct omap_hwmod *oh)
  1013. {
  1014. int r;
  1015. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1016. oh->_state != _HWMOD_STATE_IDLE &&
  1017. oh->_state != _HWMOD_STATE_DISABLED) {
  1018. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1019. "from initialized, idle, or disabled state\n", oh->name);
  1020. return -EINVAL;
  1021. }
  1022. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1023. /*
  1024. * If an IP contains only one HW reset line, then de-assert it in order
  1025. * to allow to enable the clocks. Otherwise the PRCM will return
  1026. * Intransition status, and the init will failed.
  1027. */
  1028. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1029. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1030. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1031. /* XXX mux balls */
  1032. _add_initiator_dep(oh, mpu_oh);
  1033. _enable_clocks(oh);
  1034. r = _wait_target_ready(oh);
  1035. if (!r) {
  1036. oh->_state = _HWMOD_STATE_ENABLED;
  1037. /* Access the sysconfig only if the target is ready */
  1038. if (oh->class->sysc) {
  1039. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1040. _update_sysc_cache(oh);
  1041. _enable_sysc(oh);
  1042. }
  1043. } else {
  1044. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1045. oh->name, r);
  1046. }
  1047. return r;
  1048. }
  1049. /**
  1050. * _idle - idle an omap_hwmod
  1051. * @oh: struct omap_hwmod *
  1052. *
  1053. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1054. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1055. * state or returns 0.
  1056. */
  1057. static int _idle(struct omap_hwmod *oh)
  1058. {
  1059. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1060. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1061. "enabled state\n", oh->name);
  1062. return -EINVAL;
  1063. }
  1064. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1065. if (oh->class->sysc)
  1066. _idle_sysc(oh);
  1067. _del_initiator_dep(oh, mpu_oh);
  1068. _disable_clocks(oh);
  1069. oh->_state = _HWMOD_STATE_IDLE;
  1070. return 0;
  1071. }
  1072. /**
  1073. * _shutdown - shutdown an omap_hwmod
  1074. * @oh: struct omap_hwmod *
  1075. *
  1076. * Shut down an omap_hwmod @oh. This should be called when the driver
  1077. * used for the hwmod is removed or unloaded or if the driver is not
  1078. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1079. * state or returns 0.
  1080. */
  1081. static int _shutdown(struct omap_hwmod *oh)
  1082. {
  1083. int ret;
  1084. u8 prev_state;
  1085. if (oh->_state != _HWMOD_STATE_IDLE &&
  1086. oh->_state != _HWMOD_STATE_ENABLED) {
  1087. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1088. "from idle, or enabled state\n", oh->name);
  1089. return -EINVAL;
  1090. }
  1091. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1092. if (oh->class->pre_shutdown) {
  1093. prev_state = oh->_state;
  1094. if (oh->_state == _HWMOD_STATE_IDLE)
  1095. _enable(oh);
  1096. ret = oh->class->pre_shutdown(oh);
  1097. if (ret) {
  1098. if (prev_state == _HWMOD_STATE_IDLE)
  1099. _idle(oh);
  1100. return ret;
  1101. }
  1102. }
  1103. if (oh->class->sysc)
  1104. _shutdown_sysc(oh);
  1105. /*
  1106. * If an IP contains only one HW reset line, then assert it
  1107. * before disabling the clocks and shutting down the IP.
  1108. */
  1109. if (oh->rst_lines_cnt == 1)
  1110. _assert_hardreset(oh, oh->rst_lines[0].name);
  1111. /* clocks and deps are already disabled in idle */
  1112. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1113. _del_initiator_dep(oh, mpu_oh);
  1114. /* XXX what about the other system initiators here? dma, dsp */
  1115. _disable_clocks(oh);
  1116. }
  1117. /* XXX Should this code also force-disable the optional clocks? */
  1118. /* XXX mux any associated balls to safe mode */
  1119. oh->_state = _HWMOD_STATE_DISABLED;
  1120. return 0;
  1121. }
  1122. /**
  1123. * _setup - do initial configuration of omap_hwmod
  1124. * @oh: struct omap_hwmod *
  1125. *
  1126. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1127. * OCP_SYSCONFIG register. Returns -EINVAL if the hwmod is in the
  1128. * wrong state or returns 0.
  1129. */
  1130. static int _setup(struct omap_hwmod *oh, void *data)
  1131. {
  1132. int i, r;
  1133. u8 postsetup_state;
  1134. /* Set iclk autoidle mode */
  1135. if (oh->slaves_cnt > 0) {
  1136. for (i = 0; i < oh->slaves_cnt; i++) {
  1137. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1138. struct clk *c = os->_clk;
  1139. if (!c)
  1140. continue;
  1141. if (os->flags & OCPIF_SWSUP_IDLE) {
  1142. /* XXX omap_iclk_deny_idle(c); */
  1143. } else {
  1144. /* XXX omap_iclk_allow_idle(c); */
  1145. clk_enable(c);
  1146. }
  1147. }
  1148. }
  1149. oh->_state = _HWMOD_STATE_INITIALIZED;
  1150. /*
  1151. * In the case of hwmod with hardreset that should not be
  1152. * de-assert at boot time, we have to keep the module
  1153. * initialized, because we cannot enable it properly with the
  1154. * reset asserted. Exit without warning because that behavior is
  1155. * expected.
  1156. */
  1157. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1158. return 0;
  1159. r = _enable(oh);
  1160. if (r) {
  1161. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1162. oh->name, oh->_state);
  1163. return 0;
  1164. }
  1165. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1166. _reset(oh);
  1167. /*
  1168. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1169. * The _enable() function should be split to
  1170. * avoid the rewrite of the OCP_SYSCONFIG register.
  1171. */
  1172. if (oh->class->sysc) {
  1173. _update_sysc_cache(oh);
  1174. _enable_sysc(oh);
  1175. }
  1176. }
  1177. postsetup_state = oh->_postsetup_state;
  1178. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1179. postsetup_state = _HWMOD_STATE_ENABLED;
  1180. /*
  1181. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1182. * it should be set by the core code as a runtime flag during startup
  1183. */
  1184. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1185. (postsetup_state == _HWMOD_STATE_IDLE))
  1186. postsetup_state = _HWMOD_STATE_ENABLED;
  1187. if (postsetup_state == _HWMOD_STATE_IDLE)
  1188. _idle(oh);
  1189. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1190. _shutdown(oh);
  1191. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1192. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1193. oh->name, postsetup_state);
  1194. return 0;
  1195. }
  1196. /* Public functions */
  1197. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1198. {
  1199. if (oh->flags & HWMOD_16BIT_REG)
  1200. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1201. else
  1202. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1203. }
  1204. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1205. {
  1206. if (oh->flags & HWMOD_16BIT_REG)
  1207. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1208. else
  1209. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1210. }
  1211. /**
  1212. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1213. * @oh: struct omap_hwmod *
  1214. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1215. *
  1216. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1217. * local copy. Intended to be used by drivers that have some erratum
  1218. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1219. * -EINVAL if @oh is null, or passes along the return value from
  1220. * _set_slave_idlemode().
  1221. *
  1222. * XXX Does this function have any current users? If not, we should
  1223. * remove it; it is better to let the rest of the hwmod code handle this.
  1224. * Any users of this function should be scrutinized carefully.
  1225. */
  1226. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1227. {
  1228. u32 v;
  1229. int retval = 0;
  1230. if (!oh)
  1231. return -EINVAL;
  1232. v = oh->_sysc_cache;
  1233. retval = _set_slave_idlemode(oh, idlemode, &v);
  1234. if (!retval)
  1235. _write_sysconfig(v, oh);
  1236. return retval;
  1237. }
  1238. /**
  1239. * omap_hwmod_register - register a struct omap_hwmod
  1240. * @oh: struct omap_hwmod *
  1241. *
  1242. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1243. * already has been registered by the same name; -EINVAL if the
  1244. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1245. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1246. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1247. * success.
  1248. *
  1249. * XXX The data should be copied into bootmem, so the original data
  1250. * should be marked __initdata and freed after init. This would allow
  1251. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1252. * that the copy process would be relatively complex due to the large number
  1253. * of substructures.
  1254. */
  1255. int omap_hwmod_register(struct omap_hwmod *oh)
  1256. {
  1257. int ret, ms_id;
  1258. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1259. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1260. return -EINVAL;
  1261. mutex_lock(&omap_hwmod_mutex);
  1262. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1263. if (_lookup(oh->name)) {
  1264. ret = -EEXIST;
  1265. goto ohr_unlock;
  1266. }
  1267. ms_id = _find_mpu_port_index(oh);
  1268. if (!IS_ERR_VALUE(ms_id)) {
  1269. oh->_mpu_port_index = ms_id;
  1270. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1271. } else {
  1272. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1273. }
  1274. list_add_tail(&oh->node, &omap_hwmod_list);
  1275. spin_lock_init(&oh->_lock);
  1276. oh->_state = _HWMOD_STATE_REGISTERED;
  1277. ret = 0;
  1278. ohr_unlock:
  1279. mutex_unlock(&omap_hwmod_mutex);
  1280. return ret;
  1281. }
  1282. /**
  1283. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1284. * @name: name of the omap_hwmod to look up
  1285. *
  1286. * Given a @name of an omap_hwmod, return a pointer to the registered
  1287. * struct omap_hwmod *, or NULL upon error.
  1288. */
  1289. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1290. {
  1291. struct omap_hwmod *oh;
  1292. if (!name)
  1293. return NULL;
  1294. mutex_lock(&omap_hwmod_mutex);
  1295. oh = _lookup(name);
  1296. mutex_unlock(&omap_hwmod_mutex);
  1297. return oh;
  1298. }
  1299. /**
  1300. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1301. * @fn: pointer to a callback function
  1302. * @data: void * data to pass to callback function
  1303. *
  1304. * Call @fn for each registered omap_hwmod, passing @data to each
  1305. * function. @fn must return 0 for success or any other value for
  1306. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1307. * will stop and the non-zero return value will be passed to the
  1308. * caller of omap_hwmod_for_each(). @fn is called with
  1309. * omap_hwmod_for_each() held.
  1310. */
  1311. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1312. void *data)
  1313. {
  1314. struct omap_hwmod *temp_oh;
  1315. int ret;
  1316. if (!fn)
  1317. return -EINVAL;
  1318. mutex_lock(&omap_hwmod_mutex);
  1319. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1320. ret = (*fn)(temp_oh, data);
  1321. if (ret)
  1322. break;
  1323. }
  1324. mutex_unlock(&omap_hwmod_mutex);
  1325. return ret;
  1326. }
  1327. /**
  1328. * omap_hwmod_init - init omap_hwmod code and register hwmods
  1329. * @ohs: pointer to an array of omap_hwmods to register
  1330. *
  1331. * Intended to be called early in boot before the clock framework is
  1332. * initialized. If @ohs is not null, will register all omap_hwmods
  1333. * listed in @ohs that are valid for this chip. Returns -EINVAL if
  1334. * omap_hwmod_init() has already been called or 0 otherwise.
  1335. */
  1336. int omap_hwmod_init(struct omap_hwmod **ohs)
  1337. {
  1338. struct omap_hwmod *oh;
  1339. int r;
  1340. if (inited)
  1341. return -EINVAL;
  1342. inited = 1;
  1343. if (!ohs)
  1344. return 0;
  1345. oh = *ohs;
  1346. while (oh) {
  1347. if (omap_chip_is(oh->omap_chip)) {
  1348. r = omap_hwmod_register(oh);
  1349. WARN(r, "omap_hwmod: %s: omap_hwmod_register returned "
  1350. "%d\n", oh->name, r);
  1351. }
  1352. oh = *++ohs;
  1353. }
  1354. return 0;
  1355. }
  1356. /**
  1357. * omap_hwmod_late_init - do some post-clock framework initialization
  1358. *
  1359. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1360. * to struct clk pointers for each registered omap_hwmod. Also calls
  1361. * _setup() on each hwmod. Returns 0.
  1362. */
  1363. int omap_hwmod_late_init(void)
  1364. {
  1365. int r;
  1366. /* XXX check return value */
  1367. r = omap_hwmod_for_each(_init_clocks, NULL);
  1368. WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
  1369. mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
  1370. WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
  1371. MPU_INITIATOR_NAME);
  1372. omap_hwmod_for_each(_setup, NULL);
  1373. return 0;
  1374. }
  1375. /**
  1376. * omap_hwmod_unregister - unregister an omap_hwmod
  1377. * @oh: struct omap_hwmod *
  1378. *
  1379. * Unregisters a previously-registered omap_hwmod @oh. There's probably
  1380. * no use case for this, so it is likely to be removed in a later version.
  1381. *
  1382. * XXX Free all of the bootmem-allocated structures here when that is
  1383. * implemented. Make it clear that core code is the only code that is
  1384. * expected to unregister modules.
  1385. */
  1386. int omap_hwmod_unregister(struct omap_hwmod *oh)
  1387. {
  1388. if (!oh)
  1389. return -EINVAL;
  1390. pr_debug("omap_hwmod: %s: unregistering\n", oh->name);
  1391. mutex_lock(&omap_hwmod_mutex);
  1392. iounmap(oh->_mpu_rt_va);
  1393. list_del(&oh->node);
  1394. mutex_unlock(&omap_hwmod_mutex);
  1395. return 0;
  1396. }
  1397. /**
  1398. * omap_hwmod_enable - enable an omap_hwmod
  1399. * @oh: struct omap_hwmod *
  1400. *
  1401. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1402. * Returns -EINVAL on error or passes along the return value from _enable().
  1403. */
  1404. int omap_hwmod_enable(struct omap_hwmod *oh)
  1405. {
  1406. int r;
  1407. unsigned long flags;
  1408. if (!oh)
  1409. return -EINVAL;
  1410. spin_lock_irqsave(&oh->_lock, flags);
  1411. r = _enable(oh);
  1412. spin_unlock_irqrestore(&oh->_lock, flags);
  1413. return r;
  1414. }
  1415. /**
  1416. * omap_hwmod_idle - idle an omap_hwmod
  1417. * @oh: struct omap_hwmod *
  1418. *
  1419. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1420. * Returns -EINVAL on error or passes along the return value from _idle().
  1421. */
  1422. int omap_hwmod_idle(struct omap_hwmod *oh)
  1423. {
  1424. unsigned long flags;
  1425. if (!oh)
  1426. return -EINVAL;
  1427. spin_lock_irqsave(&oh->_lock, flags);
  1428. _idle(oh);
  1429. spin_unlock_irqrestore(&oh->_lock, flags);
  1430. return 0;
  1431. }
  1432. /**
  1433. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1434. * @oh: struct omap_hwmod *
  1435. *
  1436. * Shutdown an omap_hwmod @oh. Intended to be called by
  1437. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1438. * the return value from _shutdown().
  1439. */
  1440. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1441. {
  1442. unsigned long flags;
  1443. if (!oh)
  1444. return -EINVAL;
  1445. spin_lock_irqsave(&oh->_lock, flags);
  1446. _shutdown(oh);
  1447. spin_unlock_irqrestore(&oh->_lock, flags);
  1448. return 0;
  1449. }
  1450. /**
  1451. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1452. * @oh: struct omap_hwmod *oh
  1453. *
  1454. * Intended to be called by the omap_device code.
  1455. */
  1456. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1457. {
  1458. unsigned long flags;
  1459. spin_lock_irqsave(&oh->_lock, flags);
  1460. _enable_clocks(oh);
  1461. spin_unlock_irqrestore(&oh->_lock, flags);
  1462. return 0;
  1463. }
  1464. /**
  1465. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1466. * @oh: struct omap_hwmod *oh
  1467. *
  1468. * Intended to be called by the omap_device code.
  1469. */
  1470. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1471. {
  1472. unsigned long flags;
  1473. spin_lock_irqsave(&oh->_lock, flags);
  1474. _disable_clocks(oh);
  1475. spin_unlock_irqrestore(&oh->_lock, flags);
  1476. return 0;
  1477. }
  1478. /**
  1479. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1480. * @oh: struct omap_hwmod *oh
  1481. *
  1482. * Intended to be called by drivers and core code when all posted
  1483. * writes to a device must complete before continuing further
  1484. * execution (for example, after clearing some device IRQSTATUS
  1485. * register bits)
  1486. *
  1487. * XXX what about targets with multiple OCP threads?
  1488. */
  1489. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1490. {
  1491. BUG_ON(!oh);
  1492. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1493. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1494. "device configuration\n", oh->name);
  1495. return;
  1496. }
  1497. /*
  1498. * Forces posted writes to complete on the OCP thread handling
  1499. * register writes
  1500. */
  1501. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1502. }
  1503. /**
  1504. * omap_hwmod_reset - reset the hwmod
  1505. * @oh: struct omap_hwmod *
  1506. *
  1507. * Under some conditions, a driver may wish to reset the entire device.
  1508. * Called from omap_device code. Returns -EINVAL on error or passes along
  1509. * the return value from _reset().
  1510. */
  1511. int omap_hwmod_reset(struct omap_hwmod *oh)
  1512. {
  1513. int r;
  1514. unsigned long flags;
  1515. if (!oh)
  1516. return -EINVAL;
  1517. spin_lock_irqsave(&oh->_lock, flags);
  1518. r = _reset(oh);
  1519. spin_unlock_irqrestore(&oh->_lock, flags);
  1520. return r;
  1521. }
  1522. /**
  1523. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1524. * @oh: struct omap_hwmod *
  1525. * @res: pointer to the first element of an array of struct resource to fill
  1526. *
  1527. * Count the number of struct resource array elements necessary to
  1528. * contain omap_hwmod @oh resources. Intended to be called by code
  1529. * that registers omap_devices. Intended to be used to determine the
  1530. * size of a dynamically-allocated struct resource array, before
  1531. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1532. * resource array elements needed.
  1533. *
  1534. * XXX This code is not optimized. It could attempt to merge adjacent
  1535. * resource IDs.
  1536. *
  1537. */
  1538. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1539. {
  1540. int ret, i;
  1541. ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
  1542. for (i = 0; i < oh->slaves_cnt; i++)
  1543. ret += oh->slaves[i]->addr_cnt;
  1544. return ret;
  1545. }
  1546. /**
  1547. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1548. * @oh: struct omap_hwmod *
  1549. * @res: pointer to the first element of an array of struct resource to fill
  1550. *
  1551. * Fill the struct resource array @res with resource data from the
  1552. * omap_hwmod @oh. Intended to be called by code that registers
  1553. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1554. * number of array elements filled.
  1555. */
  1556. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1557. {
  1558. int i, j;
  1559. int r = 0;
  1560. /* For each IRQ, DMA, memory area, fill in array.*/
  1561. for (i = 0; i < oh->mpu_irqs_cnt; i++) {
  1562. (res + r)->name = (oh->mpu_irqs + i)->name;
  1563. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1564. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1565. (res + r)->flags = IORESOURCE_IRQ;
  1566. r++;
  1567. }
  1568. for (i = 0; i < oh->sdma_reqs_cnt; i++) {
  1569. (res + r)->name = (oh->sdma_reqs + i)->name;
  1570. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1571. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1572. (res + r)->flags = IORESOURCE_DMA;
  1573. r++;
  1574. }
  1575. for (i = 0; i < oh->slaves_cnt; i++) {
  1576. struct omap_hwmod_ocp_if *os;
  1577. os = oh->slaves[i];
  1578. for (j = 0; j < os->addr_cnt; j++) {
  1579. (res + r)->start = (os->addr + j)->pa_start;
  1580. (res + r)->end = (os->addr + j)->pa_end;
  1581. (res + r)->flags = IORESOURCE_MEM;
  1582. r++;
  1583. }
  1584. }
  1585. return r;
  1586. }
  1587. /**
  1588. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1589. * @oh: struct omap_hwmod *
  1590. *
  1591. * Return the powerdomain pointer associated with the OMAP module
  1592. * @oh's main clock. If @oh does not have a main clk, return the
  1593. * powerdomain associated with the interface clock associated with the
  1594. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1595. * instead?) Returns NULL on error, or a struct powerdomain * on
  1596. * success.
  1597. */
  1598. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1599. {
  1600. struct clk *c;
  1601. if (!oh)
  1602. return NULL;
  1603. if (oh->_clk) {
  1604. c = oh->_clk;
  1605. } else {
  1606. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1607. return NULL;
  1608. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1609. }
  1610. if (!c->clkdm)
  1611. return NULL;
  1612. return c->clkdm->pwrdm.ptr;
  1613. }
  1614. /**
  1615. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1616. * @oh: struct omap_hwmod *
  1617. *
  1618. * Returns the virtual address corresponding to the beginning of the
  1619. * module's register target, in the address range that is intended to
  1620. * be used by the MPU. Returns the virtual address upon success or NULL
  1621. * upon error.
  1622. */
  1623. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  1624. {
  1625. if (!oh)
  1626. return NULL;
  1627. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1628. return NULL;
  1629. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  1630. return NULL;
  1631. return oh->_mpu_rt_va;
  1632. }
  1633. /**
  1634. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  1635. * @oh: struct omap_hwmod *
  1636. * @init_oh: struct omap_hwmod * (initiator)
  1637. *
  1638. * Add a sleep dependency between the initiator @init_oh and @oh.
  1639. * Intended to be called by DSP/Bridge code via platform_data for the
  1640. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1641. * code needs to add/del initiator dependencies dynamically
  1642. * before/after accessing a device. Returns the return value from
  1643. * _add_initiator_dep().
  1644. *
  1645. * XXX Keep a usecount in the clockdomain code
  1646. */
  1647. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  1648. struct omap_hwmod *init_oh)
  1649. {
  1650. return _add_initiator_dep(oh, init_oh);
  1651. }
  1652. /*
  1653. * XXX what about functions for drivers to save/restore ocp_sysconfig
  1654. * for context save/restore operations?
  1655. */
  1656. /**
  1657. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  1658. * @oh: struct omap_hwmod *
  1659. * @init_oh: struct omap_hwmod * (initiator)
  1660. *
  1661. * Remove a sleep dependency between the initiator @init_oh and @oh.
  1662. * Intended to be called by DSP/Bridge code via platform_data for the
  1663. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1664. * code needs to add/del initiator dependencies dynamically
  1665. * before/after accessing a device. Returns the return value from
  1666. * _del_initiator_dep().
  1667. *
  1668. * XXX Keep a usecount in the clockdomain code
  1669. */
  1670. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  1671. struct omap_hwmod *init_oh)
  1672. {
  1673. return _del_initiator_dep(oh, init_oh);
  1674. }
  1675. /**
  1676. * omap_hwmod_enable_wakeup - allow device to wake up the system
  1677. * @oh: struct omap_hwmod *
  1678. *
  1679. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  1680. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  1681. * registers to cause the PRCM to receive wakeup events from the
  1682. * module. Does not set any wakeup routing registers beyond this
  1683. * point - if the module is to wake up any other module or subsystem,
  1684. * that must be set separately. Called by omap_device code. Returns
  1685. * -EINVAL on error or 0 upon success.
  1686. */
  1687. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  1688. {
  1689. unsigned long flags;
  1690. if (!oh->class->sysc ||
  1691. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1692. return -EINVAL;
  1693. spin_lock_irqsave(&oh->_lock, flags);
  1694. _enable_wakeup(oh);
  1695. spin_unlock_irqrestore(&oh->_lock, flags);
  1696. return 0;
  1697. }
  1698. /**
  1699. * omap_hwmod_disable_wakeup - prevent device from waking the system
  1700. * @oh: struct omap_hwmod *
  1701. *
  1702. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  1703. * from sending wakeups to the PRCM. Eventually this should clear
  1704. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  1705. * from the module. Does not set any wakeup routing registers beyond
  1706. * this point - if the module is to wake up any other module or
  1707. * subsystem, that must be set separately. Called by omap_device
  1708. * code. Returns -EINVAL on error or 0 upon success.
  1709. */
  1710. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  1711. {
  1712. unsigned long flags;
  1713. if (!oh->class->sysc ||
  1714. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1715. return -EINVAL;
  1716. spin_lock_irqsave(&oh->_lock, flags);
  1717. _disable_wakeup(oh);
  1718. spin_unlock_irqrestore(&oh->_lock, flags);
  1719. return 0;
  1720. }
  1721. /**
  1722. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  1723. * contained in the hwmod module.
  1724. * @oh: struct omap_hwmod *
  1725. * @name: name of the reset line to lookup and assert
  1726. *
  1727. * Some IP like dsp, ipu or iva contain processor that require
  1728. * an HW reset line to be assert / deassert in order to enable fully
  1729. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1730. * yet supported on this OMAP; otherwise, passes along the return value
  1731. * from _assert_hardreset().
  1732. */
  1733. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  1734. {
  1735. int ret;
  1736. unsigned long flags;
  1737. if (!oh)
  1738. return -EINVAL;
  1739. spin_lock_irqsave(&oh->_lock, flags);
  1740. ret = _assert_hardreset(oh, name);
  1741. spin_unlock_irqrestore(&oh->_lock, flags);
  1742. return ret;
  1743. }
  1744. /**
  1745. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  1746. * contained in the hwmod module.
  1747. * @oh: struct omap_hwmod *
  1748. * @name: name of the reset line to look up and deassert
  1749. *
  1750. * Some IP like dsp, ipu or iva contain processor that require
  1751. * an HW reset line to be assert / deassert in order to enable fully
  1752. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  1753. * yet supported on this OMAP; otherwise, passes along the return value
  1754. * from _deassert_hardreset().
  1755. */
  1756. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1757. {
  1758. int ret;
  1759. unsigned long flags;
  1760. if (!oh)
  1761. return -EINVAL;
  1762. spin_lock_irqsave(&oh->_lock, flags);
  1763. ret = _deassert_hardreset(oh, name);
  1764. spin_unlock_irqrestore(&oh->_lock, flags);
  1765. return ret;
  1766. }
  1767. /**
  1768. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  1769. * contained in the hwmod module
  1770. * @oh: struct omap_hwmod *
  1771. * @name: name of the reset line to look up and read
  1772. *
  1773. * Return the current state of the hwmod @oh's reset line named @name:
  1774. * returns -EINVAL upon parameter error or if this operation
  1775. * is unsupported on the current OMAP; otherwise, passes along the return
  1776. * value from _read_hardreset().
  1777. */
  1778. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  1779. {
  1780. int ret;
  1781. unsigned long flags;
  1782. if (!oh)
  1783. return -EINVAL;
  1784. spin_lock_irqsave(&oh->_lock, flags);
  1785. ret = _read_hardreset(oh, name);
  1786. spin_unlock_irqrestore(&oh->_lock, flags);
  1787. return ret;
  1788. }
  1789. /**
  1790. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  1791. * @classname: struct omap_hwmod_class name to search for
  1792. * @fn: callback function pointer to call for each hwmod in class @classname
  1793. * @user: arbitrary context data to pass to the callback function
  1794. *
  1795. * For each omap_hwmod of class @classname, call @fn. Takes
  1796. * omap_hwmod_mutex to prevent the hwmod list from changing during the
  1797. * iteration. If the callback function returns something other than
  1798. * zero, the iterator is terminated, and the callback function's return
  1799. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  1800. * if @classname or @fn are NULL, or passes back the error code from @fn.
  1801. */
  1802. int omap_hwmod_for_each_by_class(const char *classname,
  1803. int (*fn)(struct omap_hwmod *oh,
  1804. void *user),
  1805. void *user)
  1806. {
  1807. struct omap_hwmod *temp_oh;
  1808. int ret = 0;
  1809. if (!classname || !fn)
  1810. return -EINVAL;
  1811. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  1812. __func__, classname);
  1813. mutex_lock(&omap_hwmod_mutex);
  1814. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1815. if (!strcmp(temp_oh->class->name, classname)) {
  1816. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  1817. __func__, temp_oh->name);
  1818. ret = (*fn)(temp_oh, user);
  1819. if (ret)
  1820. break;
  1821. }
  1822. }
  1823. mutex_unlock(&omap_hwmod_mutex);
  1824. if (ret)
  1825. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  1826. __func__, ret);
  1827. return ret;
  1828. }
  1829. /**
  1830. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  1831. * @oh: struct omap_hwmod *
  1832. * @state: state that _setup() should leave the hwmod in
  1833. *
  1834. * Sets the hwmod state that @oh will enter at the end of _setup() (called by
  1835. * omap_hwmod_late_init()). Only valid to call between calls to
  1836. * omap_hwmod_init() and omap_hwmod_late_init(). Returns 0 upon success or
  1837. * -EINVAL if there is a problem with the arguments or if the hwmod is
  1838. * in the wrong state.
  1839. */
  1840. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  1841. {
  1842. int ret;
  1843. unsigned long flags;
  1844. if (!oh)
  1845. return -EINVAL;
  1846. if (state != _HWMOD_STATE_DISABLED &&
  1847. state != _HWMOD_STATE_ENABLED &&
  1848. state != _HWMOD_STATE_IDLE)
  1849. return -EINVAL;
  1850. spin_lock_irqsave(&oh->_lock, flags);
  1851. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  1852. ret = -EINVAL;
  1853. goto ohsps_unlock;
  1854. }
  1855. oh->_postsetup_state = state;
  1856. ret = 0;
  1857. ohsps_unlock:
  1858. spin_unlock_irqrestore(&oh->_lock, flags);
  1859. return ret;
  1860. }