tvaudio.c 54 KB

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  1. /*
  2. * experimental driver for simple i2c audio chips.
  3. *
  4. * Copyright (c) 2000 Gerd Knorr
  5. * based on code by:
  6. * Eric Sandeen (eric_sandeen@bigfoot.com)
  7. * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
  8. * Greg Alexander (galexand@acm.org)
  9. *
  10. * This code is placed under the terms of the GNU General Public License
  11. *
  12. * OPTIONS:
  13. * debug - set to 1 if you'd like to see debug messages
  14. *
  15. */
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/sched.h>
  19. #include <linux/string.h>
  20. #include <linux/timer.h>
  21. #include <linux/delay.h>
  22. #include <linux/errno.h>
  23. #include <linux/slab.h>
  24. #include <linux/videodev.h>
  25. #include <linux/i2c.h>
  26. #include <linux/init.h>
  27. #include <linux/kthread.h>
  28. #include <linux/freezer.h>
  29. #include <media/tvaudio.h>
  30. #include <media/v4l2-common.h>
  31. #include <media/v4l2-chip-ident.h>
  32. #include <media/i2c-addr.h>
  33. /* ---------------------------------------------------------------------- */
  34. /* insmod args */
  35. static int debug = 0; /* insmod parameter */
  36. module_param(debug, int, 0644);
  37. MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
  38. MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
  39. MODULE_LICENSE("GPL");
  40. #define UNSET (-1U)
  41. /* ---------------------------------------------------------------------- */
  42. /* our structs */
  43. #define MAXREGS 64
  44. struct CHIPSTATE;
  45. typedef int (*getvalue)(int);
  46. typedef int (*checkit)(struct CHIPSTATE*);
  47. typedef int (*initialize)(struct CHIPSTATE*);
  48. typedef int (*getmode)(struct CHIPSTATE*);
  49. typedef void (*setmode)(struct CHIPSTATE*, int mode);
  50. typedef void (*checkmode)(struct CHIPSTATE*);
  51. /* i2c command */
  52. typedef struct AUDIOCMD {
  53. int count; /* # of bytes to send */
  54. unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
  55. } audiocmd;
  56. /* chip description */
  57. struct CHIPDESC {
  58. char *name; /* chip name */
  59. int id; /* ID */
  60. int addr_lo, addr_hi; /* i2c address range */
  61. int registers; /* # of registers */
  62. int *insmodopt;
  63. checkit checkit;
  64. initialize initialize;
  65. int flags;
  66. #define CHIP_HAS_VOLUME 1
  67. #define CHIP_HAS_BASSTREBLE 2
  68. #define CHIP_HAS_INPUTSEL 4
  69. /* various i2c command sequences */
  70. audiocmd init;
  71. /* which register has which value */
  72. int leftreg,rightreg,treblereg,bassreg;
  73. /* initialize with (defaults to 65535/65535/32768/32768 */
  74. int leftinit,rightinit,trebleinit,bassinit;
  75. /* functions to convert the values (v4l -> chip) */
  76. getvalue volfunc,treblefunc,bassfunc;
  77. /* get/set mode */
  78. getmode getmode;
  79. setmode setmode;
  80. /* check / autoswitch audio after channel switches */
  81. checkmode checkmode;
  82. /* input switch register + values for v4l inputs */
  83. int inputreg;
  84. int inputmap[4];
  85. int inputmute;
  86. int inputmask;
  87. };
  88. static struct CHIPDESC chiplist[];
  89. /* current state of the chip */
  90. struct CHIPSTATE {
  91. struct i2c_client c;
  92. /* index into CHIPDESC array */
  93. int type;
  94. /* shadow register set */
  95. audiocmd shadow;
  96. /* current settings */
  97. __u16 left,right,treble,bass,muted,mode;
  98. int prevmode;
  99. int radio;
  100. int input;
  101. /* thread */
  102. struct task_struct *thread;
  103. struct timer_list wt;
  104. int watch_stereo;
  105. int audmode;
  106. };
  107. /* ---------------------------------------------------------------------- */
  108. /* i2c addresses */
  109. static unsigned short normal_i2c[] = {
  110. I2C_ADDR_TDA8425 >> 1,
  111. I2C_ADDR_TEA6300 >> 1,
  112. I2C_ADDR_TEA6420 >> 1,
  113. I2C_ADDR_TDA9840 >> 1,
  114. I2C_ADDR_TDA985x_L >> 1,
  115. I2C_ADDR_TDA985x_H >> 1,
  116. I2C_ADDR_TDA9874 >> 1,
  117. I2C_ADDR_PIC16C54 >> 1,
  118. I2C_CLIENT_END };
  119. I2C_CLIENT_INSMOD;
  120. static struct i2c_driver driver;
  121. static struct i2c_client client_template;
  122. /* ---------------------------------------------------------------------- */
  123. /* i2c I/O functions */
  124. static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
  125. {
  126. unsigned char buffer[2];
  127. if (-1 == subaddr) {
  128. v4l_dbg(1, debug, &chip->c, "%s: chip_write: 0x%x\n",
  129. chip->c.name, val);
  130. chip->shadow.bytes[1] = val;
  131. buffer[0] = val;
  132. if (1 != i2c_master_send(&chip->c,buffer,1)) {
  133. v4l_warn(&chip->c, "%s: I/O error (write 0x%x)\n",
  134. chip->c.name, val);
  135. return -1;
  136. }
  137. } else {
  138. v4l_dbg(1, debug, &chip->c, "%s: chip_write: reg%d=0x%x\n",
  139. chip->c.name, subaddr, val);
  140. chip->shadow.bytes[subaddr+1] = val;
  141. buffer[0] = subaddr;
  142. buffer[1] = val;
  143. if (2 != i2c_master_send(&chip->c,buffer,2)) {
  144. v4l_warn(&chip->c, "%s: I/O error (write reg%d=0x%x)\n",
  145. chip->c.name, subaddr, val);
  146. return -1;
  147. }
  148. }
  149. return 0;
  150. }
  151. static int chip_write_masked(struct CHIPSTATE *chip, int subaddr, int val, int mask)
  152. {
  153. if (mask != 0) {
  154. if (-1 == subaddr) {
  155. val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
  156. } else {
  157. val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
  158. }
  159. }
  160. return chip_write(chip, subaddr, val);
  161. }
  162. static int chip_read(struct CHIPSTATE *chip)
  163. {
  164. unsigned char buffer;
  165. if (1 != i2c_master_recv(&chip->c,&buffer,1)) {
  166. v4l_warn(&chip->c, "%s: I/O error (read)\n",
  167. chip->c.name);
  168. return -1;
  169. }
  170. v4l_dbg(1, debug, &chip->c, "%s: chip_read: 0x%x\n",chip->c.name, buffer);
  171. return buffer;
  172. }
  173. static int chip_read2(struct CHIPSTATE *chip, int subaddr)
  174. {
  175. unsigned char write[1];
  176. unsigned char read[1];
  177. struct i2c_msg msgs[2] = {
  178. { chip->c.addr, 0, 1, write },
  179. { chip->c.addr, I2C_M_RD, 1, read }
  180. };
  181. write[0] = subaddr;
  182. if (2 != i2c_transfer(chip->c.adapter,msgs,2)) {
  183. v4l_warn(&chip->c, "%s: I/O error (read2)\n", chip->c.name);
  184. return -1;
  185. }
  186. v4l_dbg(1, debug, &chip->c, "%s: chip_read2: reg%d=0x%x\n",
  187. chip->c.name, subaddr,read[0]);
  188. return read[0];
  189. }
  190. static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
  191. {
  192. int i;
  193. if (0 == cmd->count)
  194. return 0;
  195. /* update our shadow register set; print bytes if (debug > 0) */
  196. v4l_dbg(1, debug, &chip->c, "%s: chip_cmd(%s): reg=%d, data:",
  197. chip->c.name, name,cmd->bytes[0]);
  198. for (i = 1; i < cmd->count; i++) {
  199. if (debug)
  200. printk(" 0x%x",cmd->bytes[i]);
  201. chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
  202. }
  203. if (debug)
  204. printk("\n");
  205. /* send data to the chip */
  206. if (cmd->count != i2c_master_send(&chip->c,cmd->bytes,cmd->count)) {
  207. v4l_warn(&chip->c, "%s: I/O error (%s)\n", chip->c.name, name);
  208. return -1;
  209. }
  210. return 0;
  211. }
  212. /* ---------------------------------------------------------------------- */
  213. /* kernel thread for doing i2c stuff asyncronly
  214. * right now it is used only to check the audio mode (mono/stereo/whatever)
  215. * some time after switching to another TV channel, then turn on stereo
  216. * if available, ...
  217. */
  218. static void chip_thread_wake(unsigned long data)
  219. {
  220. struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
  221. wake_up_process(chip->thread);
  222. }
  223. static int chip_thread(void *data)
  224. {
  225. struct CHIPSTATE *chip = data;
  226. struct CHIPDESC *desc = chiplist + chip->type;
  227. v4l_dbg(1, debug, &chip->c, "%s: thread started\n", chip->c.name);
  228. set_freezable();
  229. for (;;) {
  230. set_current_state(TASK_INTERRUPTIBLE);
  231. if (!kthread_should_stop())
  232. schedule();
  233. set_current_state(TASK_RUNNING);
  234. try_to_freeze();
  235. if (kthread_should_stop())
  236. break;
  237. v4l_dbg(1, debug, &chip->c, "%s: thread wakeup\n", chip->c.name);
  238. /* don't do anything for radio or if mode != auto */
  239. if (chip->radio || chip->mode != 0)
  240. continue;
  241. /* have a look what's going on */
  242. desc->checkmode(chip);
  243. /* schedule next check */
  244. mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
  245. }
  246. v4l_dbg(1, debug, &chip->c, "%s: thread exiting\n", chip->c.name);
  247. return 0;
  248. }
  249. static void generic_checkmode(struct CHIPSTATE *chip)
  250. {
  251. struct CHIPDESC *desc = chiplist + chip->type;
  252. int mode = desc->getmode(chip);
  253. if (mode == chip->prevmode)
  254. return;
  255. v4l_dbg(1, debug, &chip->c, "%s: thread checkmode\n", chip->c.name);
  256. chip->prevmode = mode;
  257. if (mode & V4L2_TUNER_MODE_STEREO)
  258. desc->setmode(chip,V4L2_TUNER_MODE_STEREO);
  259. if (mode & V4L2_TUNER_MODE_LANG1_LANG2)
  260. desc->setmode(chip,V4L2_TUNER_MODE_STEREO);
  261. else if (mode & V4L2_TUNER_MODE_LANG1)
  262. desc->setmode(chip,V4L2_TUNER_MODE_LANG1);
  263. else if (mode & V4L2_TUNER_MODE_LANG2)
  264. desc->setmode(chip,V4L2_TUNER_MODE_LANG2);
  265. else
  266. desc->setmode(chip,V4L2_TUNER_MODE_MONO);
  267. }
  268. /* ---------------------------------------------------------------------- */
  269. /* audio chip descriptions - defines+functions for tda9840 */
  270. #define TDA9840_SW 0x00
  271. #define TDA9840_LVADJ 0x02
  272. #define TDA9840_STADJ 0x03
  273. #define TDA9840_TEST 0x04
  274. #define TDA9840_MONO 0x10
  275. #define TDA9840_STEREO 0x2a
  276. #define TDA9840_DUALA 0x12
  277. #define TDA9840_DUALB 0x1e
  278. #define TDA9840_DUALAB 0x1a
  279. #define TDA9840_DUALBA 0x16
  280. #define TDA9840_EXTERNAL 0x7a
  281. #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
  282. #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
  283. #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
  284. #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
  285. #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
  286. static int tda9840_getmode(struct CHIPSTATE *chip)
  287. {
  288. int val, mode;
  289. val = chip_read(chip);
  290. mode = V4L2_TUNER_MODE_MONO;
  291. if (val & TDA9840_DS_DUAL)
  292. mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
  293. if (val & TDA9840_ST_STEREO)
  294. mode |= V4L2_TUNER_MODE_STEREO;
  295. v4l_dbg(1, debug, &chip->c, "tda9840_getmode(): raw chip read: %d, return: %d\n",
  296. val, mode);
  297. return mode;
  298. }
  299. static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
  300. {
  301. int update = 1;
  302. int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
  303. switch (mode) {
  304. case V4L2_TUNER_MODE_MONO:
  305. t |= TDA9840_MONO;
  306. break;
  307. case V4L2_TUNER_MODE_STEREO:
  308. t |= TDA9840_STEREO;
  309. break;
  310. case V4L2_TUNER_MODE_LANG1:
  311. t |= TDA9840_DUALA;
  312. break;
  313. case V4L2_TUNER_MODE_LANG2:
  314. t |= TDA9840_DUALB;
  315. break;
  316. default:
  317. update = 0;
  318. }
  319. if (update)
  320. chip_write(chip, TDA9840_SW, t);
  321. }
  322. static int tda9840_checkit(struct CHIPSTATE *chip)
  323. {
  324. int rc;
  325. rc = chip_read(chip);
  326. /* lower 5 bits should be 0 */
  327. return ((rc & 0x1f) == 0) ? 1 : 0;
  328. }
  329. /* ---------------------------------------------------------------------- */
  330. /* audio chip descriptions - defines+functions for tda985x */
  331. /* subaddresses for TDA9855 */
  332. #define TDA9855_VR 0x00 /* Volume, right */
  333. #define TDA9855_VL 0x01 /* Volume, left */
  334. #define TDA9855_BA 0x02 /* Bass */
  335. #define TDA9855_TR 0x03 /* Treble */
  336. #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
  337. /* subaddresses for TDA9850 */
  338. #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
  339. /* subaddesses for both chips */
  340. #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
  341. #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
  342. #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
  343. #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
  344. #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
  345. #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
  346. /* Masks for bits in TDA9855 subaddresses */
  347. /* 0x00 - VR in TDA9855 */
  348. /* 0x01 - VL in TDA9855 */
  349. /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
  350. * in 1dB steps - mute is 0x27 */
  351. /* 0x02 - BA in TDA9855 */
  352. /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
  353. * in .5dB steps - 0 is 0x0E */
  354. /* 0x03 - TR in TDA9855 */
  355. /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
  356. * in 3dB steps - 0 is 0x7 */
  357. /* Masks for bits in both chips' subaddresses */
  358. /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
  359. /* Unique to TDA9855: */
  360. /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
  361. * in 3dB steps - mute is 0x0 */
  362. /* Unique to TDA9850: */
  363. /* lower 4 bits control stereo noise threshold, over which stereo turns off
  364. * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
  365. /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
  366. /* Unique to TDA9855: */
  367. #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
  368. #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
  369. #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
  370. #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
  371. /* Bits 0 to 3 select various combinations
  372. * of line in and line out, only the
  373. * interesting ones are defined */
  374. #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
  375. #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
  376. /* Unique to TDA9850: */
  377. /* lower 4 bits contol SAP noise threshold, over which SAP turns off
  378. * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
  379. /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
  380. /* Common to TDA9855 and TDA9850: */
  381. #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
  382. #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
  383. #define TDA985x_MONO 0 /* Forces Mono output */
  384. #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
  385. /* Unique to TDA9855: */
  386. #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
  387. #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
  388. #define TDA9855_LINEAR 0 /* Linear Stereo */
  389. #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
  390. #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
  391. #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
  392. #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
  393. /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
  394. /* Common to both TDA9855 and TDA9850: */
  395. /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
  396. * in .5dB steps - 0dB is 0x7 */
  397. /* 0x08, 0x09 - A1 and A2 (read/write) */
  398. /* Common to both TDA9855 and TDA9850: */
  399. /* lower 5 bites are wideband and spectral expander alignment
  400. * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
  401. #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
  402. #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
  403. #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
  404. /* 0x0a - A3 */
  405. /* Common to both TDA9855 and TDA9850: */
  406. /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
  407. * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
  408. #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
  409. static int tda9855_volume(int val) { return val/0x2e8+0x27; }
  410. static int tda9855_bass(int val) { return val/0xccc+0x06; }
  411. static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
  412. static int tda985x_getmode(struct CHIPSTATE *chip)
  413. {
  414. int mode;
  415. mode = ((TDA985x_STP | TDA985x_SAPP) &
  416. chip_read(chip)) >> 4;
  417. /* Add mono mode regardless of SAP and stereo */
  418. /* Allows forced mono */
  419. return mode | V4L2_TUNER_MODE_MONO;
  420. }
  421. static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
  422. {
  423. int update = 1;
  424. int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
  425. switch (mode) {
  426. case V4L2_TUNER_MODE_MONO:
  427. c6 |= TDA985x_MONO;
  428. break;
  429. case V4L2_TUNER_MODE_STEREO:
  430. c6 |= TDA985x_STEREO;
  431. break;
  432. case V4L2_TUNER_MODE_LANG1:
  433. c6 |= TDA985x_SAP;
  434. break;
  435. default:
  436. update = 0;
  437. }
  438. if (update)
  439. chip_write(chip,TDA985x_C6,c6);
  440. }
  441. /* ---------------------------------------------------------------------- */
  442. /* audio chip descriptions - defines+functions for tda9873h */
  443. /* Subaddresses for TDA9873H */
  444. #define TDA9873_SW 0x00 /* Switching */
  445. #define TDA9873_AD 0x01 /* Adjust */
  446. #define TDA9873_PT 0x02 /* Port */
  447. /* Subaddress 0x00: Switching Data
  448. * B7..B0:
  449. *
  450. * B1, B0: Input source selection
  451. * 0, 0 internal
  452. * 1, 0 external stereo
  453. * 0, 1 external mono
  454. */
  455. #define TDA9873_INP_MASK 3
  456. #define TDA9873_INTERNAL 0
  457. #define TDA9873_EXT_STEREO 2
  458. #define TDA9873_EXT_MONO 1
  459. /* B3, B2: output signal select
  460. * B4 : transmission mode
  461. * 0, 0, 1 Mono
  462. * 1, 0, 0 Stereo
  463. * 1, 1, 1 Stereo (reversed channel)
  464. * 0, 0, 0 Dual AB
  465. * 0, 0, 1 Dual AA
  466. * 0, 1, 0 Dual BB
  467. * 0, 1, 1 Dual BA
  468. */
  469. #define TDA9873_TR_MASK (7 << 2)
  470. #define TDA9873_TR_MONO 4
  471. #define TDA9873_TR_STEREO 1 << 4
  472. #define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
  473. #define TDA9873_TR_DUALA 1 << 2
  474. #define TDA9873_TR_DUALB 1 << 3
  475. /* output level controls
  476. * B5: output level switch (0 = reduced gain, 1 = normal gain)
  477. * B6: mute (1 = muted)
  478. * B7: auto-mute (1 = auto-mute enabled)
  479. */
  480. #define TDA9873_GAIN_NORMAL 1 << 5
  481. #define TDA9873_MUTE 1 << 6
  482. #define TDA9873_AUTOMUTE 1 << 7
  483. /* Subaddress 0x01: Adjust/standard */
  484. /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
  485. * Recommended value is +0 dB
  486. */
  487. #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
  488. /* Bits C6..C4 control FM stantard
  489. * C6, C5, C4
  490. * 0, 0, 0 B/G (PAL FM)
  491. * 0, 0, 1 M
  492. * 0, 1, 0 D/K(1)
  493. * 0, 1, 1 D/K(2)
  494. * 1, 0, 0 D/K(3)
  495. * 1, 0, 1 I
  496. */
  497. #define TDA9873_BG 0
  498. #define TDA9873_M 1
  499. #define TDA9873_DK1 2
  500. #define TDA9873_DK2 3
  501. #define TDA9873_DK3 4
  502. #define TDA9873_I 5
  503. /* C7 controls identification response time (1=fast/0=normal)
  504. */
  505. #define TDA9873_IDR_NORM 0
  506. #define TDA9873_IDR_FAST 1 << 7
  507. /* Subaddress 0x02: Port data */
  508. /* E1, E0 free programmable ports P1/P2
  509. 0, 0 both ports low
  510. 0, 1 P1 high
  511. 1, 0 P2 high
  512. 1, 1 both ports high
  513. */
  514. #define TDA9873_PORTS 3
  515. /* E2: test port */
  516. #define TDA9873_TST_PORT 1 << 2
  517. /* E5..E3 control mono output channel (together with transmission mode bit B4)
  518. *
  519. * E5 E4 E3 B4 OUTM
  520. * 0 0 0 0 mono
  521. * 0 0 1 0 DUAL B
  522. * 0 1 0 1 mono (from stereo decoder)
  523. */
  524. #define TDA9873_MOUT_MONO 0
  525. #define TDA9873_MOUT_FMONO 0
  526. #define TDA9873_MOUT_DUALA 0
  527. #define TDA9873_MOUT_DUALB 1 << 3
  528. #define TDA9873_MOUT_ST 1 << 4
  529. #define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
  530. #define TDA9873_MOUT_EXTL 1 << 5
  531. #define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
  532. #define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
  533. #define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
  534. /* Status bits: (chip read) */
  535. #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
  536. #define TDA9873_STEREO 2 /* Stereo sound is identified */
  537. #define TDA9873_DUAL 4 /* Dual sound is identified */
  538. static int tda9873_getmode(struct CHIPSTATE *chip)
  539. {
  540. int val,mode;
  541. val = chip_read(chip);
  542. mode = V4L2_TUNER_MODE_MONO;
  543. if (val & TDA9873_STEREO)
  544. mode |= V4L2_TUNER_MODE_STEREO;
  545. if (val & TDA9873_DUAL)
  546. mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
  547. v4l_dbg(1, debug, &chip->c, "tda9873_getmode(): raw chip read: %d, return: %d\n",
  548. val, mode);
  549. return mode;
  550. }
  551. static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
  552. {
  553. int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
  554. /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
  555. if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
  556. v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): external input\n");
  557. return;
  558. }
  559. v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
  560. v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): sw_data = %d\n", sw_data);
  561. switch (mode) {
  562. case V4L2_TUNER_MODE_MONO:
  563. sw_data |= TDA9873_TR_MONO;
  564. break;
  565. case V4L2_TUNER_MODE_STEREO:
  566. sw_data |= TDA9873_TR_STEREO;
  567. break;
  568. case V4L2_TUNER_MODE_LANG1:
  569. sw_data |= TDA9873_TR_DUALA;
  570. break;
  571. case V4L2_TUNER_MODE_LANG2:
  572. sw_data |= TDA9873_TR_DUALB;
  573. break;
  574. default:
  575. chip->mode = 0;
  576. return;
  577. }
  578. chip_write(chip, TDA9873_SW, sw_data);
  579. v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
  580. mode, sw_data);
  581. }
  582. static int tda9873_checkit(struct CHIPSTATE *chip)
  583. {
  584. int rc;
  585. if (-1 == (rc = chip_read2(chip,254)))
  586. return 0;
  587. return (rc & ~0x1f) == 0x80;
  588. }
  589. /* ---------------------------------------------------------------------- */
  590. /* audio chip description - defines+functions for tda9874h and tda9874a */
  591. /* Dariusz Kowalewski <darekk@automex.pl> */
  592. /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
  593. #define TDA9874A_AGCGR 0x00 /* AGC gain */
  594. #define TDA9874A_GCONR 0x01 /* general config */
  595. #define TDA9874A_MSR 0x02 /* monitor select */
  596. #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
  597. #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
  598. #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
  599. #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
  600. #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
  601. #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
  602. #define TDA9874A_DCR 0x09 /* demodulator config */
  603. #define TDA9874A_FMER 0x0a /* FM de-emphasis */
  604. #define TDA9874A_FMMR 0x0b /* FM dematrix */
  605. #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
  606. #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
  607. #define TDA9874A_NCONR 0x0e /* NICAM config */
  608. #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
  609. #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
  610. #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
  611. #define TDA9874A_AMCONR 0x12 /* audio mute control */
  612. #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
  613. #define TDA9874A_AOSR 0x14 /* analog output select */
  614. #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
  615. #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
  616. #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
  617. #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
  618. #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
  619. /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
  620. #define TDA9874A_DSR 0x00 /* device status */
  621. #define TDA9874A_NSR 0x01 /* NICAM status */
  622. #define TDA9874A_NECR 0x02 /* NICAM error count */
  623. #define TDA9874A_DR1 0x03 /* add. data LSB */
  624. #define TDA9874A_DR2 0x04 /* add. data MSB */
  625. #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
  626. #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
  627. #define TDA9874A_SIFLR 0x07 /* SIF level */
  628. #define TDA9874A_TR2 252 /* test reg. 2 */
  629. #define TDA9874A_TR1 253 /* test reg. 1 */
  630. #define TDA9874A_DIC 254 /* device id. code */
  631. #define TDA9874A_SIC 255 /* software id. code */
  632. static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
  633. static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
  634. static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
  635. static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
  636. static int tda9874a_dic = -1; /* device id. code */
  637. /* insmod options for tda9874a */
  638. static unsigned int tda9874a_SIF = UNSET;
  639. static unsigned int tda9874a_AMSEL = UNSET;
  640. static unsigned int tda9874a_STD = UNSET;
  641. module_param(tda9874a_SIF, int, 0444);
  642. module_param(tda9874a_AMSEL, int, 0444);
  643. module_param(tda9874a_STD, int, 0444);
  644. /*
  645. * initialization table for tda9874 decoder:
  646. * - carrier 1 freq. registers (3 bytes)
  647. * - carrier 2 freq. registers (3 bytes)
  648. * - demudulator config register
  649. * - FM de-emphasis register (slow identification mode)
  650. * Note: frequency registers must be written in single i2c transfer.
  651. */
  652. static struct tda9874a_MODES {
  653. char *name;
  654. audiocmd cmd;
  655. } tda9874a_modelist[9] = {
  656. { "A2, B/G",
  657. { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
  658. { "A2, M (Korea)",
  659. { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
  660. { "A2, D/K (1)",
  661. { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
  662. { "A2, D/K (2)",
  663. { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
  664. { "A2, D/K (3)",
  665. { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
  666. { "NICAM, I",
  667. { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
  668. { "NICAM, B/G",
  669. { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
  670. { "NICAM, D/K", /* default */
  671. { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
  672. { "NICAM, L",
  673. { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
  674. };
  675. static int tda9874a_setup(struct CHIPSTATE *chip)
  676. {
  677. chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
  678. chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
  679. chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
  680. if(tda9874a_dic == 0x11) {
  681. chip_write(chip, TDA9874A_FMMR, 0x80);
  682. } else { /* dic == 0x07 */
  683. chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
  684. chip_write(chip, TDA9874A_FMMR, 0x00);
  685. }
  686. chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
  687. chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
  688. chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
  689. chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
  690. /* Note: If signal quality is poor you may want to change NICAM */
  691. /* error limit registers (NLELR and NUELR) to some greater values. */
  692. /* Then the sound would remain stereo, but won't be so clear. */
  693. chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
  694. chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
  695. if(tda9874a_dic == 0x11) {
  696. chip_write(chip, TDA9874A_AMCONR, 0xf9);
  697. chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
  698. chip_write(chip, TDA9874A_AOSR, 0x80);
  699. chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
  700. chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
  701. } else { /* dic == 0x07 */
  702. chip_write(chip, TDA9874A_AMCONR, 0xfb);
  703. chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
  704. chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
  705. }
  706. v4l_dbg(1, debug, &chip->c, "tda9874a_setup(): %s [0x%02X].\n",
  707. tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
  708. return 1;
  709. }
  710. static int tda9874a_getmode(struct CHIPSTATE *chip)
  711. {
  712. int dsr,nsr,mode;
  713. int necr; /* just for debugging */
  714. mode = V4L2_TUNER_MODE_MONO;
  715. if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
  716. return mode;
  717. if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
  718. return mode;
  719. if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
  720. return mode;
  721. /* need to store dsr/nsr somewhere */
  722. chip->shadow.bytes[MAXREGS-2] = dsr;
  723. chip->shadow.bytes[MAXREGS-1] = nsr;
  724. if(tda9874a_mode) {
  725. /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
  726. * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
  727. * that sound has (temporarily) switched from NICAM to
  728. * mono FM (or AM) on 1st sound carrier due to high NICAM bit
  729. * error count. So in fact there is no stereo in this case :-(
  730. * But changing the mode to V4L2_TUNER_MODE_MONO would switch
  731. * external 4052 multiplexer in audio_hook().
  732. */
  733. if(nsr & 0x02) /* NSR.S/MB=1 */
  734. mode |= V4L2_TUNER_MODE_STEREO;
  735. if(nsr & 0x01) /* NSR.D/SB=1 */
  736. mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
  737. } else {
  738. if(dsr & 0x02) /* DSR.IDSTE=1 */
  739. mode |= V4L2_TUNER_MODE_STEREO;
  740. if(dsr & 0x04) /* DSR.IDDUA=1 */
  741. mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
  742. }
  743. v4l_dbg(1, debug, &chip->c, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
  744. dsr, nsr, necr, mode);
  745. return mode;
  746. }
  747. static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
  748. {
  749. /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
  750. /* If auto-muting is disabled, we can hear a signal of degrading quality. */
  751. if(tda9874a_mode) {
  752. if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
  753. tda9874a_NCONR &= 0xfe; /* enable */
  754. else
  755. tda9874a_NCONR |= 0x01; /* disable */
  756. chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
  757. }
  758. /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
  759. * and has auto-select function for audio output (AOSR register).
  760. * Old TDA9874H doesn't support these features.
  761. * TDA9874A also has additional mono output pin (OUTM), which
  762. * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
  763. */
  764. if(tda9874a_dic == 0x11) {
  765. int aosr = 0x80;
  766. int mdacosr = (tda9874a_mode) ? 0x82:0x80;
  767. switch(mode) {
  768. case V4L2_TUNER_MODE_MONO:
  769. case V4L2_TUNER_MODE_STEREO:
  770. break;
  771. case V4L2_TUNER_MODE_LANG1:
  772. aosr = 0x80; /* auto-select, dual A/A */
  773. mdacosr = (tda9874a_mode) ? 0x82:0x80;
  774. break;
  775. case V4L2_TUNER_MODE_LANG2:
  776. aosr = 0xa0; /* auto-select, dual B/B */
  777. mdacosr = (tda9874a_mode) ? 0x83:0x81;
  778. break;
  779. default:
  780. chip->mode = 0;
  781. return;
  782. }
  783. chip_write(chip, TDA9874A_AOSR, aosr);
  784. chip_write(chip, TDA9874A_MDACOSR, mdacosr);
  785. v4l_dbg(1, debug, &chip->c, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
  786. mode, aosr, mdacosr);
  787. } else { /* dic == 0x07 */
  788. int fmmr,aosr;
  789. switch(mode) {
  790. case V4L2_TUNER_MODE_MONO:
  791. fmmr = 0x00; /* mono */
  792. aosr = 0x10; /* A/A */
  793. break;
  794. case V4L2_TUNER_MODE_STEREO:
  795. if(tda9874a_mode) {
  796. fmmr = 0x00;
  797. aosr = 0x00; /* handled by NICAM auto-mute */
  798. } else {
  799. fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
  800. aosr = 0x00;
  801. }
  802. break;
  803. case V4L2_TUNER_MODE_LANG1:
  804. fmmr = 0x02; /* dual */
  805. aosr = 0x10; /* dual A/A */
  806. break;
  807. case V4L2_TUNER_MODE_LANG2:
  808. fmmr = 0x02; /* dual */
  809. aosr = 0x20; /* dual B/B */
  810. break;
  811. default:
  812. chip->mode = 0;
  813. return;
  814. }
  815. chip_write(chip, TDA9874A_FMMR, fmmr);
  816. chip_write(chip, TDA9874A_AOSR, aosr);
  817. v4l_dbg(1, debug, &chip->c, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
  818. mode, fmmr, aosr);
  819. }
  820. }
  821. static int tda9874a_checkit(struct CHIPSTATE *chip)
  822. {
  823. int dic,sic; /* device id. and software id. codes */
  824. if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
  825. return 0;
  826. if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
  827. return 0;
  828. v4l_dbg(1, debug, &chip->c, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
  829. if((dic == 0x11)||(dic == 0x07)) {
  830. v4l_info(&chip->c, "found tda9874%s.\n", (dic == 0x11) ? "a":"h");
  831. tda9874a_dic = dic; /* remember device id. */
  832. return 1;
  833. }
  834. return 0; /* not found */
  835. }
  836. static int tda9874a_initialize(struct CHIPSTATE *chip)
  837. {
  838. if (tda9874a_SIF > 2)
  839. tda9874a_SIF = 1;
  840. if (tda9874a_STD > 8)
  841. tda9874a_STD = 0;
  842. if(tda9874a_AMSEL > 1)
  843. tda9874a_AMSEL = 0;
  844. if(tda9874a_SIF == 1)
  845. tda9874a_GCONR = 0xc0; /* sound IF input 1 */
  846. else
  847. tda9874a_GCONR = 0xc1; /* sound IF input 2 */
  848. tda9874a_ESP = tda9874a_STD;
  849. tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
  850. if(tda9874a_AMSEL == 0)
  851. tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
  852. else
  853. tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
  854. tda9874a_setup(chip);
  855. return 0;
  856. }
  857. /* ---------------------------------------------------------------------- */
  858. /* audio chip descriptions - defines+functions for tea6420 */
  859. #define TEA6300_VL 0x00 /* volume left */
  860. #define TEA6300_VR 0x01 /* volume right */
  861. #define TEA6300_BA 0x02 /* bass */
  862. #define TEA6300_TR 0x03 /* treble */
  863. #define TEA6300_FA 0x04 /* fader control */
  864. #define TEA6300_S 0x05 /* switch register */
  865. /* values for those registers: */
  866. #define TEA6300_S_SA 0x01 /* stereo A input */
  867. #define TEA6300_S_SB 0x02 /* stereo B */
  868. #define TEA6300_S_SC 0x04 /* stereo C */
  869. #define TEA6300_S_GMU 0x80 /* general mute */
  870. #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
  871. #define TEA6320_FFR 0x01 /* fader front right (0-5) */
  872. #define TEA6320_FFL 0x02 /* fader front left (0-5) */
  873. #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
  874. #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
  875. #define TEA6320_BA 0x05 /* bass (0-4) */
  876. #define TEA6320_TR 0x06 /* treble (0-4) */
  877. #define TEA6320_S 0x07 /* switch register */
  878. /* values for those registers: */
  879. #define TEA6320_S_SA 0x07 /* stereo A input */
  880. #define TEA6320_S_SB 0x06 /* stereo B */
  881. #define TEA6320_S_SC 0x05 /* stereo C */
  882. #define TEA6320_S_SD 0x04 /* stereo D */
  883. #define TEA6320_S_GMU 0x80 /* general mute */
  884. #define TEA6420_S_SA 0x00 /* stereo A input */
  885. #define TEA6420_S_SB 0x01 /* stereo B */
  886. #define TEA6420_S_SC 0x02 /* stereo C */
  887. #define TEA6420_S_SD 0x03 /* stereo D */
  888. #define TEA6420_S_SE 0x04 /* stereo E */
  889. #define TEA6420_S_GMU 0x05 /* general mute */
  890. static int tea6300_shift10(int val) { return val >> 10; }
  891. static int tea6300_shift12(int val) { return val >> 12; }
  892. /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
  893. /* 0x0c mirror those immediately higher) */
  894. static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
  895. static int tea6320_shift11(int val) { return val >> 11; }
  896. static int tea6320_initialize(struct CHIPSTATE * chip)
  897. {
  898. chip_write(chip, TEA6320_FFR, 0x3f);
  899. chip_write(chip, TEA6320_FFL, 0x3f);
  900. chip_write(chip, TEA6320_FRR, 0x3f);
  901. chip_write(chip, TEA6320_FRL, 0x3f);
  902. return 0;
  903. }
  904. /* ---------------------------------------------------------------------- */
  905. /* audio chip descriptions - defines+functions for tda8425 */
  906. #define TDA8425_VL 0x00 /* volume left */
  907. #define TDA8425_VR 0x01 /* volume right */
  908. #define TDA8425_BA 0x02 /* bass */
  909. #define TDA8425_TR 0x03 /* treble */
  910. #define TDA8425_S1 0x08 /* switch functions */
  911. /* values for those registers: */
  912. #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
  913. #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
  914. #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
  915. #define TDA8425_S1_MU 0x20 /* mute bit */
  916. #define TDA8425_S1_STEREO 0x18 /* stereo bits */
  917. #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
  918. #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
  919. #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
  920. #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
  921. #define TDA8425_S1_ML 0x06 /* language selector */
  922. #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
  923. #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
  924. #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
  925. #define TDA8425_S1_IS 0x01 /* channel selector */
  926. static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
  927. static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
  928. static int tda8425_initialize(struct CHIPSTATE *chip)
  929. {
  930. struct CHIPDESC *desc = chiplist + chip->type;
  931. int inputmap[4] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
  932. /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF};
  933. if (chip->c.adapter->id == I2C_HW_B_RIVA) {
  934. memcpy (desc->inputmap, inputmap, sizeof (inputmap));
  935. }
  936. return 0;
  937. }
  938. static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
  939. {
  940. int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
  941. if (mode & V4L2_TUNER_MODE_LANG1) {
  942. s1 |= TDA8425_S1_ML_SOUND_A;
  943. s1 |= TDA8425_S1_STEREO_PSEUDO;
  944. } else if (mode & V4L2_TUNER_MODE_LANG2) {
  945. s1 |= TDA8425_S1_ML_SOUND_B;
  946. s1 |= TDA8425_S1_STEREO_PSEUDO;
  947. } else {
  948. s1 |= TDA8425_S1_ML_STEREO;
  949. if (mode & V4L2_TUNER_MODE_MONO)
  950. s1 |= TDA8425_S1_STEREO_MONO;
  951. if (mode & V4L2_TUNER_MODE_STEREO)
  952. s1 |= TDA8425_S1_STEREO_SPATIAL;
  953. }
  954. chip_write(chip,TDA8425_S1,s1);
  955. }
  956. /* ---------------------------------------------------------------------- */
  957. /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
  958. /* the registers of 16C54, I2C sub address. */
  959. #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
  960. #define PIC16C54_REG_MISC 0x02
  961. /* bit definition of the RESET register, I2C data. */
  962. #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
  963. /* code of remote controller */
  964. #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
  965. #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
  966. #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
  967. #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
  968. #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
  969. #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
  970. #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
  971. /* ---------------------------------------------------------------------- */
  972. /* audio chip descriptions - defines+functions for TA8874Z */
  973. /* write 1st byte */
  974. #define TA8874Z_LED_STE 0x80
  975. #define TA8874Z_LED_BIL 0x40
  976. #define TA8874Z_LED_EXT 0x20
  977. #define TA8874Z_MONO_SET 0x10
  978. #define TA8874Z_MUTE 0x08
  979. #define TA8874Z_F_MONO 0x04
  980. #define TA8874Z_MODE_SUB 0x02
  981. #define TA8874Z_MODE_MAIN 0x01
  982. /* write 2nd byte */
  983. /*#define TA8874Z_TI 0x80 */ /* test mode */
  984. #define TA8874Z_SEPARATION 0x3f
  985. #define TA8874Z_SEPARATION_DEFAULT 0x10
  986. /* read */
  987. #define TA8874Z_B1 0x80
  988. #define TA8874Z_B0 0x40
  989. #define TA8874Z_CHAG_FLAG 0x20
  990. /*
  991. * B1 B0
  992. * mono L H
  993. * stereo L L
  994. * BIL H L
  995. */
  996. static int ta8874z_getmode(struct CHIPSTATE *chip)
  997. {
  998. int val, mode;
  999. val = chip_read(chip);
  1000. mode = V4L2_TUNER_MODE_MONO;
  1001. if (val & TA8874Z_B1){
  1002. mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
  1003. }else if (!(val & TA8874Z_B0)){
  1004. mode |= V4L2_TUNER_MODE_STEREO;
  1005. }
  1006. /* v4l_dbg(1, debug, &chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
  1007. return mode;
  1008. }
  1009. static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
  1010. static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
  1011. static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
  1012. static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
  1013. static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
  1014. {
  1015. int update = 1;
  1016. audiocmd *t = NULL;
  1017. v4l_dbg(1, debug, &chip->c, "ta8874z_setmode(): mode: 0x%02x\n", mode);
  1018. switch(mode){
  1019. case V4L2_TUNER_MODE_MONO:
  1020. t = &ta8874z_mono;
  1021. break;
  1022. case V4L2_TUNER_MODE_STEREO:
  1023. t = &ta8874z_stereo;
  1024. break;
  1025. case V4L2_TUNER_MODE_LANG1:
  1026. t = &ta8874z_main;
  1027. break;
  1028. case V4L2_TUNER_MODE_LANG2:
  1029. t = &ta8874z_sub;
  1030. break;
  1031. default:
  1032. update = 0;
  1033. }
  1034. if(update)
  1035. chip_cmd(chip, "TA8874Z", t);
  1036. }
  1037. static int ta8874z_checkit(struct CHIPSTATE *chip)
  1038. {
  1039. int rc;
  1040. rc = chip_read(chip);
  1041. return ((rc & 0x1f) == 0x1f) ? 1 : 0;
  1042. }
  1043. /* ---------------------------------------------------------------------- */
  1044. /* audio chip descriptions - struct CHIPDESC */
  1045. /* insmod options to enable/disable individual audio chips */
  1046. static int tda8425 = 1;
  1047. static int tda9840 = 1;
  1048. static int tda9850 = 1;
  1049. static int tda9855 = 1;
  1050. static int tda9873 = 1;
  1051. static int tda9874a = 1;
  1052. static int tea6300 = 0; /* address clash with msp34xx */
  1053. static int tea6320 = 0; /* address clash with msp34xx */
  1054. static int tea6420 = 1;
  1055. static int pic16c54 = 1;
  1056. static int ta8874z = 0; /* address clash with tda9840 */
  1057. module_param(tda8425, int, 0444);
  1058. module_param(tda9840, int, 0444);
  1059. module_param(tda9850, int, 0444);
  1060. module_param(tda9855, int, 0444);
  1061. module_param(tda9873, int, 0444);
  1062. module_param(tda9874a, int, 0444);
  1063. module_param(tea6300, int, 0444);
  1064. module_param(tea6320, int, 0444);
  1065. module_param(tea6420, int, 0444);
  1066. module_param(pic16c54, int, 0444);
  1067. module_param(ta8874z, int, 0444);
  1068. static struct CHIPDESC chiplist[] = {
  1069. {
  1070. .name = "tda9840",
  1071. .id = I2C_DRIVERID_TDA9840,
  1072. .insmodopt = &tda9840,
  1073. .addr_lo = I2C_ADDR_TDA9840 >> 1,
  1074. .addr_hi = I2C_ADDR_TDA9840 >> 1,
  1075. .registers = 5,
  1076. .checkit = tda9840_checkit,
  1077. .getmode = tda9840_getmode,
  1078. .setmode = tda9840_setmode,
  1079. .checkmode = generic_checkmode,
  1080. .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
  1081. /* ,TDA9840_SW, TDA9840_MONO */} }
  1082. },
  1083. {
  1084. .name = "tda9873h",
  1085. .id = I2C_DRIVERID_TDA9873,
  1086. .checkit = tda9873_checkit,
  1087. .insmodopt = &tda9873,
  1088. .addr_lo = I2C_ADDR_TDA985x_L >> 1,
  1089. .addr_hi = I2C_ADDR_TDA985x_H >> 1,
  1090. .registers = 3,
  1091. .flags = CHIP_HAS_INPUTSEL,
  1092. .getmode = tda9873_getmode,
  1093. .setmode = tda9873_setmode,
  1094. .checkmode = generic_checkmode,
  1095. .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
  1096. .inputreg = TDA9873_SW,
  1097. .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
  1098. .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
  1099. .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
  1100. },
  1101. {
  1102. .name = "tda9874h/a",
  1103. .id = I2C_DRIVERID_TDA9874,
  1104. .checkit = tda9874a_checkit,
  1105. .initialize = tda9874a_initialize,
  1106. .insmodopt = &tda9874a,
  1107. .addr_lo = I2C_ADDR_TDA9874 >> 1,
  1108. .addr_hi = I2C_ADDR_TDA9874 >> 1,
  1109. .getmode = tda9874a_getmode,
  1110. .setmode = tda9874a_setmode,
  1111. .checkmode = generic_checkmode,
  1112. },
  1113. {
  1114. .name = "tda9850",
  1115. .id = I2C_DRIVERID_TDA9850,
  1116. .insmodopt = &tda9850,
  1117. .addr_lo = I2C_ADDR_TDA985x_L >> 1,
  1118. .addr_hi = I2C_ADDR_TDA985x_H >> 1,
  1119. .registers = 11,
  1120. .getmode = tda985x_getmode,
  1121. .setmode = tda985x_setmode,
  1122. .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
  1123. },
  1124. {
  1125. .name = "tda9855",
  1126. .id = I2C_DRIVERID_TDA9855,
  1127. .insmodopt = &tda9855,
  1128. .addr_lo = I2C_ADDR_TDA985x_L >> 1,
  1129. .addr_hi = I2C_ADDR_TDA985x_H >> 1,
  1130. .registers = 11,
  1131. .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
  1132. .leftreg = TDA9855_VL,
  1133. .rightreg = TDA9855_VR,
  1134. .bassreg = TDA9855_BA,
  1135. .treblereg = TDA9855_TR,
  1136. .volfunc = tda9855_volume,
  1137. .bassfunc = tda9855_bass,
  1138. .treblefunc = tda9855_treble,
  1139. .getmode = tda985x_getmode,
  1140. .setmode = tda985x_setmode,
  1141. .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
  1142. TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
  1143. TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
  1144. 0x07, 0x10, 0x10, 0x03 }}
  1145. },
  1146. {
  1147. .name = "tea6300",
  1148. .id = I2C_DRIVERID_TEA6300,
  1149. .insmodopt = &tea6300,
  1150. .addr_lo = I2C_ADDR_TEA6300 >> 1,
  1151. .addr_hi = I2C_ADDR_TEA6300 >> 1,
  1152. .registers = 6,
  1153. .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
  1154. .leftreg = TEA6300_VR,
  1155. .rightreg = TEA6300_VL,
  1156. .bassreg = TEA6300_BA,
  1157. .treblereg = TEA6300_TR,
  1158. .volfunc = tea6300_shift10,
  1159. .bassfunc = tea6300_shift12,
  1160. .treblefunc = tea6300_shift12,
  1161. .inputreg = TEA6300_S,
  1162. .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
  1163. .inputmute = TEA6300_S_GMU,
  1164. },
  1165. {
  1166. .name = "tea6320",
  1167. .id = I2C_DRIVERID_TEA6300,
  1168. .initialize = tea6320_initialize,
  1169. .insmodopt = &tea6320,
  1170. .addr_lo = I2C_ADDR_TEA6300 >> 1,
  1171. .addr_hi = I2C_ADDR_TEA6300 >> 1,
  1172. .registers = 8,
  1173. .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
  1174. .leftreg = TEA6320_V,
  1175. .rightreg = TEA6320_V,
  1176. .bassreg = TEA6320_BA,
  1177. .treblereg = TEA6320_TR,
  1178. .volfunc = tea6320_volume,
  1179. .bassfunc = tea6320_shift11,
  1180. .treblefunc = tea6320_shift11,
  1181. .inputreg = TEA6320_S,
  1182. .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
  1183. .inputmute = TEA6300_S_GMU,
  1184. },
  1185. {
  1186. .name = "tea6420",
  1187. .id = I2C_DRIVERID_TEA6420,
  1188. .insmodopt = &tea6420,
  1189. .addr_lo = I2C_ADDR_TEA6420 >> 1,
  1190. .addr_hi = I2C_ADDR_TEA6420 >> 1,
  1191. .registers = 1,
  1192. .flags = CHIP_HAS_INPUTSEL,
  1193. .inputreg = -1,
  1194. .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
  1195. .inputmute = TEA6300_S_GMU,
  1196. },
  1197. {
  1198. .name = "tda8425",
  1199. .id = I2C_DRIVERID_TDA8425,
  1200. .insmodopt = &tda8425,
  1201. .addr_lo = I2C_ADDR_TDA8425 >> 1,
  1202. .addr_hi = I2C_ADDR_TDA8425 >> 1,
  1203. .registers = 9,
  1204. .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
  1205. .leftreg = TDA8425_VL,
  1206. .rightreg = TDA8425_VR,
  1207. .bassreg = TDA8425_BA,
  1208. .treblereg = TDA8425_TR,
  1209. .volfunc = tda8425_shift10,
  1210. .bassfunc = tda8425_shift12,
  1211. .treblefunc = tda8425_shift12,
  1212. .inputreg = TDA8425_S1,
  1213. .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
  1214. .inputmute = TDA8425_S1_OFF,
  1215. .setmode = tda8425_setmode,
  1216. .initialize = tda8425_initialize,
  1217. },
  1218. {
  1219. .name = "pic16c54 (PV951)",
  1220. .id = I2C_DRIVERID_PIC16C54_PV9,
  1221. .insmodopt = &pic16c54,
  1222. .addr_lo = I2C_ADDR_PIC16C54 >> 1,
  1223. .addr_hi = I2C_ADDR_PIC16C54>> 1,
  1224. .registers = 2,
  1225. .flags = CHIP_HAS_INPUTSEL,
  1226. .inputreg = PIC16C54_REG_MISC,
  1227. .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
  1228. PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
  1229. PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
  1230. PIC16C54_MISC_SND_MUTE},
  1231. .inputmute = PIC16C54_MISC_SND_MUTE,
  1232. },
  1233. {
  1234. .name = "ta8874z",
  1235. .id = -1,
  1236. /*.id = I2C_DRIVERID_TA8874Z, */
  1237. .checkit = ta8874z_checkit,
  1238. .insmodopt = &ta8874z,
  1239. .addr_lo = I2C_ADDR_TDA9840 >> 1,
  1240. .addr_hi = I2C_ADDR_TDA9840 >> 1,
  1241. .registers = 2,
  1242. .getmode = ta8874z_getmode,
  1243. .setmode = ta8874z_setmode,
  1244. .checkmode = generic_checkmode,
  1245. .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
  1246. },
  1247. { .name = NULL } /* EOF */
  1248. };
  1249. /* ---------------------------------------------------------------------- */
  1250. /* i2c registration */
  1251. static int chip_attach(struct i2c_adapter *adap, int addr, int kind)
  1252. {
  1253. struct CHIPSTATE *chip;
  1254. struct CHIPDESC *desc;
  1255. chip = kzalloc(sizeof(*chip),GFP_KERNEL);
  1256. if (!chip)
  1257. return -ENOMEM;
  1258. memcpy(&chip->c,&client_template,sizeof(struct i2c_client));
  1259. chip->c.adapter = adap;
  1260. chip->c.addr = addr;
  1261. i2c_set_clientdata(&chip->c, chip);
  1262. /* find description for the chip */
  1263. v4l_dbg(1, debug, &chip->c, "chip found @ 0x%x\n", addr<<1);
  1264. for (desc = chiplist; desc->name != NULL; desc++) {
  1265. if (0 == *(desc->insmodopt))
  1266. continue;
  1267. if (addr < desc->addr_lo ||
  1268. addr > desc->addr_hi)
  1269. continue;
  1270. if (desc->checkit && !desc->checkit(chip))
  1271. continue;
  1272. break;
  1273. }
  1274. if (desc->name == NULL) {
  1275. v4l_dbg(1, debug, &chip->c, "no matching chip description found\n");
  1276. return -EIO;
  1277. }
  1278. v4l_info(&chip->c, "%s found @ 0x%x (%s)\n", desc->name, addr<<1, adap->name);
  1279. if (desc->flags) {
  1280. v4l_dbg(1, debug, &chip->c, "matches:%s%s%s.\n",
  1281. (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
  1282. (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
  1283. (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
  1284. }
  1285. /* fill required data structures */
  1286. strcpy(chip->c.name, desc->name);
  1287. chip->type = desc-chiplist;
  1288. chip->shadow.count = desc->registers+1;
  1289. chip->prevmode = -1;
  1290. chip->audmode = V4L2_TUNER_MODE_LANG1;
  1291. /* register */
  1292. i2c_attach_client(&chip->c);
  1293. /* initialization */
  1294. if (desc->initialize != NULL)
  1295. desc->initialize(chip);
  1296. else
  1297. chip_cmd(chip,"init",&desc->init);
  1298. if (desc->flags & CHIP_HAS_VOLUME) {
  1299. chip->left = desc->leftinit ? desc->leftinit : 65535;
  1300. chip->right = desc->rightinit ? desc->rightinit : 65535;
  1301. chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
  1302. chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
  1303. }
  1304. if (desc->flags & CHIP_HAS_BASSTREBLE) {
  1305. chip->treble = desc->trebleinit ? desc->trebleinit : 32768;
  1306. chip->bass = desc->bassinit ? desc->bassinit : 32768;
  1307. chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
  1308. chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
  1309. }
  1310. chip->thread = NULL;
  1311. if (desc->checkmode) {
  1312. /* start async thread */
  1313. init_timer(&chip->wt);
  1314. chip->wt.function = chip_thread_wake;
  1315. chip->wt.data = (unsigned long)chip;
  1316. chip->thread = kthread_run(chip_thread, chip, chip->c.name);
  1317. if (IS_ERR(chip->thread)) {
  1318. v4l_warn(&chip->c, "%s: failed to create kthread\n",
  1319. chip->c.name);
  1320. chip->thread = NULL;
  1321. }
  1322. }
  1323. return 0;
  1324. }
  1325. static int chip_probe(struct i2c_adapter *adap)
  1326. {
  1327. /* don't attach on saa7146 based cards,
  1328. because dedicated drivers are used */
  1329. if ((adap->id == I2C_HW_SAA7146))
  1330. return 0;
  1331. if (adap->class & I2C_CLASS_TV_ANALOG)
  1332. return i2c_probe(adap, &addr_data, chip_attach);
  1333. return 0;
  1334. }
  1335. static int chip_detach(struct i2c_client *client)
  1336. {
  1337. struct CHIPSTATE *chip = i2c_get_clientdata(client);
  1338. del_timer_sync(&chip->wt);
  1339. if (chip->thread) {
  1340. /* shutdown async thread */
  1341. kthread_stop(chip->thread);
  1342. chip->thread = NULL;
  1343. }
  1344. i2c_detach_client(&chip->c);
  1345. kfree(chip);
  1346. return 0;
  1347. }
  1348. static int tvaudio_get_ctrl(struct CHIPSTATE *chip,
  1349. struct v4l2_control *ctrl)
  1350. {
  1351. struct CHIPDESC *desc = chiplist + chip->type;
  1352. switch (ctrl->id) {
  1353. case V4L2_CID_AUDIO_MUTE:
  1354. ctrl->value=chip->muted;
  1355. return 0;
  1356. case V4L2_CID_AUDIO_VOLUME:
  1357. if (!desc->flags & CHIP_HAS_VOLUME)
  1358. break;
  1359. ctrl->value = max(chip->left,chip->right);
  1360. return 0;
  1361. case V4L2_CID_AUDIO_BALANCE:
  1362. {
  1363. int volume;
  1364. if (!desc->flags & CHIP_HAS_VOLUME)
  1365. break;
  1366. volume = max(chip->left,chip->right);
  1367. if (volume)
  1368. ctrl->value=(32768*min(chip->left,chip->right))/volume;
  1369. else
  1370. ctrl->value=32768;
  1371. return 0;
  1372. }
  1373. case V4L2_CID_AUDIO_BASS:
  1374. if (desc->flags & CHIP_HAS_BASSTREBLE)
  1375. break;
  1376. ctrl->value = chip->bass;
  1377. return 0;
  1378. case V4L2_CID_AUDIO_TREBLE:
  1379. if (desc->flags & CHIP_HAS_BASSTREBLE)
  1380. return -EINVAL;
  1381. ctrl->value = chip->treble;
  1382. return 0;
  1383. }
  1384. return -EINVAL;
  1385. }
  1386. static int tvaudio_set_ctrl(struct CHIPSTATE *chip,
  1387. struct v4l2_control *ctrl)
  1388. {
  1389. struct CHIPDESC *desc = chiplist + chip->type;
  1390. switch (ctrl->id) {
  1391. case V4L2_CID_AUDIO_MUTE:
  1392. if (ctrl->value < 0 || ctrl->value >= 2)
  1393. return -ERANGE;
  1394. chip->muted = ctrl->value;
  1395. if (chip->muted)
  1396. chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
  1397. else
  1398. chip_write_masked(chip,desc->inputreg,
  1399. desc->inputmap[chip->input],desc->inputmask);
  1400. return 0;
  1401. case V4L2_CID_AUDIO_VOLUME:
  1402. {
  1403. int volume,balance;
  1404. if (!desc->flags & CHIP_HAS_VOLUME)
  1405. break;
  1406. volume = max(chip->left,chip->right);
  1407. if (volume)
  1408. balance=(32768*min(chip->left,chip->right))/volume;
  1409. else
  1410. balance=32768;
  1411. volume=ctrl->value;
  1412. chip->left = (min(65536 - balance,32768) * volume) / 32768;
  1413. chip->right = (min(balance,volume *(__u16)32768)) / 32768;
  1414. chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
  1415. chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
  1416. return 0;
  1417. }
  1418. case V4L2_CID_AUDIO_BALANCE:
  1419. {
  1420. int volume, balance;
  1421. if (!desc->flags & CHIP_HAS_VOLUME)
  1422. break;
  1423. volume = max(chip->left,chip->right);
  1424. balance = ctrl->value;
  1425. chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
  1426. chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
  1427. return 0;
  1428. }
  1429. case V4L2_CID_AUDIO_BASS:
  1430. if (desc->flags & CHIP_HAS_BASSTREBLE)
  1431. break;
  1432. chip->bass = ctrl->value;
  1433. chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
  1434. return 0;
  1435. case V4L2_CID_AUDIO_TREBLE:
  1436. if (desc->flags & CHIP_HAS_BASSTREBLE)
  1437. return -EINVAL;
  1438. chip->treble = ctrl->value;
  1439. chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
  1440. return 0;
  1441. }
  1442. return -EINVAL;
  1443. }
  1444. /* ---------------------------------------------------------------------- */
  1445. /* video4linux interface */
  1446. static int chip_command(struct i2c_client *client,
  1447. unsigned int cmd, void *arg)
  1448. {
  1449. struct CHIPSTATE *chip = i2c_get_clientdata(client);
  1450. struct CHIPDESC *desc = chiplist + chip->type;
  1451. v4l_dbg(1, debug, &chip->c, "%s: chip_command 0x%x\n", chip->c.name, cmd);
  1452. switch (cmd) {
  1453. case AUDC_SET_RADIO:
  1454. chip->radio = 1;
  1455. chip->watch_stereo = 0;
  1456. /* del_timer(&chip->wt); */
  1457. break;
  1458. /* --- v4l ioctls --- */
  1459. /* take care: bttv does userspace copying, we'll get a
  1460. kernel pointer here... */
  1461. case VIDIOC_QUERYCTRL:
  1462. {
  1463. struct v4l2_queryctrl *qc = arg;
  1464. switch (qc->id) {
  1465. case V4L2_CID_AUDIO_MUTE:
  1466. break;
  1467. case V4L2_CID_AUDIO_VOLUME:
  1468. case V4L2_CID_AUDIO_BALANCE:
  1469. if (!desc->flags & CHIP_HAS_VOLUME)
  1470. return -EINVAL;
  1471. break;
  1472. case V4L2_CID_AUDIO_BASS:
  1473. case V4L2_CID_AUDIO_TREBLE:
  1474. if (desc->flags & CHIP_HAS_BASSTREBLE)
  1475. return -EINVAL;
  1476. break;
  1477. default:
  1478. return -EINVAL;
  1479. }
  1480. return v4l2_ctrl_query_fill_std(qc);
  1481. }
  1482. case VIDIOC_S_CTRL:
  1483. return tvaudio_set_ctrl(chip, arg);
  1484. case VIDIOC_G_CTRL:
  1485. return tvaudio_get_ctrl(chip, arg);
  1486. case VIDIOC_INT_G_AUDIO_ROUTING:
  1487. {
  1488. struct v4l2_routing *rt = arg;
  1489. rt->input = chip->input;
  1490. rt->output = 0;
  1491. break;
  1492. }
  1493. case VIDIOC_INT_S_AUDIO_ROUTING:
  1494. {
  1495. struct v4l2_routing *rt = arg;
  1496. if (!(desc->flags & CHIP_HAS_INPUTSEL) || rt->input >= 4)
  1497. return -EINVAL;
  1498. /* There are four inputs: tuner, radio, extern and intern. */
  1499. chip->input = rt->input;
  1500. if (chip->muted)
  1501. break;
  1502. chip_write_masked(chip, desc->inputreg,
  1503. desc->inputmap[chip->input], desc->inputmask);
  1504. break;
  1505. }
  1506. case VIDIOC_S_TUNER:
  1507. {
  1508. struct v4l2_tuner *vt = arg;
  1509. int mode = 0;
  1510. if (chip->radio)
  1511. break;
  1512. switch (vt->audmode) {
  1513. case V4L2_TUNER_MODE_MONO:
  1514. case V4L2_TUNER_MODE_STEREO:
  1515. case V4L2_TUNER_MODE_LANG1:
  1516. case V4L2_TUNER_MODE_LANG2:
  1517. mode = vt->audmode;
  1518. break;
  1519. case V4L2_TUNER_MODE_LANG1_LANG2:
  1520. mode = V4L2_TUNER_MODE_STEREO;
  1521. break;
  1522. default:
  1523. return -EINVAL;
  1524. }
  1525. chip->audmode = vt->audmode;
  1526. if (desc->setmode && mode) {
  1527. chip->watch_stereo = 0;
  1528. /* del_timer(&chip->wt); */
  1529. chip->mode = mode;
  1530. desc->setmode(chip, mode);
  1531. }
  1532. break;
  1533. }
  1534. case VIDIOC_G_TUNER:
  1535. {
  1536. struct v4l2_tuner *vt = arg;
  1537. int mode = V4L2_TUNER_MODE_MONO;
  1538. if (chip->radio)
  1539. break;
  1540. vt->audmode = chip->audmode;
  1541. vt->rxsubchans = 0;
  1542. vt->capability = V4L2_TUNER_CAP_STEREO |
  1543. V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
  1544. if (desc->getmode)
  1545. mode = desc->getmode(chip);
  1546. if (mode & V4L2_TUNER_MODE_MONO)
  1547. vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
  1548. if (mode & V4L2_TUNER_MODE_STEREO)
  1549. vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
  1550. /* Note: for SAP it should be mono/lang2 or stereo/lang2.
  1551. When this module is converted fully to v4l2, then this
  1552. should change for those chips that can detect SAP. */
  1553. if (mode & V4L2_TUNER_MODE_LANG1)
  1554. vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
  1555. V4L2_TUNER_SUB_LANG2;
  1556. break;
  1557. }
  1558. case VIDIOC_S_STD:
  1559. chip->radio = 0;
  1560. break;
  1561. case VIDIOC_S_FREQUENCY:
  1562. chip->mode = 0; /* automatic */
  1563. if (desc->checkmode) {
  1564. desc->setmode(chip,V4L2_TUNER_MODE_MONO);
  1565. if (chip->prevmode != V4L2_TUNER_MODE_MONO)
  1566. chip->prevmode = -1; /* reset previous mode */
  1567. mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
  1568. /* the thread will call checkmode() later */
  1569. }
  1570. break;
  1571. case VIDIOC_G_CHIP_IDENT:
  1572. return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_TVAUDIO, 0);
  1573. }
  1574. return 0;
  1575. }
  1576. static struct i2c_driver driver = {
  1577. .driver = {
  1578. .name = "tvaudio",
  1579. },
  1580. .id = I2C_DRIVERID_TVAUDIO,
  1581. .attach_adapter = chip_probe,
  1582. .detach_client = chip_detach,
  1583. .command = chip_command,
  1584. };
  1585. static struct i2c_client client_template =
  1586. {
  1587. .name = "(unset)",
  1588. .driver = &driver,
  1589. };
  1590. static int __init audiochip_init_module(void)
  1591. {
  1592. struct CHIPDESC *desc;
  1593. if (debug) {
  1594. printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
  1595. printk(KERN_INFO "tvaudio: known chips: ");
  1596. for (desc = chiplist; desc->name != NULL; desc++)
  1597. printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
  1598. printk("\n");
  1599. }
  1600. return i2c_add_driver(&driver);
  1601. }
  1602. static void __exit audiochip_cleanup_module(void)
  1603. {
  1604. i2c_del_driver(&driver);
  1605. }
  1606. module_init(audiochip_init_module);
  1607. module_exit(audiochip_cleanup_module);
  1608. /*
  1609. * Local variables:
  1610. * c-basic-offset: 8
  1611. * End:
  1612. */