Kconfig 52 KB

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  1. config ARM
  2. bool
  3. default y
  4. select HAVE_AOUT
  5. select HAVE_DMA_API_DEBUG
  6. select HAVE_IDE
  7. select HAVE_MEMBLOCK
  8. select RTC_LIB
  9. select SYS_SUPPORTS_APM_EMULATION
  10. select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
  11. select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12. select HAVE_ARCH_KGDB
  13. select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
  14. select HAVE_KRETPROBES if (HAVE_KPROBES)
  15. select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  16. select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  17. select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  18. select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  19. select HAVE_GENERIC_DMA_COHERENT
  20. select HAVE_KERNEL_GZIP
  21. select HAVE_KERNEL_LZO
  22. select HAVE_KERNEL_LZMA
  23. select HAVE_IRQ_WORK
  24. select HAVE_PERF_EVENTS
  25. select PERF_USE_VMALLOC
  26. select HAVE_REGS_AND_STACK_ACCESS_API
  27. select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
  28. select HAVE_C_RECORDMCOUNT
  29. select HAVE_GENERIC_HARDIRQS
  30. select HAVE_SPARSE_IRQ
  31. help
  32. The ARM series is a line of low-power-consumption RISC chip designs
  33. licensed by ARM Ltd and targeted at embedded applications and
  34. handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
  35. manufactured, but legacy ARM-based PC hardware remains popular in
  36. Europe. There is an ARM Linux project with a web page at
  37. <http://www.arm.linux.org.uk/>.
  38. config HAVE_PWM
  39. bool
  40. config MIGHT_HAVE_PCI
  41. bool
  42. config SYS_SUPPORTS_APM_EMULATION
  43. bool
  44. config HAVE_SCHED_CLOCK
  45. bool
  46. config GENERIC_GPIO
  47. bool
  48. config ARCH_USES_GETTIMEOFFSET
  49. bool
  50. default n
  51. config GENERIC_CLOCKEVENTS
  52. bool
  53. config GENERIC_CLOCKEVENTS_BROADCAST
  54. bool
  55. depends on GENERIC_CLOCKEVENTS
  56. default y if SMP
  57. config HAVE_TCM
  58. bool
  59. select GENERIC_ALLOCATOR
  60. config HAVE_PROC_CPU
  61. bool
  62. config NO_IOPORT
  63. bool
  64. config EISA
  65. bool
  66. ---help---
  67. The Extended Industry Standard Architecture (EISA) bus was
  68. developed as an open alternative to the IBM MicroChannel bus.
  69. The EISA bus provided some of the features of the IBM MicroChannel
  70. bus while maintaining backward compatibility with cards made for
  71. the older ISA bus. The EISA bus saw limited use between 1988 and
  72. 1995 when it was made obsolete by the PCI bus.
  73. Say Y here if you are building a kernel for an EISA-based machine.
  74. Otherwise, say N.
  75. config SBUS
  76. bool
  77. config MCA
  78. bool
  79. help
  80. MicroChannel Architecture is found in some IBM PS/2 machines and
  81. laptops. It is a bus system similar to PCI or ISA. See
  82. <file:Documentation/mca.txt> (and especially the web page given
  83. there) before attempting to build an MCA bus kernel.
  84. config STACKTRACE_SUPPORT
  85. bool
  86. default y
  87. config HAVE_LATENCYTOP_SUPPORT
  88. bool
  89. depends on !SMP
  90. default y
  91. config LOCKDEP_SUPPORT
  92. bool
  93. default y
  94. config TRACE_IRQFLAGS_SUPPORT
  95. bool
  96. default y
  97. config HARDIRQS_SW_RESEND
  98. bool
  99. default y
  100. config GENERIC_IRQ_PROBE
  101. bool
  102. default y
  103. config GENERIC_LOCKBREAK
  104. bool
  105. default y
  106. depends on SMP && PREEMPT
  107. config RWSEM_GENERIC_SPINLOCK
  108. bool
  109. default y
  110. config RWSEM_XCHGADD_ALGORITHM
  111. bool
  112. config ARCH_HAS_ILOG2_U32
  113. bool
  114. config ARCH_HAS_ILOG2_U64
  115. bool
  116. config ARCH_HAS_CPUFREQ
  117. bool
  118. help
  119. Internal node to signify that the ARCH has CPUFREQ support
  120. and that the relevant menu configurations are displayed for
  121. it.
  122. config ARCH_HAS_CPU_IDLE_WAIT
  123. def_bool y
  124. config GENERIC_HWEIGHT
  125. bool
  126. default y
  127. config GENERIC_CALIBRATE_DELAY
  128. bool
  129. default y
  130. config ARCH_MAY_HAVE_PC_FDC
  131. bool
  132. config ZONE_DMA
  133. bool
  134. config NEED_DMA_MAP_STATE
  135. def_bool y
  136. config GENERIC_ISA_DMA
  137. bool
  138. config FIQ
  139. bool
  140. config ARCH_MTD_XIP
  141. bool
  142. config ARM_L1_CACHE_SHIFT_6
  143. bool
  144. help
  145. Setting ARM L1 cache line size to 64 Bytes.
  146. config VECTORS_BASE
  147. hex
  148. default 0xffff0000 if MMU || CPU_HIGH_VECTOR
  149. default DRAM_BASE if REMAP_VECTORS_TO_RAM
  150. default 0x00000000
  151. help
  152. The base address of exception vectors.
  153. source "init/Kconfig"
  154. source "kernel/Kconfig.freezer"
  155. menu "System Type"
  156. config MMU
  157. bool "MMU-based Paged Memory Management Support"
  158. default y
  159. help
  160. Select if you want MMU-based virtualised addressing space
  161. support by paged memory management. If unsure, say 'Y'.
  162. #
  163. # The "ARM system type" choice list is ordered alphabetically by option
  164. # text. Please add new entries in the option alphabetic order.
  165. #
  166. choice
  167. prompt "ARM system type"
  168. default ARCH_VERSATILE
  169. config ARCH_AAEC2000
  170. bool "Agilent AAEC-2000 based"
  171. select CPU_ARM920T
  172. select ARM_AMBA
  173. select HAVE_CLK
  174. select ARCH_USES_GETTIMEOFFSET
  175. help
  176. This enables support for systems based on the Agilent AAEC-2000
  177. config ARCH_INTEGRATOR
  178. bool "ARM Ltd. Integrator family"
  179. select ARM_AMBA
  180. select ARCH_HAS_CPUFREQ
  181. select CLKDEV_LOOKUP
  182. select ICST
  183. select GENERIC_CLOCKEVENTS
  184. select PLAT_VERSATILE
  185. help
  186. Support for ARM's Integrator platform.
  187. config ARCH_REALVIEW
  188. bool "ARM Ltd. RealView family"
  189. select ARM_AMBA
  190. select CLKDEV_LOOKUP
  191. select ICST
  192. select GENERIC_CLOCKEVENTS
  193. select ARCH_WANT_OPTIONAL_GPIOLIB
  194. select PLAT_VERSATILE
  195. select PLAT_VERSATILE_CLCD
  196. select ARM_TIMER_SP804
  197. select GPIO_PL061 if GPIOLIB
  198. help
  199. This enables support for ARM Ltd RealView boards.
  200. config ARCH_VERSATILE
  201. bool "ARM Ltd. Versatile family"
  202. select ARM_AMBA
  203. select ARM_VIC
  204. select CLKDEV_LOOKUP
  205. select ICST
  206. select GENERIC_CLOCKEVENTS
  207. select ARCH_WANT_OPTIONAL_GPIOLIB
  208. select PLAT_VERSATILE
  209. select PLAT_VERSATILE_CLCD
  210. select ARM_TIMER_SP804
  211. help
  212. This enables support for ARM Ltd Versatile board.
  213. config ARCH_VEXPRESS
  214. bool "ARM Ltd. Versatile Express family"
  215. select ARCH_WANT_OPTIONAL_GPIOLIB
  216. select ARM_AMBA
  217. select ARM_TIMER_SP804
  218. select CLKDEV_LOOKUP
  219. select GENERIC_CLOCKEVENTS
  220. select HAVE_CLK
  221. select HAVE_PATA_PLATFORM
  222. select ICST
  223. select PLAT_VERSATILE
  224. select PLAT_VERSATILE_CLCD
  225. help
  226. This enables support for the ARM Ltd Versatile Express boards.
  227. config ARCH_AT91
  228. bool "Atmel AT91"
  229. select ARCH_REQUIRE_GPIOLIB
  230. select HAVE_CLK
  231. help
  232. This enables support for systems based on the Atmel AT91RM9200,
  233. AT91SAM9 and AT91CAP9 processors.
  234. config ARCH_BCMRING
  235. bool "Broadcom BCMRING"
  236. depends on MMU
  237. select CPU_V6
  238. select ARM_AMBA
  239. select CLKDEV_LOOKUP
  240. select GENERIC_CLOCKEVENTS
  241. select ARCH_WANT_OPTIONAL_GPIOLIB
  242. help
  243. Support for Broadcom's BCMRing platform.
  244. config ARCH_CLPS711X
  245. bool "Cirrus Logic CLPS711x/EP721x-based"
  246. select CPU_ARM720T
  247. select ARCH_USES_GETTIMEOFFSET
  248. help
  249. Support for Cirrus Logic 711x/721x based boards.
  250. config ARCH_CNS3XXX
  251. bool "Cavium Networks CNS3XXX family"
  252. select CPU_V6
  253. select GENERIC_CLOCKEVENTS
  254. select ARM_GIC
  255. select MIGHT_HAVE_PCI
  256. select PCI_DOMAINS if PCI
  257. help
  258. Support for Cavium Networks CNS3XXX platform.
  259. config ARCH_GEMINI
  260. bool "Cortina Systems Gemini"
  261. select CPU_FA526
  262. select ARCH_REQUIRE_GPIOLIB
  263. select ARCH_USES_GETTIMEOFFSET
  264. help
  265. Support for the Cortina Systems Gemini family SoCs
  266. config ARCH_EBSA110
  267. bool "EBSA-110"
  268. select CPU_SA110
  269. select ISA
  270. select NO_IOPORT
  271. select ARCH_USES_GETTIMEOFFSET
  272. help
  273. This is an evaluation board for the StrongARM processor available
  274. from Digital. It has limited hardware on-board, including an
  275. Ethernet interface, two PCMCIA sockets, two serial ports and a
  276. parallel port.
  277. config ARCH_EP93XX
  278. bool "EP93xx-based"
  279. select CPU_ARM920T
  280. select ARM_AMBA
  281. select ARM_VIC
  282. select CLKDEV_LOOKUP
  283. select ARCH_REQUIRE_GPIOLIB
  284. select ARCH_HAS_HOLES_MEMORYMODEL
  285. select ARCH_USES_GETTIMEOFFSET
  286. help
  287. This enables support for the Cirrus EP93xx series of CPUs.
  288. config ARCH_FOOTBRIDGE
  289. bool "FootBridge"
  290. select CPU_SA110
  291. select FOOTBRIDGE
  292. select ARCH_USES_GETTIMEOFFSET
  293. help
  294. Support for systems based on the DC21285 companion chip
  295. ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
  296. config ARCH_MXC
  297. bool "Freescale MXC/iMX-based"
  298. select GENERIC_CLOCKEVENTS
  299. select ARCH_REQUIRE_GPIOLIB
  300. select CLKDEV_LOOKUP
  301. help
  302. Support for Freescale MXC/iMX-based family of processors
  303. config ARCH_MXS
  304. bool "Freescale MXS-based"
  305. select GENERIC_CLOCKEVENTS
  306. select ARCH_REQUIRE_GPIOLIB
  307. select CLKDEV_LOOKUP
  308. help
  309. Support for Freescale MXS-based family of processors
  310. config ARCH_STMP3XXX
  311. bool "Freescale STMP3xxx"
  312. select CPU_ARM926T
  313. select CLKDEV_LOOKUP
  314. select ARCH_REQUIRE_GPIOLIB
  315. select GENERIC_CLOCKEVENTS
  316. select USB_ARCH_HAS_EHCI
  317. help
  318. Support for systems based on the Freescale 3xxx CPUs.
  319. config ARCH_NETX
  320. bool "Hilscher NetX based"
  321. select CPU_ARM926T
  322. select ARM_VIC
  323. select GENERIC_CLOCKEVENTS
  324. help
  325. This enables support for systems based on the Hilscher NetX Soc
  326. config ARCH_H720X
  327. bool "Hynix HMS720x-based"
  328. select CPU_ARM720T
  329. select ISA_DMA_API
  330. select ARCH_USES_GETTIMEOFFSET
  331. help
  332. This enables support for systems based on the Hynix HMS720x
  333. config ARCH_IOP13XX
  334. bool "IOP13xx-based"
  335. depends on MMU
  336. select CPU_XSC3
  337. select PLAT_IOP
  338. select PCI
  339. select ARCH_SUPPORTS_MSI
  340. select VMSPLIT_1G
  341. help
  342. Support for Intel's IOP13XX (XScale) family of processors.
  343. config ARCH_IOP32X
  344. bool "IOP32x-based"
  345. depends on MMU
  346. select CPU_XSCALE
  347. select PLAT_IOP
  348. select PCI
  349. select ARCH_REQUIRE_GPIOLIB
  350. help
  351. Support for Intel's 80219 and IOP32X (XScale) family of
  352. processors.
  353. config ARCH_IOP33X
  354. bool "IOP33x-based"
  355. depends on MMU
  356. select CPU_XSCALE
  357. select PLAT_IOP
  358. select PCI
  359. select ARCH_REQUIRE_GPIOLIB
  360. help
  361. Support for Intel's IOP33X (XScale) family of processors.
  362. config ARCH_IXP23XX
  363. bool "IXP23XX-based"
  364. depends on MMU
  365. select CPU_XSC3
  366. select PCI
  367. select ARCH_USES_GETTIMEOFFSET
  368. help
  369. Support for Intel's IXP23xx (XScale) family of processors.
  370. config ARCH_IXP2000
  371. bool "IXP2400/2800-based"
  372. depends on MMU
  373. select CPU_XSCALE
  374. select PCI
  375. select ARCH_USES_GETTIMEOFFSET
  376. help
  377. Support for Intel's IXP2400/2800 (XScale) family of processors.
  378. config ARCH_IXP4XX
  379. bool "IXP4xx-based"
  380. depends on MMU
  381. select CPU_XSCALE
  382. select GENERIC_GPIO
  383. select GENERIC_CLOCKEVENTS
  384. select HAVE_SCHED_CLOCK
  385. select MIGHT_HAVE_PCI
  386. select DMABOUNCE if PCI
  387. help
  388. Support for Intel's IXP4XX (XScale) family of processors.
  389. config ARCH_DOVE
  390. bool "Marvell Dove"
  391. select PCI
  392. select ARCH_REQUIRE_GPIOLIB
  393. select GENERIC_CLOCKEVENTS
  394. select PLAT_ORION
  395. help
  396. Support for the Marvell Dove SoC 88AP510
  397. config ARCH_KIRKWOOD
  398. bool "Marvell Kirkwood"
  399. select CPU_FEROCEON
  400. select PCI
  401. select ARCH_REQUIRE_GPIOLIB
  402. select GENERIC_CLOCKEVENTS
  403. select PLAT_ORION
  404. help
  405. Support for the following Marvell Kirkwood series SoCs:
  406. 88F6180, 88F6192 and 88F6281.
  407. config ARCH_LOKI
  408. bool "Marvell Loki (88RC8480)"
  409. select CPU_FEROCEON
  410. select GENERIC_CLOCKEVENTS
  411. select PLAT_ORION
  412. help
  413. Support for the Marvell Loki (88RC8480) SoC.
  414. config ARCH_LPC32XX
  415. bool "NXP LPC32XX"
  416. select CPU_ARM926T
  417. select ARCH_REQUIRE_GPIOLIB
  418. select HAVE_IDE
  419. select ARM_AMBA
  420. select USB_ARCH_HAS_OHCI
  421. select CLKDEV_LOOKUP
  422. select GENERIC_TIME
  423. select GENERIC_CLOCKEVENTS
  424. help
  425. Support for the NXP LPC32XX family of processors
  426. config ARCH_MV78XX0
  427. bool "Marvell MV78xx0"
  428. select CPU_FEROCEON
  429. select PCI
  430. select ARCH_REQUIRE_GPIOLIB
  431. select GENERIC_CLOCKEVENTS
  432. select PLAT_ORION
  433. help
  434. Support for the following Marvell MV78xx0 series SoCs:
  435. MV781x0, MV782x0.
  436. config ARCH_ORION5X
  437. bool "Marvell Orion"
  438. depends on MMU
  439. select CPU_FEROCEON
  440. select PCI
  441. select ARCH_REQUIRE_GPIOLIB
  442. select GENERIC_CLOCKEVENTS
  443. select PLAT_ORION
  444. help
  445. Support for the following Marvell Orion 5x series SoCs:
  446. Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
  447. Orion-2 (5281), Orion-1-90 (6183).
  448. config ARCH_MMP
  449. bool "Marvell PXA168/910/MMP2"
  450. depends on MMU
  451. select ARCH_REQUIRE_GPIOLIB
  452. select CLKDEV_LOOKUP
  453. select GENERIC_CLOCKEVENTS
  454. select HAVE_SCHED_CLOCK
  455. select TICK_ONESHOT
  456. select PLAT_PXA
  457. select SPARSE_IRQ
  458. help
  459. Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
  460. config ARCH_KS8695
  461. bool "Micrel/Kendin KS8695"
  462. select CPU_ARM922T
  463. select ARCH_REQUIRE_GPIOLIB
  464. select ARCH_USES_GETTIMEOFFSET
  465. help
  466. Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
  467. System-on-Chip devices.
  468. config ARCH_NS9XXX
  469. bool "NetSilicon NS9xxx"
  470. select CPU_ARM926T
  471. select GENERIC_GPIO
  472. select GENERIC_CLOCKEVENTS
  473. select HAVE_CLK
  474. help
  475. Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
  476. System.
  477. <http://www.digi.com/products/microprocessors/index.jsp>
  478. config ARCH_W90X900
  479. bool "Nuvoton W90X900 CPU"
  480. select CPU_ARM926T
  481. select ARCH_REQUIRE_GPIOLIB
  482. select CLKDEV_LOOKUP
  483. select GENERIC_CLOCKEVENTS
  484. help
  485. Support for Nuvoton (Winbond logic dept.) ARM9 processor,
  486. At present, the w90x900 has been renamed nuc900, regarding
  487. the ARM series product line, you can login the following
  488. link address to know more.
  489. <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
  490. ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
  491. config ARCH_NUC93X
  492. bool "Nuvoton NUC93X CPU"
  493. select CPU_ARM926T
  494. select CLKDEV_LOOKUP
  495. help
  496. Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
  497. low-power and high performance MPEG-4/JPEG multimedia controller chip.
  498. config ARCH_TEGRA
  499. bool "NVIDIA Tegra"
  500. select CLKDEV_LOOKUP
  501. select GENERIC_TIME
  502. select GENERIC_CLOCKEVENTS
  503. select GENERIC_GPIO
  504. select HAVE_CLK
  505. select HAVE_SCHED_CLOCK
  506. select ARCH_HAS_BARRIERS if CACHE_L2X0
  507. select ARCH_HAS_CPUFREQ
  508. help
  509. This enables support for NVIDIA Tegra based systems (Tegra APX,
  510. Tegra 6xx and Tegra 2 series).
  511. config ARCH_PNX4008
  512. bool "Philips Nexperia PNX4008 Mobile"
  513. select CPU_ARM926T
  514. select CLKDEV_LOOKUP
  515. select ARCH_USES_GETTIMEOFFSET
  516. help
  517. This enables support for Philips PNX4008 mobile platform.
  518. config ARCH_PXA
  519. bool "PXA2xx/PXA3xx-based"
  520. depends on MMU
  521. select ARCH_MTD_XIP
  522. select ARCH_HAS_CPUFREQ
  523. select CLKDEV_LOOKUP
  524. select ARCH_REQUIRE_GPIOLIB
  525. select GENERIC_CLOCKEVENTS
  526. select HAVE_SCHED_CLOCK
  527. select TICK_ONESHOT
  528. select PLAT_PXA
  529. select SPARSE_IRQ
  530. help
  531. Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
  532. config ARCH_MSM
  533. bool "Qualcomm MSM"
  534. select HAVE_CLK
  535. select GENERIC_CLOCKEVENTS
  536. select ARCH_REQUIRE_GPIOLIB
  537. help
  538. Support for Qualcomm MSM/QSD based systems. This runs on the
  539. apps processor of the MSM/QSD and depends on a shared memory
  540. interface to the modem processor which runs the baseband
  541. stack and controls some vital subsystems
  542. (clock and power control, etc).
  543. config ARCH_SHMOBILE
  544. bool "Renesas SH-Mobile / R-Mobile"
  545. select HAVE_CLK
  546. select CLKDEV_LOOKUP
  547. select GENERIC_CLOCKEVENTS
  548. select NO_IOPORT
  549. select SPARSE_IRQ
  550. select MULTI_IRQ_HANDLER
  551. help
  552. Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
  553. config ARCH_RPC
  554. bool "RiscPC"
  555. select ARCH_ACORN
  556. select FIQ
  557. select TIMER_ACORN
  558. select ARCH_MAY_HAVE_PC_FDC
  559. select HAVE_PATA_PLATFORM
  560. select ISA_DMA_API
  561. select NO_IOPORT
  562. select ARCH_SPARSEMEM_ENABLE
  563. select ARCH_USES_GETTIMEOFFSET
  564. help
  565. On the Acorn Risc-PC, Linux can support the internal IDE disk and
  566. CD-ROM interface, serial and parallel port, and the floppy drive.
  567. config ARCH_SA1100
  568. bool "SA1100-based"
  569. select CPU_SA1100
  570. select ISA
  571. select ARCH_SPARSEMEM_ENABLE
  572. select ARCH_MTD_XIP
  573. select ARCH_HAS_CPUFREQ
  574. select CPU_FREQ
  575. select GENERIC_CLOCKEVENTS
  576. select HAVE_CLK
  577. select HAVE_SCHED_CLOCK
  578. select TICK_ONESHOT
  579. select ARCH_REQUIRE_GPIOLIB
  580. help
  581. Support for StrongARM 11x0 based boards.
  582. config ARCH_S3C2410
  583. bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
  584. select GENERIC_GPIO
  585. select ARCH_HAS_CPUFREQ
  586. select HAVE_CLK
  587. select ARCH_USES_GETTIMEOFFSET
  588. select HAVE_S3C2410_I2C if I2C
  589. help
  590. Samsung S3C2410X CPU based systems, such as the Simtec Electronics
  591. BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
  592. the Samsung SMDK2410 development board (and derivatives).
  593. Note, the S3C2416 and the S3C2450 are so close that they even share
  594. the same SoC ID code. This means that there is no seperate machine
  595. directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
  596. config ARCH_S3C64XX
  597. bool "Samsung S3C64XX"
  598. select PLAT_SAMSUNG
  599. select CPU_V6
  600. select ARM_VIC
  601. select HAVE_CLK
  602. select NO_IOPORT
  603. select ARCH_USES_GETTIMEOFFSET
  604. select ARCH_HAS_CPUFREQ
  605. select ARCH_REQUIRE_GPIOLIB
  606. select SAMSUNG_CLKSRC
  607. select SAMSUNG_IRQ_VIC_TIMER
  608. select SAMSUNG_IRQ_UART
  609. select S3C_GPIO_TRACK
  610. select S3C_GPIO_PULL_UPDOWN
  611. select S3C_GPIO_CFG_S3C24XX
  612. select S3C_GPIO_CFG_S3C64XX
  613. select S3C_DEV_NAND
  614. select USB_ARCH_HAS_OHCI
  615. select SAMSUNG_GPIOLIB_4BIT
  616. select HAVE_S3C2410_I2C if I2C
  617. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  618. help
  619. Samsung S3C64XX series based systems
  620. config ARCH_S5P64X0
  621. bool "Samsung S5P6440 S5P6450"
  622. select CPU_V6
  623. select GENERIC_GPIO
  624. select HAVE_CLK
  625. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  626. select ARCH_USES_GETTIMEOFFSET
  627. select HAVE_S3C2410_I2C if I2C
  628. select HAVE_S3C_RTC if RTC_CLASS
  629. help
  630. Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
  631. SMDK6450.
  632. config ARCH_S5P6442
  633. bool "Samsung S5P6442"
  634. select CPU_V6
  635. select GENERIC_GPIO
  636. select HAVE_CLK
  637. select ARCH_USES_GETTIMEOFFSET
  638. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  639. help
  640. Samsung S5P6442 CPU based systems
  641. config ARCH_S5PC100
  642. bool "Samsung S5PC100"
  643. select GENERIC_GPIO
  644. select HAVE_CLK
  645. select CPU_V7
  646. select ARM_L1_CACHE_SHIFT_6
  647. select ARCH_USES_GETTIMEOFFSET
  648. select HAVE_S3C2410_I2C if I2C
  649. select HAVE_S3C_RTC if RTC_CLASS
  650. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  651. help
  652. Samsung S5PC100 series based systems
  653. config ARCH_S5PV210
  654. bool "Samsung S5PV210/S5PC110"
  655. select CPU_V7
  656. select ARCH_SPARSEMEM_ENABLE
  657. select GENERIC_GPIO
  658. select HAVE_CLK
  659. select ARM_L1_CACHE_SHIFT_6
  660. select ARCH_HAS_CPUFREQ
  661. select ARCH_USES_GETTIMEOFFSET
  662. select HAVE_S3C2410_I2C if I2C
  663. select HAVE_S3C_RTC if RTC_CLASS
  664. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  665. help
  666. Samsung S5PV210/S5PC110 series based systems
  667. config ARCH_S5PV310
  668. bool "Samsung S5PV310/S5PC210"
  669. select CPU_V7
  670. select ARCH_SPARSEMEM_ENABLE
  671. select GENERIC_GPIO
  672. select HAVE_CLK
  673. select ARCH_HAS_CPUFREQ
  674. select GENERIC_CLOCKEVENTS
  675. select HAVE_S3C_RTC if RTC_CLASS
  676. select HAVE_S3C2410_I2C if I2C
  677. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  678. help
  679. Samsung S5PV310 series based systems
  680. config ARCH_SHARK
  681. bool "Shark"
  682. select CPU_SA110
  683. select ISA
  684. select ISA_DMA
  685. select ZONE_DMA
  686. select PCI
  687. select ARCH_USES_GETTIMEOFFSET
  688. help
  689. Support for the StrongARM based Digital DNARD machine, also known
  690. as "Shark" (<http://www.shark-linux.de/shark.html>).
  691. config ARCH_TCC_926
  692. bool "Telechips TCC ARM926-based systems"
  693. select CPU_ARM926T
  694. select HAVE_CLK
  695. select CLKDEV_LOOKUP
  696. select GENERIC_CLOCKEVENTS
  697. help
  698. Support for Telechips TCC ARM926-based systems.
  699. config ARCH_LH7A40X
  700. bool "Sharp LH7A40X"
  701. select CPU_ARM922T
  702. select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
  703. select ARCH_USES_GETTIMEOFFSET
  704. help
  705. Say Y here for systems based on one of the Sharp LH7A40X
  706. System on a Chip processors. These CPUs include an ARM922T
  707. core with a wide array of integrated devices for
  708. hand-held and low-power applications.
  709. config ARCH_U300
  710. bool "ST-Ericsson U300 Series"
  711. depends on MMU
  712. select CPU_ARM926T
  713. select HAVE_SCHED_CLOCK
  714. select HAVE_TCM
  715. select ARM_AMBA
  716. select ARM_VIC
  717. select GENERIC_CLOCKEVENTS
  718. select CLKDEV_LOOKUP
  719. select GENERIC_GPIO
  720. help
  721. Support for ST-Ericsson U300 series mobile platforms.
  722. config ARCH_U8500
  723. bool "ST-Ericsson U8500 Series"
  724. select CPU_V7
  725. select ARM_AMBA
  726. select GENERIC_CLOCKEVENTS
  727. select CLKDEV_LOOKUP
  728. select ARCH_REQUIRE_GPIOLIB
  729. select ARCH_HAS_CPUFREQ
  730. help
  731. Support for ST-Ericsson's Ux500 architecture
  732. config ARCH_NOMADIK
  733. bool "STMicroelectronics Nomadik"
  734. select ARM_AMBA
  735. select ARM_VIC
  736. select CPU_ARM926T
  737. select CLKDEV_LOOKUP
  738. select GENERIC_CLOCKEVENTS
  739. select ARCH_REQUIRE_GPIOLIB
  740. help
  741. Support for the Nomadik platform by ST-Ericsson
  742. config ARCH_DAVINCI
  743. bool "TI DaVinci"
  744. select GENERIC_CLOCKEVENTS
  745. select ARCH_REQUIRE_GPIOLIB
  746. select ZONE_DMA
  747. select HAVE_IDE
  748. select CLKDEV_LOOKUP
  749. select GENERIC_ALLOCATOR
  750. select ARCH_HAS_HOLES_MEMORYMODEL
  751. help
  752. Support for TI's DaVinci platform.
  753. config ARCH_OMAP
  754. bool "TI OMAP"
  755. select HAVE_CLK
  756. select ARCH_REQUIRE_GPIOLIB
  757. select ARCH_HAS_CPUFREQ
  758. select GENERIC_CLOCKEVENTS
  759. select HAVE_SCHED_CLOCK
  760. select ARCH_HAS_HOLES_MEMORYMODEL
  761. help
  762. Support for TI's OMAP platform (OMAP1/2/3/4).
  763. config PLAT_SPEAR
  764. bool "ST SPEAr"
  765. select ARM_AMBA
  766. select ARCH_REQUIRE_GPIOLIB
  767. select CLKDEV_LOOKUP
  768. select GENERIC_CLOCKEVENTS
  769. select HAVE_CLK
  770. help
  771. Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
  772. endchoice
  773. #
  774. # This is sorted alphabetically by mach-* pathname. However, plat-*
  775. # Kconfigs may be included either alphabetically (according to the
  776. # plat- suffix) or along side the corresponding mach-* source.
  777. #
  778. source "arch/arm/mach-aaec2000/Kconfig"
  779. source "arch/arm/mach-at91/Kconfig"
  780. source "arch/arm/mach-bcmring/Kconfig"
  781. source "arch/arm/mach-clps711x/Kconfig"
  782. source "arch/arm/mach-cns3xxx/Kconfig"
  783. source "arch/arm/mach-davinci/Kconfig"
  784. source "arch/arm/mach-dove/Kconfig"
  785. source "arch/arm/mach-ep93xx/Kconfig"
  786. source "arch/arm/mach-footbridge/Kconfig"
  787. source "arch/arm/mach-gemini/Kconfig"
  788. source "arch/arm/mach-h720x/Kconfig"
  789. source "arch/arm/mach-integrator/Kconfig"
  790. source "arch/arm/mach-iop32x/Kconfig"
  791. source "arch/arm/mach-iop33x/Kconfig"
  792. source "arch/arm/mach-iop13xx/Kconfig"
  793. source "arch/arm/mach-ixp4xx/Kconfig"
  794. source "arch/arm/mach-ixp2000/Kconfig"
  795. source "arch/arm/mach-ixp23xx/Kconfig"
  796. source "arch/arm/mach-kirkwood/Kconfig"
  797. source "arch/arm/mach-ks8695/Kconfig"
  798. source "arch/arm/mach-lh7a40x/Kconfig"
  799. source "arch/arm/mach-loki/Kconfig"
  800. source "arch/arm/mach-lpc32xx/Kconfig"
  801. source "arch/arm/mach-msm/Kconfig"
  802. source "arch/arm/mach-mv78xx0/Kconfig"
  803. source "arch/arm/plat-mxc/Kconfig"
  804. source "arch/arm/mach-mxs/Kconfig"
  805. source "arch/arm/mach-netx/Kconfig"
  806. source "arch/arm/mach-nomadik/Kconfig"
  807. source "arch/arm/plat-nomadik/Kconfig"
  808. source "arch/arm/mach-ns9xxx/Kconfig"
  809. source "arch/arm/mach-nuc93x/Kconfig"
  810. source "arch/arm/plat-omap/Kconfig"
  811. source "arch/arm/mach-omap1/Kconfig"
  812. source "arch/arm/mach-omap2/Kconfig"
  813. source "arch/arm/mach-orion5x/Kconfig"
  814. source "arch/arm/mach-pxa/Kconfig"
  815. source "arch/arm/plat-pxa/Kconfig"
  816. source "arch/arm/mach-mmp/Kconfig"
  817. source "arch/arm/mach-realview/Kconfig"
  818. source "arch/arm/mach-sa1100/Kconfig"
  819. source "arch/arm/plat-samsung/Kconfig"
  820. source "arch/arm/plat-s3c24xx/Kconfig"
  821. source "arch/arm/plat-s5p/Kconfig"
  822. source "arch/arm/plat-spear/Kconfig"
  823. source "arch/arm/plat-tcc/Kconfig"
  824. if ARCH_S3C2410
  825. source "arch/arm/mach-s3c2400/Kconfig"
  826. source "arch/arm/mach-s3c2410/Kconfig"
  827. source "arch/arm/mach-s3c2412/Kconfig"
  828. source "arch/arm/mach-s3c2416/Kconfig"
  829. source "arch/arm/mach-s3c2440/Kconfig"
  830. source "arch/arm/mach-s3c2443/Kconfig"
  831. endif
  832. if ARCH_S3C64XX
  833. source "arch/arm/mach-s3c64xx/Kconfig"
  834. endif
  835. source "arch/arm/mach-s5p64x0/Kconfig"
  836. source "arch/arm/mach-s5p6442/Kconfig"
  837. source "arch/arm/mach-s5pc100/Kconfig"
  838. source "arch/arm/mach-s5pv210/Kconfig"
  839. source "arch/arm/mach-s5pv310/Kconfig"
  840. source "arch/arm/mach-shmobile/Kconfig"
  841. source "arch/arm/plat-stmp3xxx/Kconfig"
  842. source "arch/arm/mach-tegra/Kconfig"
  843. source "arch/arm/mach-u300/Kconfig"
  844. source "arch/arm/mach-ux500/Kconfig"
  845. source "arch/arm/mach-versatile/Kconfig"
  846. source "arch/arm/mach-vexpress/Kconfig"
  847. source "arch/arm/plat-versatile/Kconfig"
  848. source "arch/arm/mach-w90x900/Kconfig"
  849. # Definitions to make life easier
  850. config ARCH_ACORN
  851. bool
  852. config PLAT_IOP
  853. bool
  854. select GENERIC_CLOCKEVENTS
  855. select HAVE_SCHED_CLOCK
  856. config PLAT_ORION
  857. bool
  858. select HAVE_SCHED_CLOCK
  859. config PLAT_PXA
  860. bool
  861. config PLAT_VERSATILE
  862. bool
  863. config ARM_TIMER_SP804
  864. bool
  865. source arch/arm/mm/Kconfig
  866. config IWMMXT
  867. bool "Enable iWMMXt support"
  868. depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
  869. default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
  870. help
  871. Enable support for iWMMXt context switching at run time if
  872. running on a CPU that supports it.
  873. # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
  874. config XSCALE_PMU
  875. bool
  876. depends on CPU_XSCALE && !XSCALE_PMU_TIMER
  877. default y
  878. config CPU_HAS_PMU
  879. depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
  880. (!ARCH_OMAP3 || OMAP3_EMU)
  881. default y
  882. bool
  883. config MULTI_IRQ_HANDLER
  884. bool
  885. help
  886. Allow each machine to specify it's own IRQ handler at run time.
  887. if !MMU
  888. source "arch/arm/Kconfig-nommu"
  889. endif
  890. config ARM_ERRATA_411920
  891. bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
  892. depends on CPU_V6
  893. help
  894. Invalidation of the Instruction Cache operation can
  895. fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
  896. It does not affect the MPCore. This option enables the ARM Ltd.
  897. recommended workaround.
  898. config ARM_ERRATA_430973
  899. bool "ARM errata: Stale prediction on replaced interworking branch"
  900. depends on CPU_V7
  901. help
  902. This option enables the workaround for the 430973 Cortex-A8
  903. (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
  904. interworking branch is replaced with another code sequence at the
  905. same virtual address, whether due to self-modifying code or virtual
  906. to physical address re-mapping, Cortex-A8 does not recover from the
  907. stale interworking branch prediction. This results in Cortex-A8
  908. executing the new code sequence in the incorrect ARM or Thumb state.
  909. The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
  910. and also flushes the branch target cache at every context switch.
  911. Note that setting specific bits in the ACTLR register may not be
  912. available in non-secure mode.
  913. config ARM_ERRATA_458693
  914. bool "ARM errata: Processor deadlock when a false hazard is created"
  915. depends on CPU_V7
  916. help
  917. This option enables the workaround for the 458693 Cortex-A8 (r2p0)
  918. erratum. For very specific sequences of memory operations, it is
  919. possible for a hazard condition intended for a cache line to instead
  920. be incorrectly associated with a different cache line. This false
  921. hazard might then cause a processor deadlock. The workaround enables
  922. the L1 caching of the NEON accesses and disables the PLD instruction
  923. in the ACTLR register. Note that setting specific bits in the ACTLR
  924. register may not be available in non-secure mode.
  925. config ARM_ERRATA_460075
  926. bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
  927. depends on CPU_V7
  928. help
  929. This option enables the workaround for the 460075 Cortex-A8 (r2p0)
  930. erratum. Any asynchronous access to the L2 cache may encounter a
  931. situation in which recent store transactions to the L2 cache are lost
  932. and overwritten with stale memory contents from external memory. The
  933. workaround disables the write-allocate mode for the L2 cache via the
  934. ACTLR register. Note that setting specific bits in the ACTLR register
  935. may not be available in non-secure mode.
  936. config ARM_ERRATA_742230
  937. bool "ARM errata: DMB operation may be faulty"
  938. depends on CPU_V7 && SMP
  939. help
  940. This option enables the workaround for the 742230 Cortex-A9
  941. (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
  942. between two write operations may not ensure the correct visibility
  943. ordering of the two writes. This workaround sets a specific bit in
  944. the diagnostic register of the Cortex-A9 which causes the DMB
  945. instruction to behave as a DSB, ensuring the correct behaviour of
  946. the two writes.
  947. config ARM_ERRATA_742231
  948. bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
  949. depends on CPU_V7 && SMP
  950. help
  951. This option enables the workaround for the 742231 Cortex-A9
  952. (r2p0..r2p2) erratum. Under certain conditions, specific to the
  953. Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
  954. accessing some data located in the same cache line, may get corrupted
  955. data due to bad handling of the address hazard when the line gets
  956. replaced from one of the CPUs at the same time as another CPU is
  957. accessing it. This workaround sets specific bits in the diagnostic
  958. register of the Cortex-A9 which reduces the linefill issuing
  959. capabilities of the processor.
  960. config PL310_ERRATA_588369
  961. bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
  962. depends on CACHE_L2X0 && ARCH_OMAP4
  963. help
  964. The PL310 L2 cache controller implements three types of Clean &
  965. Invalidate maintenance operations: by Physical Address
  966. (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
  967. They are architecturally defined to behave as the execution of a
  968. clean operation followed immediately by an invalidate operation,
  969. both performing to the same memory location. This functionality
  970. is not correctly implemented in PL310 as clean lines are not
  971. invalidated as a result of these operations. Note that this errata
  972. uses Texas Instrument's secure monitor api.
  973. config ARM_ERRATA_720789
  974. bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
  975. depends on CPU_V7 && SMP
  976. help
  977. This option enables the workaround for the 720789 Cortex-A9 (prior to
  978. r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
  979. broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
  980. As a consequence of this erratum, some TLB entries which should be
  981. invalidated are not, resulting in an incoherency in the system page
  982. tables. The workaround changes the TLB flushing routines to invalidate
  983. entries regardless of the ASID.
  984. config ARM_ERRATA_743622
  985. bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
  986. depends on CPU_V7
  987. help
  988. This option enables the workaround for the 743622 Cortex-A9
  989. (r2p0..r2p2) erratum. Under very rare conditions, a faulty
  990. optimisation in the Cortex-A9 Store Buffer may lead to data
  991. corruption. This workaround sets a specific bit in the diagnostic
  992. register of the Cortex-A9 which disables the Store Buffer
  993. optimisation, preventing the defect from occurring. This has no
  994. visible impact on the overall performance or power consumption of the
  995. processor.
  996. endmenu
  997. source "arch/arm/common/Kconfig"
  998. menu "Bus support"
  999. config ARM_AMBA
  1000. bool
  1001. config ISA
  1002. bool
  1003. help
  1004. Find out whether you have ISA slots on your motherboard. ISA is the
  1005. name of a bus system, i.e. the way the CPU talks to the other stuff
  1006. inside your box. Other bus systems are PCI, EISA, MicroChannel
  1007. (MCA) or VESA. ISA is an older system, now being displaced by PCI;
  1008. newer boards don't support it. If you have ISA, say Y, otherwise N.
  1009. # Select ISA DMA controller support
  1010. config ISA_DMA
  1011. bool
  1012. select ISA_DMA_API
  1013. # Select ISA DMA interface
  1014. config ISA_DMA_API
  1015. bool
  1016. config PCI
  1017. bool "PCI support" if MIGHT_HAVE_PCI
  1018. help
  1019. Find out whether you have a PCI motherboard. PCI is the name of a
  1020. bus system, i.e. the way the CPU talks to the other stuff inside
  1021. your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
  1022. VESA. If you have PCI, say Y, otherwise N.
  1023. config PCI_DOMAINS
  1024. bool
  1025. depends on PCI
  1026. config PCI_NANOENGINE
  1027. bool "BSE nanoEngine PCI support"
  1028. depends on SA1100_NANOENGINE
  1029. help
  1030. Enable PCI on the BSE nanoEngine board.
  1031. config PCI_SYSCALL
  1032. def_bool PCI
  1033. # Select the host bridge type
  1034. config PCI_HOST_VIA82C505
  1035. bool
  1036. depends on PCI && ARCH_SHARK
  1037. default y
  1038. config PCI_HOST_ITE8152
  1039. bool
  1040. depends on PCI && MACH_ARMCORE
  1041. default y
  1042. select DMABOUNCE
  1043. source "drivers/pci/Kconfig"
  1044. source "drivers/pcmcia/Kconfig"
  1045. endmenu
  1046. menu "Kernel Features"
  1047. source "kernel/time/Kconfig"
  1048. config SMP
  1049. bool "Symmetric Multi-Processing (EXPERIMENTAL)"
  1050. depends on EXPERIMENTAL
  1051. depends on GENERIC_CLOCKEVENTS
  1052. depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
  1053. MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
  1054. ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
  1055. ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
  1056. select USE_GENERIC_SMP_HELPERS
  1057. select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
  1058. help
  1059. This enables support for systems with more than one CPU. If you have
  1060. a system with only one CPU, like most personal computers, say N. If
  1061. you have a system with more than one CPU, say Y.
  1062. If you say N here, the kernel will run on single and multiprocessor
  1063. machines, but will use only one CPU of a multiprocessor machine. If
  1064. you say Y here, the kernel will run on many, but not all, single
  1065. processor machines. On a single processor machine, the kernel will
  1066. run faster if you say N here.
  1067. See also <file:Documentation/i386/IO-APIC.txt>,
  1068. <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
  1069. <http://tldp.org/HOWTO/SMP-HOWTO.html>.
  1070. If you don't know what to do here, say N.
  1071. config SMP_ON_UP
  1072. bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
  1073. depends on EXPERIMENTAL
  1074. depends on SMP && !XIP_KERNEL
  1075. default y
  1076. help
  1077. SMP kernels contain instructions which fail on non-SMP processors.
  1078. Enabling this option allows the kernel to modify itself to make
  1079. these instructions safe. Disabling it allows about 1K of space
  1080. savings.
  1081. If you don't know what to do here, say Y.
  1082. config HAVE_ARM_SCU
  1083. bool
  1084. depends on SMP
  1085. help
  1086. This option enables support for the ARM system coherency unit
  1087. config HAVE_ARM_TWD
  1088. bool
  1089. depends on SMP
  1090. select TICK_ONESHOT
  1091. help
  1092. This options enables support for the ARM timer and watchdog unit
  1093. choice
  1094. prompt "Memory split"
  1095. default VMSPLIT_3G
  1096. help
  1097. Select the desired split between kernel and user memory.
  1098. If you are not absolutely sure what you are doing, leave this
  1099. option alone!
  1100. config VMSPLIT_3G
  1101. bool "3G/1G user/kernel split"
  1102. config VMSPLIT_2G
  1103. bool "2G/2G user/kernel split"
  1104. config VMSPLIT_1G
  1105. bool "1G/3G user/kernel split"
  1106. endchoice
  1107. config PAGE_OFFSET
  1108. hex
  1109. default 0x40000000 if VMSPLIT_1G
  1110. default 0x80000000 if VMSPLIT_2G
  1111. default 0xC0000000
  1112. config NR_CPUS
  1113. int "Maximum number of CPUs (2-32)"
  1114. range 2 32
  1115. depends on SMP
  1116. default "4"
  1117. config HOTPLUG_CPU
  1118. bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
  1119. depends on SMP && HOTPLUG && EXPERIMENTAL
  1120. depends on !ARCH_MSM
  1121. help
  1122. Say Y here to experiment with turning CPUs off and on. CPUs
  1123. can be controlled through /sys/devices/system/cpu.
  1124. config LOCAL_TIMERS
  1125. bool "Use local timer interrupts"
  1126. depends on SMP
  1127. default y
  1128. select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
  1129. help
  1130. Enable support for local timers on SMP platforms, rather then the
  1131. legacy IPI broadcast method. Local timers allows the system
  1132. accounting to be spread across the timer interval, preventing a
  1133. "thundering herd" at every timer tick.
  1134. source kernel/Kconfig.preempt
  1135. config HZ
  1136. int
  1137. default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
  1138. ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
  1139. default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
  1140. default AT91_TIMER_HZ if ARCH_AT91
  1141. default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
  1142. default 100
  1143. config THUMB2_KERNEL
  1144. bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
  1145. depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
  1146. select AEABI
  1147. select ARM_ASM_UNIFIED
  1148. help
  1149. By enabling this option, the kernel will be compiled in
  1150. Thumb-2 mode. A compiler/assembler that understand the unified
  1151. ARM-Thumb syntax is needed.
  1152. If unsure, say N.
  1153. config ARM_ASM_UNIFIED
  1154. bool
  1155. config AEABI
  1156. bool "Use the ARM EABI to compile the kernel"
  1157. help
  1158. This option allows for the kernel to be compiled using the latest
  1159. ARM ABI (aka EABI). This is only useful if you are using a user
  1160. space environment that is also compiled with EABI.
  1161. Since there are major incompatibilities between the legacy ABI and
  1162. EABI, especially with regard to structure member alignment, this
  1163. option also changes the kernel syscall calling convention to
  1164. disambiguate both ABIs and allow for backward compatibility support
  1165. (selected with CONFIG_OABI_COMPAT).
  1166. To use this you need GCC version 4.0.0 or later.
  1167. config OABI_COMPAT
  1168. bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
  1169. depends on AEABI && EXPERIMENTAL
  1170. default y
  1171. help
  1172. This option preserves the old syscall interface along with the
  1173. new (ARM EABI) one. It also provides a compatibility layer to
  1174. intercept syscalls that have structure arguments which layout
  1175. in memory differs between the legacy ABI and the new ARM EABI
  1176. (only for non "thumb" binaries). This option adds a tiny
  1177. overhead to all syscalls and produces a slightly larger kernel.
  1178. If you know you'll be using only pure EABI user space then you
  1179. can say N here. If this option is not selected and you attempt
  1180. to execute a legacy ABI binary then the result will be
  1181. UNPREDICTABLE (in fact it can be predicted that it won't work
  1182. at all). If in doubt say Y.
  1183. config ARCH_HAS_HOLES_MEMORYMODEL
  1184. bool
  1185. config ARCH_SPARSEMEM_ENABLE
  1186. bool
  1187. config ARCH_SPARSEMEM_DEFAULT
  1188. def_bool ARCH_SPARSEMEM_ENABLE
  1189. config ARCH_SELECT_MEMORY_MODEL
  1190. def_bool ARCH_SPARSEMEM_ENABLE
  1191. config HIGHMEM
  1192. bool "High Memory Support (EXPERIMENTAL)"
  1193. depends on MMU && EXPERIMENTAL
  1194. help
  1195. The address space of ARM processors is only 4 Gigabytes large
  1196. and it has to accommodate user address space, kernel address
  1197. space as well as some memory mapped IO. That means that, if you
  1198. have a large amount of physical memory and/or IO, not all of the
  1199. memory can be "permanently mapped" by the kernel. The physical
  1200. memory that is not permanently mapped is called "high memory".
  1201. Depending on the selected kernel/user memory split, minimum
  1202. vmalloc space and actual amount of RAM, you may not need this
  1203. option which should result in a slightly faster kernel.
  1204. If unsure, say n.
  1205. config HIGHPTE
  1206. bool "Allocate 2nd-level pagetables from highmem"
  1207. depends on HIGHMEM
  1208. depends on !OUTER_CACHE
  1209. config HW_PERF_EVENTS
  1210. bool "Enable hardware performance counter support for perf events"
  1211. depends on PERF_EVENTS && CPU_HAS_PMU
  1212. default y
  1213. help
  1214. Enable hardware performance counter support for perf events. If
  1215. disabled, perf events will use software events only.
  1216. source "mm/Kconfig"
  1217. config FORCE_MAX_ZONEORDER
  1218. int "Maximum zone order" if ARCH_SHMOBILE
  1219. range 11 64 if ARCH_SHMOBILE
  1220. default "9" if SA1111
  1221. default "11"
  1222. help
  1223. The kernel memory allocator divides physically contiguous memory
  1224. blocks into "zones", where each zone is a power of two number of
  1225. pages. This option selects the largest power of two that the kernel
  1226. keeps in the memory allocator. If you need to allocate very large
  1227. blocks of physically contiguous memory, then you may need to
  1228. increase this value.
  1229. This config option is actually maximum order plus one. For example,
  1230. a value of 11 means that the largest free memory block is 2^10 pages.
  1231. config LEDS
  1232. bool "Timer and CPU usage LEDs"
  1233. depends on ARCH_CDB89712 || ARCH_EBSA110 || \
  1234. ARCH_EBSA285 || ARCH_INTEGRATOR || \
  1235. ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
  1236. ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
  1237. ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
  1238. ARCH_AT91 || ARCH_DAVINCI || \
  1239. ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
  1240. help
  1241. If you say Y here, the LEDs on your machine will be used
  1242. to provide useful information about your current system status.
  1243. If you are compiling a kernel for a NetWinder or EBSA-285, you will
  1244. be able to select which LEDs are active using the options below. If
  1245. you are compiling a kernel for the EBSA-110 or the LART however, the
  1246. red LED will simply flash regularly to indicate that the system is
  1247. still functional. It is safe to say Y here if you have a CATS
  1248. system, but the driver will do nothing.
  1249. config LEDS_TIMER
  1250. bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
  1251. OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1252. || MACH_OMAP_PERSEUS2
  1253. depends on LEDS
  1254. depends on !GENERIC_CLOCKEVENTS
  1255. default y if ARCH_EBSA110
  1256. help
  1257. If you say Y here, one of the system LEDs (the green one on the
  1258. NetWinder, the amber one on the EBSA285, or the red one on the LART)
  1259. will flash regularly to indicate that the system is still
  1260. operational. This is mainly useful to kernel hackers who are
  1261. debugging unstable kernels.
  1262. The LART uses the same LED for both Timer LED and CPU usage LED
  1263. functions. You may choose to use both, but the Timer LED function
  1264. will overrule the CPU usage LED.
  1265. config LEDS_CPU
  1266. bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
  1267. !ARCH_OMAP) \
  1268. || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1269. || MACH_OMAP_PERSEUS2
  1270. depends on LEDS
  1271. help
  1272. If you say Y here, the red LED will be used to give a good real
  1273. time indication of CPU usage, by lighting whenever the idle task
  1274. is not currently executing.
  1275. The LART uses the same LED for both Timer LED and CPU usage LED
  1276. functions. You may choose to use both, but the Timer LED function
  1277. will overrule the CPU usage LED.
  1278. config ALIGNMENT_TRAP
  1279. bool
  1280. depends on CPU_CP15_MMU
  1281. default y if !ARCH_EBSA110
  1282. select HAVE_PROC_CPU if PROC_FS
  1283. help
  1284. ARM processors cannot fetch/store information which is not
  1285. naturally aligned on the bus, i.e., a 4 byte fetch must start at an
  1286. address divisible by 4. On 32-bit ARM processors, these non-aligned
  1287. fetch/store instructions will be emulated in software if you say
  1288. here, which has a severe performance impact. This is necessary for
  1289. correct operation of some network protocols. With an IP-only
  1290. configuration it is safe to say N, otherwise say Y.
  1291. config UACCESS_WITH_MEMCPY
  1292. bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
  1293. depends on MMU && EXPERIMENTAL
  1294. default y if CPU_FEROCEON
  1295. help
  1296. Implement faster copy_to_user and clear_user methods for CPU
  1297. cores where a 8-word STM instruction give significantly higher
  1298. memory write throughput than a sequence of individual 32bit stores.
  1299. A possible side effect is a slight increase in scheduling latency
  1300. between threads sharing the same address space if they invoke
  1301. such copy operations with large buffers.
  1302. However, if the CPU data cache is using a write-allocate mode,
  1303. this option is unlikely to provide any performance gain.
  1304. config SECCOMP
  1305. bool
  1306. prompt "Enable seccomp to safely compute untrusted bytecode"
  1307. ---help---
  1308. This kernel feature is useful for number crunching applications
  1309. that may need to compute untrusted bytecode during their
  1310. execution. By using pipes or other transports made available to
  1311. the process as file descriptors supporting the read/write
  1312. syscalls, it's possible to isolate those applications in
  1313. their own address space using seccomp. Once seccomp is
  1314. enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
  1315. and the task is only allowed to execute a few safe syscalls
  1316. defined by each seccomp mode.
  1317. config CC_STACKPROTECTOR
  1318. bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
  1319. depends on EXPERIMENTAL
  1320. help
  1321. This option turns on the -fstack-protector GCC feature. This
  1322. feature puts, at the beginning of functions, a canary value on
  1323. the stack just before the return address, and validates
  1324. the value just before actually returning. Stack based buffer
  1325. overflows (that need to overwrite this return address) now also
  1326. overwrite the canary, which gets detected and the attack is then
  1327. neutralized via a kernel panic.
  1328. This feature requires gcc version 4.2 or above.
  1329. config DEPRECATED_PARAM_STRUCT
  1330. bool "Provide old way to pass kernel parameters"
  1331. help
  1332. This was deprecated in 2001 and announced to live on for 5 years.
  1333. Some old boot loaders still use this way.
  1334. endmenu
  1335. menu "Boot options"
  1336. # Compressed boot loader in ROM. Yes, we really want to ask about
  1337. # TEXT and BSS so we preserve their values in the config files.
  1338. config ZBOOT_ROM_TEXT
  1339. hex "Compressed ROM boot loader base address"
  1340. default "0"
  1341. help
  1342. The physical address at which the ROM-able zImage is to be
  1343. placed in the target. Platforms which normally make use of
  1344. ROM-able zImage formats normally set this to a suitable
  1345. value in their defconfig file.
  1346. If ZBOOT_ROM is not enabled, this has no effect.
  1347. config ZBOOT_ROM_BSS
  1348. hex "Compressed ROM boot loader BSS address"
  1349. default "0"
  1350. help
  1351. The base address of an area of read/write memory in the target
  1352. for the ROM-able zImage which must be available while the
  1353. decompressor is running. It must be large enough to hold the
  1354. entire decompressed kernel plus an additional 128 KiB.
  1355. Platforms which normally make use of ROM-able zImage formats
  1356. normally set this to a suitable value in their defconfig file.
  1357. If ZBOOT_ROM is not enabled, this has no effect.
  1358. config ZBOOT_ROM
  1359. bool "Compressed boot loader in ROM/flash"
  1360. depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
  1361. help
  1362. Say Y here if you intend to execute your compressed kernel image
  1363. (zImage) directly from ROM or flash. If unsure, say N.
  1364. config CMDLINE
  1365. string "Default kernel command string"
  1366. default ""
  1367. help
  1368. On some architectures (EBSA110 and CATS), there is currently no way
  1369. for the boot loader to pass arguments to the kernel. For these
  1370. architectures, you should supply some command-line options at build
  1371. time by entering them here. As a minimum, you should specify the
  1372. memory size and the root device (e.g., mem=64M root=/dev/nfs).
  1373. config CMDLINE_FORCE
  1374. bool "Always use the default kernel command string"
  1375. depends on CMDLINE != ""
  1376. help
  1377. Always use the default kernel command string, even if the boot
  1378. loader passes other arguments to the kernel.
  1379. This is useful if you cannot or don't want to change the
  1380. command-line options your boot loader passes to the kernel.
  1381. If unsure, say N.
  1382. config XIP_KERNEL
  1383. bool "Kernel Execute-In-Place from ROM"
  1384. depends on !ZBOOT_ROM
  1385. help
  1386. Execute-In-Place allows the kernel to run from non-volatile storage
  1387. directly addressable by the CPU, such as NOR flash. This saves RAM
  1388. space since the text section of the kernel is not loaded from flash
  1389. to RAM. Read-write sections, such as the data section and stack,
  1390. are still copied to RAM. The XIP kernel is not compressed since
  1391. it has to run directly from flash, so it will take more space to
  1392. store it. The flash address used to link the kernel object files,
  1393. and for storing it, is configuration dependent. Therefore, if you
  1394. say Y here, you must know the proper physical address where to
  1395. store the kernel image depending on your own flash memory usage.
  1396. Also note that the make target becomes "make xipImage" rather than
  1397. "make zImage" or "make Image". The final kernel binary to put in
  1398. ROM memory will be arch/arm/boot/xipImage.
  1399. If unsure, say N.
  1400. config XIP_PHYS_ADDR
  1401. hex "XIP Kernel Physical Location"
  1402. depends on XIP_KERNEL
  1403. default "0x00080000"
  1404. help
  1405. This is the physical address in your flash memory the kernel will
  1406. be linked for and stored to. This address is dependent on your
  1407. own flash usage.
  1408. config KEXEC
  1409. bool "Kexec system call (EXPERIMENTAL)"
  1410. depends on EXPERIMENTAL
  1411. help
  1412. kexec is a system call that implements the ability to shutdown your
  1413. current kernel, and to start another kernel. It is like a reboot
  1414. but it is independent of the system firmware. And like a reboot
  1415. you can start any kernel with it, not just Linux.
  1416. It is an ongoing process to be certain the hardware in a machine
  1417. is properly shutdown, so do not be surprised if this code does not
  1418. initially work for you. It may help to enable device hotplugging
  1419. support.
  1420. config ATAGS_PROC
  1421. bool "Export atags in procfs"
  1422. depends on KEXEC
  1423. default y
  1424. help
  1425. Should the atags used to boot the kernel be exported in an "atags"
  1426. file in procfs. Useful with kexec.
  1427. config CRASH_DUMP
  1428. bool "Build kdump crash kernel (EXPERIMENTAL)"
  1429. depends on EXPERIMENTAL
  1430. help
  1431. Generate crash dump after being started by kexec. This should
  1432. be normally only set in special crash dump kernels which are
  1433. loaded in the main kernel with kexec-tools into a specially
  1434. reserved region and then later executed after a crash by
  1435. kdump/kexec. The crash dump kernel must be compiled to a
  1436. memory address not used by the main kernel
  1437. For more details see Documentation/kdump/kdump.txt
  1438. config AUTO_ZRELADDR
  1439. bool "Auto calculation of the decompressed kernel image address"
  1440. depends on !ZBOOT_ROM && !ARCH_U300
  1441. help
  1442. ZRELADDR is the physical address where the decompressed kernel
  1443. image will be placed. If AUTO_ZRELADDR is selected, the address
  1444. will be determined at run-time by masking the current IP with
  1445. 0xf8000000. This assumes the zImage being placed in the first 128MB
  1446. from start of memory.
  1447. endmenu
  1448. menu "CPU Power Management"
  1449. if ARCH_HAS_CPUFREQ
  1450. source "drivers/cpufreq/Kconfig"
  1451. config CPU_FREQ_IMX
  1452. tristate "CPUfreq driver for i.MX CPUs"
  1453. depends on ARCH_MXC && CPU_FREQ
  1454. help
  1455. This enables the CPUfreq driver for i.MX CPUs.
  1456. config CPU_FREQ_SA1100
  1457. bool
  1458. config CPU_FREQ_SA1110
  1459. bool
  1460. config CPU_FREQ_INTEGRATOR
  1461. tristate "CPUfreq driver for ARM Integrator CPUs"
  1462. depends on ARCH_INTEGRATOR && CPU_FREQ
  1463. default y
  1464. help
  1465. This enables the CPUfreq driver for ARM Integrator CPUs.
  1466. For details, take a look at <file:Documentation/cpu-freq>.
  1467. If in doubt, say Y.
  1468. config CPU_FREQ_PXA
  1469. bool
  1470. depends on CPU_FREQ && ARCH_PXA && PXA25x
  1471. default y
  1472. select CPU_FREQ_DEFAULT_GOV_USERSPACE
  1473. config CPU_FREQ_S3C64XX
  1474. bool "CPUfreq support for Samsung S3C64XX CPUs"
  1475. depends on CPU_FREQ && CPU_S3C6410
  1476. config CPU_FREQ_S3C
  1477. bool
  1478. help
  1479. Internal configuration node for common cpufreq on Samsung SoC
  1480. config CPU_FREQ_S3C24XX
  1481. bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
  1482. depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
  1483. select CPU_FREQ_S3C
  1484. help
  1485. This enables the CPUfreq driver for the Samsung S3C24XX family
  1486. of CPUs.
  1487. For details, take a look at <file:Documentation/cpu-freq>.
  1488. If in doubt, say N.
  1489. config CPU_FREQ_S3C24XX_PLL
  1490. bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
  1491. depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
  1492. help
  1493. Compile in support for changing the PLL frequency from the
  1494. S3C24XX series CPUfreq driver. The PLL takes time to settle
  1495. after a frequency change, so by default it is not enabled.
  1496. This also means that the PLL tables for the selected CPU(s) will
  1497. be built which may increase the size of the kernel image.
  1498. config CPU_FREQ_S3C24XX_DEBUG
  1499. bool "Debug CPUfreq Samsung driver core"
  1500. depends on CPU_FREQ_S3C24XX
  1501. help
  1502. Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
  1503. config CPU_FREQ_S3C24XX_IODEBUG
  1504. bool "Debug CPUfreq Samsung driver IO timing"
  1505. depends on CPU_FREQ_S3C24XX
  1506. help
  1507. Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
  1508. config CPU_FREQ_S3C24XX_DEBUGFS
  1509. bool "Export debugfs for CPUFreq"
  1510. depends on CPU_FREQ_S3C24XX && DEBUG_FS
  1511. help
  1512. Export status information via debugfs.
  1513. endif
  1514. source "drivers/cpuidle/Kconfig"
  1515. endmenu
  1516. menu "Floating point emulation"
  1517. comment "At least one emulation must be selected"
  1518. config FPE_NWFPE
  1519. bool "NWFPE math emulation"
  1520. depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
  1521. ---help---
  1522. Say Y to include the NWFPE floating point emulator in the kernel.
  1523. This is necessary to run most binaries. Linux does not currently
  1524. support floating point hardware so you need to say Y here even if
  1525. your machine has an FPA or floating point co-processor podule.
  1526. You may say N here if you are going to load the Acorn FPEmulator
  1527. early in the bootup.
  1528. config FPE_NWFPE_XP
  1529. bool "Support extended precision"
  1530. depends on FPE_NWFPE
  1531. help
  1532. Say Y to include 80-bit support in the kernel floating-point
  1533. emulator. Otherwise, only 32 and 64-bit support is compiled in.
  1534. Note that gcc does not generate 80-bit operations by default,
  1535. so in most cases this option only enlarges the size of the
  1536. floating point emulator without any good reason.
  1537. You almost surely want to say N here.
  1538. config FPE_FASTFPE
  1539. bool "FastFPE math emulation (EXPERIMENTAL)"
  1540. depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
  1541. ---help---
  1542. Say Y here to include the FAST floating point emulator in the kernel.
  1543. This is an experimental much faster emulator which now also has full
  1544. precision for the mantissa. It does not support any exceptions.
  1545. It is very simple, and approximately 3-6 times faster than NWFPE.
  1546. It should be sufficient for most programs. It may be not suitable
  1547. for scientific calculations, but you have to check this for yourself.
  1548. If you do not feel you need a faster FP emulation you should better
  1549. choose NWFPE.
  1550. config VFP
  1551. bool "VFP-format floating point maths"
  1552. depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
  1553. help
  1554. Say Y to include VFP support code in the kernel. This is needed
  1555. if your hardware includes a VFP unit.
  1556. Please see <file:Documentation/arm/VFP/release-notes.txt> for
  1557. release notes and additional status information.
  1558. Say N if your target does not have VFP hardware.
  1559. config VFPv3
  1560. bool
  1561. depends on VFP
  1562. default y if CPU_V7
  1563. config NEON
  1564. bool "Advanced SIMD (NEON) Extension support"
  1565. depends on VFPv3 && CPU_V7
  1566. help
  1567. Say Y to include support code for NEON, the ARMv7 Advanced SIMD
  1568. Extension.
  1569. endmenu
  1570. menu "Userspace binary formats"
  1571. source "fs/Kconfig.binfmt"
  1572. config ARTHUR
  1573. tristate "RISC OS personality"
  1574. depends on !AEABI
  1575. help
  1576. Say Y here to include the kernel code necessary if you want to run
  1577. Acorn RISC OS/Arthur binaries under Linux. This code is still very
  1578. experimental; if this sounds frightening, say N and sleep in peace.
  1579. You can also say M here to compile this support as a module (which
  1580. will be called arthur).
  1581. endmenu
  1582. menu "Power management options"
  1583. source "kernel/power/Kconfig"
  1584. config ARCH_SUSPEND_POSSIBLE
  1585. def_bool y
  1586. endmenu
  1587. source "net/Kconfig"
  1588. source "drivers/Kconfig"
  1589. source "fs/Kconfig"
  1590. source "arch/arm/Kconfig.debug"
  1591. source "security/Kconfig"
  1592. source "crypto/Kconfig"
  1593. source "lib/Kconfig"