e1000_main.c 136 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. char e1000_driver_name[] = "e1000";
  23. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  24. #ifndef CONFIG_E1000_NAPI
  25. #define DRIVERNAPI
  26. #else
  27. #define DRIVERNAPI "-NAPI"
  28. #endif
  29. #define DRV_VERSION "7.1.9-k6"DRIVERNAPI
  30. char e1000_driver_version[] = DRV_VERSION;
  31. static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  32. /* e1000_pci_tbl - PCI Device ID Table
  33. *
  34. * Last entry must be all 0s
  35. *
  36. * Macro expands to...
  37. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  38. */
  39. static struct pci_device_id e1000_pci_tbl[] = {
  40. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  41. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  42. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  43. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  44. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  45. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  46. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  47. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  48. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  51. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  52. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  53. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  54. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  58. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  59. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  60. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  61. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1049),
  65. INTEL_E1000_ETHERNET_DEVICE(0x104A),
  66. INTEL_E1000_ETHERNET_DEVICE(0x104B),
  67. INTEL_E1000_ETHERNET_DEVICE(0x104C),
  68. INTEL_E1000_ETHERNET_DEVICE(0x104D),
  69. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  70. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  71. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  72. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  76. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  77. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  78. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  79. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  80. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  81. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  82. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  83. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  84. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  85. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  86. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  87. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  88. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  89. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  90. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  91. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  92. INTEL_E1000_ETHERNET_DEVICE(0x10BA),
  93. INTEL_E1000_ETHERNET_DEVICE(0x10BB),
  94. /* required last entry */
  95. {0,}
  96. };
  97. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  98. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  99. struct e1000_tx_ring *txdr);
  100. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  101. struct e1000_rx_ring *rxdr);
  102. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  103. struct e1000_tx_ring *tx_ring);
  104. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  105. struct e1000_rx_ring *rx_ring);
  106. /* Local Function Prototypes */
  107. static int e1000_init_module(void);
  108. static void e1000_exit_module(void);
  109. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  110. static void __devexit e1000_remove(struct pci_dev *pdev);
  111. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  112. static int e1000_sw_init(struct e1000_adapter *adapter);
  113. static int e1000_open(struct net_device *netdev);
  114. static int e1000_close(struct net_device *netdev);
  115. static void e1000_configure_tx(struct e1000_adapter *adapter);
  116. static void e1000_configure_rx(struct e1000_adapter *adapter);
  117. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  118. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  119. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  120. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  121. struct e1000_tx_ring *tx_ring);
  122. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  123. struct e1000_rx_ring *rx_ring);
  124. static void e1000_set_multi(struct net_device *netdev);
  125. static void e1000_update_phy_info(unsigned long data);
  126. static void e1000_watchdog(unsigned long data);
  127. static void e1000_82547_tx_fifo_stall(unsigned long data);
  128. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  129. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  130. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  131. static int e1000_set_mac(struct net_device *netdev, void *p);
  132. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  133. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  134. struct e1000_tx_ring *tx_ring);
  135. #ifdef CONFIG_E1000_NAPI
  136. static int e1000_clean(struct net_device *poll_dev, int *budget);
  137. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  138. struct e1000_rx_ring *rx_ring,
  139. int *work_done, int work_to_do);
  140. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  141. struct e1000_rx_ring *rx_ring,
  142. int *work_done, int work_to_do);
  143. #else
  144. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  145. struct e1000_rx_ring *rx_ring);
  146. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  147. struct e1000_rx_ring *rx_ring);
  148. #endif
  149. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  150. struct e1000_rx_ring *rx_ring,
  151. int cleaned_count);
  152. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  153. struct e1000_rx_ring *rx_ring,
  154. int cleaned_count);
  155. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  156. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  157. int cmd);
  158. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  159. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  160. static void e1000_tx_timeout(struct net_device *dev);
  161. static void e1000_reset_task(struct net_device *dev);
  162. static void e1000_smartspeed(struct e1000_adapter *adapter);
  163. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  164. struct sk_buff *skb);
  165. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  166. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  167. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  168. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  169. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  170. #ifdef CONFIG_PM
  171. static int e1000_resume(struct pci_dev *pdev);
  172. #endif
  173. static void e1000_shutdown(struct pci_dev *pdev);
  174. #ifdef CONFIG_NET_POLL_CONTROLLER
  175. /* for netdump / net console */
  176. static void e1000_netpoll (struct net_device *netdev);
  177. #endif
  178. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  179. pci_channel_state_t state);
  180. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  181. static void e1000_io_resume(struct pci_dev *pdev);
  182. static struct pci_error_handlers e1000_err_handler = {
  183. .error_detected = e1000_io_error_detected,
  184. .slot_reset = e1000_io_slot_reset,
  185. .resume = e1000_io_resume,
  186. };
  187. static struct pci_driver e1000_driver = {
  188. .name = e1000_driver_name,
  189. .id_table = e1000_pci_tbl,
  190. .probe = e1000_probe,
  191. .remove = __devexit_p(e1000_remove),
  192. /* Power Managment Hooks */
  193. .suspend = e1000_suspend,
  194. #ifdef CONFIG_PM
  195. .resume = e1000_resume,
  196. #endif
  197. .shutdown = e1000_shutdown,
  198. .err_handler = &e1000_err_handler
  199. };
  200. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  201. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  202. MODULE_LICENSE("GPL");
  203. MODULE_VERSION(DRV_VERSION);
  204. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  205. module_param(debug, int, 0);
  206. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  207. /**
  208. * e1000_init_module - Driver Registration Routine
  209. *
  210. * e1000_init_module is the first routine called when the driver is
  211. * loaded. All it does is register with the PCI subsystem.
  212. **/
  213. static int __init
  214. e1000_init_module(void)
  215. {
  216. int ret;
  217. printk(KERN_INFO "%s - version %s\n",
  218. e1000_driver_string, e1000_driver_version);
  219. printk(KERN_INFO "%s\n", e1000_copyright);
  220. ret = pci_module_init(&e1000_driver);
  221. return ret;
  222. }
  223. module_init(e1000_init_module);
  224. /**
  225. * e1000_exit_module - Driver Exit Cleanup Routine
  226. *
  227. * e1000_exit_module is called just before the driver is removed
  228. * from memory.
  229. **/
  230. static void __exit
  231. e1000_exit_module(void)
  232. {
  233. pci_unregister_driver(&e1000_driver);
  234. }
  235. module_exit(e1000_exit_module);
  236. static int e1000_request_irq(struct e1000_adapter *adapter)
  237. {
  238. struct net_device *netdev = adapter->netdev;
  239. int flags, err = 0;
  240. flags = IRQF_SHARED;
  241. #ifdef CONFIG_PCI_MSI
  242. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  243. adapter->have_msi = TRUE;
  244. if ((err = pci_enable_msi(adapter->pdev))) {
  245. DPRINTK(PROBE, ERR,
  246. "Unable to allocate MSI interrupt Error: %d\n", err);
  247. adapter->have_msi = FALSE;
  248. }
  249. }
  250. if (adapter->have_msi)
  251. flags &= ~IRQF_SHARED;
  252. #endif
  253. if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
  254. netdev->name, netdev)))
  255. DPRINTK(PROBE, ERR,
  256. "Unable to allocate interrupt Error: %d\n", err);
  257. return err;
  258. }
  259. static void e1000_free_irq(struct e1000_adapter *adapter)
  260. {
  261. struct net_device *netdev = adapter->netdev;
  262. free_irq(adapter->pdev->irq, netdev);
  263. #ifdef CONFIG_PCI_MSI
  264. if (adapter->have_msi)
  265. pci_disable_msi(adapter->pdev);
  266. #endif
  267. }
  268. /**
  269. * e1000_irq_disable - Mask off interrupt generation on the NIC
  270. * @adapter: board private structure
  271. **/
  272. static void
  273. e1000_irq_disable(struct e1000_adapter *adapter)
  274. {
  275. atomic_inc(&adapter->irq_sem);
  276. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  277. E1000_WRITE_FLUSH(&adapter->hw);
  278. synchronize_irq(adapter->pdev->irq);
  279. }
  280. /**
  281. * e1000_irq_enable - Enable default interrupt generation settings
  282. * @adapter: board private structure
  283. **/
  284. static void
  285. e1000_irq_enable(struct e1000_adapter *adapter)
  286. {
  287. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  288. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  289. E1000_WRITE_FLUSH(&adapter->hw);
  290. }
  291. }
  292. static void
  293. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  294. {
  295. struct net_device *netdev = adapter->netdev;
  296. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  297. uint16_t old_vid = adapter->mng_vlan_id;
  298. if (adapter->vlgrp) {
  299. if (!adapter->vlgrp->vlan_devices[vid]) {
  300. if (adapter->hw.mng_cookie.status &
  301. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  302. e1000_vlan_rx_add_vid(netdev, vid);
  303. adapter->mng_vlan_id = vid;
  304. } else
  305. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  306. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  307. (vid != old_vid) &&
  308. !adapter->vlgrp->vlan_devices[old_vid])
  309. e1000_vlan_rx_kill_vid(netdev, old_vid);
  310. } else
  311. adapter->mng_vlan_id = vid;
  312. }
  313. }
  314. /**
  315. * e1000_release_hw_control - release control of the h/w to f/w
  316. * @adapter: address of board private structure
  317. *
  318. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  319. * For ASF and Pass Through versions of f/w this means that the
  320. * driver is no longer loaded. For AMT version (only with 82573) i
  321. * of the f/w this means that the netowrk i/f is closed.
  322. *
  323. **/
  324. static void
  325. e1000_release_hw_control(struct e1000_adapter *adapter)
  326. {
  327. uint32_t ctrl_ext;
  328. uint32_t swsm;
  329. uint32_t extcnf;
  330. /* Let firmware taken over control of h/w */
  331. switch (adapter->hw.mac_type) {
  332. case e1000_82571:
  333. case e1000_82572:
  334. case e1000_80003es2lan:
  335. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  336. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  337. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  338. break;
  339. case e1000_82573:
  340. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  341. E1000_WRITE_REG(&adapter->hw, SWSM,
  342. swsm & ~E1000_SWSM_DRV_LOAD);
  343. case e1000_ich8lan:
  344. extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  345. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  346. extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
  347. break;
  348. default:
  349. break;
  350. }
  351. }
  352. /**
  353. * e1000_get_hw_control - get control of the h/w from f/w
  354. * @adapter: address of board private structure
  355. *
  356. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  357. * For ASF and Pass Through versions of f/w this means that
  358. * the driver is loaded. For AMT version (only with 82573)
  359. * of the f/w this means that the netowrk i/f is open.
  360. *
  361. **/
  362. static void
  363. e1000_get_hw_control(struct e1000_adapter *adapter)
  364. {
  365. uint32_t ctrl_ext;
  366. uint32_t swsm;
  367. uint32_t extcnf;
  368. /* Let firmware know the driver has taken over */
  369. switch (adapter->hw.mac_type) {
  370. case e1000_82571:
  371. case e1000_82572:
  372. case e1000_80003es2lan:
  373. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  374. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  375. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  376. break;
  377. case e1000_82573:
  378. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  379. E1000_WRITE_REG(&adapter->hw, SWSM,
  380. swsm | E1000_SWSM_DRV_LOAD);
  381. break;
  382. case e1000_ich8lan:
  383. extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
  384. E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
  385. extcnf | E1000_EXTCNF_CTRL_SWFLAG);
  386. break;
  387. default:
  388. break;
  389. }
  390. }
  391. int
  392. e1000_up(struct e1000_adapter *adapter)
  393. {
  394. struct net_device *netdev = adapter->netdev;
  395. int i;
  396. /* hardware has been reset, we need to reload some things */
  397. e1000_set_multi(netdev);
  398. e1000_restore_vlan(adapter);
  399. e1000_configure_tx(adapter);
  400. e1000_setup_rctl(adapter);
  401. e1000_configure_rx(adapter);
  402. /* call E1000_DESC_UNUSED which always leaves
  403. * at least 1 descriptor unused to make sure
  404. * next_to_use != next_to_clean */
  405. for (i = 0; i < adapter->num_rx_queues; i++) {
  406. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  407. adapter->alloc_rx_buf(adapter, ring,
  408. E1000_DESC_UNUSED(ring));
  409. }
  410. adapter->tx_queue_len = netdev->tx_queue_len;
  411. mod_timer(&adapter->watchdog_timer, jiffies);
  412. #ifdef CONFIG_E1000_NAPI
  413. netif_poll_enable(netdev);
  414. #endif
  415. e1000_irq_enable(adapter);
  416. return 0;
  417. }
  418. /**
  419. * e1000_power_up_phy - restore link in case the phy was powered down
  420. * @adapter: address of board private structure
  421. *
  422. * The phy may be powered down to save power and turn off link when the
  423. * driver is unloaded and wake on lan is not enabled (among others)
  424. * *** this routine MUST be followed by a call to e1000_reset ***
  425. *
  426. **/
  427. void e1000_power_up_phy(struct e1000_adapter *adapter)
  428. {
  429. uint16_t mii_reg = 0;
  430. /* Just clear the power down bit to wake the phy back up */
  431. if (adapter->hw.media_type == e1000_media_type_copper) {
  432. /* according to the manual, the phy will retain its
  433. * settings across a power-down/up cycle */
  434. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  435. mii_reg &= ~MII_CR_POWER_DOWN;
  436. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  437. }
  438. }
  439. static void e1000_power_down_phy(struct e1000_adapter *adapter)
  440. {
  441. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  442. e1000_check_mng_mode(&adapter->hw);
  443. /* Power down the PHY so no link is implied when interface is down
  444. * The PHY cannot be powered down if any of the following is TRUE
  445. * (a) WoL is enabled
  446. * (b) AMT is active
  447. * (c) SoL/IDER session is active */
  448. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  449. adapter->hw.mac_type != e1000_ich8lan &&
  450. adapter->hw.media_type == e1000_media_type_copper &&
  451. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  452. !mng_mode_enabled &&
  453. !e1000_check_phy_reset_block(&adapter->hw)) {
  454. uint16_t mii_reg = 0;
  455. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  456. mii_reg |= MII_CR_POWER_DOWN;
  457. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  458. mdelay(1);
  459. }
  460. }
  461. void
  462. e1000_down(struct e1000_adapter *adapter)
  463. {
  464. struct net_device *netdev = adapter->netdev;
  465. e1000_irq_disable(adapter);
  466. del_timer_sync(&adapter->tx_fifo_stall_timer);
  467. del_timer_sync(&adapter->watchdog_timer);
  468. del_timer_sync(&adapter->phy_info_timer);
  469. #ifdef CONFIG_E1000_NAPI
  470. netif_poll_disable(netdev);
  471. #endif
  472. netdev->tx_queue_len = adapter->tx_queue_len;
  473. adapter->link_speed = 0;
  474. adapter->link_duplex = 0;
  475. netif_carrier_off(netdev);
  476. netif_stop_queue(netdev);
  477. e1000_reset(adapter);
  478. e1000_clean_all_tx_rings(adapter);
  479. e1000_clean_all_rx_rings(adapter);
  480. }
  481. void
  482. e1000_reinit_locked(struct e1000_adapter *adapter)
  483. {
  484. WARN_ON(in_interrupt());
  485. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  486. msleep(1);
  487. e1000_down(adapter);
  488. e1000_up(adapter);
  489. clear_bit(__E1000_RESETTING, &adapter->flags);
  490. }
  491. void
  492. e1000_reset(struct e1000_adapter *adapter)
  493. {
  494. uint32_t pba, manc;
  495. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  496. /* Repartition Pba for greater than 9k mtu
  497. * To take effect CTRL.RST is required.
  498. */
  499. switch (adapter->hw.mac_type) {
  500. case e1000_82547:
  501. case e1000_82547_rev_2:
  502. pba = E1000_PBA_30K;
  503. break;
  504. case e1000_82571:
  505. case e1000_82572:
  506. case e1000_80003es2lan:
  507. pba = E1000_PBA_38K;
  508. break;
  509. case e1000_82573:
  510. pba = E1000_PBA_12K;
  511. break;
  512. case e1000_ich8lan:
  513. pba = E1000_PBA_8K;
  514. break;
  515. default:
  516. pba = E1000_PBA_48K;
  517. break;
  518. }
  519. if ((adapter->hw.mac_type != e1000_82573) &&
  520. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  521. pba -= 8; /* allocate more FIFO for Tx */
  522. if (adapter->hw.mac_type == e1000_82547) {
  523. adapter->tx_fifo_head = 0;
  524. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  525. adapter->tx_fifo_size =
  526. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  527. atomic_set(&adapter->tx_fifo_stall, 0);
  528. }
  529. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  530. /* flow control settings */
  531. /* Set the FC high water mark to 90% of the FIFO size.
  532. * Required to clear last 3 LSB */
  533. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  534. /* We can't use 90% on small FIFOs because the remainder
  535. * would be less than 1 full frame. In this case, we size
  536. * it to allow at least a full frame above the high water
  537. * mark. */
  538. if (pba < E1000_PBA_16K)
  539. fc_high_water_mark = (pba * 1024) - 1600;
  540. adapter->hw.fc_high_water = fc_high_water_mark;
  541. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  542. if (adapter->hw.mac_type == e1000_80003es2lan)
  543. adapter->hw.fc_pause_time = 0xFFFF;
  544. else
  545. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  546. adapter->hw.fc_send_xon = 1;
  547. adapter->hw.fc = adapter->hw.original_fc;
  548. /* Allow time for pending master requests to run */
  549. e1000_reset_hw(&adapter->hw);
  550. if (adapter->hw.mac_type >= e1000_82544)
  551. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  552. if (e1000_init_hw(&adapter->hw))
  553. DPRINTK(PROBE, ERR, "Hardware Error\n");
  554. e1000_update_mng_vlan(adapter);
  555. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  556. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  557. e1000_reset_adaptive(&adapter->hw);
  558. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  559. if (!adapter->smart_power_down &&
  560. (adapter->hw.mac_type == e1000_82571 ||
  561. adapter->hw.mac_type == e1000_82572)) {
  562. uint16_t phy_data = 0;
  563. /* speed up time to link by disabling smart power down, ignore
  564. * the return value of this function because there is nothing
  565. * different we would do if it failed */
  566. e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  567. &phy_data);
  568. phy_data &= ~IGP02E1000_PM_SPD;
  569. e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  570. phy_data);
  571. }
  572. if (adapter->hw.mac_type < e1000_ich8lan)
  573. /* FIXME: this code is duplicate and wrong for PCI Express */
  574. if (adapter->en_mng_pt) {
  575. manc = E1000_READ_REG(&adapter->hw, MANC);
  576. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  577. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  578. }
  579. }
  580. /**
  581. * e1000_probe - Device Initialization Routine
  582. * @pdev: PCI device information struct
  583. * @ent: entry in e1000_pci_tbl
  584. *
  585. * Returns 0 on success, negative on failure
  586. *
  587. * e1000_probe initializes an adapter identified by a pci_dev structure.
  588. * The OS initialization, configuring of the adapter private structure,
  589. * and a hardware reset occur.
  590. **/
  591. static int __devinit
  592. e1000_probe(struct pci_dev *pdev,
  593. const struct pci_device_id *ent)
  594. {
  595. struct net_device *netdev;
  596. struct e1000_adapter *adapter;
  597. unsigned long mmio_start, mmio_len;
  598. unsigned long flash_start, flash_len;
  599. static int cards_found = 0;
  600. static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
  601. int i, err, pci_using_dac;
  602. uint16_t eeprom_data;
  603. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  604. if ((err = pci_enable_device(pdev)))
  605. return err;
  606. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  607. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  608. pci_using_dac = 1;
  609. } else {
  610. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
  611. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  612. E1000_ERR("No usable DMA configuration, aborting\n");
  613. return err;
  614. }
  615. pci_using_dac = 0;
  616. }
  617. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  618. return err;
  619. pci_set_master(pdev);
  620. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  621. if (!netdev) {
  622. err = -ENOMEM;
  623. goto err_alloc_etherdev;
  624. }
  625. SET_MODULE_OWNER(netdev);
  626. SET_NETDEV_DEV(netdev, &pdev->dev);
  627. pci_set_drvdata(pdev, netdev);
  628. adapter = netdev_priv(netdev);
  629. adapter->netdev = netdev;
  630. adapter->pdev = pdev;
  631. adapter->hw.back = adapter;
  632. adapter->msg_enable = (1 << debug) - 1;
  633. mmio_start = pci_resource_start(pdev, BAR_0);
  634. mmio_len = pci_resource_len(pdev, BAR_0);
  635. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  636. if (!adapter->hw.hw_addr) {
  637. err = -EIO;
  638. goto err_ioremap;
  639. }
  640. for (i = BAR_1; i <= BAR_5; i++) {
  641. if (pci_resource_len(pdev, i) == 0)
  642. continue;
  643. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  644. adapter->hw.io_base = pci_resource_start(pdev, i);
  645. break;
  646. }
  647. }
  648. netdev->open = &e1000_open;
  649. netdev->stop = &e1000_close;
  650. netdev->hard_start_xmit = &e1000_xmit_frame;
  651. netdev->get_stats = &e1000_get_stats;
  652. netdev->set_multicast_list = &e1000_set_multi;
  653. netdev->set_mac_address = &e1000_set_mac;
  654. netdev->change_mtu = &e1000_change_mtu;
  655. netdev->do_ioctl = &e1000_ioctl;
  656. e1000_set_ethtool_ops(netdev);
  657. netdev->tx_timeout = &e1000_tx_timeout;
  658. netdev->watchdog_timeo = 5 * HZ;
  659. #ifdef CONFIG_E1000_NAPI
  660. netdev->poll = &e1000_clean;
  661. netdev->weight = 64;
  662. #endif
  663. netdev->vlan_rx_register = e1000_vlan_rx_register;
  664. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  665. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  666. #ifdef CONFIG_NET_POLL_CONTROLLER
  667. netdev->poll_controller = e1000_netpoll;
  668. #endif
  669. strcpy(netdev->name, pci_name(pdev));
  670. netdev->mem_start = mmio_start;
  671. netdev->mem_end = mmio_start + mmio_len;
  672. netdev->base_addr = adapter->hw.io_base;
  673. adapter->bd_number = cards_found;
  674. /* setup the private structure */
  675. if ((err = e1000_sw_init(adapter)))
  676. goto err_sw_init;
  677. /* Flash BAR mapping must happen after e1000_sw_init
  678. * because it depends on mac_type */
  679. if ((adapter->hw.mac_type == e1000_ich8lan) &&
  680. (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
  681. flash_start = pci_resource_start(pdev, 1);
  682. flash_len = pci_resource_len(pdev, 1);
  683. adapter->hw.flash_address = ioremap(flash_start, flash_len);
  684. if (!adapter->hw.flash_address) {
  685. err = -EIO;
  686. goto err_flashmap;
  687. }
  688. }
  689. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  690. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  691. /* if ksp3, indicate if it's port a being setup */
  692. if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
  693. e1000_ksp3_port_a == 0)
  694. adapter->ksp3_port_a = 1;
  695. e1000_ksp3_port_a++;
  696. /* Reset for multiple KP3 adapters */
  697. if (e1000_ksp3_port_a == 4)
  698. e1000_ksp3_port_a = 0;
  699. if (adapter->hw.mac_type >= e1000_82543) {
  700. netdev->features = NETIF_F_SG |
  701. NETIF_F_HW_CSUM |
  702. NETIF_F_HW_VLAN_TX |
  703. NETIF_F_HW_VLAN_RX |
  704. NETIF_F_HW_VLAN_FILTER;
  705. if (adapter->hw.mac_type == e1000_ich8lan)
  706. netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
  707. }
  708. #ifdef NETIF_F_TSO
  709. if ((adapter->hw.mac_type >= e1000_82544) &&
  710. (adapter->hw.mac_type != e1000_82547))
  711. netdev->features |= NETIF_F_TSO;
  712. #ifdef NETIF_F_TSO_IPV6
  713. if (adapter->hw.mac_type > e1000_82547_rev_2)
  714. netdev->features |= NETIF_F_TSO_IPV6;
  715. #endif
  716. #endif
  717. if (pci_using_dac)
  718. netdev->features |= NETIF_F_HIGHDMA;
  719. netdev->features |= NETIF_F_LLTX;
  720. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  721. /* initialize eeprom parameters */
  722. if (e1000_init_eeprom_params(&adapter->hw)) {
  723. E1000_ERR("EEPROM initialization failed\n");
  724. return -EIO;
  725. }
  726. /* before reading the EEPROM, reset the controller to
  727. * put the device in a known good starting state */
  728. e1000_reset_hw(&adapter->hw);
  729. /* make sure the EEPROM is good */
  730. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  731. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  732. err = -EIO;
  733. goto err_eeprom;
  734. }
  735. /* copy the MAC address out of the EEPROM */
  736. if (e1000_read_mac_addr(&adapter->hw))
  737. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  738. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  739. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  740. if (!is_valid_ether_addr(netdev->perm_addr)) {
  741. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  742. err = -EIO;
  743. goto err_eeprom;
  744. }
  745. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  746. e1000_get_bus_info(&adapter->hw);
  747. init_timer(&adapter->tx_fifo_stall_timer);
  748. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  749. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  750. init_timer(&adapter->watchdog_timer);
  751. adapter->watchdog_timer.function = &e1000_watchdog;
  752. adapter->watchdog_timer.data = (unsigned long) adapter;
  753. init_timer(&adapter->phy_info_timer);
  754. adapter->phy_info_timer.function = &e1000_update_phy_info;
  755. adapter->phy_info_timer.data = (unsigned long) adapter;
  756. INIT_WORK(&adapter->reset_task,
  757. (void (*)(void *))e1000_reset_task, netdev);
  758. /* we're going to reset, so assume we have no link for now */
  759. netif_carrier_off(netdev);
  760. netif_stop_queue(netdev);
  761. e1000_check_options(adapter);
  762. /* Initial Wake on LAN setting
  763. * If APM wake is enabled in the EEPROM,
  764. * enable the ACPI Magic Packet filter
  765. */
  766. switch (adapter->hw.mac_type) {
  767. case e1000_82542_rev2_0:
  768. case e1000_82542_rev2_1:
  769. case e1000_82543:
  770. break;
  771. case e1000_82544:
  772. e1000_read_eeprom(&adapter->hw,
  773. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  774. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  775. break;
  776. case e1000_ich8lan:
  777. e1000_read_eeprom(&adapter->hw,
  778. EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
  779. eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
  780. break;
  781. case e1000_82546:
  782. case e1000_82546_rev_3:
  783. case e1000_82571:
  784. case e1000_80003es2lan:
  785. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  786. e1000_read_eeprom(&adapter->hw,
  787. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  788. break;
  789. }
  790. /* Fall Through */
  791. default:
  792. e1000_read_eeprom(&adapter->hw,
  793. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  794. break;
  795. }
  796. if (eeprom_data & eeprom_apme_mask)
  797. adapter->wol |= E1000_WUFC_MAG;
  798. /* print bus type/speed/width info */
  799. {
  800. struct e1000_hw *hw = &adapter->hw;
  801. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  802. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  803. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  804. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  805. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  806. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  807. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  808. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  809. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  810. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  811. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  812. "32-bit"));
  813. }
  814. for (i = 0; i < 6; i++)
  815. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  816. /* reset the hardware with the new settings */
  817. e1000_reset(adapter);
  818. /* If the controller is 82573 and f/w is AMT, do not set
  819. * DRV_LOAD until the interface is up. For all other cases,
  820. * let the f/w know that the h/w is now under the control
  821. * of the driver. */
  822. if (adapter->hw.mac_type != e1000_82573 ||
  823. !e1000_check_mng_mode(&adapter->hw))
  824. e1000_get_hw_control(adapter);
  825. strcpy(netdev->name, "eth%d");
  826. if ((err = register_netdev(netdev)))
  827. goto err_register;
  828. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  829. cards_found++;
  830. return 0;
  831. err_register:
  832. if (adapter->hw.flash_address)
  833. iounmap(adapter->hw.flash_address);
  834. err_flashmap:
  835. err_sw_init:
  836. err_eeprom:
  837. iounmap(adapter->hw.hw_addr);
  838. err_ioremap:
  839. free_netdev(netdev);
  840. err_alloc_etherdev:
  841. pci_release_regions(pdev);
  842. return err;
  843. }
  844. /**
  845. * e1000_remove - Device Removal Routine
  846. * @pdev: PCI device information struct
  847. *
  848. * e1000_remove is called by the PCI subsystem to alert the driver
  849. * that it should release a PCI device. The could be caused by a
  850. * Hot-Plug event, or because the driver is going to be removed from
  851. * memory.
  852. **/
  853. static void __devexit
  854. e1000_remove(struct pci_dev *pdev)
  855. {
  856. struct net_device *netdev = pci_get_drvdata(pdev);
  857. struct e1000_adapter *adapter = netdev_priv(netdev);
  858. uint32_t manc;
  859. #ifdef CONFIG_E1000_NAPI
  860. int i;
  861. #endif
  862. flush_scheduled_work();
  863. if (adapter->hw.mac_type >= e1000_82540 &&
  864. adapter->hw.mac_type != e1000_ich8lan &&
  865. adapter->hw.media_type == e1000_media_type_copper) {
  866. manc = E1000_READ_REG(&adapter->hw, MANC);
  867. if (manc & E1000_MANC_SMBUS_EN) {
  868. manc |= E1000_MANC_ARP_EN;
  869. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  870. }
  871. }
  872. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  873. * would have already happened in close and is redundant. */
  874. e1000_release_hw_control(adapter);
  875. unregister_netdev(netdev);
  876. #ifdef CONFIG_E1000_NAPI
  877. for (i = 0; i < adapter->num_rx_queues; i++)
  878. dev_put(&adapter->polling_netdev[i]);
  879. #endif
  880. if (!e1000_check_phy_reset_block(&adapter->hw))
  881. e1000_phy_hw_reset(&adapter->hw);
  882. kfree(adapter->tx_ring);
  883. kfree(adapter->rx_ring);
  884. #ifdef CONFIG_E1000_NAPI
  885. kfree(adapter->polling_netdev);
  886. #endif
  887. iounmap(adapter->hw.hw_addr);
  888. if (adapter->hw.flash_address)
  889. iounmap(adapter->hw.flash_address);
  890. pci_release_regions(pdev);
  891. free_netdev(netdev);
  892. pci_disable_device(pdev);
  893. }
  894. /**
  895. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  896. * @adapter: board private structure to initialize
  897. *
  898. * e1000_sw_init initializes the Adapter private data structure.
  899. * Fields are initialized based on PCI device information and
  900. * OS network device settings (MTU size).
  901. **/
  902. static int __devinit
  903. e1000_sw_init(struct e1000_adapter *adapter)
  904. {
  905. struct e1000_hw *hw = &adapter->hw;
  906. struct net_device *netdev = adapter->netdev;
  907. struct pci_dev *pdev = adapter->pdev;
  908. #ifdef CONFIG_E1000_NAPI
  909. int i;
  910. #endif
  911. /* PCI config space info */
  912. hw->vendor_id = pdev->vendor;
  913. hw->device_id = pdev->device;
  914. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  915. hw->subsystem_id = pdev->subsystem_device;
  916. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  917. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  918. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  919. adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
  920. hw->max_frame_size = netdev->mtu +
  921. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  922. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  923. /* identify the MAC */
  924. if (e1000_set_mac_type(hw)) {
  925. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  926. return -EIO;
  927. }
  928. switch (hw->mac_type) {
  929. default:
  930. break;
  931. case e1000_82541:
  932. case e1000_82547:
  933. case e1000_82541_rev_2:
  934. case e1000_82547_rev_2:
  935. hw->phy_init_script = 1;
  936. break;
  937. }
  938. e1000_set_media_type(hw);
  939. hw->wait_autoneg_complete = FALSE;
  940. hw->tbi_compatibility_en = TRUE;
  941. hw->adaptive_ifs = TRUE;
  942. /* Copper options */
  943. if (hw->media_type == e1000_media_type_copper) {
  944. hw->mdix = AUTO_ALL_MODES;
  945. hw->disable_polarity_correction = FALSE;
  946. hw->master_slave = E1000_MASTER_SLAVE;
  947. }
  948. adapter->num_tx_queues = 1;
  949. adapter->num_rx_queues = 1;
  950. if (e1000_alloc_queues(adapter)) {
  951. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  952. return -ENOMEM;
  953. }
  954. #ifdef CONFIG_E1000_NAPI
  955. for (i = 0; i < adapter->num_rx_queues; i++) {
  956. adapter->polling_netdev[i].priv = adapter;
  957. adapter->polling_netdev[i].poll = &e1000_clean;
  958. adapter->polling_netdev[i].weight = 64;
  959. dev_hold(&adapter->polling_netdev[i]);
  960. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  961. }
  962. spin_lock_init(&adapter->tx_queue_lock);
  963. #endif
  964. atomic_set(&adapter->irq_sem, 1);
  965. spin_lock_init(&adapter->stats_lock);
  966. return 0;
  967. }
  968. /**
  969. * e1000_alloc_queues - Allocate memory for all rings
  970. * @adapter: board private structure to initialize
  971. *
  972. * We allocate one ring per queue at run-time since we don't know the
  973. * number of queues at compile-time. The polling_netdev array is
  974. * intended for Multiqueue, but should work fine with a single queue.
  975. **/
  976. static int __devinit
  977. e1000_alloc_queues(struct e1000_adapter *adapter)
  978. {
  979. int size;
  980. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  981. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  982. if (!adapter->tx_ring)
  983. return -ENOMEM;
  984. memset(adapter->tx_ring, 0, size);
  985. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  986. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  987. if (!adapter->rx_ring) {
  988. kfree(adapter->tx_ring);
  989. return -ENOMEM;
  990. }
  991. memset(adapter->rx_ring, 0, size);
  992. #ifdef CONFIG_E1000_NAPI
  993. size = sizeof(struct net_device) * adapter->num_rx_queues;
  994. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  995. if (!adapter->polling_netdev) {
  996. kfree(adapter->tx_ring);
  997. kfree(adapter->rx_ring);
  998. return -ENOMEM;
  999. }
  1000. memset(adapter->polling_netdev, 0, size);
  1001. #endif
  1002. return E1000_SUCCESS;
  1003. }
  1004. /**
  1005. * e1000_open - Called when a network interface is made active
  1006. * @netdev: network interface device structure
  1007. *
  1008. * Returns 0 on success, negative value on failure
  1009. *
  1010. * The open entry point is called when a network interface is made
  1011. * active by the system (IFF_UP). At this point all resources needed
  1012. * for transmit and receive operations are allocated, the interrupt
  1013. * handler is registered with the OS, the watchdog timer is started,
  1014. * and the stack is notified that the interface is ready.
  1015. **/
  1016. static int
  1017. e1000_open(struct net_device *netdev)
  1018. {
  1019. struct e1000_adapter *adapter = netdev_priv(netdev);
  1020. int err;
  1021. /* disallow open during test */
  1022. if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
  1023. return -EBUSY;
  1024. /* allocate transmit descriptors */
  1025. if ((err = e1000_setup_all_tx_resources(adapter)))
  1026. goto err_setup_tx;
  1027. /* allocate receive descriptors */
  1028. if ((err = e1000_setup_all_rx_resources(adapter)))
  1029. goto err_setup_rx;
  1030. err = e1000_request_irq(adapter);
  1031. if (err)
  1032. goto err_up;
  1033. e1000_power_up_phy(adapter);
  1034. if ((err = e1000_up(adapter)))
  1035. goto err_up;
  1036. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1037. if ((adapter->hw.mng_cookie.status &
  1038. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1039. e1000_update_mng_vlan(adapter);
  1040. }
  1041. /* If AMT is enabled, let the firmware know that the network
  1042. * interface is now open */
  1043. if (adapter->hw.mac_type == e1000_82573 &&
  1044. e1000_check_mng_mode(&adapter->hw))
  1045. e1000_get_hw_control(adapter);
  1046. return E1000_SUCCESS;
  1047. err_up:
  1048. e1000_free_all_rx_resources(adapter);
  1049. err_setup_rx:
  1050. e1000_free_all_tx_resources(adapter);
  1051. err_setup_tx:
  1052. e1000_reset(adapter);
  1053. return err;
  1054. }
  1055. /**
  1056. * e1000_close - Disables a network interface
  1057. * @netdev: network interface device structure
  1058. *
  1059. * Returns 0, this is not allowed to fail
  1060. *
  1061. * The close entry point is called when an interface is de-activated
  1062. * by the OS. The hardware is still under the drivers control, but
  1063. * needs to be disabled. A global MAC reset is issued to stop the
  1064. * hardware, and all transmit and receive resources are freed.
  1065. **/
  1066. static int
  1067. e1000_close(struct net_device *netdev)
  1068. {
  1069. struct e1000_adapter *adapter = netdev_priv(netdev);
  1070. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  1071. e1000_down(adapter);
  1072. e1000_power_down_phy(adapter);
  1073. e1000_free_irq(adapter);
  1074. e1000_free_all_tx_resources(adapter);
  1075. e1000_free_all_rx_resources(adapter);
  1076. if ((adapter->hw.mng_cookie.status &
  1077. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1078. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1079. }
  1080. /* If AMT is enabled, let the firmware know that the network
  1081. * interface is now closed */
  1082. if (adapter->hw.mac_type == e1000_82573 &&
  1083. e1000_check_mng_mode(&adapter->hw))
  1084. e1000_release_hw_control(adapter);
  1085. return 0;
  1086. }
  1087. /**
  1088. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1089. * @adapter: address of board private structure
  1090. * @start: address of beginning of memory
  1091. * @len: length of memory
  1092. **/
  1093. static boolean_t
  1094. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1095. void *start, unsigned long len)
  1096. {
  1097. unsigned long begin = (unsigned long) start;
  1098. unsigned long end = begin + len;
  1099. /* First rev 82545 and 82546 need to not allow any memory
  1100. * write location to cross 64k boundary due to errata 23 */
  1101. if (adapter->hw.mac_type == e1000_82545 ||
  1102. adapter->hw.mac_type == e1000_82546) {
  1103. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1104. }
  1105. return TRUE;
  1106. }
  1107. /**
  1108. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1109. * @adapter: board private structure
  1110. * @txdr: tx descriptor ring (for a specific queue) to setup
  1111. *
  1112. * Return 0 on success, negative on failure
  1113. **/
  1114. static int
  1115. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1116. struct e1000_tx_ring *txdr)
  1117. {
  1118. struct pci_dev *pdev = adapter->pdev;
  1119. int size;
  1120. size = sizeof(struct e1000_buffer) * txdr->count;
  1121. txdr->buffer_info = vmalloc(size);
  1122. if (!txdr->buffer_info) {
  1123. DPRINTK(PROBE, ERR,
  1124. "Unable to allocate memory for the transmit descriptor ring\n");
  1125. return -ENOMEM;
  1126. }
  1127. memset(txdr->buffer_info, 0, size);
  1128. /* round up to nearest 4K */
  1129. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1130. E1000_ROUNDUP(txdr->size, 4096);
  1131. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1132. if (!txdr->desc) {
  1133. setup_tx_desc_die:
  1134. vfree(txdr->buffer_info);
  1135. DPRINTK(PROBE, ERR,
  1136. "Unable to allocate memory for the transmit descriptor ring\n");
  1137. return -ENOMEM;
  1138. }
  1139. /* Fix for errata 23, can't cross 64kB boundary */
  1140. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1141. void *olddesc = txdr->desc;
  1142. dma_addr_t olddma = txdr->dma;
  1143. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1144. "at %p\n", txdr->size, txdr->desc);
  1145. /* Try again, without freeing the previous */
  1146. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1147. /* Failed allocation, critical failure */
  1148. if (!txdr->desc) {
  1149. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1150. goto setup_tx_desc_die;
  1151. }
  1152. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1153. /* give up */
  1154. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1155. txdr->dma);
  1156. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1157. DPRINTK(PROBE, ERR,
  1158. "Unable to allocate aligned memory "
  1159. "for the transmit descriptor ring\n");
  1160. vfree(txdr->buffer_info);
  1161. return -ENOMEM;
  1162. } else {
  1163. /* Free old allocation, new allocation was successful */
  1164. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1165. }
  1166. }
  1167. memset(txdr->desc, 0, txdr->size);
  1168. txdr->next_to_use = 0;
  1169. txdr->next_to_clean = 0;
  1170. spin_lock_init(&txdr->tx_lock);
  1171. return 0;
  1172. }
  1173. /**
  1174. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1175. * (Descriptors) for all queues
  1176. * @adapter: board private structure
  1177. *
  1178. * If this function returns with an error, then it's possible one or
  1179. * more of the rings is populated (while the rest are not). It is the
  1180. * callers duty to clean those orphaned rings.
  1181. *
  1182. * Return 0 on success, negative on failure
  1183. **/
  1184. int
  1185. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1186. {
  1187. int i, err = 0;
  1188. for (i = 0; i < adapter->num_tx_queues; i++) {
  1189. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1190. if (err) {
  1191. DPRINTK(PROBE, ERR,
  1192. "Allocation for Tx Queue %u failed\n", i);
  1193. break;
  1194. }
  1195. }
  1196. return err;
  1197. }
  1198. /**
  1199. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1200. * @adapter: board private structure
  1201. *
  1202. * Configure the Tx unit of the MAC after a reset.
  1203. **/
  1204. static void
  1205. e1000_configure_tx(struct e1000_adapter *adapter)
  1206. {
  1207. uint64_t tdba;
  1208. struct e1000_hw *hw = &adapter->hw;
  1209. uint32_t tdlen, tctl, tipg, tarc;
  1210. uint32_t ipgr1, ipgr2;
  1211. /* Setup the HW Tx Head and Tail descriptor pointers */
  1212. switch (adapter->num_tx_queues) {
  1213. case 1:
  1214. default:
  1215. tdba = adapter->tx_ring[0].dma;
  1216. tdlen = adapter->tx_ring[0].count *
  1217. sizeof(struct e1000_tx_desc);
  1218. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1219. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1220. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1221. E1000_WRITE_REG(hw, TDT, 0);
  1222. E1000_WRITE_REG(hw, TDH, 0);
  1223. adapter->tx_ring[0].tdh = E1000_TDH;
  1224. adapter->tx_ring[0].tdt = E1000_TDT;
  1225. break;
  1226. }
  1227. /* Set the default values for the Tx Inter Packet Gap timer */
  1228. if (hw->media_type == e1000_media_type_fiber ||
  1229. hw->media_type == e1000_media_type_internal_serdes)
  1230. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1231. else
  1232. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1233. switch (hw->mac_type) {
  1234. case e1000_82542_rev2_0:
  1235. case e1000_82542_rev2_1:
  1236. tipg = DEFAULT_82542_TIPG_IPGT;
  1237. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1238. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1239. break;
  1240. case e1000_80003es2lan:
  1241. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1242. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1243. break;
  1244. default:
  1245. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1246. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1247. break;
  1248. }
  1249. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1250. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1251. E1000_WRITE_REG(hw, TIPG, tipg);
  1252. /* Set the Tx Interrupt Delay register */
  1253. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1254. if (hw->mac_type >= e1000_82540)
  1255. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1256. /* Program the Transmit Control Register */
  1257. tctl = E1000_READ_REG(hw, TCTL);
  1258. tctl &= ~E1000_TCTL_CT;
  1259. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1260. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1261. #ifdef DISABLE_MULR
  1262. /* disable Multiple Reads for debugging */
  1263. tctl &= ~E1000_TCTL_MULR;
  1264. #endif
  1265. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1266. tarc = E1000_READ_REG(hw, TARC0);
  1267. tarc |= ((1 << 25) | (1 << 21));
  1268. E1000_WRITE_REG(hw, TARC0, tarc);
  1269. tarc = E1000_READ_REG(hw, TARC1);
  1270. tarc |= (1 << 25);
  1271. if (tctl & E1000_TCTL_MULR)
  1272. tarc &= ~(1 << 28);
  1273. else
  1274. tarc |= (1 << 28);
  1275. E1000_WRITE_REG(hw, TARC1, tarc);
  1276. } else if (hw->mac_type == e1000_80003es2lan) {
  1277. tarc = E1000_READ_REG(hw, TARC0);
  1278. tarc |= 1;
  1279. E1000_WRITE_REG(hw, TARC0, tarc);
  1280. tarc = E1000_READ_REG(hw, TARC1);
  1281. tarc |= 1;
  1282. E1000_WRITE_REG(hw, TARC1, tarc);
  1283. }
  1284. e1000_config_collision_dist(hw);
  1285. /* Setup Transmit Descriptor Settings for eop descriptor */
  1286. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1287. E1000_TXD_CMD_IFCS;
  1288. if (hw->mac_type < e1000_82543)
  1289. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1290. else
  1291. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1292. /* Cache if we're 82544 running in PCI-X because we'll
  1293. * need this to apply a workaround later in the send path. */
  1294. if (hw->mac_type == e1000_82544 &&
  1295. hw->bus_type == e1000_bus_type_pcix)
  1296. adapter->pcix_82544 = 1;
  1297. E1000_WRITE_REG(hw, TCTL, tctl);
  1298. }
  1299. /**
  1300. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1301. * @adapter: board private structure
  1302. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1303. *
  1304. * Returns 0 on success, negative on failure
  1305. **/
  1306. static int
  1307. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1308. struct e1000_rx_ring *rxdr)
  1309. {
  1310. struct pci_dev *pdev = adapter->pdev;
  1311. int size, desc_len;
  1312. size = sizeof(struct e1000_buffer) * rxdr->count;
  1313. rxdr->buffer_info = vmalloc(size);
  1314. if (!rxdr->buffer_info) {
  1315. DPRINTK(PROBE, ERR,
  1316. "Unable to allocate memory for the receive descriptor ring\n");
  1317. return -ENOMEM;
  1318. }
  1319. memset(rxdr->buffer_info, 0, size);
  1320. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1321. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1322. if (!rxdr->ps_page) {
  1323. vfree(rxdr->buffer_info);
  1324. DPRINTK(PROBE, ERR,
  1325. "Unable to allocate memory for the receive descriptor ring\n");
  1326. return -ENOMEM;
  1327. }
  1328. memset(rxdr->ps_page, 0, size);
  1329. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1330. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1331. if (!rxdr->ps_page_dma) {
  1332. vfree(rxdr->buffer_info);
  1333. kfree(rxdr->ps_page);
  1334. DPRINTK(PROBE, ERR,
  1335. "Unable to allocate memory for the receive descriptor ring\n");
  1336. return -ENOMEM;
  1337. }
  1338. memset(rxdr->ps_page_dma, 0, size);
  1339. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1340. desc_len = sizeof(struct e1000_rx_desc);
  1341. else
  1342. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1343. /* Round up to nearest 4K */
  1344. rxdr->size = rxdr->count * desc_len;
  1345. E1000_ROUNDUP(rxdr->size, 4096);
  1346. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1347. if (!rxdr->desc) {
  1348. DPRINTK(PROBE, ERR,
  1349. "Unable to allocate memory for the receive descriptor ring\n");
  1350. setup_rx_desc_die:
  1351. vfree(rxdr->buffer_info);
  1352. kfree(rxdr->ps_page);
  1353. kfree(rxdr->ps_page_dma);
  1354. return -ENOMEM;
  1355. }
  1356. /* Fix for errata 23, can't cross 64kB boundary */
  1357. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1358. void *olddesc = rxdr->desc;
  1359. dma_addr_t olddma = rxdr->dma;
  1360. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1361. "at %p\n", rxdr->size, rxdr->desc);
  1362. /* Try again, without freeing the previous */
  1363. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1364. /* Failed allocation, critical failure */
  1365. if (!rxdr->desc) {
  1366. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1367. DPRINTK(PROBE, ERR,
  1368. "Unable to allocate memory "
  1369. "for the receive descriptor ring\n");
  1370. goto setup_rx_desc_die;
  1371. }
  1372. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1373. /* give up */
  1374. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1375. rxdr->dma);
  1376. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1377. DPRINTK(PROBE, ERR,
  1378. "Unable to allocate aligned memory "
  1379. "for the receive descriptor ring\n");
  1380. goto setup_rx_desc_die;
  1381. } else {
  1382. /* Free old allocation, new allocation was successful */
  1383. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1384. }
  1385. }
  1386. memset(rxdr->desc, 0, rxdr->size);
  1387. rxdr->next_to_clean = 0;
  1388. rxdr->next_to_use = 0;
  1389. return 0;
  1390. }
  1391. /**
  1392. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1393. * (Descriptors) for all queues
  1394. * @adapter: board private structure
  1395. *
  1396. * If this function returns with an error, then it's possible one or
  1397. * more of the rings is populated (while the rest are not). It is the
  1398. * callers duty to clean those orphaned rings.
  1399. *
  1400. * Return 0 on success, negative on failure
  1401. **/
  1402. int
  1403. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1404. {
  1405. int i, err = 0;
  1406. for (i = 0; i < adapter->num_rx_queues; i++) {
  1407. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1408. if (err) {
  1409. DPRINTK(PROBE, ERR,
  1410. "Allocation for Rx Queue %u failed\n", i);
  1411. break;
  1412. }
  1413. }
  1414. return err;
  1415. }
  1416. /**
  1417. * e1000_setup_rctl - configure the receive control registers
  1418. * @adapter: Board private structure
  1419. **/
  1420. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1421. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1422. static void
  1423. e1000_setup_rctl(struct e1000_adapter *adapter)
  1424. {
  1425. uint32_t rctl, rfctl;
  1426. uint32_t psrctl = 0;
  1427. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1428. uint32_t pages = 0;
  1429. #endif
  1430. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1431. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1432. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1433. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1434. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1435. if (adapter->hw.tbi_compatibility_on == 1)
  1436. rctl |= E1000_RCTL_SBP;
  1437. else
  1438. rctl &= ~E1000_RCTL_SBP;
  1439. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1440. rctl &= ~E1000_RCTL_LPE;
  1441. else
  1442. rctl |= E1000_RCTL_LPE;
  1443. /* Setup buffer sizes */
  1444. rctl &= ~E1000_RCTL_SZ_4096;
  1445. rctl |= E1000_RCTL_BSEX;
  1446. switch (adapter->rx_buffer_len) {
  1447. case E1000_RXBUFFER_256:
  1448. rctl |= E1000_RCTL_SZ_256;
  1449. rctl &= ~E1000_RCTL_BSEX;
  1450. break;
  1451. case E1000_RXBUFFER_512:
  1452. rctl |= E1000_RCTL_SZ_512;
  1453. rctl &= ~E1000_RCTL_BSEX;
  1454. break;
  1455. case E1000_RXBUFFER_1024:
  1456. rctl |= E1000_RCTL_SZ_1024;
  1457. rctl &= ~E1000_RCTL_BSEX;
  1458. break;
  1459. case E1000_RXBUFFER_2048:
  1460. default:
  1461. rctl |= E1000_RCTL_SZ_2048;
  1462. rctl &= ~E1000_RCTL_BSEX;
  1463. break;
  1464. case E1000_RXBUFFER_4096:
  1465. rctl |= E1000_RCTL_SZ_4096;
  1466. break;
  1467. case E1000_RXBUFFER_8192:
  1468. rctl |= E1000_RCTL_SZ_8192;
  1469. break;
  1470. case E1000_RXBUFFER_16384:
  1471. rctl |= E1000_RCTL_SZ_16384;
  1472. break;
  1473. }
  1474. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1475. /* 82571 and greater support packet-split where the protocol
  1476. * header is placed in skb->data and the packet data is
  1477. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1478. * In the case of a non-split, skb->data is linearly filled,
  1479. * followed by the page buffers. Therefore, skb->data is
  1480. * sized to hold the largest protocol header.
  1481. */
  1482. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1483. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1484. PAGE_SIZE <= 16384)
  1485. adapter->rx_ps_pages = pages;
  1486. else
  1487. adapter->rx_ps_pages = 0;
  1488. #endif
  1489. if (adapter->rx_ps_pages) {
  1490. /* Configure extra packet-split registers */
  1491. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1492. rfctl |= E1000_RFCTL_EXTEN;
  1493. /* disable IPv6 packet split support */
  1494. rfctl |= E1000_RFCTL_IPV6_DIS;
  1495. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1496. rctl |= E1000_RCTL_DTYP_PS;
  1497. psrctl |= adapter->rx_ps_bsize0 >>
  1498. E1000_PSRCTL_BSIZE0_SHIFT;
  1499. switch (adapter->rx_ps_pages) {
  1500. case 3:
  1501. psrctl |= PAGE_SIZE <<
  1502. E1000_PSRCTL_BSIZE3_SHIFT;
  1503. case 2:
  1504. psrctl |= PAGE_SIZE <<
  1505. E1000_PSRCTL_BSIZE2_SHIFT;
  1506. case 1:
  1507. psrctl |= PAGE_SIZE >>
  1508. E1000_PSRCTL_BSIZE1_SHIFT;
  1509. break;
  1510. }
  1511. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1512. }
  1513. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1514. }
  1515. /**
  1516. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1517. * @adapter: board private structure
  1518. *
  1519. * Configure the Rx unit of the MAC after a reset.
  1520. **/
  1521. static void
  1522. e1000_configure_rx(struct e1000_adapter *adapter)
  1523. {
  1524. uint64_t rdba;
  1525. struct e1000_hw *hw = &adapter->hw;
  1526. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1527. if (adapter->rx_ps_pages) {
  1528. /* this is a 32 byte descriptor */
  1529. rdlen = adapter->rx_ring[0].count *
  1530. sizeof(union e1000_rx_desc_packet_split);
  1531. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1532. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1533. } else {
  1534. rdlen = adapter->rx_ring[0].count *
  1535. sizeof(struct e1000_rx_desc);
  1536. adapter->clean_rx = e1000_clean_rx_irq;
  1537. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1538. }
  1539. /* disable receives while setting up the descriptors */
  1540. rctl = E1000_READ_REG(hw, RCTL);
  1541. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1542. /* set the Receive Delay Timer Register */
  1543. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1544. if (hw->mac_type >= e1000_82540) {
  1545. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1546. if (adapter->itr > 1)
  1547. E1000_WRITE_REG(hw, ITR,
  1548. 1000000000 / (adapter->itr * 256));
  1549. }
  1550. if (hw->mac_type >= e1000_82571) {
  1551. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1552. /* Reset delay timers after every interrupt */
  1553. ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
  1554. #ifdef CONFIG_E1000_NAPI
  1555. /* Auto-Mask interrupts upon ICR read. */
  1556. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1557. #endif
  1558. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1559. E1000_WRITE_REG(hw, IAM, ~0);
  1560. E1000_WRITE_FLUSH(hw);
  1561. }
  1562. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1563. * the Base and Length of the Rx Descriptor Ring */
  1564. switch (adapter->num_rx_queues) {
  1565. case 1:
  1566. default:
  1567. rdba = adapter->rx_ring[0].dma;
  1568. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1569. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1570. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1571. E1000_WRITE_REG(hw, RDT, 0);
  1572. E1000_WRITE_REG(hw, RDH, 0);
  1573. adapter->rx_ring[0].rdh = E1000_RDH;
  1574. adapter->rx_ring[0].rdt = E1000_RDT;
  1575. break;
  1576. }
  1577. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1578. if (hw->mac_type >= e1000_82543) {
  1579. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1580. if (adapter->rx_csum == TRUE) {
  1581. rxcsum |= E1000_RXCSUM_TUOFL;
  1582. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1583. * Must be used in conjunction with packet-split. */
  1584. if ((hw->mac_type >= e1000_82571) &&
  1585. (adapter->rx_ps_pages)) {
  1586. rxcsum |= E1000_RXCSUM_IPPCSE;
  1587. }
  1588. } else {
  1589. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1590. /* don't need to clear IPPCSE as it defaults to 0 */
  1591. }
  1592. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1593. }
  1594. /* Enable Receives */
  1595. E1000_WRITE_REG(hw, RCTL, rctl);
  1596. }
  1597. /**
  1598. * e1000_free_tx_resources - Free Tx Resources per Queue
  1599. * @adapter: board private structure
  1600. * @tx_ring: Tx descriptor ring for a specific queue
  1601. *
  1602. * Free all transmit software resources
  1603. **/
  1604. static void
  1605. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1606. struct e1000_tx_ring *tx_ring)
  1607. {
  1608. struct pci_dev *pdev = adapter->pdev;
  1609. e1000_clean_tx_ring(adapter, tx_ring);
  1610. vfree(tx_ring->buffer_info);
  1611. tx_ring->buffer_info = NULL;
  1612. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1613. tx_ring->desc = NULL;
  1614. }
  1615. /**
  1616. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1617. * @adapter: board private structure
  1618. *
  1619. * Free all transmit software resources
  1620. **/
  1621. void
  1622. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1623. {
  1624. int i;
  1625. for (i = 0; i < adapter->num_tx_queues; i++)
  1626. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1627. }
  1628. static void
  1629. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1630. struct e1000_buffer *buffer_info)
  1631. {
  1632. if (buffer_info->dma) {
  1633. pci_unmap_page(adapter->pdev,
  1634. buffer_info->dma,
  1635. buffer_info->length,
  1636. PCI_DMA_TODEVICE);
  1637. }
  1638. if (buffer_info->skb)
  1639. dev_kfree_skb_any(buffer_info->skb);
  1640. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1641. }
  1642. /**
  1643. * e1000_clean_tx_ring - Free Tx Buffers
  1644. * @adapter: board private structure
  1645. * @tx_ring: ring to be cleaned
  1646. **/
  1647. static void
  1648. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1649. struct e1000_tx_ring *tx_ring)
  1650. {
  1651. struct e1000_buffer *buffer_info;
  1652. unsigned long size;
  1653. unsigned int i;
  1654. /* Free all the Tx ring sk_buffs */
  1655. for (i = 0; i < tx_ring->count; i++) {
  1656. buffer_info = &tx_ring->buffer_info[i];
  1657. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1658. }
  1659. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1660. memset(tx_ring->buffer_info, 0, size);
  1661. /* Zero out the descriptor ring */
  1662. memset(tx_ring->desc, 0, tx_ring->size);
  1663. tx_ring->next_to_use = 0;
  1664. tx_ring->next_to_clean = 0;
  1665. tx_ring->last_tx_tso = 0;
  1666. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1667. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1668. }
  1669. /**
  1670. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1671. * @adapter: board private structure
  1672. **/
  1673. static void
  1674. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1675. {
  1676. int i;
  1677. for (i = 0; i < adapter->num_tx_queues; i++)
  1678. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1679. }
  1680. /**
  1681. * e1000_free_rx_resources - Free Rx Resources
  1682. * @adapter: board private structure
  1683. * @rx_ring: ring to clean the resources from
  1684. *
  1685. * Free all receive software resources
  1686. **/
  1687. static void
  1688. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1689. struct e1000_rx_ring *rx_ring)
  1690. {
  1691. struct pci_dev *pdev = adapter->pdev;
  1692. e1000_clean_rx_ring(adapter, rx_ring);
  1693. vfree(rx_ring->buffer_info);
  1694. rx_ring->buffer_info = NULL;
  1695. kfree(rx_ring->ps_page);
  1696. rx_ring->ps_page = NULL;
  1697. kfree(rx_ring->ps_page_dma);
  1698. rx_ring->ps_page_dma = NULL;
  1699. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1700. rx_ring->desc = NULL;
  1701. }
  1702. /**
  1703. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1704. * @adapter: board private structure
  1705. *
  1706. * Free all receive software resources
  1707. **/
  1708. void
  1709. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1710. {
  1711. int i;
  1712. for (i = 0; i < adapter->num_rx_queues; i++)
  1713. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1714. }
  1715. /**
  1716. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1717. * @adapter: board private structure
  1718. * @rx_ring: ring to free buffers from
  1719. **/
  1720. static void
  1721. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1722. struct e1000_rx_ring *rx_ring)
  1723. {
  1724. struct e1000_buffer *buffer_info;
  1725. struct e1000_ps_page *ps_page;
  1726. struct e1000_ps_page_dma *ps_page_dma;
  1727. struct pci_dev *pdev = adapter->pdev;
  1728. unsigned long size;
  1729. unsigned int i, j;
  1730. /* Free all the Rx ring sk_buffs */
  1731. for (i = 0; i < rx_ring->count; i++) {
  1732. buffer_info = &rx_ring->buffer_info[i];
  1733. if (buffer_info->skb) {
  1734. pci_unmap_single(pdev,
  1735. buffer_info->dma,
  1736. buffer_info->length,
  1737. PCI_DMA_FROMDEVICE);
  1738. dev_kfree_skb(buffer_info->skb);
  1739. buffer_info->skb = NULL;
  1740. }
  1741. ps_page = &rx_ring->ps_page[i];
  1742. ps_page_dma = &rx_ring->ps_page_dma[i];
  1743. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1744. if (!ps_page->ps_page[j]) break;
  1745. pci_unmap_page(pdev,
  1746. ps_page_dma->ps_page_dma[j],
  1747. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1748. ps_page_dma->ps_page_dma[j] = 0;
  1749. put_page(ps_page->ps_page[j]);
  1750. ps_page->ps_page[j] = NULL;
  1751. }
  1752. }
  1753. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1754. memset(rx_ring->buffer_info, 0, size);
  1755. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1756. memset(rx_ring->ps_page, 0, size);
  1757. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1758. memset(rx_ring->ps_page_dma, 0, size);
  1759. /* Zero out the descriptor ring */
  1760. memset(rx_ring->desc, 0, rx_ring->size);
  1761. rx_ring->next_to_clean = 0;
  1762. rx_ring->next_to_use = 0;
  1763. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1764. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1765. }
  1766. /**
  1767. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1768. * @adapter: board private structure
  1769. **/
  1770. static void
  1771. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1772. {
  1773. int i;
  1774. for (i = 0; i < adapter->num_rx_queues; i++)
  1775. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1776. }
  1777. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1778. * and memory write and invalidate disabled for certain operations
  1779. */
  1780. static void
  1781. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1782. {
  1783. struct net_device *netdev = adapter->netdev;
  1784. uint32_t rctl;
  1785. e1000_pci_clear_mwi(&adapter->hw);
  1786. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1787. rctl |= E1000_RCTL_RST;
  1788. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1789. E1000_WRITE_FLUSH(&adapter->hw);
  1790. mdelay(5);
  1791. if (netif_running(netdev))
  1792. e1000_clean_all_rx_rings(adapter);
  1793. }
  1794. static void
  1795. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1796. {
  1797. struct net_device *netdev = adapter->netdev;
  1798. uint32_t rctl;
  1799. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1800. rctl &= ~E1000_RCTL_RST;
  1801. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1802. E1000_WRITE_FLUSH(&adapter->hw);
  1803. mdelay(5);
  1804. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1805. e1000_pci_set_mwi(&adapter->hw);
  1806. if (netif_running(netdev)) {
  1807. /* No need to loop, because 82542 supports only 1 queue */
  1808. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1809. e1000_configure_rx(adapter);
  1810. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1811. }
  1812. }
  1813. /**
  1814. * e1000_set_mac - Change the Ethernet Address of the NIC
  1815. * @netdev: network interface device structure
  1816. * @p: pointer to an address structure
  1817. *
  1818. * Returns 0 on success, negative on failure
  1819. **/
  1820. static int
  1821. e1000_set_mac(struct net_device *netdev, void *p)
  1822. {
  1823. struct e1000_adapter *adapter = netdev_priv(netdev);
  1824. struct sockaddr *addr = p;
  1825. if (!is_valid_ether_addr(addr->sa_data))
  1826. return -EADDRNOTAVAIL;
  1827. /* 82542 2.0 needs to be in reset to write receive address registers */
  1828. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1829. e1000_enter_82542_rst(adapter);
  1830. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1831. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1832. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1833. /* With 82571 controllers, LAA may be overwritten (with the default)
  1834. * due to controller reset from the other port. */
  1835. if (adapter->hw.mac_type == e1000_82571) {
  1836. /* activate the work around */
  1837. adapter->hw.laa_is_present = 1;
  1838. /* Hold a copy of the LAA in RAR[14] This is done so that
  1839. * between the time RAR[0] gets clobbered and the time it
  1840. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1841. * of the RARs and no incoming packets directed to this port
  1842. * are dropped. Eventaully the LAA will be in RAR[0] and
  1843. * RAR[14] */
  1844. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1845. E1000_RAR_ENTRIES - 1);
  1846. }
  1847. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1848. e1000_leave_82542_rst(adapter);
  1849. return 0;
  1850. }
  1851. /**
  1852. * e1000_set_multi - Multicast and Promiscuous mode set
  1853. * @netdev: network interface device structure
  1854. *
  1855. * The set_multi entry point is called whenever the multicast address
  1856. * list or the network interface flags are updated. This routine is
  1857. * responsible for configuring the hardware for proper multicast,
  1858. * promiscuous mode, and all-multi behavior.
  1859. **/
  1860. static void
  1861. e1000_set_multi(struct net_device *netdev)
  1862. {
  1863. struct e1000_adapter *adapter = netdev_priv(netdev);
  1864. struct e1000_hw *hw = &adapter->hw;
  1865. struct dev_mc_list *mc_ptr;
  1866. uint32_t rctl;
  1867. uint32_t hash_value;
  1868. int i, rar_entries = E1000_RAR_ENTRIES;
  1869. int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
  1870. E1000_NUM_MTA_REGISTERS_ICH8LAN :
  1871. E1000_NUM_MTA_REGISTERS;
  1872. if (adapter->hw.mac_type == e1000_ich8lan)
  1873. rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
  1874. /* reserve RAR[14] for LAA over-write work-around */
  1875. if (adapter->hw.mac_type == e1000_82571)
  1876. rar_entries--;
  1877. /* Check for Promiscuous and All Multicast modes */
  1878. rctl = E1000_READ_REG(hw, RCTL);
  1879. if (netdev->flags & IFF_PROMISC) {
  1880. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1881. } else if (netdev->flags & IFF_ALLMULTI) {
  1882. rctl |= E1000_RCTL_MPE;
  1883. rctl &= ~E1000_RCTL_UPE;
  1884. } else {
  1885. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1886. }
  1887. E1000_WRITE_REG(hw, RCTL, rctl);
  1888. /* 82542 2.0 needs to be in reset to write receive address registers */
  1889. if (hw->mac_type == e1000_82542_rev2_0)
  1890. e1000_enter_82542_rst(adapter);
  1891. /* load the first 14 multicast address into the exact filters 1-14
  1892. * RAR 0 is used for the station MAC adddress
  1893. * if there are not 14 addresses, go ahead and clear the filters
  1894. * -- with 82571 controllers only 0-13 entries are filled here
  1895. */
  1896. mc_ptr = netdev->mc_list;
  1897. for (i = 1; i < rar_entries; i++) {
  1898. if (mc_ptr) {
  1899. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1900. mc_ptr = mc_ptr->next;
  1901. } else {
  1902. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1903. E1000_WRITE_FLUSH(hw);
  1904. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1905. E1000_WRITE_FLUSH(hw);
  1906. }
  1907. }
  1908. /* clear the old settings from the multicast hash table */
  1909. for (i = 0; i < mta_reg_count; i++) {
  1910. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1911. E1000_WRITE_FLUSH(hw);
  1912. }
  1913. /* load any remaining addresses into the hash table */
  1914. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1915. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1916. e1000_mta_set(hw, hash_value);
  1917. }
  1918. if (hw->mac_type == e1000_82542_rev2_0)
  1919. e1000_leave_82542_rst(adapter);
  1920. }
  1921. /* Need to wait a few seconds after link up to get diagnostic information from
  1922. * the phy */
  1923. static void
  1924. e1000_update_phy_info(unsigned long data)
  1925. {
  1926. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1927. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1928. }
  1929. /**
  1930. * e1000_82547_tx_fifo_stall - Timer Call-back
  1931. * @data: pointer to adapter cast into an unsigned long
  1932. **/
  1933. static void
  1934. e1000_82547_tx_fifo_stall(unsigned long data)
  1935. {
  1936. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1937. struct net_device *netdev = adapter->netdev;
  1938. uint32_t tctl;
  1939. if (atomic_read(&adapter->tx_fifo_stall)) {
  1940. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1941. E1000_READ_REG(&adapter->hw, TDH)) &&
  1942. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1943. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1944. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1945. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1946. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1947. E1000_WRITE_REG(&adapter->hw, TCTL,
  1948. tctl & ~E1000_TCTL_EN);
  1949. E1000_WRITE_REG(&adapter->hw, TDFT,
  1950. adapter->tx_head_addr);
  1951. E1000_WRITE_REG(&adapter->hw, TDFH,
  1952. adapter->tx_head_addr);
  1953. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1954. adapter->tx_head_addr);
  1955. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1956. adapter->tx_head_addr);
  1957. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1958. E1000_WRITE_FLUSH(&adapter->hw);
  1959. adapter->tx_fifo_head = 0;
  1960. atomic_set(&adapter->tx_fifo_stall, 0);
  1961. netif_wake_queue(netdev);
  1962. } else {
  1963. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1964. }
  1965. }
  1966. }
  1967. /**
  1968. * e1000_watchdog - Timer Call-back
  1969. * @data: pointer to adapter cast into an unsigned long
  1970. **/
  1971. static void
  1972. e1000_watchdog(unsigned long data)
  1973. {
  1974. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1975. struct net_device *netdev = adapter->netdev;
  1976. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1977. uint32_t link, tctl;
  1978. int32_t ret_val;
  1979. ret_val = e1000_check_for_link(&adapter->hw);
  1980. if ((ret_val == E1000_ERR_PHY) &&
  1981. (adapter->hw.phy_type == e1000_phy_igp_3) &&
  1982. (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
  1983. /* See e1000_kumeran_lock_loss_workaround() */
  1984. DPRINTK(LINK, INFO,
  1985. "Gigabit has been disabled, downgrading speed\n");
  1986. }
  1987. if (adapter->hw.mac_type == e1000_82573) {
  1988. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1989. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1990. e1000_update_mng_vlan(adapter);
  1991. }
  1992. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1993. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1994. link = !adapter->hw.serdes_link_down;
  1995. else
  1996. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1997. if (link) {
  1998. if (!netif_carrier_ok(netdev)) {
  1999. boolean_t txb2b = 1;
  2000. e1000_get_speed_and_duplex(&adapter->hw,
  2001. &adapter->link_speed,
  2002. &adapter->link_duplex);
  2003. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  2004. adapter->link_speed,
  2005. adapter->link_duplex == FULL_DUPLEX ?
  2006. "Full Duplex" : "Half Duplex");
  2007. /* tweak tx_queue_len according to speed/duplex
  2008. * and adjust the timeout factor */
  2009. netdev->tx_queue_len = adapter->tx_queue_len;
  2010. adapter->tx_timeout_factor = 1;
  2011. switch (adapter->link_speed) {
  2012. case SPEED_10:
  2013. txb2b = 0;
  2014. netdev->tx_queue_len = 10;
  2015. adapter->tx_timeout_factor = 8;
  2016. break;
  2017. case SPEED_100:
  2018. txb2b = 0;
  2019. netdev->tx_queue_len = 100;
  2020. /* maybe add some timeout factor ? */
  2021. break;
  2022. }
  2023. if ((adapter->hw.mac_type == e1000_82571 ||
  2024. adapter->hw.mac_type == e1000_82572) &&
  2025. txb2b == 0) {
  2026. #define SPEED_MODE_BIT (1 << 21)
  2027. uint32_t tarc0;
  2028. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  2029. tarc0 &= ~SPEED_MODE_BIT;
  2030. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  2031. }
  2032. #ifdef NETIF_F_TSO
  2033. /* disable TSO for pcie and 10/100 speeds, to avoid
  2034. * some hardware issues */
  2035. if (!adapter->tso_force &&
  2036. adapter->hw.bus_type == e1000_bus_type_pci_express){
  2037. switch (adapter->link_speed) {
  2038. case SPEED_10:
  2039. case SPEED_100:
  2040. DPRINTK(PROBE,INFO,
  2041. "10/100 speed: disabling TSO\n");
  2042. netdev->features &= ~NETIF_F_TSO;
  2043. break;
  2044. case SPEED_1000:
  2045. netdev->features |= NETIF_F_TSO;
  2046. break;
  2047. default:
  2048. /* oops */
  2049. break;
  2050. }
  2051. }
  2052. #endif
  2053. /* enable transmits in the hardware, need to do this
  2054. * after setting TARC0 */
  2055. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  2056. tctl |= E1000_TCTL_EN;
  2057. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  2058. netif_carrier_on(netdev);
  2059. netif_wake_queue(netdev);
  2060. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2061. adapter->smartspeed = 0;
  2062. }
  2063. } else {
  2064. if (netif_carrier_ok(netdev)) {
  2065. adapter->link_speed = 0;
  2066. adapter->link_duplex = 0;
  2067. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2068. netif_carrier_off(netdev);
  2069. netif_stop_queue(netdev);
  2070. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2071. /* 80003ES2LAN workaround--
  2072. * For packet buffer work-around on link down event;
  2073. * disable receives in the ISR and
  2074. * reset device here in the watchdog
  2075. */
  2076. if (adapter->hw.mac_type == e1000_80003es2lan) {
  2077. /* reset device */
  2078. schedule_work(&adapter->reset_task);
  2079. }
  2080. }
  2081. e1000_smartspeed(adapter);
  2082. }
  2083. e1000_update_stats(adapter);
  2084. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2085. adapter->tpt_old = adapter->stats.tpt;
  2086. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2087. adapter->colc_old = adapter->stats.colc;
  2088. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2089. adapter->gorcl_old = adapter->stats.gorcl;
  2090. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2091. adapter->gotcl_old = adapter->stats.gotcl;
  2092. e1000_update_adaptive(&adapter->hw);
  2093. if (!netif_carrier_ok(netdev)) {
  2094. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2095. /* We've lost link, so the controller stops DMA,
  2096. * but we've got queued Tx work that's never going
  2097. * to get done, so reset controller to flush Tx.
  2098. * (Do the reset outside of interrupt context). */
  2099. adapter->tx_timeout_count++;
  2100. schedule_work(&adapter->reset_task);
  2101. }
  2102. }
  2103. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2104. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2105. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2106. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2107. * else is between 2000-8000. */
  2108. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2109. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2110. adapter->gotcl - adapter->gorcl :
  2111. adapter->gorcl - adapter->gotcl) / 10000;
  2112. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2113. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2114. }
  2115. /* Cause software interrupt to ensure rx ring is cleaned */
  2116. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2117. /* Force detection of hung controller every watchdog period */
  2118. adapter->detect_tx_hung = TRUE;
  2119. /* With 82571 controllers, LAA may be overwritten due to controller
  2120. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2121. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2122. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2123. /* Reset the timer */
  2124. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2125. }
  2126. #define E1000_TX_FLAGS_CSUM 0x00000001
  2127. #define E1000_TX_FLAGS_VLAN 0x00000002
  2128. #define E1000_TX_FLAGS_TSO 0x00000004
  2129. #define E1000_TX_FLAGS_IPV4 0x00000008
  2130. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2131. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2132. static int
  2133. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2134. struct sk_buff *skb)
  2135. {
  2136. #ifdef NETIF_F_TSO
  2137. struct e1000_context_desc *context_desc;
  2138. struct e1000_buffer *buffer_info;
  2139. unsigned int i;
  2140. uint32_t cmd_length = 0;
  2141. uint16_t ipcse = 0, tucse, mss;
  2142. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2143. int err;
  2144. if (skb_is_gso(skb)) {
  2145. if (skb_header_cloned(skb)) {
  2146. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2147. if (err)
  2148. return err;
  2149. }
  2150. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2151. mss = skb_shinfo(skb)->gso_size;
  2152. if (skb->protocol == htons(ETH_P_IP)) {
  2153. skb->nh.iph->tot_len = 0;
  2154. skb->nh.iph->check = 0;
  2155. skb->h.th->check =
  2156. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2157. skb->nh.iph->daddr,
  2158. 0,
  2159. IPPROTO_TCP,
  2160. 0);
  2161. cmd_length = E1000_TXD_CMD_IP;
  2162. ipcse = skb->h.raw - skb->data - 1;
  2163. #ifdef NETIF_F_TSO_IPV6
  2164. } else if (skb->protocol == htons(ETH_P_IPV6)) {
  2165. skb->nh.ipv6h->payload_len = 0;
  2166. skb->h.th->check =
  2167. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2168. &skb->nh.ipv6h->daddr,
  2169. 0,
  2170. IPPROTO_TCP,
  2171. 0);
  2172. ipcse = 0;
  2173. #endif
  2174. }
  2175. ipcss = skb->nh.raw - skb->data;
  2176. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2177. tucss = skb->h.raw - skb->data;
  2178. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2179. tucse = 0;
  2180. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2181. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2182. i = tx_ring->next_to_use;
  2183. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2184. buffer_info = &tx_ring->buffer_info[i];
  2185. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2186. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2187. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2188. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2189. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2190. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2191. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2192. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2193. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2194. buffer_info->time_stamp = jiffies;
  2195. if (++i == tx_ring->count) i = 0;
  2196. tx_ring->next_to_use = i;
  2197. return TRUE;
  2198. }
  2199. #endif
  2200. return FALSE;
  2201. }
  2202. static boolean_t
  2203. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2204. struct sk_buff *skb)
  2205. {
  2206. struct e1000_context_desc *context_desc;
  2207. struct e1000_buffer *buffer_info;
  2208. unsigned int i;
  2209. uint8_t css;
  2210. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2211. css = skb->h.raw - skb->data;
  2212. i = tx_ring->next_to_use;
  2213. buffer_info = &tx_ring->buffer_info[i];
  2214. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2215. context_desc->upper_setup.tcp_fields.tucss = css;
  2216. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2217. context_desc->upper_setup.tcp_fields.tucse = 0;
  2218. context_desc->tcp_seg_setup.data = 0;
  2219. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2220. buffer_info->time_stamp = jiffies;
  2221. if (unlikely(++i == tx_ring->count)) i = 0;
  2222. tx_ring->next_to_use = i;
  2223. return TRUE;
  2224. }
  2225. return FALSE;
  2226. }
  2227. #define E1000_MAX_TXD_PWR 12
  2228. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2229. static int
  2230. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2231. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2232. unsigned int nr_frags, unsigned int mss)
  2233. {
  2234. struct e1000_buffer *buffer_info;
  2235. unsigned int len = skb->len;
  2236. unsigned int offset = 0, size, count = 0, i;
  2237. unsigned int f;
  2238. len -= skb->data_len;
  2239. i = tx_ring->next_to_use;
  2240. while (len) {
  2241. buffer_info = &tx_ring->buffer_info[i];
  2242. size = min(len, max_per_txd);
  2243. #ifdef NETIF_F_TSO
  2244. /* Workaround for Controller erratum --
  2245. * descriptor for non-tso packet in a linear SKB that follows a
  2246. * tso gets written back prematurely before the data is fully
  2247. * DMA'd to the controller */
  2248. if (!skb->data_len && tx_ring->last_tx_tso &&
  2249. !skb_is_gso(skb)) {
  2250. tx_ring->last_tx_tso = 0;
  2251. size -= 4;
  2252. }
  2253. /* Workaround for premature desc write-backs
  2254. * in TSO mode. Append 4-byte sentinel desc */
  2255. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2256. size -= 4;
  2257. #endif
  2258. /* work-around for errata 10 and it applies
  2259. * to all controllers in PCI-X mode
  2260. * The fix is to make sure that the first descriptor of a
  2261. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2262. */
  2263. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2264. (size > 2015) && count == 0))
  2265. size = 2015;
  2266. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2267. * terminating buffers within evenly-aligned dwords. */
  2268. if (unlikely(adapter->pcix_82544 &&
  2269. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2270. size > 4))
  2271. size -= 4;
  2272. buffer_info->length = size;
  2273. buffer_info->dma =
  2274. pci_map_single(adapter->pdev,
  2275. skb->data + offset,
  2276. size,
  2277. PCI_DMA_TODEVICE);
  2278. buffer_info->time_stamp = jiffies;
  2279. len -= size;
  2280. offset += size;
  2281. count++;
  2282. if (unlikely(++i == tx_ring->count)) i = 0;
  2283. }
  2284. for (f = 0; f < nr_frags; f++) {
  2285. struct skb_frag_struct *frag;
  2286. frag = &skb_shinfo(skb)->frags[f];
  2287. len = frag->size;
  2288. offset = frag->page_offset;
  2289. while (len) {
  2290. buffer_info = &tx_ring->buffer_info[i];
  2291. size = min(len, max_per_txd);
  2292. #ifdef NETIF_F_TSO
  2293. /* Workaround for premature desc write-backs
  2294. * in TSO mode. Append 4-byte sentinel desc */
  2295. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2296. size -= 4;
  2297. #endif
  2298. /* Workaround for potential 82544 hang in PCI-X.
  2299. * Avoid terminating buffers within evenly-aligned
  2300. * dwords. */
  2301. if (unlikely(adapter->pcix_82544 &&
  2302. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2303. size > 4))
  2304. size -= 4;
  2305. buffer_info->length = size;
  2306. buffer_info->dma =
  2307. pci_map_page(adapter->pdev,
  2308. frag->page,
  2309. offset,
  2310. size,
  2311. PCI_DMA_TODEVICE);
  2312. buffer_info->time_stamp = jiffies;
  2313. len -= size;
  2314. offset += size;
  2315. count++;
  2316. if (unlikely(++i == tx_ring->count)) i = 0;
  2317. }
  2318. }
  2319. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2320. tx_ring->buffer_info[i].skb = skb;
  2321. tx_ring->buffer_info[first].next_to_watch = i;
  2322. return count;
  2323. }
  2324. static void
  2325. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2326. int tx_flags, int count)
  2327. {
  2328. struct e1000_tx_desc *tx_desc = NULL;
  2329. struct e1000_buffer *buffer_info;
  2330. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2331. unsigned int i;
  2332. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2333. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2334. E1000_TXD_CMD_TSE;
  2335. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2336. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2337. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2338. }
  2339. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2340. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2341. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2342. }
  2343. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2344. txd_lower |= E1000_TXD_CMD_VLE;
  2345. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2346. }
  2347. i = tx_ring->next_to_use;
  2348. while (count--) {
  2349. buffer_info = &tx_ring->buffer_info[i];
  2350. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2351. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2352. tx_desc->lower.data =
  2353. cpu_to_le32(txd_lower | buffer_info->length);
  2354. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2355. if (unlikely(++i == tx_ring->count)) i = 0;
  2356. }
  2357. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2358. /* Force memory writes to complete before letting h/w
  2359. * know there are new descriptors to fetch. (Only
  2360. * applicable for weak-ordered memory model archs,
  2361. * such as IA-64). */
  2362. wmb();
  2363. tx_ring->next_to_use = i;
  2364. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2365. }
  2366. /**
  2367. * 82547 workaround to avoid controller hang in half-duplex environment.
  2368. * The workaround is to avoid queuing a large packet that would span
  2369. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2370. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2371. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2372. * to the beginning of the Tx FIFO.
  2373. **/
  2374. #define E1000_FIFO_HDR 0x10
  2375. #define E1000_82547_PAD_LEN 0x3E0
  2376. static int
  2377. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2378. {
  2379. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2380. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2381. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2382. if (adapter->link_duplex != HALF_DUPLEX)
  2383. goto no_fifo_stall_required;
  2384. if (atomic_read(&adapter->tx_fifo_stall))
  2385. return 1;
  2386. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2387. atomic_set(&adapter->tx_fifo_stall, 1);
  2388. return 1;
  2389. }
  2390. no_fifo_stall_required:
  2391. adapter->tx_fifo_head += skb_fifo_len;
  2392. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2393. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2394. return 0;
  2395. }
  2396. #define MINIMUM_DHCP_PACKET_SIZE 282
  2397. static int
  2398. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2399. {
  2400. struct e1000_hw *hw = &adapter->hw;
  2401. uint16_t length, offset;
  2402. if (vlan_tx_tag_present(skb)) {
  2403. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2404. ( adapter->hw.mng_cookie.status &
  2405. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2406. return 0;
  2407. }
  2408. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2409. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2410. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2411. const struct iphdr *ip =
  2412. (struct iphdr *)((uint8_t *)skb->data+14);
  2413. if (IPPROTO_UDP == ip->protocol) {
  2414. struct udphdr *udp =
  2415. (struct udphdr *)((uint8_t *)ip +
  2416. (ip->ihl << 2));
  2417. if (ntohs(udp->dest) == 67) {
  2418. offset = (uint8_t *)udp + 8 - skb->data;
  2419. length = skb->len - offset;
  2420. return e1000_mng_write_dhcp_info(hw,
  2421. (uint8_t *)udp + 8,
  2422. length);
  2423. }
  2424. }
  2425. }
  2426. }
  2427. return 0;
  2428. }
  2429. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2430. static int
  2431. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2432. {
  2433. struct e1000_adapter *adapter = netdev_priv(netdev);
  2434. struct e1000_tx_ring *tx_ring;
  2435. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2436. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2437. unsigned int tx_flags = 0;
  2438. unsigned int len = skb->len;
  2439. unsigned long flags;
  2440. unsigned int nr_frags = 0;
  2441. unsigned int mss = 0;
  2442. int count = 0;
  2443. int tso;
  2444. unsigned int f;
  2445. len -= skb->data_len;
  2446. tx_ring = adapter->tx_ring;
  2447. if (unlikely(skb->len <= 0)) {
  2448. dev_kfree_skb_any(skb);
  2449. return NETDEV_TX_OK;
  2450. }
  2451. #ifdef NETIF_F_TSO
  2452. mss = skb_shinfo(skb)->gso_size;
  2453. /* The controller does a simple calculation to
  2454. * make sure there is enough room in the FIFO before
  2455. * initiating the DMA for each buffer. The calc is:
  2456. * 4 = ceil(buffer len/mss). To make sure we don't
  2457. * overrun the FIFO, adjust the max buffer len if mss
  2458. * drops. */
  2459. if (mss) {
  2460. uint8_t hdr_len;
  2461. max_per_txd = min(mss << 2, max_per_txd);
  2462. max_txd_pwr = fls(max_per_txd) - 1;
  2463. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2464. * points to just header, pull a few bytes of payload from
  2465. * frags into skb->data */
  2466. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2467. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2468. switch (adapter->hw.mac_type) {
  2469. unsigned int pull_size;
  2470. case e1000_82571:
  2471. case e1000_82572:
  2472. case e1000_82573:
  2473. case e1000_ich8lan:
  2474. pull_size = min((unsigned int)4, skb->data_len);
  2475. if (!__pskb_pull_tail(skb, pull_size)) {
  2476. DPRINTK(DRV, ERR,
  2477. "__pskb_pull_tail failed.\n");
  2478. dev_kfree_skb_any(skb);
  2479. return NETDEV_TX_OK;
  2480. }
  2481. len = skb->len - skb->data_len;
  2482. break;
  2483. default:
  2484. /* do nothing */
  2485. break;
  2486. }
  2487. }
  2488. }
  2489. /* reserve a descriptor for the offload context */
  2490. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2491. count++;
  2492. count++;
  2493. #else
  2494. if (skb->ip_summed == CHECKSUM_HW)
  2495. count++;
  2496. #endif
  2497. #ifdef NETIF_F_TSO
  2498. /* Controller Erratum workaround */
  2499. if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
  2500. count++;
  2501. #endif
  2502. count += TXD_USE_COUNT(len, max_txd_pwr);
  2503. if (adapter->pcix_82544)
  2504. count++;
  2505. /* work-around for errata 10 and it applies to all controllers
  2506. * in PCI-X mode, so add one more descriptor to the count
  2507. */
  2508. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2509. (len > 2015)))
  2510. count++;
  2511. nr_frags = skb_shinfo(skb)->nr_frags;
  2512. for (f = 0; f < nr_frags; f++)
  2513. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2514. max_txd_pwr);
  2515. if (adapter->pcix_82544)
  2516. count += nr_frags;
  2517. if (adapter->hw.tx_pkt_filtering &&
  2518. (adapter->hw.mac_type == e1000_82573))
  2519. e1000_transfer_dhcp_info(adapter, skb);
  2520. local_irq_save(flags);
  2521. if (!spin_trylock(&tx_ring->tx_lock)) {
  2522. /* Collision - tell upper layer to requeue */
  2523. local_irq_restore(flags);
  2524. return NETDEV_TX_LOCKED;
  2525. }
  2526. /* need: count + 2 desc gap to keep tail from touching
  2527. * head, otherwise try next time */
  2528. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2529. netif_stop_queue(netdev);
  2530. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2531. return NETDEV_TX_BUSY;
  2532. }
  2533. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2534. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2535. netif_stop_queue(netdev);
  2536. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2537. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2538. return NETDEV_TX_BUSY;
  2539. }
  2540. }
  2541. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2542. tx_flags |= E1000_TX_FLAGS_VLAN;
  2543. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2544. }
  2545. first = tx_ring->next_to_use;
  2546. tso = e1000_tso(adapter, tx_ring, skb);
  2547. if (tso < 0) {
  2548. dev_kfree_skb_any(skb);
  2549. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2550. return NETDEV_TX_OK;
  2551. }
  2552. if (likely(tso)) {
  2553. tx_ring->last_tx_tso = 1;
  2554. tx_flags |= E1000_TX_FLAGS_TSO;
  2555. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2556. tx_flags |= E1000_TX_FLAGS_CSUM;
  2557. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2558. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2559. * no longer assume, we must. */
  2560. if (likely(skb->protocol == htons(ETH_P_IP)))
  2561. tx_flags |= E1000_TX_FLAGS_IPV4;
  2562. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2563. e1000_tx_map(adapter, tx_ring, skb, first,
  2564. max_per_txd, nr_frags, mss));
  2565. netdev->trans_start = jiffies;
  2566. /* Make sure there is space in the ring for the next send. */
  2567. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2568. netif_stop_queue(netdev);
  2569. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2570. return NETDEV_TX_OK;
  2571. }
  2572. /**
  2573. * e1000_tx_timeout - Respond to a Tx Hang
  2574. * @netdev: network interface device structure
  2575. **/
  2576. static void
  2577. e1000_tx_timeout(struct net_device *netdev)
  2578. {
  2579. struct e1000_adapter *adapter = netdev_priv(netdev);
  2580. /* Do the reset outside of interrupt context */
  2581. adapter->tx_timeout_count++;
  2582. schedule_work(&adapter->reset_task);
  2583. }
  2584. static void
  2585. e1000_reset_task(struct net_device *netdev)
  2586. {
  2587. struct e1000_adapter *adapter = netdev_priv(netdev);
  2588. e1000_reinit_locked(adapter);
  2589. }
  2590. /**
  2591. * e1000_get_stats - Get System Network Statistics
  2592. * @netdev: network interface device structure
  2593. *
  2594. * Returns the address of the device statistics structure.
  2595. * The statistics are actually updated from the timer callback.
  2596. **/
  2597. static struct net_device_stats *
  2598. e1000_get_stats(struct net_device *netdev)
  2599. {
  2600. struct e1000_adapter *adapter = netdev_priv(netdev);
  2601. /* only return the current stats */
  2602. return &adapter->net_stats;
  2603. }
  2604. /**
  2605. * e1000_change_mtu - Change the Maximum Transfer Unit
  2606. * @netdev: network interface device structure
  2607. * @new_mtu: new value for maximum frame size
  2608. *
  2609. * Returns 0 on success, negative on failure
  2610. **/
  2611. static int
  2612. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2613. {
  2614. struct e1000_adapter *adapter = netdev_priv(netdev);
  2615. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2616. uint16_t eeprom_data = 0;
  2617. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2618. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2619. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2620. return -EINVAL;
  2621. }
  2622. /* Adapter-specific max frame size limits. */
  2623. switch (adapter->hw.mac_type) {
  2624. case e1000_undefined ... e1000_82542_rev2_1:
  2625. case e1000_ich8lan:
  2626. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2627. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2628. return -EINVAL;
  2629. }
  2630. break;
  2631. case e1000_82573:
  2632. /* only enable jumbo frames if ASPM is disabled completely
  2633. * this means both bits must be zero in 0x1A bits 3:2 */
  2634. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2635. &eeprom_data);
  2636. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2637. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2638. DPRINTK(PROBE, ERR,
  2639. "Jumbo Frames not supported.\n");
  2640. return -EINVAL;
  2641. }
  2642. break;
  2643. }
  2644. /* fall through to get support */
  2645. case e1000_82571:
  2646. case e1000_82572:
  2647. case e1000_80003es2lan:
  2648. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2649. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2650. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2651. return -EINVAL;
  2652. }
  2653. break;
  2654. default:
  2655. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2656. break;
  2657. }
  2658. /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2659. * means we reserve 2 more, this pushes us to allocate from the next
  2660. * larger slab size
  2661. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2662. if (max_frame <= E1000_RXBUFFER_256)
  2663. adapter->rx_buffer_len = E1000_RXBUFFER_256;
  2664. else if (max_frame <= E1000_RXBUFFER_512)
  2665. adapter->rx_buffer_len = E1000_RXBUFFER_512;
  2666. else if (max_frame <= E1000_RXBUFFER_1024)
  2667. adapter->rx_buffer_len = E1000_RXBUFFER_1024;
  2668. else if (max_frame <= E1000_RXBUFFER_2048)
  2669. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2670. else if (max_frame <= E1000_RXBUFFER_4096)
  2671. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2672. else if (max_frame <= E1000_RXBUFFER_8192)
  2673. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2674. else if (max_frame <= E1000_RXBUFFER_16384)
  2675. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2676. /* adjust allocation if LPE protects us, and we aren't using SBP */
  2677. if (!adapter->hw.tbi_compatibility_on &&
  2678. ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
  2679. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  2680. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  2681. netdev->mtu = new_mtu;
  2682. if (netif_running(netdev))
  2683. e1000_reinit_locked(adapter);
  2684. adapter->hw.max_frame_size = max_frame;
  2685. return 0;
  2686. }
  2687. /**
  2688. * e1000_update_stats - Update the board statistics counters
  2689. * @adapter: board private structure
  2690. **/
  2691. void
  2692. e1000_update_stats(struct e1000_adapter *adapter)
  2693. {
  2694. struct e1000_hw *hw = &adapter->hw;
  2695. struct pci_dev *pdev = adapter->pdev;
  2696. unsigned long flags;
  2697. uint16_t phy_tmp;
  2698. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2699. /*
  2700. * Prevent stats update while adapter is being reset, or if the pci
  2701. * connection is down.
  2702. */
  2703. if (adapter->link_speed == 0)
  2704. return;
  2705. if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
  2706. return;
  2707. spin_lock_irqsave(&adapter->stats_lock, flags);
  2708. /* these counters are modified from e1000_adjust_tbi_stats,
  2709. * called from the interrupt context, so they must only
  2710. * be written while holding adapter->stats_lock
  2711. */
  2712. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2713. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2714. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2715. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2716. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2717. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2718. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2719. if (adapter->hw.mac_type != e1000_ich8lan) {
  2720. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2721. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2722. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2723. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2724. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2725. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2726. }
  2727. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2728. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2729. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2730. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2731. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2732. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2733. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2734. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2735. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2736. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2737. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2738. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2739. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2740. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2741. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2742. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2743. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2744. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2745. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2746. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2747. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2748. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2749. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2750. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2751. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2752. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2753. if (adapter->hw.mac_type != e1000_ich8lan) {
  2754. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2755. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2756. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2757. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2758. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2759. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2760. }
  2761. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2762. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2763. /* used for adaptive IFS */
  2764. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2765. adapter->stats.tpt += hw->tx_packet_delta;
  2766. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2767. adapter->stats.colc += hw->collision_delta;
  2768. if (hw->mac_type >= e1000_82543) {
  2769. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2770. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2771. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2772. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2773. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2774. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2775. }
  2776. if (hw->mac_type > e1000_82547_rev_2) {
  2777. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2778. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2779. if (adapter->hw.mac_type != e1000_ich8lan) {
  2780. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2781. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2782. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2783. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2784. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2785. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2786. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2787. }
  2788. }
  2789. /* Fill out the OS statistics structure */
  2790. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2791. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2792. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2793. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2794. adapter->net_stats.multicast = adapter->stats.mprc;
  2795. adapter->net_stats.collisions = adapter->stats.colc;
  2796. /* Rx Errors */
  2797. /* RLEC on some newer hardware can be incorrect so build
  2798. * our own version based on RUC and ROC */
  2799. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2800. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2801. adapter->stats.ruc + adapter->stats.roc +
  2802. adapter->stats.cexterr;
  2803. adapter->net_stats.rx_length_errors = adapter->stats.ruc +
  2804. adapter->stats.roc;
  2805. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2806. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2807. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2808. /* Tx Errors */
  2809. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2810. adapter->stats.latecol;
  2811. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2812. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2813. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2814. /* Tx Dropped needs to be maintained elsewhere */
  2815. /* Phy Stats */
  2816. if (hw->media_type == e1000_media_type_copper) {
  2817. if ((adapter->link_speed == SPEED_1000) &&
  2818. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2819. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2820. adapter->phy_stats.idle_errors += phy_tmp;
  2821. }
  2822. if ((hw->mac_type <= e1000_82546) &&
  2823. (hw->phy_type == e1000_phy_m88) &&
  2824. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2825. adapter->phy_stats.receive_errors += phy_tmp;
  2826. }
  2827. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2828. }
  2829. /**
  2830. * e1000_intr - Interrupt Handler
  2831. * @irq: interrupt number
  2832. * @data: pointer to a network interface device structure
  2833. * @pt_regs: CPU registers structure
  2834. **/
  2835. static irqreturn_t
  2836. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2837. {
  2838. struct net_device *netdev = data;
  2839. struct e1000_adapter *adapter = netdev_priv(netdev);
  2840. struct e1000_hw *hw = &adapter->hw;
  2841. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2842. #ifndef CONFIG_E1000_NAPI
  2843. int i;
  2844. #else
  2845. /* Interrupt Auto-Mask...upon reading ICR,
  2846. * interrupts are masked. No need for the
  2847. * IMC write, but it does mean we should
  2848. * account for it ASAP. */
  2849. if (likely(hw->mac_type >= e1000_82571))
  2850. atomic_inc(&adapter->irq_sem);
  2851. #endif
  2852. if (unlikely(!icr)) {
  2853. #ifdef CONFIG_E1000_NAPI
  2854. if (hw->mac_type >= e1000_82571)
  2855. e1000_irq_enable(adapter);
  2856. #endif
  2857. return IRQ_NONE; /* Not our interrupt */
  2858. }
  2859. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2860. hw->get_link_status = 1;
  2861. /* 80003ES2LAN workaround--
  2862. * For packet buffer work-around on link down event;
  2863. * disable receives here in the ISR and
  2864. * reset adapter in watchdog
  2865. */
  2866. if (netif_carrier_ok(netdev) &&
  2867. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2868. /* disable receives */
  2869. rctl = E1000_READ_REG(hw, RCTL);
  2870. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2871. }
  2872. mod_timer(&adapter->watchdog_timer, jiffies);
  2873. }
  2874. #ifdef CONFIG_E1000_NAPI
  2875. if (unlikely(hw->mac_type < e1000_82571)) {
  2876. atomic_inc(&adapter->irq_sem);
  2877. E1000_WRITE_REG(hw, IMC, ~0);
  2878. E1000_WRITE_FLUSH(hw);
  2879. }
  2880. if (likely(netif_rx_schedule_prep(netdev)))
  2881. __netif_rx_schedule(netdev);
  2882. else
  2883. e1000_irq_enable(adapter);
  2884. #else
  2885. /* Writing IMC and IMS is needed for 82547.
  2886. * Due to Hub Link bus being occupied, an interrupt
  2887. * de-assertion message is not able to be sent.
  2888. * When an interrupt assertion message is generated later,
  2889. * two messages are re-ordered and sent out.
  2890. * That causes APIC to think 82547 is in de-assertion
  2891. * state, while 82547 is in assertion state, resulting
  2892. * in dead lock. Writing IMC forces 82547 into
  2893. * de-assertion state.
  2894. */
  2895. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2896. atomic_inc(&adapter->irq_sem);
  2897. E1000_WRITE_REG(hw, IMC, ~0);
  2898. }
  2899. for (i = 0; i < E1000_MAX_INTR; i++)
  2900. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2901. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2902. break;
  2903. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2904. e1000_irq_enable(adapter);
  2905. #endif
  2906. return IRQ_HANDLED;
  2907. }
  2908. #ifdef CONFIG_E1000_NAPI
  2909. /**
  2910. * e1000_clean - NAPI Rx polling callback
  2911. * @adapter: board private structure
  2912. **/
  2913. static int
  2914. e1000_clean(struct net_device *poll_dev, int *budget)
  2915. {
  2916. struct e1000_adapter *adapter;
  2917. int work_to_do = min(*budget, poll_dev->quota);
  2918. int tx_cleaned = 0, work_done = 0;
  2919. /* Must NOT use netdev_priv macro here. */
  2920. adapter = poll_dev->priv;
  2921. /* Keep link state information with original netdev */
  2922. if (!netif_carrier_ok(poll_dev))
  2923. goto quit_polling;
  2924. /* e1000_clean is called per-cpu. This lock protects
  2925. * tx_ring[0] from being cleaned by multiple cpus
  2926. * simultaneously. A failure obtaining the lock means
  2927. * tx_ring[0] is currently being cleaned anyway. */
  2928. if (spin_trylock(&adapter->tx_queue_lock)) {
  2929. tx_cleaned = e1000_clean_tx_irq(adapter,
  2930. &adapter->tx_ring[0]);
  2931. spin_unlock(&adapter->tx_queue_lock);
  2932. }
  2933. adapter->clean_rx(adapter, &adapter->rx_ring[0],
  2934. &work_done, work_to_do);
  2935. *budget -= work_done;
  2936. poll_dev->quota -= work_done;
  2937. /* If no Tx and not enough Rx work done, exit the polling mode */
  2938. if ((!tx_cleaned && (work_done == 0)) ||
  2939. !netif_running(poll_dev)) {
  2940. quit_polling:
  2941. netif_rx_complete(poll_dev);
  2942. e1000_irq_enable(adapter);
  2943. return 0;
  2944. }
  2945. return 1;
  2946. }
  2947. #endif
  2948. /**
  2949. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2950. * @adapter: board private structure
  2951. **/
  2952. static boolean_t
  2953. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2954. struct e1000_tx_ring *tx_ring)
  2955. {
  2956. struct net_device *netdev = adapter->netdev;
  2957. struct e1000_tx_desc *tx_desc, *eop_desc;
  2958. struct e1000_buffer *buffer_info;
  2959. unsigned int i, eop;
  2960. #ifdef CONFIG_E1000_NAPI
  2961. unsigned int count = 0;
  2962. #endif
  2963. boolean_t cleaned = FALSE;
  2964. i = tx_ring->next_to_clean;
  2965. eop = tx_ring->buffer_info[i].next_to_watch;
  2966. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2967. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2968. for (cleaned = FALSE; !cleaned; ) {
  2969. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2970. buffer_info = &tx_ring->buffer_info[i];
  2971. cleaned = (i == eop);
  2972. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2973. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2974. if (unlikely(++i == tx_ring->count)) i = 0;
  2975. }
  2976. eop = tx_ring->buffer_info[i].next_to_watch;
  2977. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2978. #ifdef CONFIG_E1000_NAPI
  2979. #define E1000_TX_WEIGHT 64
  2980. /* weight of a sort for tx, to avoid endless transmit cleanup */
  2981. if (count++ == E1000_TX_WEIGHT) break;
  2982. #endif
  2983. }
  2984. tx_ring->next_to_clean = i;
  2985. #define TX_WAKE_THRESHOLD 32
  2986. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2987. netif_carrier_ok(netdev))) {
  2988. spin_lock(&tx_ring->tx_lock);
  2989. if (netif_queue_stopped(netdev) &&
  2990. (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
  2991. netif_wake_queue(netdev);
  2992. spin_unlock(&tx_ring->tx_lock);
  2993. }
  2994. if (adapter->detect_tx_hung) {
  2995. /* Detect a transmit hang in hardware, this serializes the
  2996. * check with the clearing of time_stamp and movement of i */
  2997. adapter->detect_tx_hung = FALSE;
  2998. if (tx_ring->buffer_info[eop].dma &&
  2999. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  3000. (adapter->tx_timeout_factor * HZ))
  3001. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  3002. E1000_STATUS_TXOFF)) {
  3003. /* detected Tx unit hang */
  3004. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  3005. " Tx Queue <%lu>\n"
  3006. " TDH <%x>\n"
  3007. " TDT <%x>\n"
  3008. " next_to_use <%x>\n"
  3009. " next_to_clean <%x>\n"
  3010. "buffer_info[next_to_clean]\n"
  3011. " time_stamp <%lx>\n"
  3012. " next_to_watch <%x>\n"
  3013. " jiffies <%lx>\n"
  3014. " next_to_watch.status <%x>\n",
  3015. (unsigned long)((tx_ring - adapter->tx_ring) /
  3016. sizeof(struct e1000_tx_ring)),
  3017. readl(adapter->hw.hw_addr + tx_ring->tdh),
  3018. readl(adapter->hw.hw_addr + tx_ring->tdt),
  3019. tx_ring->next_to_use,
  3020. tx_ring->next_to_clean,
  3021. tx_ring->buffer_info[eop].time_stamp,
  3022. eop,
  3023. jiffies,
  3024. eop_desc->upper.fields.status);
  3025. netif_stop_queue(netdev);
  3026. }
  3027. }
  3028. return cleaned;
  3029. }
  3030. /**
  3031. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3032. * @adapter: board private structure
  3033. * @status_err: receive descriptor status and error fields
  3034. * @csum: receive descriptor csum field
  3035. * @sk_buff: socket buffer with received data
  3036. **/
  3037. static void
  3038. e1000_rx_checksum(struct e1000_adapter *adapter,
  3039. uint32_t status_err, uint32_t csum,
  3040. struct sk_buff *skb)
  3041. {
  3042. uint16_t status = (uint16_t)status_err;
  3043. uint8_t errors = (uint8_t)(status_err >> 24);
  3044. skb->ip_summed = CHECKSUM_NONE;
  3045. /* 82543 or newer only */
  3046. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  3047. /* Ignore Checksum bit is set */
  3048. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  3049. /* TCP/UDP checksum error bit is set */
  3050. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3051. /* let the stack verify checksum errors */
  3052. adapter->hw_csum_err++;
  3053. return;
  3054. }
  3055. /* TCP/UDP Checksum has not been calculated */
  3056. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  3057. if (!(status & E1000_RXD_STAT_TCPCS))
  3058. return;
  3059. } else {
  3060. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  3061. return;
  3062. }
  3063. /* It must be a TCP or UDP packet with a valid checksum */
  3064. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3065. /* TCP checksum is good */
  3066. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3067. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  3068. /* IP fragment with UDP payload */
  3069. /* Hardware complements the payload checksum, so we undo it
  3070. * and then put the value in host order for further stack use.
  3071. */
  3072. csum = ntohl(csum ^ 0xFFFF);
  3073. skb->csum = csum;
  3074. skb->ip_summed = CHECKSUM_HW;
  3075. }
  3076. adapter->hw_csum_good++;
  3077. }
  3078. /**
  3079. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3080. * @adapter: board private structure
  3081. **/
  3082. static boolean_t
  3083. #ifdef CONFIG_E1000_NAPI
  3084. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3085. struct e1000_rx_ring *rx_ring,
  3086. int *work_done, int work_to_do)
  3087. #else
  3088. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3089. struct e1000_rx_ring *rx_ring)
  3090. #endif
  3091. {
  3092. struct net_device *netdev = adapter->netdev;
  3093. struct pci_dev *pdev = adapter->pdev;
  3094. struct e1000_rx_desc *rx_desc, *next_rxd;
  3095. struct e1000_buffer *buffer_info, *next_buffer;
  3096. unsigned long flags;
  3097. uint32_t length;
  3098. uint8_t last_byte;
  3099. unsigned int i;
  3100. int cleaned_count = 0;
  3101. boolean_t cleaned = FALSE;
  3102. i = rx_ring->next_to_clean;
  3103. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3104. buffer_info = &rx_ring->buffer_info[i];
  3105. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3106. struct sk_buff *skb;
  3107. u8 status;
  3108. #ifdef CONFIG_E1000_NAPI
  3109. if (*work_done >= work_to_do)
  3110. break;
  3111. (*work_done)++;
  3112. #endif
  3113. status = rx_desc->status;
  3114. skb = buffer_info->skb;
  3115. buffer_info->skb = NULL;
  3116. prefetch(skb->data - NET_IP_ALIGN);
  3117. if (++i == rx_ring->count) i = 0;
  3118. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3119. prefetch(next_rxd);
  3120. next_buffer = &rx_ring->buffer_info[i];
  3121. cleaned = TRUE;
  3122. cleaned_count++;
  3123. pci_unmap_single(pdev,
  3124. buffer_info->dma,
  3125. buffer_info->length,
  3126. PCI_DMA_FROMDEVICE);
  3127. length = le16_to_cpu(rx_desc->length);
  3128. /* adjust length to remove Ethernet CRC */
  3129. length -= 4;
  3130. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3131. /* All receives must fit into a single buffer */
  3132. E1000_DBG("%s: Receive packet consumed multiple"
  3133. " buffers\n", netdev->name);
  3134. /* recycle */
  3135. buffer_info-> skb = skb;
  3136. goto next_desc;
  3137. }
  3138. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3139. last_byte = *(skb->data + length - 1);
  3140. if (TBI_ACCEPT(&adapter->hw, status,
  3141. rx_desc->errors, length, last_byte)) {
  3142. spin_lock_irqsave(&adapter->stats_lock, flags);
  3143. e1000_tbi_adjust_stats(&adapter->hw,
  3144. &adapter->stats,
  3145. length, skb->data);
  3146. spin_unlock_irqrestore(&adapter->stats_lock,
  3147. flags);
  3148. length--;
  3149. } else {
  3150. /* recycle */
  3151. buffer_info->skb = skb;
  3152. goto next_desc;
  3153. }
  3154. }
  3155. /* code added for copybreak, this should improve
  3156. * performance for small packets with large amounts
  3157. * of reassembly being done in the stack */
  3158. #define E1000_CB_LENGTH 256
  3159. if (length < E1000_CB_LENGTH) {
  3160. struct sk_buff *new_skb =
  3161. netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
  3162. if (new_skb) {
  3163. skb_reserve(new_skb, NET_IP_ALIGN);
  3164. new_skb->dev = netdev;
  3165. memcpy(new_skb->data - NET_IP_ALIGN,
  3166. skb->data - NET_IP_ALIGN,
  3167. length + NET_IP_ALIGN);
  3168. /* save the skb in buffer_info as good */
  3169. buffer_info->skb = skb;
  3170. skb = new_skb;
  3171. skb_put(skb, length);
  3172. }
  3173. } else
  3174. skb_put(skb, length);
  3175. /* end copybreak code */
  3176. /* Receive Checksum Offload */
  3177. e1000_rx_checksum(adapter,
  3178. (uint32_t)(status) |
  3179. ((uint32_t)(rx_desc->errors) << 24),
  3180. le16_to_cpu(rx_desc->csum), skb);
  3181. skb->protocol = eth_type_trans(skb, netdev);
  3182. #ifdef CONFIG_E1000_NAPI
  3183. if (unlikely(adapter->vlgrp &&
  3184. (status & E1000_RXD_STAT_VP))) {
  3185. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3186. le16_to_cpu(rx_desc->special) &
  3187. E1000_RXD_SPC_VLAN_MASK);
  3188. } else {
  3189. netif_receive_skb(skb);
  3190. }
  3191. #else /* CONFIG_E1000_NAPI */
  3192. if (unlikely(adapter->vlgrp &&
  3193. (status & E1000_RXD_STAT_VP))) {
  3194. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3195. le16_to_cpu(rx_desc->special) &
  3196. E1000_RXD_SPC_VLAN_MASK);
  3197. } else {
  3198. netif_rx(skb);
  3199. }
  3200. #endif /* CONFIG_E1000_NAPI */
  3201. netdev->last_rx = jiffies;
  3202. next_desc:
  3203. rx_desc->status = 0;
  3204. /* return some buffers to hardware, one at a time is too slow */
  3205. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3206. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3207. cleaned_count = 0;
  3208. }
  3209. /* use prefetched values */
  3210. rx_desc = next_rxd;
  3211. buffer_info = next_buffer;
  3212. }
  3213. rx_ring->next_to_clean = i;
  3214. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3215. if (cleaned_count)
  3216. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3217. return cleaned;
  3218. }
  3219. /**
  3220. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3221. * @adapter: board private structure
  3222. **/
  3223. static boolean_t
  3224. #ifdef CONFIG_E1000_NAPI
  3225. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3226. struct e1000_rx_ring *rx_ring,
  3227. int *work_done, int work_to_do)
  3228. #else
  3229. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3230. struct e1000_rx_ring *rx_ring)
  3231. #endif
  3232. {
  3233. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3234. struct net_device *netdev = adapter->netdev;
  3235. struct pci_dev *pdev = adapter->pdev;
  3236. struct e1000_buffer *buffer_info, *next_buffer;
  3237. struct e1000_ps_page *ps_page;
  3238. struct e1000_ps_page_dma *ps_page_dma;
  3239. struct sk_buff *skb;
  3240. unsigned int i, j;
  3241. uint32_t length, staterr;
  3242. int cleaned_count = 0;
  3243. boolean_t cleaned = FALSE;
  3244. i = rx_ring->next_to_clean;
  3245. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3246. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3247. buffer_info = &rx_ring->buffer_info[i];
  3248. while (staterr & E1000_RXD_STAT_DD) {
  3249. ps_page = &rx_ring->ps_page[i];
  3250. ps_page_dma = &rx_ring->ps_page_dma[i];
  3251. #ifdef CONFIG_E1000_NAPI
  3252. if (unlikely(*work_done >= work_to_do))
  3253. break;
  3254. (*work_done)++;
  3255. #endif
  3256. skb = buffer_info->skb;
  3257. /* in the packet split case this is header only */
  3258. prefetch(skb->data - NET_IP_ALIGN);
  3259. if (++i == rx_ring->count) i = 0;
  3260. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3261. prefetch(next_rxd);
  3262. next_buffer = &rx_ring->buffer_info[i];
  3263. cleaned = TRUE;
  3264. cleaned_count++;
  3265. pci_unmap_single(pdev, buffer_info->dma,
  3266. buffer_info->length,
  3267. PCI_DMA_FROMDEVICE);
  3268. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3269. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3270. " the full packet\n", netdev->name);
  3271. dev_kfree_skb_irq(skb);
  3272. goto next_desc;
  3273. }
  3274. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3275. dev_kfree_skb_irq(skb);
  3276. goto next_desc;
  3277. }
  3278. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3279. if (unlikely(!length)) {
  3280. E1000_DBG("%s: Last part of the packet spanning"
  3281. " multiple descriptors\n", netdev->name);
  3282. dev_kfree_skb_irq(skb);
  3283. goto next_desc;
  3284. }
  3285. /* Good Receive */
  3286. skb_put(skb, length);
  3287. {
  3288. /* this looks ugly, but it seems compiler issues make it
  3289. more efficient than reusing j */
  3290. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3291. /* page alloc/put takes too long and effects small packet
  3292. * throughput, so unsplit small packets and save the alloc/put*/
  3293. if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
  3294. u8 *vaddr;
  3295. /* there is no documentation about how to call
  3296. * kmap_atomic, so we can't hold the mapping
  3297. * very long */
  3298. pci_dma_sync_single_for_cpu(pdev,
  3299. ps_page_dma->ps_page_dma[0],
  3300. PAGE_SIZE,
  3301. PCI_DMA_FROMDEVICE);
  3302. vaddr = kmap_atomic(ps_page->ps_page[0],
  3303. KM_SKB_DATA_SOFTIRQ);
  3304. memcpy(skb->tail, vaddr, l1);
  3305. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3306. pci_dma_sync_single_for_device(pdev,
  3307. ps_page_dma->ps_page_dma[0],
  3308. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3309. /* remove the CRC */
  3310. l1 -= 4;
  3311. skb_put(skb, l1);
  3312. goto copydone;
  3313. } /* if */
  3314. }
  3315. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3316. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3317. break;
  3318. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3319. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3320. ps_page_dma->ps_page_dma[j] = 0;
  3321. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3322. length);
  3323. ps_page->ps_page[j] = NULL;
  3324. skb->len += length;
  3325. skb->data_len += length;
  3326. skb->truesize += length;
  3327. }
  3328. /* strip the ethernet crc, problem is we're using pages now so
  3329. * this whole operation can get a little cpu intensive */
  3330. pskb_trim(skb, skb->len - 4);
  3331. copydone:
  3332. e1000_rx_checksum(adapter, staterr,
  3333. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3334. skb->protocol = eth_type_trans(skb, netdev);
  3335. if (likely(rx_desc->wb.upper.header_status &
  3336. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3337. adapter->rx_hdr_split++;
  3338. #ifdef CONFIG_E1000_NAPI
  3339. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3340. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3341. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3342. E1000_RXD_SPC_VLAN_MASK);
  3343. } else {
  3344. netif_receive_skb(skb);
  3345. }
  3346. #else /* CONFIG_E1000_NAPI */
  3347. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3348. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3349. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3350. E1000_RXD_SPC_VLAN_MASK);
  3351. } else {
  3352. netif_rx(skb);
  3353. }
  3354. #endif /* CONFIG_E1000_NAPI */
  3355. netdev->last_rx = jiffies;
  3356. next_desc:
  3357. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3358. buffer_info->skb = NULL;
  3359. /* return some buffers to hardware, one at a time is too slow */
  3360. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3361. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3362. cleaned_count = 0;
  3363. }
  3364. /* use prefetched values */
  3365. rx_desc = next_rxd;
  3366. buffer_info = next_buffer;
  3367. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3368. }
  3369. rx_ring->next_to_clean = i;
  3370. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3371. if (cleaned_count)
  3372. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3373. return cleaned;
  3374. }
  3375. /**
  3376. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3377. * @adapter: address of board private structure
  3378. **/
  3379. static void
  3380. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3381. struct e1000_rx_ring *rx_ring,
  3382. int cleaned_count)
  3383. {
  3384. struct net_device *netdev = adapter->netdev;
  3385. struct pci_dev *pdev = adapter->pdev;
  3386. struct e1000_rx_desc *rx_desc;
  3387. struct e1000_buffer *buffer_info;
  3388. struct sk_buff *skb;
  3389. unsigned int i;
  3390. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3391. i = rx_ring->next_to_use;
  3392. buffer_info = &rx_ring->buffer_info[i];
  3393. while (cleaned_count--) {
  3394. if (!(skb = buffer_info->skb))
  3395. skb = netdev_alloc_skb(netdev, bufsz);
  3396. else {
  3397. skb_trim(skb, 0);
  3398. goto map_skb;
  3399. }
  3400. if (unlikely(!skb)) {
  3401. /* Better luck next round */
  3402. adapter->alloc_rx_buff_failed++;
  3403. break;
  3404. }
  3405. /* Fix for errata 23, can't cross 64kB boundary */
  3406. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3407. struct sk_buff *oldskb = skb;
  3408. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3409. "at %p\n", bufsz, skb->data);
  3410. /* Try again, without freeing the previous */
  3411. skb = netdev_alloc_skb(netdev, bufsz);
  3412. /* Failed allocation, critical failure */
  3413. if (!skb) {
  3414. dev_kfree_skb(oldskb);
  3415. break;
  3416. }
  3417. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3418. /* give up */
  3419. dev_kfree_skb(skb);
  3420. dev_kfree_skb(oldskb);
  3421. break; /* while !buffer_info->skb */
  3422. } else {
  3423. /* Use new allocation */
  3424. dev_kfree_skb(oldskb);
  3425. }
  3426. }
  3427. /* Make buffer alignment 2 beyond a 16 byte boundary
  3428. * this will result in a 16 byte aligned IP header after
  3429. * the 14 byte MAC header is removed
  3430. */
  3431. skb_reserve(skb, NET_IP_ALIGN);
  3432. skb->dev = netdev;
  3433. buffer_info->skb = skb;
  3434. buffer_info->length = adapter->rx_buffer_len;
  3435. map_skb:
  3436. buffer_info->dma = pci_map_single(pdev,
  3437. skb->data,
  3438. adapter->rx_buffer_len,
  3439. PCI_DMA_FROMDEVICE);
  3440. /* Fix for errata 23, can't cross 64kB boundary */
  3441. if (!e1000_check_64k_bound(adapter,
  3442. (void *)(unsigned long)buffer_info->dma,
  3443. adapter->rx_buffer_len)) {
  3444. DPRINTK(RX_ERR, ERR,
  3445. "dma align check failed: %u bytes at %p\n",
  3446. adapter->rx_buffer_len,
  3447. (void *)(unsigned long)buffer_info->dma);
  3448. dev_kfree_skb(skb);
  3449. buffer_info->skb = NULL;
  3450. pci_unmap_single(pdev, buffer_info->dma,
  3451. adapter->rx_buffer_len,
  3452. PCI_DMA_FROMDEVICE);
  3453. break; /* while !buffer_info->skb */
  3454. }
  3455. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3456. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3457. if (unlikely(++i == rx_ring->count))
  3458. i = 0;
  3459. buffer_info = &rx_ring->buffer_info[i];
  3460. }
  3461. if (likely(rx_ring->next_to_use != i)) {
  3462. rx_ring->next_to_use = i;
  3463. if (unlikely(i-- == 0))
  3464. i = (rx_ring->count - 1);
  3465. /* Force memory writes to complete before letting h/w
  3466. * know there are new descriptors to fetch. (Only
  3467. * applicable for weak-ordered memory model archs,
  3468. * such as IA-64). */
  3469. wmb();
  3470. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3471. }
  3472. }
  3473. /**
  3474. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3475. * @adapter: address of board private structure
  3476. **/
  3477. static void
  3478. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3479. struct e1000_rx_ring *rx_ring,
  3480. int cleaned_count)
  3481. {
  3482. struct net_device *netdev = adapter->netdev;
  3483. struct pci_dev *pdev = adapter->pdev;
  3484. union e1000_rx_desc_packet_split *rx_desc;
  3485. struct e1000_buffer *buffer_info;
  3486. struct e1000_ps_page *ps_page;
  3487. struct e1000_ps_page_dma *ps_page_dma;
  3488. struct sk_buff *skb;
  3489. unsigned int i, j;
  3490. i = rx_ring->next_to_use;
  3491. buffer_info = &rx_ring->buffer_info[i];
  3492. ps_page = &rx_ring->ps_page[i];
  3493. ps_page_dma = &rx_ring->ps_page_dma[i];
  3494. while (cleaned_count--) {
  3495. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3496. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3497. if (j < adapter->rx_ps_pages) {
  3498. if (likely(!ps_page->ps_page[j])) {
  3499. ps_page->ps_page[j] =
  3500. alloc_page(GFP_ATOMIC);
  3501. if (unlikely(!ps_page->ps_page[j])) {
  3502. adapter->alloc_rx_buff_failed++;
  3503. goto no_buffers;
  3504. }
  3505. ps_page_dma->ps_page_dma[j] =
  3506. pci_map_page(pdev,
  3507. ps_page->ps_page[j],
  3508. 0, PAGE_SIZE,
  3509. PCI_DMA_FROMDEVICE);
  3510. }
  3511. /* Refresh the desc even if buffer_addrs didn't
  3512. * change because each write-back erases
  3513. * this info.
  3514. */
  3515. rx_desc->read.buffer_addr[j+1] =
  3516. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3517. } else
  3518. rx_desc->read.buffer_addr[j+1] = ~0;
  3519. }
  3520. skb = netdev_alloc_skb(netdev,
  3521. adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3522. if (unlikely(!skb)) {
  3523. adapter->alloc_rx_buff_failed++;
  3524. break;
  3525. }
  3526. /* Make buffer alignment 2 beyond a 16 byte boundary
  3527. * this will result in a 16 byte aligned IP header after
  3528. * the 14 byte MAC header is removed
  3529. */
  3530. skb_reserve(skb, NET_IP_ALIGN);
  3531. skb->dev = netdev;
  3532. buffer_info->skb = skb;
  3533. buffer_info->length = adapter->rx_ps_bsize0;
  3534. buffer_info->dma = pci_map_single(pdev, skb->data,
  3535. adapter->rx_ps_bsize0,
  3536. PCI_DMA_FROMDEVICE);
  3537. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3538. if (unlikely(++i == rx_ring->count)) i = 0;
  3539. buffer_info = &rx_ring->buffer_info[i];
  3540. ps_page = &rx_ring->ps_page[i];
  3541. ps_page_dma = &rx_ring->ps_page_dma[i];
  3542. }
  3543. no_buffers:
  3544. if (likely(rx_ring->next_to_use != i)) {
  3545. rx_ring->next_to_use = i;
  3546. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3547. /* Force memory writes to complete before letting h/w
  3548. * know there are new descriptors to fetch. (Only
  3549. * applicable for weak-ordered memory model archs,
  3550. * such as IA-64). */
  3551. wmb();
  3552. /* Hardware increments by 16 bytes, but packet split
  3553. * descriptors are 32 bytes...so we increment tail
  3554. * twice as much.
  3555. */
  3556. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3557. }
  3558. }
  3559. /**
  3560. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3561. * @adapter:
  3562. **/
  3563. static void
  3564. e1000_smartspeed(struct e1000_adapter *adapter)
  3565. {
  3566. uint16_t phy_status;
  3567. uint16_t phy_ctrl;
  3568. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3569. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3570. return;
  3571. if (adapter->smartspeed == 0) {
  3572. /* If Master/Slave config fault is asserted twice,
  3573. * we assume back-to-back */
  3574. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3575. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3576. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3577. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3578. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3579. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3580. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3581. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3582. phy_ctrl);
  3583. adapter->smartspeed++;
  3584. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3585. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3586. &phy_ctrl)) {
  3587. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3588. MII_CR_RESTART_AUTO_NEG);
  3589. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3590. phy_ctrl);
  3591. }
  3592. }
  3593. return;
  3594. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3595. /* If still no link, perhaps using 2/3 pair cable */
  3596. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3597. phy_ctrl |= CR_1000T_MS_ENABLE;
  3598. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3599. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3600. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3601. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3602. MII_CR_RESTART_AUTO_NEG);
  3603. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3604. }
  3605. }
  3606. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3607. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3608. adapter->smartspeed = 0;
  3609. }
  3610. /**
  3611. * e1000_ioctl -
  3612. * @netdev:
  3613. * @ifreq:
  3614. * @cmd:
  3615. **/
  3616. static int
  3617. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3618. {
  3619. switch (cmd) {
  3620. case SIOCGMIIPHY:
  3621. case SIOCGMIIREG:
  3622. case SIOCSMIIREG:
  3623. return e1000_mii_ioctl(netdev, ifr, cmd);
  3624. default:
  3625. return -EOPNOTSUPP;
  3626. }
  3627. }
  3628. /**
  3629. * e1000_mii_ioctl -
  3630. * @netdev:
  3631. * @ifreq:
  3632. * @cmd:
  3633. **/
  3634. static int
  3635. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3636. {
  3637. struct e1000_adapter *adapter = netdev_priv(netdev);
  3638. struct mii_ioctl_data *data = if_mii(ifr);
  3639. int retval;
  3640. uint16_t mii_reg;
  3641. uint16_t spddplx;
  3642. unsigned long flags;
  3643. if (adapter->hw.media_type != e1000_media_type_copper)
  3644. return -EOPNOTSUPP;
  3645. switch (cmd) {
  3646. case SIOCGMIIPHY:
  3647. data->phy_id = adapter->hw.phy_addr;
  3648. break;
  3649. case SIOCGMIIREG:
  3650. if (!capable(CAP_NET_ADMIN))
  3651. return -EPERM;
  3652. spin_lock_irqsave(&adapter->stats_lock, flags);
  3653. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3654. &data->val_out)) {
  3655. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3656. return -EIO;
  3657. }
  3658. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3659. break;
  3660. case SIOCSMIIREG:
  3661. if (!capable(CAP_NET_ADMIN))
  3662. return -EPERM;
  3663. if (data->reg_num & ~(0x1F))
  3664. return -EFAULT;
  3665. mii_reg = data->val_in;
  3666. spin_lock_irqsave(&adapter->stats_lock, flags);
  3667. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3668. mii_reg)) {
  3669. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3670. return -EIO;
  3671. }
  3672. if (adapter->hw.media_type == e1000_media_type_copper) {
  3673. switch (data->reg_num) {
  3674. case PHY_CTRL:
  3675. if (mii_reg & MII_CR_POWER_DOWN)
  3676. break;
  3677. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3678. adapter->hw.autoneg = 1;
  3679. adapter->hw.autoneg_advertised = 0x2F;
  3680. } else {
  3681. if (mii_reg & 0x40)
  3682. spddplx = SPEED_1000;
  3683. else if (mii_reg & 0x2000)
  3684. spddplx = SPEED_100;
  3685. else
  3686. spddplx = SPEED_10;
  3687. spddplx += (mii_reg & 0x100)
  3688. ? DUPLEX_FULL :
  3689. DUPLEX_HALF;
  3690. retval = e1000_set_spd_dplx(adapter,
  3691. spddplx);
  3692. if (retval) {
  3693. spin_unlock_irqrestore(
  3694. &adapter->stats_lock,
  3695. flags);
  3696. return retval;
  3697. }
  3698. }
  3699. if (netif_running(adapter->netdev))
  3700. e1000_reinit_locked(adapter);
  3701. else
  3702. e1000_reset(adapter);
  3703. break;
  3704. case M88E1000_PHY_SPEC_CTRL:
  3705. case M88E1000_EXT_PHY_SPEC_CTRL:
  3706. if (e1000_phy_reset(&adapter->hw)) {
  3707. spin_unlock_irqrestore(
  3708. &adapter->stats_lock, flags);
  3709. return -EIO;
  3710. }
  3711. break;
  3712. }
  3713. } else {
  3714. switch (data->reg_num) {
  3715. case PHY_CTRL:
  3716. if (mii_reg & MII_CR_POWER_DOWN)
  3717. break;
  3718. if (netif_running(adapter->netdev))
  3719. e1000_reinit_locked(adapter);
  3720. else
  3721. e1000_reset(adapter);
  3722. break;
  3723. }
  3724. }
  3725. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3726. break;
  3727. default:
  3728. return -EOPNOTSUPP;
  3729. }
  3730. return E1000_SUCCESS;
  3731. }
  3732. void
  3733. e1000_pci_set_mwi(struct e1000_hw *hw)
  3734. {
  3735. struct e1000_adapter *adapter = hw->back;
  3736. int ret_val = pci_set_mwi(adapter->pdev);
  3737. if (ret_val)
  3738. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3739. }
  3740. void
  3741. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3742. {
  3743. struct e1000_adapter *adapter = hw->back;
  3744. pci_clear_mwi(adapter->pdev);
  3745. }
  3746. void
  3747. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3748. {
  3749. struct e1000_adapter *adapter = hw->back;
  3750. pci_read_config_word(adapter->pdev, reg, value);
  3751. }
  3752. void
  3753. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3754. {
  3755. struct e1000_adapter *adapter = hw->back;
  3756. pci_write_config_word(adapter->pdev, reg, *value);
  3757. }
  3758. uint32_t
  3759. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3760. {
  3761. return inl(port);
  3762. }
  3763. void
  3764. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3765. {
  3766. outl(value, port);
  3767. }
  3768. static void
  3769. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3770. {
  3771. struct e1000_adapter *adapter = netdev_priv(netdev);
  3772. uint32_t ctrl, rctl;
  3773. e1000_irq_disable(adapter);
  3774. adapter->vlgrp = grp;
  3775. if (grp) {
  3776. /* enable VLAN tag insert/strip */
  3777. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3778. ctrl |= E1000_CTRL_VME;
  3779. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3780. if (adapter->hw.mac_type != e1000_ich8lan) {
  3781. /* enable VLAN receive filtering */
  3782. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3783. rctl |= E1000_RCTL_VFE;
  3784. rctl &= ~E1000_RCTL_CFIEN;
  3785. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3786. e1000_update_mng_vlan(adapter);
  3787. }
  3788. } else {
  3789. /* disable VLAN tag insert/strip */
  3790. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3791. ctrl &= ~E1000_CTRL_VME;
  3792. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3793. if (adapter->hw.mac_type != e1000_ich8lan) {
  3794. /* disable VLAN filtering */
  3795. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3796. rctl &= ~E1000_RCTL_VFE;
  3797. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3798. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3799. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3800. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3801. }
  3802. }
  3803. }
  3804. e1000_irq_enable(adapter);
  3805. }
  3806. static void
  3807. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3808. {
  3809. struct e1000_adapter *adapter = netdev_priv(netdev);
  3810. uint32_t vfta, index;
  3811. if ((adapter->hw.mng_cookie.status &
  3812. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3813. (vid == adapter->mng_vlan_id))
  3814. return;
  3815. /* add VID to filter table */
  3816. index = (vid >> 5) & 0x7F;
  3817. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3818. vfta |= (1 << (vid & 0x1F));
  3819. e1000_write_vfta(&adapter->hw, index, vfta);
  3820. }
  3821. static void
  3822. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3823. {
  3824. struct e1000_adapter *adapter = netdev_priv(netdev);
  3825. uint32_t vfta, index;
  3826. e1000_irq_disable(adapter);
  3827. if (adapter->vlgrp)
  3828. adapter->vlgrp->vlan_devices[vid] = NULL;
  3829. e1000_irq_enable(adapter);
  3830. if ((adapter->hw.mng_cookie.status &
  3831. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3832. (vid == adapter->mng_vlan_id)) {
  3833. /* release control to f/w */
  3834. e1000_release_hw_control(adapter);
  3835. return;
  3836. }
  3837. /* remove VID from filter table */
  3838. index = (vid >> 5) & 0x7F;
  3839. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3840. vfta &= ~(1 << (vid & 0x1F));
  3841. e1000_write_vfta(&adapter->hw, index, vfta);
  3842. }
  3843. static void
  3844. e1000_restore_vlan(struct e1000_adapter *adapter)
  3845. {
  3846. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3847. if (adapter->vlgrp) {
  3848. uint16_t vid;
  3849. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3850. if (!adapter->vlgrp->vlan_devices[vid])
  3851. continue;
  3852. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3853. }
  3854. }
  3855. }
  3856. int
  3857. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3858. {
  3859. adapter->hw.autoneg = 0;
  3860. /* Fiber NICs only allow 1000 gbps Full duplex */
  3861. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3862. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3863. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3864. return -EINVAL;
  3865. }
  3866. switch (spddplx) {
  3867. case SPEED_10 + DUPLEX_HALF:
  3868. adapter->hw.forced_speed_duplex = e1000_10_half;
  3869. break;
  3870. case SPEED_10 + DUPLEX_FULL:
  3871. adapter->hw.forced_speed_duplex = e1000_10_full;
  3872. break;
  3873. case SPEED_100 + DUPLEX_HALF:
  3874. adapter->hw.forced_speed_duplex = e1000_100_half;
  3875. break;
  3876. case SPEED_100 + DUPLEX_FULL:
  3877. adapter->hw.forced_speed_duplex = e1000_100_full;
  3878. break;
  3879. case SPEED_1000 + DUPLEX_FULL:
  3880. adapter->hw.autoneg = 1;
  3881. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3882. break;
  3883. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3884. default:
  3885. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3886. return -EINVAL;
  3887. }
  3888. return 0;
  3889. }
  3890. #ifdef CONFIG_PM
  3891. /* Save/restore 16 or 64 dwords of PCI config space depending on which
  3892. * bus we're on (PCI(X) vs. PCI-E)
  3893. */
  3894. #define PCIE_CONFIG_SPACE_LEN 256
  3895. #define PCI_CONFIG_SPACE_LEN 64
  3896. static int
  3897. e1000_pci_save_state(struct e1000_adapter *adapter)
  3898. {
  3899. struct pci_dev *dev = adapter->pdev;
  3900. int size;
  3901. int i;
  3902. if (adapter->hw.mac_type >= e1000_82571)
  3903. size = PCIE_CONFIG_SPACE_LEN;
  3904. else
  3905. size = PCI_CONFIG_SPACE_LEN;
  3906. WARN_ON(adapter->config_space != NULL);
  3907. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3908. if (!adapter->config_space) {
  3909. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3910. return -ENOMEM;
  3911. }
  3912. for (i = 0; i < (size / 4); i++)
  3913. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3914. return 0;
  3915. }
  3916. static void
  3917. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3918. {
  3919. struct pci_dev *dev = adapter->pdev;
  3920. int size;
  3921. int i;
  3922. if (adapter->config_space == NULL)
  3923. return;
  3924. if (adapter->hw.mac_type >= e1000_82571)
  3925. size = PCIE_CONFIG_SPACE_LEN;
  3926. else
  3927. size = PCI_CONFIG_SPACE_LEN;
  3928. for (i = 0; i < (size / 4); i++)
  3929. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3930. kfree(adapter->config_space);
  3931. adapter->config_space = NULL;
  3932. return;
  3933. }
  3934. #endif /* CONFIG_PM */
  3935. static int
  3936. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3937. {
  3938. struct net_device *netdev = pci_get_drvdata(pdev);
  3939. struct e1000_adapter *adapter = netdev_priv(netdev);
  3940. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3941. uint32_t wufc = adapter->wol;
  3942. #ifdef CONFIG_PM
  3943. int retval = 0;
  3944. #endif
  3945. netif_device_detach(netdev);
  3946. if (netif_running(netdev)) {
  3947. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  3948. e1000_down(adapter);
  3949. }
  3950. #ifdef CONFIG_PM
  3951. /* Implement our own version of pci_save_state(pdev) because pci-
  3952. * express adapters have 256-byte config spaces. */
  3953. retval = e1000_pci_save_state(adapter);
  3954. if (retval)
  3955. return retval;
  3956. #endif
  3957. status = E1000_READ_REG(&adapter->hw, STATUS);
  3958. if (status & E1000_STATUS_LU)
  3959. wufc &= ~E1000_WUFC_LNKC;
  3960. if (wufc) {
  3961. e1000_setup_rctl(adapter);
  3962. e1000_set_multi(netdev);
  3963. /* turn on all-multi mode if wake on multicast is enabled */
  3964. if (adapter->wol & E1000_WUFC_MC) {
  3965. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3966. rctl |= E1000_RCTL_MPE;
  3967. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3968. }
  3969. if (adapter->hw.mac_type >= e1000_82540) {
  3970. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3971. /* advertise wake from D3Cold */
  3972. #define E1000_CTRL_ADVD3WUC 0x00100000
  3973. /* phy power management enable */
  3974. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3975. ctrl |= E1000_CTRL_ADVD3WUC |
  3976. E1000_CTRL_EN_PHY_PWR_MGMT;
  3977. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3978. }
  3979. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3980. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3981. /* keep the laser running in D3 */
  3982. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3983. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3984. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3985. }
  3986. /* Allow time for pending master requests to run */
  3987. e1000_disable_pciex_master(&adapter->hw);
  3988. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3989. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3990. pci_enable_wake(pdev, PCI_D3hot, 1);
  3991. pci_enable_wake(pdev, PCI_D3cold, 1);
  3992. } else {
  3993. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3994. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3995. pci_enable_wake(pdev, PCI_D3hot, 0);
  3996. pci_enable_wake(pdev, PCI_D3cold, 0);
  3997. }
  3998. /* FIXME: this code is incorrect for PCI Express */
  3999. if (adapter->hw.mac_type >= e1000_82540 &&
  4000. adapter->hw.mac_type != e1000_ich8lan &&
  4001. adapter->hw.media_type == e1000_media_type_copper) {
  4002. manc = E1000_READ_REG(&adapter->hw, MANC);
  4003. if (manc & E1000_MANC_SMBUS_EN) {
  4004. manc |= E1000_MANC_ARP_EN;
  4005. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4006. pci_enable_wake(pdev, PCI_D3hot, 1);
  4007. pci_enable_wake(pdev, PCI_D3cold, 1);
  4008. }
  4009. }
  4010. if (adapter->hw.phy_type == e1000_phy_igp_3)
  4011. e1000_phy_powerdown_workaround(&adapter->hw);
  4012. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  4013. * would have already happened in close and is redundant. */
  4014. e1000_release_hw_control(adapter);
  4015. pci_disable_device(pdev);
  4016. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4017. return 0;
  4018. }
  4019. #ifdef CONFIG_PM
  4020. static int
  4021. e1000_resume(struct pci_dev *pdev)
  4022. {
  4023. struct net_device *netdev = pci_get_drvdata(pdev);
  4024. struct e1000_adapter *adapter = netdev_priv(netdev);
  4025. uint32_t manc, ret_val;
  4026. pci_set_power_state(pdev, PCI_D0);
  4027. e1000_pci_restore_state(adapter);
  4028. ret_val = pci_enable_device(pdev);
  4029. pci_set_master(pdev);
  4030. pci_enable_wake(pdev, PCI_D3hot, 0);
  4031. pci_enable_wake(pdev, PCI_D3cold, 0);
  4032. e1000_reset(adapter);
  4033. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4034. if (netif_running(netdev))
  4035. e1000_up(adapter);
  4036. netif_device_attach(netdev);
  4037. /* FIXME: this code is incorrect for PCI Express */
  4038. if (adapter->hw.mac_type >= e1000_82540 &&
  4039. adapter->hw.mac_type != e1000_ich8lan &&
  4040. adapter->hw.media_type == e1000_media_type_copper) {
  4041. manc = E1000_READ_REG(&adapter->hw, MANC);
  4042. manc &= ~(E1000_MANC_ARP_EN);
  4043. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4044. }
  4045. /* If the controller is 82573 and f/w is AMT, do not set
  4046. * DRV_LOAD until the interface is up. For all other cases,
  4047. * let the f/w know that the h/w is now under the control
  4048. * of the driver. */
  4049. if (adapter->hw.mac_type != e1000_82573 ||
  4050. !e1000_check_mng_mode(&adapter->hw))
  4051. e1000_get_hw_control(adapter);
  4052. return 0;
  4053. }
  4054. #endif
  4055. static void e1000_shutdown(struct pci_dev *pdev)
  4056. {
  4057. e1000_suspend(pdev, PMSG_SUSPEND);
  4058. }
  4059. #ifdef CONFIG_NET_POLL_CONTROLLER
  4060. /*
  4061. * Polling 'interrupt' - used by things like netconsole to send skbs
  4062. * without having to re-enable interrupts. It's not called while
  4063. * the interrupt routine is executing.
  4064. */
  4065. static void
  4066. e1000_netpoll(struct net_device *netdev)
  4067. {
  4068. struct e1000_adapter *adapter = netdev_priv(netdev);
  4069. disable_irq(adapter->pdev->irq);
  4070. e1000_intr(adapter->pdev->irq, netdev, NULL);
  4071. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  4072. #ifndef CONFIG_E1000_NAPI
  4073. adapter->clean_rx(adapter, adapter->rx_ring);
  4074. #endif
  4075. enable_irq(adapter->pdev->irq);
  4076. }
  4077. #endif
  4078. /**
  4079. * e1000_io_error_detected - called when PCI error is detected
  4080. * @pdev: Pointer to PCI device
  4081. * @state: The current pci conneection state
  4082. *
  4083. * This function is called after a PCI bus error affecting
  4084. * this device has been detected.
  4085. */
  4086. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  4087. {
  4088. struct net_device *netdev = pci_get_drvdata(pdev);
  4089. struct e1000_adapter *adapter = netdev->priv;
  4090. netif_device_detach(netdev);
  4091. if (netif_running(netdev))
  4092. e1000_down(adapter);
  4093. /* Request a slot slot reset. */
  4094. return PCI_ERS_RESULT_NEED_RESET;
  4095. }
  4096. /**
  4097. * e1000_io_slot_reset - called after the pci bus has been reset.
  4098. * @pdev: Pointer to PCI device
  4099. *
  4100. * Restart the card from scratch, as if from a cold-boot. Implementation
  4101. * resembles the first-half of the e1000_resume routine.
  4102. */
  4103. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  4104. {
  4105. struct net_device *netdev = pci_get_drvdata(pdev);
  4106. struct e1000_adapter *adapter = netdev->priv;
  4107. if (pci_enable_device(pdev)) {
  4108. printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
  4109. return PCI_ERS_RESULT_DISCONNECT;
  4110. }
  4111. pci_set_master(pdev);
  4112. pci_enable_wake(pdev, 3, 0);
  4113. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  4114. /* Perform card reset only on one instance of the card */
  4115. if (PCI_FUNC (pdev->devfn) != 0)
  4116. return PCI_ERS_RESULT_RECOVERED;
  4117. e1000_reset(adapter);
  4118. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4119. return PCI_ERS_RESULT_RECOVERED;
  4120. }
  4121. /**
  4122. * e1000_io_resume - called when traffic can start flowing again.
  4123. * @pdev: Pointer to PCI device
  4124. *
  4125. * This callback is called when the error recovery driver tells us that
  4126. * its OK to resume normal operation. Implementation resembles the
  4127. * second-half of the e1000_resume routine.
  4128. */
  4129. static void e1000_io_resume(struct pci_dev *pdev)
  4130. {
  4131. struct net_device *netdev = pci_get_drvdata(pdev);
  4132. struct e1000_adapter *adapter = netdev->priv;
  4133. uint32_t manc, swsm;
  4134. if (netif_running(netdev)) {
  4135. if (e1000_up(adapter)) {
  4136. printk("e1000: can't bring device back up after reset\n");
  4137. return;
  4138. }
  4139. }
  4140. netif_device_attach(netdev);
  4141. if (adapter->hw.mac_type >= e1000_82540 &&
  4142. adapter->hw.media_type == e1000_media_type_copper) {
  4143. manc = E1000_READ_REG(&adapter->hw, MANC);
  4144. manc &= ~(E1000_MANC_ARP_EN);
  4145. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4146. }
  4147. switch (adapter->hw.mac_type) {
  4148. case e1000_82573:
  4149. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  4150. E1000_WRITE_REG(&adapter->hw, SWSM,
  4151. swsm | E1000_SWSM_DRV_LOAD);
  4152. break;
  4153. default:
  4154. break;
  4155. }
  4156. if (netif_running(netdev))
  4157. mod_timer(&adapter->watchdog_timer, jiffies);
  4158. }
  4159. /* e1000_main.c */