core.c 20 KB

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  1. /*
  2. * Filename: core.c
  3. *
  4. *
  5. * Authors: Joshua Morris <josh.h.morris@us.ibm.com>
  6. * Philip Kelleher <pjk1939@linux.vnet.ibm.com>
  7. *
  8. * (C) Copyright 2013 IBM Corporation
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of the
  13. * License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software Foundation,
  22. * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. */
  24. #include <linux/kernel.h>
  25. #include <linux/init.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/module.h>
  28. #include <linux/pci.h>
  29. #include <linux/reboot.h>
  30. #include <linux/slab.h>
  31. #include <linux/bitops.h>
  32. #include <linux/delay.h>
  33. #include <linux/genhd.h>
  34. #include <linux/idr.h>
  35. #include "rsxx_priv.h"
  36. #include "rsxx_cfg.h"
  37. #define NO_LEGACY 0
  38. MODULE_DESCRIPTION("IBM FlashSystem 70/80 PCIe SSD Device Driver");
  39. MODULE_AUTHOR("Joshua Morris/Philip Kelleher, IBM");
  40. MODULE_LICENSE("GPL");
  41. MODULE_VERSION(DRIVER_VERSION);
  42. static unsigned int force_legacy = NO_LEGACY;
  43. module_param(force_legacy, uint, 0444);
  44. MODULE_PARM_DESC(force_legacy, "Force the use of legacy type PCI interrupts");
  45. static DEFINE_IDA(rsxx_disk_ida);
  46. static DEFINE_SPINLOCK(rsxx_ida_lock);
  47. /*----------------- Interrupt Control & Handling -------------------*/
  48. static void rsxx_mask_interrupts(struct rsxx_cardinfo *card)
  49. {
  50. card->isr_mask = 0;
  51. card->ier_mask = 0;
  52. }
  53. static void __enable_intr(unsigned int *mask, unsigned int intr)
  54. {
  55. *mask |= intr;
  56. }
  57. static void __disable_intr(unsigned int *mask, unsigned int intr)
  58. {
  59. *mask &= ~intr;
  60. }
  61. /*
  62. * NOTE: Disabling the IER will disable the hardware interrupt.
  63. * Disabling the ISR will disable the software handling of the ISR bit.
  64. *
  65. * Enable/Disable interrupt functions assume the card->irq_lock
  66. * is held by the caller.
  67. */
  68. void rsxx_enable_ier(struct rsxx_cardinfo *card, unsigned int intr)
  69. {
  70. if (unlikely(card->halt) ||
  71. unlikely(card->eeh_state))
  72. return;
  73. __enable_intr(&card->ier_mask, intr);
  74. iowrite32(card->ier_mask, card->regmap + IER);
  75. }
  76. void rsxx_disable_ier(struct rsxx_cardinfo *card, unsigned int intr)
  77. {
  78. if (unlikely(card->eeh_state))
  79. return;
  80. __disable_intr(&card->ier_mask, intr);
  81. iowrite32(card->ier_mask, card->regmap + IER);
  82. }
  83. void rsxx_enable_ier_and_isr(struct rsxx_cardinfo *card,
  84. unsigned int intr)
  85. {
  86. if (unlikely(card->halt) ||
  87. unlikely(card->eeh_state))
  88. return;
  89. __enable_intr(&card->isr_mask, intr);
  90. __enable_intr(&card->ier_mask, intr);
  91. iowrite32(card->ier_mask, card->regmap + IER);
  92. }
  93. void rsxx_disable_ier_and_isr(struct rsxx_cardinfo *card,
  94. unsigned int intr)
  95. {
  96. if (unlikely(card->eeh_state))
  97. return;
  98. __disable_intr(&card->isr_mask, intr);
  99. __disable_intr(&card->ier_mask, intr);
  100. iowrite32(card->ier_mask, card->regmap + IER);
  101. }
  102. static irqreturn_t rsxx_isr(int irq, void *pdata)
  103. {
  104. struct rsxx_cardinfo *card = pdata;
  105. unsigned int isr;
  106. int handled = 0;
  107. int reread_isr;
  108. int i;
  109. spin_lock(&card->irq_lock);
  110. do {
  111. reread_isr = 0;
  112. if (unlikely(card->eeh_state))
  113. break;
  114. isr = ioread32(card->regmap + ISR);
  115. if (isr == 0xffffffff) {
  116. /*
  117. * A few systems seem to have an intermittent issue
  118. * where PCI reads return all Fs, but retrying the read
  119. * a little later will return as expected.
  120. */
  121. dev_info(CARD_TO_DEV(card),
  122. "ISR = 0xFFFFFFFF, retrying later\n");
  123. break;
  124. }
  125. isr &= card->isr_mask;
  126. if (!isr)
  127. break;
  128. for (i = 0; i < card->n_targets; i++) {
  129. if (isr & CR_INTR_DMA(i)) {
  130. if (card->ier_mask & CR_INTR_DMA(i)) {
  131. rsxx_disable_ier(card, CR_INTR_DMA(i));
  132. reread_isr = 1;
  133. }
  134. queue_work(card->ctrl[i].done_wq,
  135. &card->ctrl[i].dma_done_work);
  136. handled++;
  137. }
  138. }
  139. if (isr & CR_INTR_CREG) {
  140. schedule_work(&card->creg_ctrl.done_work);
  141. handled++;
  142. }
  143. if (isr & CR_INTR_EVENT) {
  144. schedule_work(&card->event_work);
  145. rsxx_disable_ier_and_isr(card, CR_INTR_EVENT);
  146. handled++;
  147. }
  148. } while (reread_isr);
  149. spin_unlock(&card->irq_lock);
  150. return handled ? IRQ_HANDLED : IRQ_NONE;
  151. }
  152. /*----------------- Card Event Handler -------------------*/
  153. static const char * const rsxx_card_state_to_str(unsigned int state)
  154. {
  155. static const char * const state_strings[] = {
  156. "Unknown", "Shutdown", "Starting", "Formatting",
  157. "Uninitialized", "Good", "Shutting Down",
  158. "Fault", "Read Only Fault", "dStroying"
  159. };
  160. return state_strings[ffs(state)];
  161. }
  162. static void card_state_change(struct rsxx_cardinfo *card,
  163. unsigned int new_state)
  164. {
  165. int st;
  166. dev_info(CARD_TO_DEV(card),
  167. "card state change detected.(%s -> %s)\n",
  168. rsxx_card_state_to_str(card->state),
  169. rsxx_card_state_to_str(new_state));
  170. card->state = new_state;
  171. /* Don't attach DMA interfaces if the card has an invalid config */
  172. if (!card->config_valid)
  173. return;
  174. switch (new_state) {
  175. case CARD_STATE_RD_ONLY_FAULT:
  176. dev_crit(CARD_TO_DEV(card),
  177. "Hardware has entered read-only mode!\n");
  178. /*
  179. * Fall through so the DMA devices can be attached and
  180. * the user can attempt to pull off their data.
  181. */
  182. case CARD_STATE_GOOD:
  183. st = rsxx_get_card_size8(card, &card->size8);
  184. if (st)
  185. dev_err(CARD_TO_DEV(card),
  186. "Failed attaching DMA devices\n");
  187. if (card->config_valid)
  188. set_capacity(card->gendisk, card->size8 >> 9);
  189. break;
  190. case CARD_STATE_FAULT:
  191. dev_crit(CARD_TO_DEV(card),
  192. "Hardware Fault reported!\n");
  193. /* Fall through. */
  194. /* Everything else, detach DMA interface if it's attached. */
  195. case CARD_STATE_SHUTDOWN:
  196. case CARD_STATE_STARTING:
  197. case CARD_STATE_FORMATTING:
  198. case CARD_STATE_UNINITIALIZED:
  199. case CARD_STATE_SHUTTING_DOWN:
  200. /*
  201. * dStroy is a term coined by marketing to represent the low level
  202. * secure erase.
  203. */
  204. case CARD_STATE_DSTROYING:
  205. set_capacity(card->gendisk, 0);
  206. break;
  207. }
  208. }
  209. static void card_event_handler(struct work_struct *work)
  210. {
  211. struct rsxx_cardinfo *card;
  212. unsigned int state;
  213. unsigned long flags;
  214. int st;
  215. card = container_of(work, struct rsxx_cardinfo, event_work);
  216. if (unlikely(card->halt))
  217. return;
  218. /*
  219. * Enable the interrupt now to avoid any weird race conditions where a
  220. * state change might occur while rsxx_get_card_state() is
  221. * processing a returned creg cmd.
  222. */
  223. spin_lock_irqsave(&card->irq_lock, flags);
  224. rsxx_enable_ier_and_isr(card, CR_INTR_EVENT);
  225. spin_unlock_irqrestore(&card->irq_lock, flags);
  226. st = rsxx_get_card_state(card, &state);
  227. if (st) {
  228. dev_info(CARD_TO_DEV(card),
  229. "Failed reading state after event.\n");
  230. return;
  231. }
  232. if (card->state != state)
  233. card_state_change(card, state);
  234. if (card->creg_ctrl.creg_stats.stat & CREG_STAT_LOG_PENDING)
  235. rsxx_read_hw_log(card);
  236. }
  237. /*----------------- Card Operations -------------------*/
  238. static int card_shutdown(struct rsxx_cardinfo *card)
  239. {
  240. unsigned int state;
  241. signed long start;
  242. const int timeout = msecs_to_jiffies(120000);
  243. int st;
  244. /* We can't issue a shutdown if the card is in a transition state */
  245. start = jiffies;
  246. do {
  247. st = rsxx_get_card_state(card, &state);
  248. if (st)
  249. return st;
  250. } while (state == CARD_STATE_STARTING &&
  251. (jiffies - start < timeout));
  252. if (state == CARD_STATE_STARTING)
  253. return -ETIMEDOUT;
  254. /* Only issue a shutdown if we need to */
  255. if ((state != CARD_STATE_SHUTTING_DOWN) &&
  256. (state != CARD_STATE_SHUTDOWN)) {
  257. st = rsxx_issue_card_cmd(card, CARD_CMD_SHUTDOWN);
  258. if (st)
  259. return st;
  260. }
  261. start = jiffies;
  262. do {
  263. st = rsxx_get_card_state(card, &state);
  264. if (st)
  265. return st;
  266. } while (state != CARD_STATE_SHUTDOWN &&
  267. (jiffies - start < timeout));
  268. if (state != CARD_STATE_SHUTDOWN)
  269. return -ETIMEDOUT;
  270. return 0;
  271. }
  272. static int rsxx_eeh_frozen(struct pci_dev *dev)
  273. {
  274. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  275. int i;
  276. int st;
  277. dev_warn(&dev->dev, "IBM FlashSystem PCI: preparing for slot reset.\n");
  278. card->eeh_state = 1;
  279. rsxx_mask_interrupts(card);
  280. /*
  281. * We need to guarantee that the write for eeh_state and masking
  282. * interrupts does not become reordered. This will prevent a possible
  283. * race condition with the EEH code.
  284. */
  285. wmb();
  286. pci_disable_device(dev);
  287. st = rsxx_eeh_save_issued_dmas(card);
  288. if (st)
  289. return st;
  290. rsxx_eeh_save_issued_creg(card);
  291. for (i = 0; i < card->n_targets; i++) {
  292. if (card->ctrl[i].status.buf)
  293. pci_free_consistent(card->dev, STATUS_BUFFER_SIZE8,
  294. card->ctrl[i].status.buf,
  295. card->ctrl[i].status.dma_addr);
  296. if (card->ctrl[i].cmd.buf)
  297. pci_free_consistent(card->dev, COMMAND_BUFFER_SIZE8,
  298. card->ctrl[i].cmd.buf,
  299. card->ctrl[i].cmd.dma_addr);
  300. }
  301. return 0;
  302. }
  303. static void rsxx_eeh_failure(struct pci_dev *dev)
  304. {
  305. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  306. int i;
  307. dev_err(&dev->dev, "IBM FlashSystem PCI: disabling failed card.\n");
  308. card->eeh_state = 1;
  309. for (i = 0; i < card->n_targets; i++)
  310. del_timer_sync(&card->ctrl[i].activity_timer);
  311. rsxx_eeh_cancel_dmas(card);
  312. }
  313. static int rsxx_eeh_fifo_flush_poll(struct rsxx_cardinfo *card)
  314. {
  315. unsigned int status;
  316. int iter = 0;
  317. /* We need to wait for the hardware to reset */
  318. while (iter++ < 10) {
  319. status = ioread32(card->regmap + PCI_RECONFIG);
  320. if (status & RSXX_FLUSH_BUSY) {
  321. ssleep(1);
  322. continue;
  323. }
  324. if (status & RSXX_FLUSH_TIMEOUT)
  325. dev_warn(CARD_TO_DEV(card), "HW: flash controller timeout\n");
  326. return 0;
  327. }
  328. /* Hardware failed resetting itself. */
  329. return -1;
  330. }
  331. static pci_ers_result_t rsxx_error_detected(struct pci_dev *dev,
  332. enum pci_channel_state error)
  333. {
  334. int st;
  335. if (dev->revision < RSXX_EEH_SUPPORT)
  336. return PCI_ERS_RESULT_NONE;
  337. if (error == pci_channel_io_perm_failure) {
  338. rsxx_eeh_failure(dev);
  339. return PCI_ERS_RESULT_DISCONNECT;
  340. }
  341. st = rsxx_eeh_frozen(dev);
  342. if (st) {
  343. dev_err(&dev->dev, "Slot reset setup failed\n");
  344. rsxx_eeh_failure(dev);
  345. return PCI_ERS_RESULT_DISCONNECT;
  346. }
  347. return PCI_ERS_RESULT_NEED_RESET;
  348. }
  349. static pci_ers_result_t rsxx_slot_reset(struct pci_dev *dev)
  350. {
  351. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  352. unsigned long flags;
  353. int i;
  354. int st;
  355. dev_warn(&dev->dev,
  356. "IBM FlashSystem PCI: recovering from slot reset.\n");
  357. st = pci_enable_device(dev);
  358. if (st)
  359. goto failed_hw_setup;
  360. pci_set_master(dev);
  361. st = rsxx_eeh_fifo_flush_poll(card);
  362. if (st)
  363. goto failed_hw_setup;
  364. rsxx_dma_queue_reset(card);
  365. for (i = 0; i < card->n_targets; i++) {
  366. st = rsxx_hw_buffers_init(dev, &card->ctrl[i]);
  367. if (st)
  368. goto failed_hw_buffers_init;
  369. }
  370. if (card->config_valid)
  371. rsxx_dma_configure(card);
  372. /* Clears the ISR register from spurious interrupts */
  373. st = ioread32(card->regmap + ISR);
  374. card->eeh_state = 0;
  375. st = rsxx_eeh_remap_dmas(card);
  376. if (st)
  377. goto failed_remap_dmas;
  378. spin_lock_irqsave(&card->irq_lock, flags);
  379. if (card->n_targets & RSXX_MAX_TARGETS)
  380. rsxx_enable_ier_and_isr(card, CR_INTR_ALL_G);
  381. else
  382. rsxx_enable_ier_and_isr(card, CR_INTR_ALL_C);
  383. spin_unlock_irqrestore(&card->irq_lock, flags);
  384. rsxx_kick_creg_queue(card);
  385. for (i = 0; i < card->n_targets; i++) {
  386. spin_lock(&card->ctrl[i].queue_lock);
  387. if (list_empty(&card->ctrl[i].queue)) {
  388. spin_unlock(&card->ctrl[i].queue_lock);
  389. continue;
  390. }
  391. spin_unlock(&card->ctrl[i].queue_lock);
  392. queue_work(card->ctrl[i].issue_wq,
  393. &card->ctrl[i].issue_dma_work);
  394. }
  395. dev_info(&dev->dev, "IBM FlashSystem PCI: recovery complete.\n");
  396. return PCI_ERS_RESULT_RECOVERED;
  397. failed_hw_buffers_init:
  398. failed_remap_dmas:
  399. for (i = 0; i < card->n_targets; i++) {
  400. if (card->ctrl[i].status.buf)
  401. pci_free_consistent(card->dev,
  402. STATUS_BUFFER_SIZE8,
  403. card->ctrl[i].status.buf,
  404. card->ctrl[i].status.dma_addr);
  405. if (card->ctrl[i].cmd.buf)
  406. pci_free_consistent(card->dev,
  407. COMMAND_BUFFER_SIZE8,
  408. card->ctrl[i].cmd.buf,
  409. card->ctrl[i].cmd.dma_addr);
  410. }
  411. failed_hw_setup:
  412. rsxx_eeh_failure(dev);
  413. return PCI_ERS_RESULT_DISCONNECT;
  414. }
  415. /*----------------- Driver Initialization & Setup -------------------*/
  416. /* Returns: 0 if the driver is compatible with the device
  417. -1 if the driver is NOT compatible with the device */
  418. static int rsxx_compatibility_check(struct rsxx_cardinfo *card)
  419. {
  420. unsigned char pci_rev;
  421. pci_read_config_byte(card->dev, PCI_REVISION_ID, &pci_rev);
  422. if (pci_rev > RS70_PCI_REV_SUPPORTED)
  423. return -1;
  424. return 0;
  425. }
  426. static int rsxx_pci_probe(struct pci_dev *dev,
  427. const struct pci_device_id *id)
  428. {
  429. struct rsxx_cardinfo *card;
  430. int st;
  431. dev_info(&dev->dev, "PCI-Flash SSD discovered\n");
  432. card = kzalloc(sizeof(*card), GFP_KERNEL);
  433. if (!card)
  434. return -ENOMEM;
  435. card->dev = dev;
  436. pci_set_drvdata(dev, card);
  437. do {
  438. if (!ida_pre_get(&rsxx_disk_ida, GFP_KERNEL)) {
  439. st = -ENOMEM;
  440. goto failed_ida_get;
  441. }
  442. spin_lock(&rsxx_ida_lock);
  443. st = ida_get_new(&rsxx_disk_ida, &card->disk_id);
  444. spin_unlock(&rsxx_ida_lock);
  445. } while (st == -EAGAIN);
  446. if (st)
  447. goto failed_ida_get;
  448. st = pci_enable_device(dev);
  449. if (st)
  450. goto failed_enable;
  451. pci_set_master(dev);
  452. pci_set_dma_max_seg_size(dev, RSXX_HW_BLK_SIZE);
  453. st = pci_set_dma_mask(dev, DMA_BIT_MASK(64));
  454. if (st) {
  455. dev_err(CARD_TO_DEV(card),
  456. "No usable DMA configuration,aborting\n");
  457. goto failed_dma_mask;
  458. }
  459. st = pci_request_regions(dev, DRIVER_NAME);
  460. if (st) {
  461. dev_err(CARD_TO_DEV(card),
  462. "Failed to request memory region\n");
  463. goto failed_request_regions;
  464. }
  465. if (pci_resource_len(dev, 0) == 0) {
  466. dev_err(CARD_TO_DEV(card), "BAR0 has length 0!\n");
  467. st = -ENOMEM;
  468. goto failed_iomap;
  469. }
  470. card->regmap = pci_iomap(dev, 0, 0);
  471. if (!card->regmap) {
  472. dev_err(CARD_TO_DEV(card), "Failed to map BAR0\n");
  473. st = -ENOMEM;
  474. goto failed_iomap;
  475. }
  476. spin_lock_init(&card->irq_lock);
  477. card->halt = 0;
  478. card->eeh_state = 0;
  479. spin_lock_irq(&card->irq_lock);
  480. rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
  481. spin_unlock_irq(&card->irq_lock);
  482. if (!force_legacy) {
  483. st = pci_enable_msi(dev);
  484. if (st)
  485. dev_warn(CARD_TO_DEV(card),
  486. "Failed to enable MSI\n");
  487. }
  488. st = request_irq(dev->irq, rsxx_isr, IRQF_DISABLED | IRQF_SHARED,
  489. DRIVER_NAME, card);
  490. if (st) {
  491. dev_err(CARD_TO_DEV(card),
  492. "Failed requesting IRQ%d\n", dev->irq);
  493. goto failed_irq;
  494. }
  495. /************* Setup Processor Command Interface *************/
  496. rsxx_creg_setup(card);
  497. spin_lock_irq(&card->irq_lock);
  498. rsxx_enable_ier_and_isr(card, CR_INTR_CREG);
  499. spin_unlock_irq(&card->irq_lock);
  500. st = rsxx_compatibility_check(card);
  501. if (st) {
  502. dev_warn(CARD_TO_DEV(card),
  503. "Incompatible driver detected. Please update the driver.\n");
  504. st = -EINVAL;
  505. goto failed_compatiblity_check;
  506. }
  507. /************* Load Card Config *************/
  508. st = rsxx_load_config(card);
  509. if (st)
  510. dev_err(CARD_TO_DEV(card),
  511. "Failed loading card config\n");
  512. /************* Setup DMA Engine *************/
  513. st = rsxx_get_num_targets(card, &card->n_targets);
  514. if (st)
  515. dev_info(CARD_TO_DEV(card),
  516. "Failed reading the number of DMA targets\n");
  517. card->ctrl = kzalloc(card->n_targets * sizeof(*card->ctrl), GFP_KERNEL);
  518. if (!card->ctrl) {
  519. st = -ENOMEM;
  520. goto failed_dma_setup;
  521. }
  522. st = rsxx_dma_setup(card);
  523. if (st) {
  524. dev_info(CARD_TO_DEV(card),
  525. "Failed to setup DMA engine\n");
  526. goto failed_dma_setup;
  527. }
  528. /************* Setup Card Event Handler *************/
  529. INIT_WORK(&card->event_work, card_event_handler);
  530. st = rsxx_setup_dev(card);
  531. if (st)
  532. goto failed_create_dev;
  533. rsxx_get_card_state(card, &card->state);
  534. dev_info(CARD_TO_DEV(card),
  535. "card state: %s\n",
  536. rsxx_card_state_to_str(card->state));
  537. /*
  538. * Now that the DMA Engine and devices have been setup,
  539. * we can enable the event interrupt(it kicks off actions in
  540. * those layers so we couldn't enable it right away.)
  541. */
  542. spin_lock_irq(&card->irq_lock);
  543. rsxx_enable_ier_and_isr(card, CR_INTR_EVENT);
  544. spin_unlock_irq(&card->irq_lock);
  545. if (card->state == CARD_STATE_SHUTDOWN) {
  546. st = rsxx_issue_card_cmd(card, CARD_CMD_STARTUP);
  547. if (st)
  548. dev_crit(CARD_TO_DEV(card),
  549. "Failed issuing card startup\n");
  550. } else if (card->state == CARD_STATE_GOOD ||
  551. card->state == CARD_STATE_RD_ONLY_FAULT) {
  552. st = rsxx_get_card_size8(card, &card->size8);
  553. if (st)
  554. card->size8 = 0;
  555. }
  556. rsxx_attach_dev(card);
  557. return 0;
  558. failed_create_dev:
  559. rsxx_dma_destroy(card);
  560. failed_dma_setup:
  561. failed_compatiblity_check:
  562. spin_lock_irq(&card->irq_lock);
  563. rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
  564. spin_unlock_irq(&card->irq_lock);
  565. free_irq(dev->irq, card);
  566. if (!force_legacy)
  567. pci_disable_msi(dev);
  568. failed_irq:
  569. pci_iounmap(dev, card->regmap);
  570. failed_iomap:
  571. pci_release_regions(dev);
  572. failed_request_regions:
  573. failed_dma_mask:
  574. pci_disable_device(dev);
  575. failed_enable:
  576. spin_lock(&rsxx_ida_lock);
  577. ida_remove(&rsxx_disk_ida, card->disk_id);
  578. spin_unlock(&rsxx_ida_lock);
  579. failed_ida_get:
  580. kfree(card);
  581. return st;
  582. }
  583. static void rsxx_pci_remove(struct pci_dev *dev)
  584. {
  585. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  586. unsigned long flags;
  587. int st;
  588. int i;
  589. if (!card)
  590. return;
  591. dev_info(CARD_TO_DEV(card),
  592. "Removing PCI-Flash SSD.\n");
  593. rsxx_detach_dev(card);
  594. for (i = 0; i < card->n_targets; i++) {
  595. spin_lock_irqsave(&card->irq_lock, flags);
  596. rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i));
  597. spin_unlock_irqrestore(&card->irq_lock, flags);
  598. }
  599. st = card_shutdown(card);
  600. if (st)
  601. dev_crit(CARD_TO_DEV(card), "Shutdown failed!\n");
  602. /* Sync outstanding event handlers. */
  603. spin_lock_irqsave(&card->irq_lock, flags);
  604. rsxx_disable_ier_and_isr(card, CR_INTR_EVENT);
  605. spin_unlock_irqrestore(&card->irq_lock, flags);
  606. cancel_work_sync(&card->event_work);
  607. rsxx_destroy_dev(card);
  608. rsxx_dma_destroy(card);
  609. spin_lock_irqsave(&card->irq_lock, flags);
  610. rsxx_disable_ier_and_isr(card, CR_INTR_ALL);
  611. spin_unlock_irqrestore(&card->irq_lock, flags);
  612. /* Prevent work_structs from re-queuing themselves. */
  613. card->halt = 1;
  614. free_irq(dev->irq, card);
  615. if (!force_legacy)
  616. pci_disable_msi(dev);
  617. rsxx_creg_destroy(card);
  618. pci_iounmap(dev, card->regmap);
  619. pci_disable_device(dev);
  620. pci_release_regions(dev);
  621. kfree(card);
  622. }
  623. static int rsxx_pci_suspend(struct pci_dev *dev, pm_message_t state)
  624. {
  625. /* We don't support suspend at this time. */
  626. return -ENOSYS;
  627. }
  628. static void rsxx_pci_shutdown(struct pci_dev *dev)
  629. {
  630. struct rsxx_cardinfo *card = pci_get_drvdata(dev);
  631. unsigned long flags;
  632. int i;
  633. if (!card)
  634. return;
  635. dev_info(CARD_TO_DEV(card), "Shutting down PCI-Flash SSD.\n");
  636. rsxx_detach_dev(card);
  637. for (i = 0; i < card->n_targets; i++) {
  638. spin_lock_irqsave(&card->irq_lock, flags);
  639. rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i));
  640. spin_unlock_irqrestore(&card->irq_lock, flags);
  641. }
  642. card_shutdown(card);
  643. }
  644. static const struct pci_error_handlers rsxx_err_handler = {
  645. .error_detected = rsxx_error_detected,
  646. .slot_reset = rsxx_slot_reset,
  647. };
  648. static DEFINE_PCI_DEVICE_TABLE(rsxx_pci_ids) = {
  649. {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS70_FLASH)},
  650. {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS80_FLASH)},
  651. {0,},
  652. };
  653. MODULE_DEVICE_TABLE(pci, rsxx_pci_ids);
  654. static struct pci_driver rsxx_pci_driver = {
  655. .name = DRIVER_NAME,
  656. .id_table = rsxx_pci_ids,
  657. .probe = rsxx_pci_probe,
  658. .remove = rsxx_pci_remove,
  659. .suspend = rsxx_pci_suspend,
  660. .shutdown = rsxx_pci_shutdown,
  661. .err_handler = &rsxx_err_handler,
  662. };
  663. static int __init rsxx_core_init(void)
  664. {
  665. int st;
  666. st = rsxx_dev_init();
  667. if (st)
  668. return st;
  669. st = rsxx_dma_init();
  670. if (st)
  671. goto dma_init_failed;
  672. st = rsxx_creg_init();
  673. if (st)
  674. goto creg_init_failed;
  675. return pci_register_driver(&rsxx_pci_driver);
  676. creg_init_failed:
  677. rsxx_dma_cleanup();
  678. dma_init_failed:
  679. rsxx_dev_cleanup();
  680. return st;
  681. }
  682. static void __exit rsxx_core_cleanup(void)
  683. {
  684. pci_unregister_driver(&rsxx_pci_driver);
  685. rsxx_creg_cleanup();
  686. rsxx_dma_cleanup();
  687. rsxx_dev_cleanup();
  688. }
  689. module_init(rsxx_core_init);
  690. module_exit(rsxx_core_cleanup);