nmi.c 5.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279
  1. /* Pseudo NMI support on sparc64 systems.
  2. *
  3. * Copyright (C) 2009 David S. Miller <davem@davemloft.net>
  4. *
  5. * The NMI watchdog support and infrastructure is based almost
  6. * entirely upon the x86 NMI support code.
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/param.h>
  10. #include <linux/init.h>
  11. #include <linux/percpu.h>
  12. #include <linux/nmi.h>
  13. #include <linux/module.h>
  14. #include <linux/kprobes.h>
  15. #include <linux/kernel_stat.h>
  16. #include <linux/reboot.h>
  17. #include <linux/slab.h>
  18. #include <linux/kdebug.h>
  19. #include <linux/delay.h>
  20. #include <linux/smp.h>
  21. #include <asm/perf_event.h>
  22. #include <asm/ptrace.h>
  23. #include <asm/pcr.h>
  24. /* We don't have a real NMI on sparc64, but we can fake one
  25. * up using profiling counter overflow interrupts and interrupt
  26. * levels.
  27. *
  28. * The profile overflow interrupts at level 15, so we use
  29. * level 14 as our IRQ off level.
  30. */
  31. static int panic_on_timeout;
  32. /* nmi_active:
  33. * >0: the NMI watchdog is active, but can be disabled
  34. * <0: the NMI watchdog has not been set up, and cannot be enabled
  35. * 0: the NMI watchdog is disabled, but can be enabled
  36. */
  37. atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */
  38. EXPORT_SYMBOL(nmi_active);
  39. static unsigned int nmi_hz = HZ;
  40. static DEFINE_PER_CPU(short, wd_enabled);
  41. static int endflag __initdata;
  42. static DEFINE_PER_CPU(unsigned int, last_irq_sum);
  43. static DEFINE_PER_CPU(long, alert_counter);
  44. static DEFINE_PER_CPU(int, nmi_touch);
  45. void touch_nmi_watchdog(void)
  46. {
  47. if (atomic_read(&nmi_active)) {
  48. int cpu;
  49. for_each_present_cpu(cpu) {
  50. if (per_cpu(nmi_touch, cpu) != 1)
  51. per_cpu(nmi_touch, cpu) = 1;
  52. }
  53. }
  54. touch_softlockup_watchdog();
  55. }
  56. EXPORT_SYMBOL(touch_nmi_watchdog);
  57. static void die_nmi(const char *str, struct pt_regs *regs, int do_panic)
  58. {
  59. if (notify_die(DIE_NMIWATCHDOG, str, regs, 0,
  60. pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP)
  61. return;
  62. console_verbose();
  63. bust_spinlocks(1);
  64. printk(KERN_EMERG "%s", str);
  65. printk(" on CPU%d, ip %08lx, registers:\n",
  66. smp_processor_id(), regs->tpc);
  67. show_regs(regs);
  68. dump_stack();
  69. bust_spinlocks(0);
  70. if (do_panic || panic_on_oops)
  71. panic("Non maskable interrupt");
  72. nmi_exit();
  73. local_irq_enable();
  74. do_exit(SIGBUS);
  75. }
  76. notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs)
  77. {
  78. unsigned int sum, touched = 0;
  79. int cpu = smp_processor_id();
  80. clear_softint(1 << irq);
  81. pcr_ops->write(PCR_PIC_PRIV);
  82. local_cpu_data().__nmi_count++;
  83. nmi_enter();
  84. if (notify_die(DIE_NMI, "nmi", regs, 0,
  85. pt_regs_trap_type(regs), SIGINT) == NOTIFY_STOP)
  86. touched = 1;
  87. sum = kstat_irqs_cpu(0, cpu);
  88. if (__get_cpu_var(nmi_touch)) {
  89. __get_cpu_var(nmi_touch) = 0;
  90. touched = 1;
  91. }
  92. if (!touched && __get_cpu_var(last_irq_sum) == sum) {
  93. __this_cpu_inc(alert_counter);
  94. if (__this_cpu_read(alert_counter) == 30 * nmi_hz)
  95. die_nmi("BUG: NMI Watchdog detected LOCKUP",
  96. regs, panic_on_timeout);
  97. } else {
  98. __get_cpu_var(last_irq_sum) = sum;
  99. __this_cpu_write(alert_counter, 0);
  100. }
  101. if (__get_cpu_var(wd_enabled)) {
  102. write_pic(picl_value(nmi_hz));
  103. pcr_ops->write(pcr_enable);
  104. }
  105. nmi_exit();
  106. }
  107. static inline unsigned int get_nmi_count(int cpu)
  108. {
  109. return cpu_data(cpu).__nmi_count;
  110. }
  111. static __init void nmi_cpu_busy(void *data)
  112. {
  113. local_irq_enable_in_hardirq();
  114. while (endflag == 0)
  115. mb();
  116. }
  117. static void report_broken_nmi(int cpu, int *prev_nmi_count)
  118. {
  119. printk(KERN_CONT "\n");
  120. printk(KERN_WARNING
  121. "WARNING: CPU#%d: NMI appears to be stuck (%d->%d)!\n",
  122. cpu, prev_nmi_count[cpu], get_nmi_count(cpu));
  123. printk(KERN_WARNING
  124. "Please report this to bugzilla.kernel.org,\n");
  125. printk(KERN_WARNING
  126. "and attach the output of the 'dmesg' command.\n");
  127. per_cpu(wd_enabled, cpu) = 0;
  128. atomic_dec(&nmi_active);
  129. }
  130. void stop_nmi_watchdog(void *unused)
  131. {
  132. pcr_ops->write(PCR_PIC_PRIV);
  133. __get_cpu_var(wd_enabled) = 0;
  134. atomic_dec(&nmi_active);
  135. }
  136. static int __init check_nmi_watchdog(void)
  137. {
  138. unsigned int *prev_nmi_count;
  139. int cpu, err;
  140. if (!atomic_read(&nmi_active))
  141. return 0;
  142. prev_nmi_count = kmalloc(nr_cpu_ids * sizeof(unsigned int), GFP_KERNEL);
  143. if (!prev_nmi_count) {
  144. err = -ENOMEM;
  145. goto error;
  146. }
  147. printk(KERN_INFO "Testing NMI watchdog ... ");
  148. smp_call_function(nmi_cpu_busy, (void *)&endflag, 0);
  149. for_each_possible_cpu(cpu)
  150. prev_nmi_count[cpu] = get_nmi_count(cpu);
  151. local_irq_enable();
  152. mdelay((20 * 1000) / nmi_hz); /* wait 20 ticks */
  153. for_each_online_cpu(cpu) {
  154. if (!per_cpu(wd_enabled, cpu))
  155. continue;
  156. if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5)
  157. report_broken_nmi(cpu, prev_nmi_count);
  158. }
  159. endflag = 1;
  160. if (!atomic_read(&nmi_active)) {
  161. kfree(prev_nmi_count);
  162. atomic_set(&nmi_active, -1);
  163. err = -ENODEV;
  164. goto error;
  165. }
  166. printk("OK.\n");
  167. nmi_hz = 1;
  168. kfree(prev_nmi_count);
  169. return 0;
  170. error:
  171. on_each_cpu(stop_nmi_watchdog, NULL, 1);
  172. return err;
  173. }
  174. void start_nmi_watchdog(void *unused)
  175. {
  176. __get_cpu_var(wd_enabled) = 1;
  177. atomic_inc(&nmi_active);
  178. pcr_ops->write(PCR_PIC_PRIV);
  179. write_pic(picl_value(nmi_hz));
  180. pcr_ops->write(pcr_enable);
  181. }
  182. static void nmi_adjust_hz_one(void *unused)
  183. {
  184. if (!__get_cpu_var(wd_enabled))
  185. return;
  186. pcr_ops->write(PCR_PIC_PRIV);
  187. write_pic(picl_value(nmi_hz));
  188. pcr_ops->write(pcr_enable);
  189. }
  190. void nmi_adjust_hz(unsigned int new_hz)
  191. {
  192. nmi_hz = new_hz;
  193. on_each_cpu(nmi_adjust_hz_one, NULL, 1);
  194. }
  195. EXPORT_SYMBOL_GPL(nmi_adjust_hz);
  196. static int nmi_shutdown(struct notifier_block *nb, unsigned long cmd, void *p)
  197. {
  198. on_each_cpu(stop_nmi_watchdog, NULL, 1);
  199. return 0;
  200. }
  201. static struct notifier_block nmi_reboot_notifier = {
  202. .notifier_call = nmi_shutdown,
  203. };
  204. int __init nmi_init(void)
  205. {
  206. int err;
  207. on_each_cpu(start_nmi_watchdog, NULL, 1);
  208. err = check_nmi_watchdog();
  209. if (!err) {
  210. err = register_reboot_notifier(&nmi_reboot_notifier);
  211. if (err) {
  212. on_each_cpu(stop_nmi_watchdog, NULL, 1);
  213. atomic_set(&nmi_active, -1);
  214. }
  215. }
  216. if (!err)
  217. init_hw_perf_events();
  218. return err;
  219. }
  220. static int __init setup_nmi_watchdog(char *str)
  221. {
  222. if (!strncmp(str, "panic", 5))
  223. panic_on_timeout = 1;
  224. return 0;
  225. }
  226. __setup("nmi_watchdog=", setup_nmi_watchdog);