main.c 54 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include "ath9k.h"
  18. #include "btcoex.h"
  19. static void ath_update_txpow(struct ath_softc *sc)
  20. {
  21. struct ath_hw *ah = sc->sc_ah;
  22. if (sc->curtxpow != sc->config.txpowlimit) {
  23. ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  24. /* read back in case value is clamped */
  25. sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  26. }
  27. }
  28. static u8 parse_mpdudensity(u8 mpdudensity)
  29. {
  30. /*
  31. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  32. * 0 for no restriction
  33. * 1 for 1/4 us
  34. * 2 for 1/2 us
  35. * 3 for 1 us
  36. * 4 for 2 us
  37. * 5 for 4 us
  38. * 6 for 8 us
  39. * 7 for 16 us
  40. */
  41. switch (mpdudensity) {
  42. case 0:
  43. return 0;
  44. case 1:
  45. case 2:
  46. case 3:
  47. /* Our lower layer calculations limit our precision to
  48. 1 microsecond */
  49. return 1;
  50. case 4:
  51. return 2;
  52. case 5:
  53. return 4;
  54. case 6:
  55. return 8;
  56. case 7:
  57. return 16;
  58. default:
  59. return 0;
  60. }
  61. }
  62. static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  63. struct ieee80211_hw *hw)
  64. {
  65. struct ieee80211_channel *curchan = hw->conf.channel;
  66. struct ath9k_channel *channel;
  67. u8 chan_idx;
  68. chan_idx = curchan->hw_value;
  69. channel = &sc->sc_ah->channels[chan_idx];
  70. ath9k_update_ichannel(sc, hw, channel);
  71. return channel;
  72. }
  73. bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  74. {
  75. unsigned long flags;
  76. bool ret;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  79. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  80. return ret;
  81. }
  82. void ath9k_ps_wakeup(struct ath_softc *sc)
  83. {
  84. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  85. unsigned long flags;
  86. enum ath9k_power_mode power_mode;
  87. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  88. if (++sc->ps_usecount != 1)
  89. goto unlock;
  90. power_mode = sc->sc_ah->power_mode;
  91. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  92. /*
  93. * While the hardware is asleep, the cycle counters contain no
  94. * useful data. Better clear them now so that they don't mess up
  95. * survey data results.
  96. */
  97. if (power_mode != ATH9K_PM_AWAKE) {
  98. spin_lock(&common->cc_lock);
  99. ath_hw_cycle_counters_update(common);
  100. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  101. spin_unlock(&common->cc_lock);
  102. }
  103. unlock:
  104. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  105. }
  106. void ath9k_ps_restore(struct ath_softc *sc)
  107. {
  108. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  109. unsigned long flags;
  110. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  111. if (--sc->ps_usecount != 0)
  112. goto unlock;
  113. spin_lock(&common->cc_lock);
  114. ath_hw_cycle_counters_update(common);
  115. spin_unlock(&common->cc_lock);
  116. if (sc->ps_idle)
  117. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  118. else if (sc->ps_enabled &&
  119. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  120. PS_WAIT_FOR_CAB |
  121. PS_WAIT_FOR_PSPOLL_DATA |
  122. PS_WAIT_FOR_TX_ACK)))
  123. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  124. unlock:
  125. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  126. }
  127. static void ath_start_ani(struct ath_common *common)
  128. {
  129. struct ath_hw *ah = common->ah;
  130. unsigned long timestamp = jiffies_to_msecs(jiffies);
  131. struct ath_softc *sc = (struct ath_softc *) common->priv;
  132. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  133. return;
  134. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  135. return;
  136. common->ani.longcal_timer = timestamp;
  137. common->ani.shortcal_timer = timestamp;
  138. common->ani.checkani_timer = timestamp;
  139. mod_timer(&common->ani.timer,
  140. jiffies +
  141. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  142. }
  143. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  144. {
  145. struct ath_hw *ah = sc->sc_ah;
  146. struct ath9k_channel *chan = &ah->channels[channel];
  147. struct survey_info *survey = &sc->survey[channel];
  148. if (chan->noisefloor) {
  149. survey->filled |= SURVEY_INFO_NOISE_DBM;
  150. survey->noise = chan->noisefloor;
  151. }
  152. }
  153. static void ath_update_survey_stats(struct ath_softc *sc)
  154. {
  155. struct ath_hw *ah = sc->sc_ah;
  156. struct ath_common *common = ath9k_hw_common(ah);
  157. int pos = ah->curchan - &ah->channels[0];
  158. struct survey_info *survey = &sc->survey[pos];
  159. struct ath_cycle_counters *cc = &common->cc_survey;
  160. unsigned int div = common->clockrate * 1000;
  161. if (!ah->curchan)
  162. return;
  163. if (ah->power_mode == ATH9K_PM_AWAKE)
  164. ath_hw_cycle_counters_update(common);
  165. if (cc->cycles > 0) {
  166. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  167. SURVEY_INFO_CHANNEL_TIME_BUSY |
  168. SURVEY_INFO_CHANNEL_TIME_RX |
  169. SURVEY_INFO_CHANNEL_TIME_TX;
  170. survey->channel_time += cc->cycles / div;
  171. survey->channel_time_busy += cc->rx_busy / div;
  172. survey->channel_time_rx += cc->rx_frame / div;
  173. survey->channel_time_tx += cc->tx_frame / div;
  174. }
  175. memset(cc, 0, sizeof(*cc));
  176. ath_update_survey_nf(sc, pos);
  177. }
  178. /*
  179. * Set/change channels. If the channel is really being changed, it's done
  180. * by reseting the chip. To accomplish this we must first cleanup any pending
  181. * DMA, then restart stuff.
  182. */
  183. int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  184. struct ath9k_channel *hchan)
  185. {
  186. struct ath_wiphy *aphy = hw->priv;
  187. struct ath_hw *ah = sc->sc_ah;
  188. struct ath_common *common = ath9k_hw_common(ah);
  189. struct ieee80211_conf *conf = &common->hw->conf;
  190. bool fastcc = true, stopped;
  191. struct ieee80211_channel *channel = hw->conf.channel;
  192. struct ath9k_hw_cal_data *caldata = NULL;
  193. int r;
  194. if (sc->sc_flags & SC_OP_INVALID)
  195. return -EIO;
  196. del_timer_sync(&common->ani.timer);
  197. cancel_work_sync(&sc->paprd_work);
  198. cancel_work_sync(&sc->hw_check_work);
  199. cancel_delayed_work_sync(&sc->tx_complete_work);
  200. ath9k_ps_wakeup(sc);
  201. spin_lock_bh(&sc->sc_pcu_lock);
  202. /*
  203. * This is only performed if the channel settings have
  204. * actually changed.
  205. *
  206. * To switch channels clear any pending DMA operations;
  207. * wait long enough for the RX fifo to drain, reset the
  208. * hardware at the new frequency, and then re-enable
  209. * the relevant bits of the h/w.
  210. */
  211. ath9k_hw_disable_interrupts(ah);
  212. stopped = ath_drain_all_txq(sc, false);
  213. if (!ath_stoprecv(sc))
  214. stopped = false;
  215. /* XXX: do not flush receive queue here. We don't want
  216. * to flush data frames already in queue because of
  217. * changing channel. */
  218. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  219. fastcc = false;
  220. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  221. caldata = &aphy->caldata;
  222. ath_dbg(common, ATH_DBG_CONFIG,
  223. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  224. sc->sc_ah->curchan->channel,
  225. channel->center_freq, conf_is_ht40(conf),
  226. fastcc);
  227. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  228. if (r) {
  229. ath_err(common,
  230. "Unable to reset channel (%u MHz), reset status %d\n",
  231. channel->center_freq, r);
  232. goto ps_restore;
  233. }
  234. if (ath_startrecv(sc) != 0) {
  235. ath_err(common, "Unable to restart recv logic\n");
  236. r = -EIO;
  237. goto ps_restore;
  238. }
  239. ath_update_txpow(sc);
  240. ath9k_hw_set_interrupts(ah, ah->imask);
  241. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  242. ath_beacon_config(sc, NULL);
  243. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  244. ath_start_ani(common);
  245. }
  246. ps_restore:
  247. spin_unlock_bh(&sc->sc_pcu_lock);
  248. ath9k_ps_restore(sc);
  249. return r;
  250. }
  251. static void ath_paprd_activate(struct ath_softc *sc)
  252. {
  253. struct ath_hw *ah = sc->sc_ah;
  254. struct ath9k_hw_cal_data *caldata = ah->caldata;
  255. struct ath_common *common = ath9k_hw_common(ah);
  256. int chain;
  257. if (!caldata || !caldata->paprd_done)
  258. return;
  259. ath9k_ps_wakeup(sc);
  260. ar9003_paprd_enable(ah, false);
  261. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  262. if (!(common->tx_chainmask & BIT(chain)))
  263. continue;
  264. ar9003_paprd_populate_single_table(ah, caldata, chain);
  265. }
  266. ar9003_paprd_enable(ah, true);
  267. ath9k_ps_restore(sc);
  268. }
  269. void ath_paprd_calibrate(struct work_struct *work)
  270. {
  271. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  272. struct ieee80211_hw *hw = sc->hw;
  273. struct ath_hw *ah = sc->sc_ah;
  274. struct ieee80211_hdr *hdr;
  275. struct sk_buff *skb = NULL;
  276. struct ieee80211_tx_info *tx_info;
  277. int band = hw->conf.channel->band;
  278. struct ieee80211_supported_band *sband = &sc->sbands[band];
  279. struct ath_tx_control txctl;
  280. struct ath9k_hw_cal_data *caldata = ah->caldata;
  281. struct ath_common *common = ath9k_hw_common(ah);
  282. int ftype;
  283. int chain_ok = 0;
  284. int chain;
  285. int len = 1800;
  286. int time_left;
  287. int i;
  288. if (!caldata)
  289. return;
  290. skb = alloc_skb(len, GFP_KERNEL);
  291. if (!skb)
  292. return;
  293. tx_info = IEEE80211_SKB_CB(skb);
  294. skb_put(skb, len);
  295. memset(skb->data, 0, len);
  296. hdr = (struct ieee80211_hdr *)skb->data;
  297. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  298. hdr->frame_control = cpu_to_le16(ftype);
  299. hdr->duration_id = cpu_to_le16(10);
  300. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  301. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  302. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  303. memset(&txctl, 0, sizeof(txctl));
  304. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  305. ath9k_ps_wakeup(sc);
  306. ar9003_paprd_init_table(ah);
  307. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  308. if (!(common->tx_chainmask & BIT(chain)))
  309. continue;
  310. chain_ok = 0;
  311. memset(tx_info, 0, sizeof(*tx_info));
  312. tx_info->band = band;
  313. for (i = 0; i < 4; i++) {
  314. tx_info->control.rates[i].idx = sband->n_bitrates - 1;
  315. tx_info->control.rates[i].count = 6;
  316. }
  317. init_completion(&sc->paprd_complete);
  318. sc->paprd_pending = true;
  319. ar9003_paprd_setup_gain_table(ah, chain);
  320. txctl.paprd = BIT(chain);
  321. if (ath_tx_start(hw, skb, &txctl) != 0)
  322. break;
  323. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  324. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  325. sc->paprd_pending = false;
  326. if (!time_left) {
  327. ath_dbg(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
  328. "Timeout waiting for paprd training on TX chain %d\n",
  329. chain);
  330. goto fail_paprd;
  331. }
  332. if (!ar9003_paprd_is_done(ah))
  333. break;
  334. if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
  335. break;
  336. chain_ok = 1;
  337. }
  338. kfree_skb(skb);
  339. if (chain_ok) {
  340. caldata->paprd_done = true;
  341. ath_paprd_activate(sc);
  342. }
  343. fail_paprd:
  344. ath9k_ps_restore(sc);
  345. }
  346. /*
  347. * This routine performs the periodic noise floor calibration function
  348. * that is used to adjust and optimize the chip performance. This
  349. * takes environmental changes (location, temperature) into account.
  350. * When the task is complete, it reschedules itself depending on the
  351. * appropriate interval that was calculated.
  352. */
  353. void ath_ani_calibrate(unsigned long data)
  354. {
  355. struct ath_softc *sc = (struct ath_softc *)data;
  356. struct ath_hw *ah = sc->sc_ah;
  357. struct ath_common *common = ath9k_hw_common(ah);
  358. bool longcal = false;
  359. bool shortcal = false;
  360. bool aniflag = false;
  361. unsigned int timestamp = jiffies_to_msecs(jiffies);
  362. u32 cal_interval, short_cal_interval, long_cal_interval;
  363. unsigned long flags;
  364. if (ah->caldata && ah->caldata->nfcal_interference)
  365. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  366. else
  367. long_cal_interval = ATH_LONG_CALINTERVAL;
  368. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  369. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  370. /* Only calibrate if awake */
  371. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  372. goto set_timer;
  373. ath9k_ps_wakeup(sc);
  374. /* Long calibration runs independently of short calibration. */
  375. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  376. longcal = true;
  377. ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  378. common->ani.longcal_timer = timestamp;
  379. }
  380. /* Short calibration applies only while caldone is false */
  381. if (!common->ani.caldone) {
  382. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  383. shortcal = true;
  384. ath_dbg(common, ATH_DBG_ANI,
  385. "shortcal @%lu\n", jiffies);
  386. common->ani.shortcal_timer = timestamp;
  387. common->ani.resetcal_timer = timestamp;
  388. }
  389. } else {
  390. if ((timestamp - common->ani.resetcal_timer) >=
  391. ATH_RESTART_CALINTERVAL) {
  392. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  393. if (common->ani.caldone)
  394. common->ani.resetcal_timer = timestamp;
  395. }
  396. }
  397. /* Verify whether we must check ANI */
  398. if ((timestamp - common->ani.checkani_timer) >=
  399. ah->config.ani_poll_interval) {
  400. aniflag = true;
  401. common->ani.checkani_timer = timestamp;
  402. }
  403. /* Skip all processing if there's nothing to do. */
  404. if (longcal || shortcal || aniflag) {
  405. /* Call ANI routine if necessary */
  406. if (aniflag) {
  407. spin_lock_irqsave(&common->cc_lock, flags);
  408. ath9k_hw_ani_monitor(ah, ah->curchan);
  409. ath_update_survey_stats(sc);
  410. spin_unlock_irqrestore(&common->cc_lock, flags);
  411. }
  412. /* Perform calibration if necessary */
  413. if (longcal || shortcal) {
  414. common->ani.caldone =
  415. ath9k_hw_calibrate(ah,
  416. ah->curchan,
  417. common->rx_chainmask,
  418. longcal);
  419. }
  420. }
  421. ath9k_ps_restore(sc);
  422. set_timer:
  423. /*
  424. * Set timer interval based on previous results.
  425. * The interval must be the shortest necessary to satisfy ANI,
  426. * short calibration and long calibration.
  427. */
  428. cal_interval = ATH_LONG_CALINTERVAL;
  429. if (sc->sc_ah->config.enable_ani)
  430. cal_interval = min(cal_interval,
  431. (u32)ah->config.ani_poll_interval);
  432. if (!common->ani.caldone)
  433. cal_interval = min(cal_interval, (u32)short_cal_interval);
  434. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  435. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  436. if (!ah->caldata->paprd_done)
  437. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  438. else
  439. ath_paprd_activate(sc);
  440. }
  441. }
  442. /*
  443. * Update tx/rx chainmask. For legacy association,
  444. * hard code chainmask to 1x1, for 11n association, use
  445. * the chainmask configuration, for bt coexistence, use
  446. * the chainmask configuration even in legacy mode.
  447. */
  448. void ath_update_chainmask(struct ath_softc *sc, int is_ht)
  449. {
  450. struct ath_hw *ah = sc->sc_ah;
  451. struct ath_common *common = ath9k_hw_common(ah);
  452. if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
  453. (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
  454. common->tx_chainmask = ah->caps.tx_chainmask;
  455. common->rx_chainmask = ah->caps.rx_chainmask;
  456. } else {
  457. common->tx_chainmask = 1;
  458. common->rx_chainmask = 1;
  459. }
  460. ath_dbg(common, ATH_DBG_CONFIG,
  461. "tx chmask: %d, rx chmask: %d\n",
  462. common->tx_chainmask,
  463. common->rx_chainmask);
  464. }
  465. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  466. {
  467. struct ath_node *an;
  468. struct ath_hw *ah = sc->sc_ah;
  469. an = (struct ath_node *)sta->drv_priv;
  470. if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
  471. sc->sc_flags |= SC_OP_ENABLE_APM;
  472. if (sc->sc_flags & SC_OP_TXAGGR) {
  473. ath_tx_node_init(sc, an);
  474. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  475. sta->ht_cap.ampdu_factor);
  476. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  477. }
  478. }
  479. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  480. {
  481. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  482. if (sc->sc_flags & SC_OP_TXAGGR)
  483. ath_tx_node_cleanup(sc, an);
  484. }
  485. void ath_hw_check(struct work_struct *work)
  486. {
  487. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  488. int i;
  489. ath9k_ps_wakeup(sc);
  490. for (i = 0; i < 3; i++) {
  491. if (ath9k_hw_check_alive(sc->sc_ah))
  492. goto out;
  493. msleep(1);
  494. }
  495. ath_reset(sc, true);
  496. out:
  497. ath9k_ps_restore(sc);
  498. }
  499. void ath9k_tasklet(unsigned long data)
  500. {
  501. struct ath_softc *sc = (struct ath_softc *)data;
  502. struct ath_hw *ah = sc->sc_ah;
  503. struct ath_common *common = ath9k_hw_common(ah);
  504. u32 status = sc->intrstatus;
  505. u32 rxmask;
  506. ath9k_ps_wakeup(sc);
  507. if (status & ATH9K_INT_FATAL) {
  508. ath_reset(sc, true);
  509. ath9k_ps_restore(sc);
  510. return;
  511. }
  512. spin_lock_bh(&sc->sc_pcu_lock);
  513. if (!ath9k_hw_check_alive(ah))
  514. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  515. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  516. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  517. ATH9K_INT_RXORN);
  518. else
  519. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  520. if (status & rxmask) {
  521. /* Check for high priority Rx first */
  522. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  523. (status & ATH9K_INT_RXHP))
  524. ath_rx_tasklet(sc, 0, true);
  525. ath_rx_tasklet(sc, 0, false);
  526. }
  527. if (status & ATH9K_INT_TX) {
  528. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  529. ath_tx_edma_tasklet(sc);
  530. else
  531. ath_tx_tasklet(sc);
  532. }
  533. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  534. /*
  535. * TSF sync does not look correct; remain awake to sync with
  536. * the next Beacon.
  537. */
  538. ath_dbg(common, ATH_DBG_PS,
  539. "TSFOOR - Sync with next Beacon\n");
  540. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  541. }
  542. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  543. if (status & ATH9K_INT_GENTIMER)
  544. ath_gen_timer_isr(sc->sc_ah);
  545. /* re-enable hardware interrupt */
  546. ath9k_hw_enable_interrupts(ah);
  547. spin_unlock_bh(&sc->sc_pcu_lock);
  548. ath9k_ps_restore(sc);
  549. }
  550. irqreturn_t ath_isr(int irq, void *dev)
  551. {
  552. #define SCHED_INTR ( \
  553. ATH9K_INT_FATAL | \
  554. ATH9K_INT_RXORN | \
  555. ATH9K_INT_RXEOL | \
  556. ATH9K_INT_RX | \
  557. ATH9K_INT_RXLP | \
  558. ATH9K_INT_RXHP | \
  559. ATH9K_INT_TX | \
  560. ATH9K_INT_BMISS | \
  561. ATH9K_INT_CST | \
  562. ATH9K_INT_TSFOOR | \
  563. ATH9K_INT_GENTIMER)
  564. struct ath_softc *sc = dev;
  565. struct ath_hw *ah = sc->sc_ah;
  566. struct ath_common *common = ath9k_hw_common(ah);
  567. enum ath9k_int status;
  568. bool sched = false;
  569. /*
  570. * The hardware is not ready/present, don't
  571. * touch anything. Note this can happen early
  572. * on if the IRQ is shared.
  573. */
  574. if (sc->sc_flags & SC_OP_INVALID)
  575. return IRQ_NONE;
  576. /* shared irq, not for us */
  577. if (!ath9k_hw_intrpend(ah))
  578. return IRQ_NONE;
  579. /*
  580. * Figure out the reason(s) for the interrupt. Note
  581. * that the hal returns a pseudo-ISR that may include
  582. * bits we haven't explicitly enabled so we mask the
  583. * value to insure we only process bits we requested.
  584. */
  585. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  586. status &= ah->imask; /* discard unasked-for bits */
  587. /*
  588. * If there are no status bits set, then this interrupt was not
  589. * for me (should have been caught above).
  590. */
  591. if (!status)
  592. return IRQ_NONE;
  593. /* Cache the status */
  594. sc->intrstatus = status;
  595. if (status & SCHED_INTR)
  596. sched = true;
  597. /*
  598. * If a FATAL or RXORN interrupt is received, we have to reset the
  599. * chip immediately.
  600. */
  601. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  602. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  603. goto chip_reset;
  604. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  605. (status & ATH9K_INT_BB_WATCHDOG)) {
  606. spin_lock(&common->cc_lock);
  607. ath_hw_cycle_counters_update(common);
  608. ar9003_hw_bb_watchdog_dbg_info(ah);
  609. spin_unlock(&common->cc_lock);
  610. goto chip_reset;
  611. }
  612. if (status & ATH9K_INT_SWBA)
  613. tasklet_schedule(&sc->bcon_tasklet);
  614. if (status & ATH9K_INT_TXURN)
  615. ath9k_hw_updatetxtriglevel(ah, true);
  616. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  617. if (status & ATH9K_INT_RXEOL) {
  618. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  619. ath9k_hw_set_interrupts(ah, ah->imask);
  620. }
  621. }
  622. if (status & ATH9K_INT_MIB) {
  623. /*
  624. * Disable interrupts until we service the MIB
  625. * interrupt; otherwise it will continue to
  626. * fire.
  627. */
  628. ath9k_hw_disable_interrupts(ah);
  629. /*
  630. * Let the hal handle the event. We assume
  631. * it will clear whatever condition caused
  632. * the interrupt.
  633. */
  634. spin_lock(&common->cc_lock);
  635. ath9k_hw_proc_mib_event(ah);
  636. spin_unlock(&common->cc_lock);
  637. ath9k_hw_enable_interrupts(ah);
  638. }
  639. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  640. if (status & ATH9K_INT_TIM_TIMER) {
  641. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  642. goto chip_reset;
  643. /* Clear RxAbort bit so that we can
  644. * receive frames */
  645. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  646. ath9k_hw_setrxabort(sc->sc_ah, 0);
  647. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  648. }
  649. chip_reset:
  650. ath_debug_stat_interrupt(sc, status);
  651. if (sched) {
  652. /* turn off every interrupt */
  653. ath9k_hw_disable_interrupts(ah);
  654. tasklet_schedule(&sc->intr_tq);
  655. }
  656. return IRQ_HANDLED;
  657. #undef SCHED_INTR
  658. }
  659. static u32 ath_get_extchanmode(struct ath_softc *sc,
  660. struct ieee80211_channel *chan,
  661. enum nl80211_channel_type channel_type)
  662. {
  663. u32 chanmode = 0;
  664. switch (chan->band) {
  665. case IEEE80211_BAND_2GHZ:
  666. switch(channel_type) {
  667. case NL80211_CHAN_NO_HT:
  668. case NL80211_CHAN_HT20:
  669. chanmode = CHANNEL_G_HT20;
  670. break;
  671. case NL80211_CHAN_HT40PLUS:
  672. chanmode = CHANNEL_G_HT40PLUS;
  673. break;
  674. case NL80211_CHAN_HT40MINUS:
  675. chanmode = CHANNEL_G_HT40MINUS;
  676. break;
  677. }
  678. break;
  679. case IEEE80211_BAND_5GHZ:
  680. switch(channel_type) {
  681. case NL80211_CHAN_NO_HT:
  682. case NL80211_CHAN_HT20:
  683. chanmode = CHANNEL_A_HT20;
  684. break;
  685. case NL80211_CHAN_HT40PLUS:
  686. chanmode = CHANNEL_A_HT40PLUS;
  687. break;
  688. case NL80211_CHAN_HT40MINUS:
  689. chanmode = CHANNEL_A_HT40MINUS;
  690. break;
  691. }
  692. break;
  693. default:
  694. break;
  695. }
  696. return chanmode;
  697. }
  698. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  699. struct ieee80211_hw *hw,
  700. struct ieee80211_vif *vif,
  701. struct ieee80211_bss_conf *bss_conf)
  702. {
  703. struct ath_wiphy *aphy = hw->priv;
  704. struct ath_hw *ah = sc->sc_ah;
  705. struct ath_common *common = ath9k_hw_common(ah);
  706. if (bss_conf->assoc) {
  707. ath_dbg(common, ATH_DBG_CONFIG,
  708. "Bss Info ASSOC %d, bssid: %pM\n",
  709. bss_conf->aid, common->curbssid);
  710. /* New association, store aid */
  711. common->curaid = bss_conf->aid;
  712. ath9k_hw_write_associd(ah);
  713. /*
  714. * Request a re-configuration of Beacon related timers
  715. * on the receipt of the first Beacon frame (i.e.,
  716. * after time sync with the AP).
  717. */
  718. sc->ps_flags |= PS_BEACON_SYNC;
  719. /* Configure the beacon */
  720. ath_beacon_config(sc, vif);
  721. /* Reset rssi stats */
  722. aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
  723. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  724. sc->sc_flags |= SC_OP_ANI_RUN;
  725. ath_start_ani(common);
  726. } else {
  727. ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
  728. common->curaid = 0;
  729. /* Stop ANI */
  730. sc->sc_flags &= ~SC_OP_ANI_RUN;
  731. del_timer_sync(&common->ani.timer);
  732. }
  733. }
  734. void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  735. {
  736. struct ath_hw *ah = sc->sc_ah;
  737. struct ath_common *common = ath9k_hw_common(ah);
  738. struct ieee80211_channel *channel = hw->conf.channel;
  739. int r;
  740. ath9k_ps_wakeup(sc);
  741. spin_lock_bh(&sc->sc_pcu_lock);
  742. ath9k_hw_configpcipowersave(ah, 0, 0);
  743. if (!ah->curchan)
  744. ah->curchan = ath_get_curchannel(sc, sc->hw);
  745. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  746. if (r) {
  747. ath_err(common,
  748. "Unable to reset channel (%u MHz), reset status %d\n",
  749. channel->center_freq, r);
  750. }
  751. ath_update_txpow(sc);
  752. if (ath_startrecv(sc) != 0) {
  753. ath_err(common, "Unable to restart recv logic\n");
  754. goto out;
  755. }
  756. if (sc->sc_flags & SC_OP_BEACONS)
  757. ath_beacon_config(sc, NULL); /* restart beacons */
  758. /* Re-Enable interrupts */
  759. ath9k_hw_set_interrupts(ah, ah->imask);
  760. /* Enable LED */
  761. ath9k_hw_cfg_output(ah, ah->led_pin,
  762. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  763. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  764. ieee80211_wake_queues(hw);
  765. out:
  766. spin_unlock_bh(&sc->sc_pcu_lock);
  767. ath9k_ps_restore(sc);
  768. }
  769. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  770. {
  771. struct ath_hw *ah = sc->sc_ah;
  772. struct ieee80211_channel *channel = hw->conf.channel;
  773. int r;
  774. ath9k_ps_wakeup(sc);
  775. spin_lock_bh(&sc->sc_pcu_lock);
  776. ieee80211_stop_queues(hw);
  777. /*
  778. * Keep the LED on when the radio is disabled
  779. * during idle unassociated state.
  780. */
  781. if (!sc->ps_idle) {
  782. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  783. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  784. }
  785. /* Disable interrupts */
  786. ath9k_hw_disable_interrupts(ah);
  787. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  788. ath_stoprecv(sc); /* turn off frame recv */
  789. ath_flushrecv(sc); /* flush recv queue */
  790. if (!ah->curchan)
  791. ah->curchan = ath_get_curchannel(sc, hw);
  792. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  793. if (r) {
  794. ath_err(ath9k_hw_common(sc->sc_ah),
  795. "Unable to reset channel (%u MHz), reset status %d\n",
  796. channel->center_freq, r);
  797. }
  798. ath9k_hw_phy_disable(ah);
  799. ath9k_hw_configpcipowersave(ah, 1, 1);
  800. spin_unlock_bh(&sc->sc_pcu_lock);
  801. ath9k_ps_restore(sc);
  802. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  803. }
  804. int ath_reset(struct ath_softc *sc, bool retry_tx)
  805. {
  806. struct ath_hw *ah = sc->sc_ah;
  807. struct ath_common *common = ath9k_hw_common(ah);
  808. struct ieee80211_hw *hw = sc->hw;
  809. int r;
  810. /* Stop ANI */
  811. del_timer_sync(&common->ani.timer);
  812. spin_lock_bh(&sc->sc_pcu_lock);
  813. ieee80211_stop_queues(hw);
  814. ath9k_hw_disable_interrupts(ah);
  815. ath_drain_all_txq(sc, retry_tx);
  816. ath_stoprecv(sc);
  817. ath_flushrecv(sc);
  818. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  819. if (r)
  820. ath_err(common,
  821. "Unable to reset hardware; reset status %d\n", r);
  822. if (ath_startrecv(sc) != 0)
  823. ath_err(common, "Unable to start recv logic\n");
  824. /*
  825. * We may be doing a reset in response to a request
  826. * that changes the channel so update any state that
  827. * might change as a result.
  828. */
  829. ath_update_txpow(sc);
  830. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  831. ath_beacon_config(sc, NULL); /* restart beacons */
  832. ath9k_hw_set_interrupts(ah, ah->imask);
  833. if (retry_tx) {
  834. int i;
  835. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  836. if (ATH_TXQ_SETUP(sc, i)) {
  837. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  838. ath_txq_schedule(sc, &sc->tx.txq[i]);
  839. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  840. }
  841. }
  842. }
  843. ieee80211_wake_queues(hw);
  844. spin_unlock_bh(&sc->sc_pcu_lock);
  845. /* Start ANI */
  846. ath_start_ani(common);
  847. return r;
  848. }
  849. /* XXX: Remove me once we don't depend on ath9k_channel for all
  850. * this redundant data */
  851. void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
  852. struct ath9k_channel *ichan)
  853. {
  854. struct ieee80211_channel *chan = hw->conf.channel;
  855. struct ieee80211_conf *conf = &hw->conf;
  856. ichan->channel = chan->center_freq;
  857. ichan->chan = chan;
  858. if (chan->band == IEEE80211_BAND_2GHZ) {
  859. ichan->chanmode = CHANNEL_G;
  860. ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
  861. } else {
  862. ichan->chanmode = CHANNEL_A;
  863. ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
  864. }
  865. if (conf_is_ht(conf))
  866. ichan->chanmode = ath_get_extchanmode(sc, chan,
  867. conf->channel_type);
  868. }
  869. /**********************/
  870. /* mac80211 callbacks */
  871. /**********************/
  872. static int ath9k_start(struct ieee80211_hw *hw)
  873. {
  874. struct ath_wiphy *aphy = hw->priv;
  875. struct ath_softc *sc = aphy->sc;
  876. struct ath_hw *ah = sc->sc_ah;
  877. struct ath_common *common = ath9k_hw_common(ah);
  878. struct ieee80211_channel *curchan = hw->conf.channel;
  879. struct ath9k_channel *init_channel;
  880. int r;
  881. ath_dbg(common, ATH_DBG_CONFIG,
  882. "Starting driver with initial channel: %d MHz\n",
  883. curchan->center_freq);
  884. mutex_lock(&sc->mutex);
  885. if (ath9k_wiphy_started(sc)) {
  886. if (sc->chan_idx == curchan->hw_value) {
  887. /*
  888. * Already on the operational channel, the new wiphy
  889. * can be marked active.
  890. */
  891. aphy->state = ATH_WIPHY_ACTIVE;
  892. ieee80211_wake_queues(hw);
  893. } else {
  894. /*
  895. * Another wiphy is on another channel, start the new
  896. * wiphy in paused state.
  897. */
  898. aphy->state = ATH_WIPHY_PAUSED;
  899. ieee80211_stop_queues(hw);
  900. }
  901. mutex_unlock(&sc->mutex);
  902. return 0;
  903. }
  904. aphy->state = ATH_WIPHY_ACTIVE;
  905. /* setup initial channel */
  906. sc->chan_idx = curchan->hw_value;
  907. init_channel = ath_get_curchannel(sc, hw);
  908. /* Reset SERDES registers */
  909. ath9k_hw_configpcipowersave(ah, 0, 0);
  910. /*
  911. * The basic interface to setting the hardware in a good
  912. * state is ``reset''. On return the hardware is known to
  913. * be powered up and with interrupts disabled. This must
  914. * be followed by initialization of the appropriate bits
  915. * and then setup of the interrupt mask.
  916. */
  917. spin_lock_bh(&sc->sc_pcu_lock);
  918. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  919. if (r) {
  920. ath_err(common,
  921. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  922. r, curchan->center_freq);
  923. spin_unlock_bh(&sc->sc_pcu_lock);
  924. goto mutex_unlock;
  925. }
  926. /*
  927. * This is needed only to setup initial state
  928. * but it's best done after a reset.
  929. */
  930. ath_update_txpow(sc);
  931. /*
  932. * Setup the hardware after reset:
  933. * The receive engine is set going.
  934. * Frame transmit is handled entirely
  935. * in the frame output path; there's nothing to do
  936. * here except setup the interrupt mask.
  937. */
  938. if (ath_startrecv(sc) != 0) {
  939. ath_err(common, "Unable to start recv logic\n");
  940. r = -EIO;
  941. spin_unlock_bh(&sc->sc_pcu_lock);
  942. goto mutex_unlock;
  943. }
  944. spin_unlock_bh(&sc->sc_pcu_lock);
  945. /* Setup our intr mask. */
  946. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  947. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  948. ATH9K_INT_GLOBAL;
  949. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  950. ah->imask |= ATH9K_INT_RXHP |
  951. ATH9K_INT_RXLP |
  952. ATH9K_INT_BB_WATCHDOG;
  953. else
  954. ah->imask |= ATH9K_INT_RX;
  955. ah->imask |= ATH9K_INT_GTT;
  956. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  957. ah->imask |= ATH9K_INT_CST;
  958. sc->sc_flags &= ~SC_OP_INVALID;
  959. sc->sc_ah->is_monitoring = false;
  960. /* Disable BMISS interrupt when we're not associated */
  961. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  962. ath9k_hw_set_interrupts(ah, ah->imask);
  963. ieee80211_wake_queues(hw);
  964. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  965. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  966. !ah->btcoex_hw.enabled) {
  967. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  968. AR_STOMP_LOW_WLAN_WGHT);
  969. ath9k_hw_btcoex_enable(ah);
  970. if (common->bus_ops->bt_coex_prep)
  971. common->bus_ops->bt_coex_prep(common);
  972. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  973. ath9k_btcoex_timer_resume(sc);
  974. }
  975. pm_qos_update_request(&sc->pm_qos_req, 55);
  976. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  977. common->bus_ops->extn_synch_en(common);
  978. mutex_unlock:
  979. mutex_unlock(&sc->mutex);
  980. return r;
  981. }
  982. static int ath9k_tx(struct ieee80211_hw *hw,
  983. struct sk_buff *skb)
  984. {
  985. struct ath_wiphy *aphy = hw->priv;
  986. struct ath_softc *sc = aphy->sc;
  987. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  988. struct ath_tx_control txctl;
  989. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  990. if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
  991. ath_dbg(common, ATH_DBG_XMIT,
  992. "ath9k: %s: TX in unexpected wiphy state %d\n",
  993. wiphy_name(hw->wiphy), aphy->state);
  994. goto exit;
  995. }
  996. if (sc->ps_enabled) {
  997. /*
  998. * mac80211 does not set PM field for normal data frames, so we
  999. * need to update that based on the current PS mode.
  1000. */
  1001. if (ieee80211_is_data(hdr->frame_control) &&
  1002. !ieee80211_is_nullfunc(hdr->frame_control) &&
  1003. !ieee80211_has_pm(hdr->frame_control)) {
  1004. ath_dbg(common, ATH_DBG_PS,
  1005. "Add PM=1 for a TX frame while in PS mode\n");
  1006. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  1007. }
  1008. }
  1009. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  1010. /*
  1011. * We are using PS-Poll and mac80211 can request TX while in
  1012. * power save mode. Need to wake up hardware for the TX to be
  1013. * completed and if needed, also for RX of buffered frames.
  1014. */
  1015. ath9k_ps_wakeup(sc);
  1016. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  1017. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1018. if (ieee80211_is_pspoll(hdr->frame_control)) {
  1019. ath_dbg(common, ATH_DBG_PS,
  1020. "Sending PS-Poll to pick a buffered frame\n");
  1021. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  1022. } else {
  1023. ath_dbg(common, ATH_DBG_PS,
  1024. "Wake up to complete TX\n");
  1025. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  1026. }
  1027. /*
  1028. * The actual restore operation will happen only after
  1029. * the sc_flags bit is cleared. We are just dropping
  1030. * the ps_usecount here.
  1031. */
  1032. ath9k_ps_restore(sc);
  1033. }
  1034. memset(&txctl, 0, sizeof(struct ath_tx_control));
  1035. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  1036. ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  1037. if (ath_tx_start(hw, skb, &txctl) != 0) {
  1038. ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
  1039. goto exit;
  1040. }
  1041. return 0;
  1042. exit:
  1043. dev_kfree_skb_any(skb);
  1044. return 0;
  1045. }
  1046. static void ath9k_stop(struct ieee80211_hw *hw)
  1047. {
  1048. struct ath_wiphy *aphy = hw->priv;
  1049. struct ath_softc *sc = aphy->sc;
  1050. struct ath_hw *ah = sc->sc_ah;
  1051. struct ath_common *common = ath9k_hw_common(ah);
  1052. int i;
  1053. mutex_lock(&sc->mutex);
  1054. aphy->state = ATH_WIPHY_INACTIVE;
  1055. if (led_blink)
  1056. cancel_delayed_work_sync(&sc->ath_led_blink_work);
  1057. cancel_delayed_work_sync(&sc->tx_complete_work);
  1058. cancel_work_sync(&sc->paprd_work);
  1059. cancel_work_sync(&sc->hw_check_work);
  1060. for (i = 0; i < sc->num_sec_wiphy; i++) {
  1061. if (sc->sec_wiphy[i])
  1062. break;
  1063. }
  1064. if (i == sc->num_sec_wiphy) {
  1065. cancel_delayed_work_sync(&sc->wiphy_work);
  1066. cancel_work_sync(&sc->chan_work);
  1067. }
  1068. if (sc->sc_flags & SC_OP_INVALID) {
  1069. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1070. mutex_unlock(&sc->mutex);
  1071. return;
  1072. }
  1073. if (ath9k_wiphy_started(sc)) {
  1074. mutex_unlock(&sc->mutex);
  1075. return; /* another wiphy still in use */
  1076. }
  1077. /* Ensure HW is awake when we try to shut it down. */
  1078. ath9k_ps_wakeup(sc);
  1079. if (ah->btcoex_hw.enabled) {
  1080. ath9k_hw_btcoex_disable(ah);
  1081. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1082. ath9k_btcoex_timer_pause(sc);
  1083. }
  1084. spin_lock_bh(&sc->sc_pcu_lock);
  1085. /* make sure h/w will not generate any interrupt
  1086. * before setting the invalid flag. */
  1087. ath9k_hw_disable_interrupts(ah);
  1088. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1089. ath_drain_all_txq(sc, false);
  1090. ath_stoprecv(sc);
  1091. ath9k_hw_phy_disable(ah);
  1092. } else
  1093. sc->rx.rxlink = NULL;
  1094. /* disable HAL and put h/w to sleep */
  1095. ath9k_hw_disable(ah);
  1096. ath9k_hw_configpcipowersave(ah, 1, 1);
  1097. spin_unlock_bh(&sc->sc_pcu_lock);
  1098. ath9k_ps_restore(sc);
  1099. sc->ps_idle = true;
  1100. ath_radio_disable(sc, hw);
  1101. sc->sc_flags |= SC_OP_INVALID;
  1102. pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
  1103. mutex_unlock(&sc->mutex);
  1104. ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
  1105. }
  1106. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1107. struct ieee80211_vif *vif)
  1108. {
  1109. struct ath_wiphy *aphy = hw->priv;
  1110. struct ath_softc *sc = aphy->sc;
  1111. struct ath_hw *ah = sc->sc_ah;
  1112. struct ath_common *common = ath9k_hw_common(ah);
  1113. struct ath_vif *avp = (void *)vif->drv_priv;
  1114. enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
  1115. int ret = 0;
  1116. mutex_lock(&sc->mutex);
  1117. switch (vif->type) {
  1118. case NL80211_IFTYPE_STATION:
  1119. ic_opmode = NL80211_IFTYPE_STATION;
  1120. break;
  1121. case NL80211_IFTYPE_WDS:
  1122. ic_opmode = NL80211_IFTYPE_WDS;
  1123. break;
  1124. case NL80211_IFTYPE_ADHOC:
  1125. case NL80211_IFTYPE_AP:
  1126. case NL80211_IFTYPE_MESH_POINT:
  1127. if (sc->nbcnvifs >= ATH_BCBUF) {
  1128. ret = -ENOBUFS;
  1129. goto out;
  1130. }
  1131. ic_opmode = vif->type;
  1132. break;
  1133. default:
  1134. ath_err(common, "Interface type %d not yet supported\n",
  1135. vif->type);
  1136. ret = -EOPNOTSUPP;
  1137. goto out;
  1138. }
  1139. ath_dbg(common, ATH_DBG_CONFIG,
  1140. "Attach a VIF of type: %d\n", ic_opmode);
  1141. /* Set the VIF opmode */
  1142. avp->av_opmode = ic_opmode;
  1143. avp->av_bslot = -1;
  1144. sc->nvifs++;
  1145. ath9k_set_bssid_mask(hw, vif);
  1146. if (sc->nvifs > 1)
  1147. goto out; /* skip global settings for secondary vif */
  1148. if (ic_opmode == NL80211_IFTYPE_AP) {
  1149. ath9k_hw_set_tsfadjust(ah, 1);
  1150. sc->sc_flags |= SC_OP_TSF_RESET;
  1151. }
  1152. /* Set the device opmode */
  1153. ah->opmode = ic_opmode;
  1154. /*
  1155. * Enable MIB interrupts when there are hardware phy counters.
  1156. * Note we only do this (at the moment) for station mode.
  1157. */
  1158. if ((vif->type == NL80211_IFTYPE_STATION) ||
  1159. (vif->type == NL80211_IFTYPE_ADHOC) ||
  1160. (vif->type == NL80211_IFTYPE_MESH_POINT)) {
  1161. if (ah->config.enable_ani)
  1162. ah->imask |= ATH9K_INT_MIB;
  1163. ah->imask |= ATH9K_INT_TSFOOR;
  1164. }
  1165. ath9k_hw_set_interrupts(ah, ah->imask);
  1166. if (vif->type == NL80211_IFTYPE_AP ||
  1167. vif->type == NL80211_IFTYPE_ADHOC) {
  1168. sc->sc_flags |= SC_OP_ANI_RUN;
  1169. ath_start_ani(common);
  1170. }
  1171. out:
  1172. mutex_unlock(&sc->mutex);
  1173. return ret;
  1174. }
  1175. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1176. struct ieee80211_vif *vif)
  1177. {
  1178. struct ath_vif *avp = (void *)vif->drv_priv;
  1179. /* Disable SWBA interrupt */
  1180. sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
  1181. ath9k_ps_wakeup(sc);
  1182. ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
  1183. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1184. tasklet_kill(&sc->bcon_tasklet);
  1185. ath9k_ps_restore(sc);
  1186. ath_beacon_return(sc, avp);
  1187. sc->sc_flags &= ~SC_OP_BEACONS;
  1188. if (sc->nbcnvifs > 0) {
  1189. /* Re-enable beaconing */
  1190. sc->sc_ah->imask |= ATH9K_INT_SWBA;
  1191. ath9k_ps_wakeup(sc);
  1192. ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
  1193. ath9k_ps_restore(sc);
  1194. }
  1195. }
  1196. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1197. struct ieee80211_vif *vif,
  1198. enum nl80211_iftype new_type,
  1199. bool p2p)
  1200. {
  1201. struct ath_wiphy *aphy = hw->priv;
  1202. struct ath_softc *sc = aphy->sc;
  1203. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1204. ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
  1205. mutex_lock(&sc->mutex);
  1206. switch (new_type) {
  1207. case NL80211_IFTYPE_AP:
  1208. case NL80211_IFTYPE_ADHOC:
  1209. if (sc->nbcnvifs >= ATH_BCBUF) {
  1210. ath_err(common, "No beacon slot available\n");
  1211. return -ENOBUFS;
  1212. }
  1213. break;
  1214. case NL80211_IFTYPE_STATION:
  1215. /* Stop ANI */
  1216. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1217. del_timer_sync(&common->ani.timer);
  1218. if ((vif->type == NL80211_IFTYPE_AP) ||
  1219. (vif->type == NL80211_IFTYPE_ADHOC))
  1220. ath9k_reclaim_beacon(sc, vif);
  1221. break;
  1222. default:
  1223. ath_err(common, "Interface type %d not yet supported\n",
  1224. vif->type);
  1225. mutex_unlock(&sc->mutex);
  1226. return -ENOTSUPP;
  1227. }
  1228. vif->type = new_type;
  1229. vif->p2p = p2p;
  1230. mutex_unlock(&sc->mutex);
  1231. return 0;
  1232. }
  1233. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1234. struct ieee80211_vif *vif)
  1235. {
  1236. struct ath_wiphy *aphy = hw->priv;
  1237. struct ath_softc *sc = aphy->sc;
  1238. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1239. ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1240. mutex_lock(&sc->mutex);
  1241. /* Stop ANI */
  1242. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1243. del_timer_sync(&common->ani.timer);
  1244. /* Reclaim beacon resources */
  1245. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  1246. (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1247. (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
  1248. ath9k_reclaim_beacon(sc, vif);
  1249. sc->nvifs--;
  1250. mutex_unlock(&sc->mutex);
  1251. }
  1252. static void ath9k_enable_ps(struct ath_softc *sc)
  1253. {
  1254. struct ath_hw *ah = sc->sc_ah;
  1255. sc->ps_enabled = true;
  1256. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1257. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1258. ah->imask |= ATH9K_INT_TIM_TIMER;
  1259. ath9k_hw_set_interrupts(ah, ah->imask);
  1260. }
  1261. ath9k_hw_setrxabort(ah, 1);
  1262. }
  1263. }
  1264. static void ath9k_disable_ps(struct ath_softc *sc)
  1265. {
  1266. struct ath_hw *ah = sc->sc_ah;
  1267. sc->ps_enabled = false;
  1268. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1269. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1270. ath9k_hw_setrxabort(ah, 0);
  1271. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1272. PS_WAIT_FOR_CAB |
  1273. PS_WAIT_FOR_PSPOLL_DATA |
  1274. PS_WAIT_FOR_TX_ACK);
  1275. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1276. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1277. ath9k_hw_set_interrupts(ah, ah->imask);
  1278. }
  1279. }
  1280. }
  1281. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1282. {
  1283. struct ath_wiphy *aphy = hw->priv;
  1284. struct ath_softc *sc = aphy->sc;
  1285. struct ath_hw *ah = sc->sc_ah;
  1286. struct ath_common *common = ath9k_hw_common(ah);
  1287. struct ieee80211_conf *conf = &hw->conf;
  1288. bool disable_radio;
  1289. mutex_lock(&sc->mutex);
  1290. /*
  1291. * Leave this as the first check because we need to turn on the
  1292. * radio if it was disabled before prior to processing the rest
  1293. * of the changes. Likewise we must only disable the radio towards
  1294. * the end.
  1295. */
  1296. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1297. bool enable_radio;
  1298. bool all_wiphys_idle;
  1299. bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1300. spin_lock_bh(&sc->wiphy_lock);
  1301. all_wiphys_idle = ath9k_all_wiphys_idle(sc);
  1302. ath9k_set_wiphy_idle(aphy, idle);
  1303. enable_radio = (!idle && all_wiphys_idle);
  1304. /*
  1305. * After we unlock here its possible another wiphy
  1306. * can be re-renabled so to account for that we will
  1307. * only disable the radio toward the end of this routine
  1308. * if by then all wiphys are still idle.
  1309. */
  1310. spin_unlock_bh(&sc->wiphy_lock);
  1311. if (enable_radio) {
  1312. sc->ps_idle = false;
  1313. ath_radio_enable(sc, hw);
  1314. ath_dbg(common, ATH_DBG_CONFIG,
  1315. "not-idle: enabling radio\n");
  1316. }
  1317. }
  1318. /*
  1319. * We just prepare to enable PS. We have to wait until our AP has
  1320. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1321. * those ACKs and end up retransmitting the same null data frames.
  1322. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1323. */
  1324. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1325. unsigned long flags;
  1326. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1327. if (conf->flags & IEEE80211_CONF_PS)
  1328. ath9k_enable_ps(sc);
  1329. else
  1330. ath9k_disable_ps(sc);
  1331. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1332. }
  1333. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1334. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1335. ath_dbg(common, ATH_DBG_CONFIG,
  1336. "Monitor mode is enabled\n");
  1337. sc->sc_ah->is_monitoring = true;
  1338. } else {
  1339. ath_dbg(common, ATH_DBG_CONFIG,
  1340. "Monitor mode is disabled\n");
  1341. sc->sc_ah->is_monitoring = false;
  1342. }
  1343. }
  1344. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1345. struct ieee80211_channel *curchan = hw->conf.channel;
  1346. int pos = curchan->hw_value;
  1347. int old_pos = -1;
  1348. unsigned long flags;
  1349. if (ah->curchan)
  1350. old_pos = ah->curchan - &ah->channels[0];
  1351. aphy->chan_idx = pos;
  1352. aphy->chan_is_ht = conf_is_ht(conf);
  1353. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1354. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1355. else
  1356. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1357. if (aphy->state == ATH_WIPHY_SCAN ||
  1358. aphy->state == ATH_WIPHY_ACTIVE)
  1359. ath9k_wiphy_pause_all_forced(sc, aphy);
  1360. else {
  1361. /*
  1362. * Do not change operational channel based on a paused
  1363. * wiphy changes.
  1364. */
  1365. goto skip_chan_change;
  1366. }
  1367. ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
  1368. curchan->center_freq);
  1369. /* XXX: remove me eventualy */
  1370. ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
  1371. ath_update_chainmask(sc, conf_is_ht(conf));
  1372. /* update survey stats for the old channel before switching */
  1373. spin_lock_irqsave(&common->cc_lock, flags);
  1374. ath_update_survey_stats(sc);
  1375. spin_unlock_irqrestore(&common->cc_lock, flags);
  1376. /*
  1377. * If the operating channel changes, change the survey in-use flags
  1378. * along with it.
  1379. * Reset the survey data for the new channel, unless we're switching
  1380. * back to the operating channel from an off-channel operation.
  1381. */
  1382. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1383. sc->cur_survey != &sc->survey[pos]) {
  1384. if (sc->cur_survey)
  1385. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1386. sc->cur_survey = &sc->survey[pos];
  1387. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1388. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1389. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1390. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1391. }
  1392. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1393. ath_err(common, "Unable to set channel\n");
  1394. mutex_unlock(&sc->mutex);
  1395. return -EINVAL;
  1396. }
  1397. /*
  1398. * The most recent snapshot of channel->noisefloor for the old
  1399. * channel is only available after the hardware reset. Copy it to
  1400. * the survey stats now.
  1401. */
  1402. if (old_pos >= 0)
  1403. ath_update_survey_nf(sc, old_pos);
  1404. }
  1405. skip_chan_change:
  1406. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1407. sc->config.txpowlimit = 2 * conf->power_level;
  1408. ath_update_txpow(sc);
  1409. }
  1410. spin_lock_bh(&sc->wiphy_lock);
  1411. disable_radio = ath9k_all_wiphys_idle(sc);
  1412. spin_unlock_bh(&sc->wiphy_lock);
  1413. if (disable_radio) {
  1414. ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1415. sc->ps_idle = true;
  1416. ath_radio_disable(sc, hw);
  1417. }
  1418. mutex_unlock(&sc->mutex);
  1419. return 0;
  1420. }
  1421. #define SUPPORTED_FILTERS \
  1422. (FIF_PROMISC_IN_BSS | \
  1423. FIF_ALLMULTI | \
  1424. FIF_CONTROL | \
  1425. FIF_PSPOLL | \
  1426. FIF_OTHER_BSS | \
  1427. FIF_BCN_PRBRESP_PROMISC | \
  1428. FIF_PROBE_REQ | \
  1429. FIF_FCSFAIL)
  1430. /* FIXME: sc->sc_full_reset ? */
  1431. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1432. unsigned int changed_flags,
  1433. unsigned int *total_flags,
  1434. u64 multicast)
  1435. {
  1436. struct ath_wiphy *aphy = hw->priv;
  1437. struct ath_softc *sc = aphy->sc;
  1438. u32 rfilt;
  1439. changed_flags &= SUPPORTED_FILTERS;
  1440. *total_flags &= SUPPORTED_FILTERS;
  1441. sc->rx.rxfilter = *total_flags;
  1442. ath9k_ps_wakeup(sc);
  1443. rfilt = ath_calcrxfilter(sc);
  1444. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1445. ath9k_ps_restore(sc);
  1446. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1447. "Set HW RX filter: 0x%x\n", rfilt);
  1448. }
  1449. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1450. struct ieee80211_vif *vif,
  1451. struct ieee80211_sta *sta)
  1452. {
  1453. struct ath_wiphy *aphy = hw->priv;
  1454. struct ath_softc *sc = aphy->sc;
  1455. ath_node_attach(sc, sta);
  1456. return 0;
  1457. }
  1458. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1459. struct ieee80211_vif *vif,
  1460. struct ieee80211_sta *sta)
  1461. {
  1462. struct ath_wiphy *aphy = hw->priv;
  1463. struct ath_softc *sc = aphy->sc;
  1464. ath_node_detach(sc, sta);
  1465. return 0;
  1466. }
  1467. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1468. const struct ieee80211_tx_queue_params *params)
  1469. {
  1470. struct ath_wiphy *aphy = hw->priv;
  1471. struct ath_softc *sc = aphy->sc;
  1472. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1473. struct ath_txq *txq;
  1474. struct ath9k_tx_queue_info qi;
  1475. int ret = 0;
  1476. if (queue >= WME_NUM_AC)
  1477. return 0;
  1478. txq = sc->tx.txq_map[queue];
  1479. mutex_lock(&sc->mutex);
  1480. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1481. qi.tqi_aifs = params->aifs;
  1482. qi.tqi_cwmin = params->cw_min;
  1483. qi.tqi_cwmax = params->cw_max;
  1484. qi.tqi_burstTime = params->txop;
  1485. ath_dbg(common, ATH_DBG_CONFIG,
  1486. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1487. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1488. params->cw_max, params->txop);
  1489. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1490. if (ret)
  1491. ath_err(common, "TXQ Update failed\n");
  1492. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1493. if (queue == WME_AC_BE && !ret)
  1494. ath_beaconq_config(sc);
  1495. mutex_unlock(&sc->mutex);
  1496. return ret;
  1497. }
  1498. static int ath9k_set_key(struct ieee80211_hw *hw,
  1499. enum set_key_cmd cmd,
  1500. struct ieee80211_vif *vif,
  1501. struct ieee80211_sta *sta,
  1502. struct ieee80211_key_conf *key)
  1503. {
  1504. struct ath_wiphy *aphy = hw->priv;
  1505. struct ath_softc *sc = aphy->sc;
  1506. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1507. int ret = 0;
  1508. if (modparam_nohwcrypt)
  1509. return -ENOSPC;
  1510. mutex_lock(&sc->mutex);
  1511. ath9k_ps_wakeup(sc);
  1512. ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1513. switch (cmd) {
  1514. case SET_KEY:
  1515. ret = ath_key_config(common, vif, sta, key);
  1516. if (ret >= 0) {
  1517. key->hw_key_idx = ret;
  1518. /* push IV and Michael MIC generation to stack */
  1519. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1520. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1521. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1522. if (sc->sc_ah->sw_mgmt_crypto &&
  1523. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1524. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1525. ret = 0;
  1526. }
  1527. break;
  1528. case DISABLE_KEY:
  1529. ath_key_delete(common, key);
  1530. break;
  1531. default:
  1532. ret = -EINVAL;
  1533. }
  1534. ath9k_ps_restore(sc);
  1535. mutex_unlock(&sc->mutex);
  1536. return ret;
  1537. }
  1538. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1539. struct ieee80211_vif *vif,
  1540. struct ieee80211_bss_conf *bss_conf,
  1541. u32 changed)
  1542. {
  1543. struct ath_wiphy *aphy = hw->priv;
  1544. struct ath_softc *sc = aphy->sc;
  1545. struct ath_hw *ah = sc->sc_ah;
  1546. struct ath_common *common = ath9k_hw_common(ah);
  1547. struct ath_vif *avp = (void *)vif->drv_priv;
  1548. int slottime;
  1549. int error;
  1550. mutex_lock(&sc->mutex);
  1551. if (changed & BSS_CHANGED_BSSID) {
  1552. /* Set BSSID */
  1553. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1554. memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
  1555. common->curaid = 0;
  1556. ath9k_hw_write_associd(ah);
  1557. /* Set aggregation protection mode parameters */
  1558. sc->config.ath_aggr_prot = 0;
  1559. /* Only legacy IBSS for now */
  1560. if (vif->type == NL80211_IFTYPE_ADHOC)
  1561. ath_update_chainmask(sc, 0);
  1562. ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
  1563. common->curbssid, common->curaid);
  1564. /* need to reconfigure the beacon */
  1565. sc->sc_flags &= ~SC_OP_BEACONS ;
  1566. }
  1567. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1568. if ((changed & BSS_CHANGED_BEACON) ||
  1569. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1570. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1571. error = ath_beacon_alloc(aphy, vif);
  1572. if (!error)
  1573. ath_beacon_config(sc, vif);
  1574. }
  1575. if (changed & BSS_CHANGED_ERP_SLOT) {
  1576. if (bss_conf->use_short_slot)
  1577. slottime = 9;
  1578. else
  1579. slottime = 20;
  1580. if (vif->type == NL80211_IFTYPE_AP) {
  1581. /*
  1582. * Defer update, so that connected stations can adjust
  1583. * their settings at the same time.
  1584. * See beacon.c for more details
  1585. */
  1586. sc->beacon.slottime = slottime;
  1587. sc->beacon.updateslot = UPDATE;
  1588. } else {
  1589. ah->slottime = slottime;
  1590. ath9k_hw_init_global_settings(ah);
  1591. }
  1592. }
  1593. /* Disable transmission of beacons */
  1594. if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
  1595. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1596. if (changed & BSS_CHANGED_BEACON_INT) {
  1597. sc->beacon_interval = bss_conf->beacon_int;
  1598. /*
  1599. * In case of AP mode, the HW TSF has to be reset
  1600. * when the beacon interval changes.
  1601. */
  1602. if (vif->type == NL80211_IFTYPE_AP) {
  1603. sc->sc_flags |= SC_OP_TSF_RESET;
  1604. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1605. error = ath_beacon_alloc(aphy, vif);
  1606. if (!error)
  1607. ath_beacon_config(sc, vif);
  1608. } else {
  1609. ath_beacon_config(sc, vif);
  1610. }
  1611. }
  1612. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1613. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1614. bss_conf->use_short_preamble);
  1615. if (bss_conf->use_short_preamble)
  1616. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1617. else
  1618. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1619. }
  1620. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1621. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1622. bss_conf->use_cts_prot);
  1623. if (bss_conf->use_cts_prot &&
  1624. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1625. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1626. else
  1627. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1628. }
  1629. if (changed & BSS_CHANGED_ASSOC) {
  1630. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
  1631. bss_conf->assoc);
  1632. ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
  1633. }
  1634. mutex_unlock(&sc->mutex);
  1635. }
  1636. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1637. {
  1638. u64 tsf;
  1639. struct ath_wiphy *aphy = hw->priv;
  1640. struct ath_softc *sc = aphy->sc;
  1641. mutex_lock(&sc->mutex);
  1642. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1643. mutex_unlock(&sc->mutex);
  1644. return tsf;
  1645. }
  1646. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1647. {
  1648. struct ath_wiphy *aphy = hw->priv;
  1649. struct ath_softc *sc = aphy->sc;
  1650. mutex_lock(&sc->mutex);
  1651. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1652. mutex_unlock(&sc->mutex);
  1653. }
  1654. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1655. {
  1656. struct ath_wiphy *aphy = hw->priv;
  1657. struct ath_softc *sc = aphy->sc;
  1658. mutex_lock(&sc->mutex);
  1659. ath9k_ps_wakeup(sc);
  1660. ath9k_hw_reset_tsf(sc->sc_ah);
  1661. ath9k_ps_restore(sc);
  1662. mutex_unlock(&sc->mutex);
  1663. }
  1664. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1665. struct ieee80211_vif *vif,
  1666. enum ieee80211_ampdu_mlme_action action,
  1667. struct ieee80211_sta *sta,
  1668. u16 tid, u16 *ssn)
  1669. {
  1670. struct ath_wiphy *aphy = hw->priv;
  1671. struct ath_softc *sc = aphy->sc;
  1672. int ret = 0;
  1673. local_bh_disable();
  1674. switch (action) {
  1675. case IEEE80211_AMPDU_RX_START:
  1676. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1677. ret = -ENOTSUPP;
  1678. break;
  1679. case IEEE80211_AMPDU_RX_STOP:
  1680. break;
  1681. case IEEE80211_AMPDU_TX_START:
  1682. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1683. return -EOPNOTSUPP;
  1684. ath9k_ps_wakeup(sc);
  1685. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1686. if (!ret)
  1687. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1688. ath9k_ps_restore(sc);
  1689. break;
  1690. case IEEE80211_AMPDU_TX_STOP:
  1691. ath9k_ps_wakeup(sc);
  1692. ath_tx_aggr_stop(sc, sta, tid);
  1693. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1694. ath9k_ps_restore(sc);
  1695. break;
  1696. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1697. ath9k_ps_wakeup(sc);
  1698. ath_tx_aggr_resume(sc, sta, tid);
  1699. ath9k_ps_restore(sc);
  1700. break;
  1701. default:
  1702. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1703. }
  1704. local_bh_enable();
  1705. return ret;
  1706. }
  1707. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1708. struct survey_info *survey)
  1709. {
  1710. struct ath_wiphy *aphy = hw->priv;
  1711. struct ath_softc *sc = aphy->sc;
  1712. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1713. struct ieee80211_supported_band *sband;
  1714. struct ieee80211_channel *chan;
  1715. unsigned long flags;
  1716. int pos;
  1717. spin_lock_irqsave(&common->cc_lock, flags);
  1718. if (idx == 0)
  1719. ath_update_survey_stats(sc);
  1720. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1721. if (sband && idx >= sband->n_channels) {
  1722. idx -= sband->n_channels;
  1723. sband = NULL;
  1724. }
  1725. if (!sband)
  1726. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1727. if (!sband || idx >= sband->n_channels) {
  1728. spin_unlock_irqrestore(&common->cc_lock, flags);
  1729. return -ENOENT;
  1730. }
  1731. chan = &sband->channels[idx];
  1732. pos = chan->hw_value;
  1733. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1734. survey->channel = chan;
  1735. spin_unlock_irqrestore(&common->cc_lock, flags);
  1736. return 0;
  1737. }
  1738. static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
  1739. {
  1740. struct ath_wiphy *aphy = hw->priv;
  1741. struct ath_softc *sc = aphy->sc;
  1742. mutex_lock(&sc->mutex);
  1743. if (ath9k_wiphy_scanning(sc)) {
  1744. /*
  1745. * There is a race here in mac80211 but fixing it requires
  1746. * we revisit how we handle the scan complete callback.
  1747. * After mac80211 fixes we will not have configured hardware
  1748. * to the home channel nor would we have configured the RX
  1749. * filter yet.
  1750. */
  1751. mutex_unlock(&sc->mutex);
  1752. return;
  1753. }
  1754. aphy->state = ATH_WIPHY_SCAN;
  1755. ath9k_wiphy_pause_all_forced(sc, aphy);
  1756. mutex_unlock(&sc->mutex);
  1757. }
  1758. /*
  1759. * XXX: this requires a revisit after the driver
  1760. * scan_complete gets moved to another place/removed in mac80211.
  1761. */
  1762. static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
  1763. {
  1764. struct ath_wiphy *aphy = hw->priv;
  1765. struct ath_softc *sc = aphy->sc;
  1766. mutex_lock(&sc->mutex);
  1767. aphy->state = ATH_WIPHY_ACTIVE;
  1768. mutex_unlock(&sc->mutex);
  1769. }
  1770. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1771. {
  1772. struct ath_wiphy *aphy = hw->priv;
  1773. struct ath_softc *sc = aphy->sc;
  1774. struct ath_hw *ah = sc->sc_ah;
  1775. mutex_lock(&sc->mutex);
  1776. ah->coverage_class = coverage_class;
  1777. ath9k_hw_init_global_settings(ah);
  1778. mutex_unlock(&sc->mutex);
  1779. }
  1780. struct ieee80211_ops ath9k_ops = {
  1781. .tx = ath9k_tx,
  1782. .start = ath9k_start,
  1783. .stop = ath9k_stop,
  1784. .add_interface = ath9k_add_interface,
  1785. .change_interface = ath9k_change_interface,
  1786. .remove_interface = ath9k_remove_interface,
  1787. .config = ath9k_config,
  1788. .configure_filter = ath9k_configure_filter,
  1789. .sta_add = ath9k_sta_add,
  1790. .sta_remove = ath9k_sta_remove,
  1791. .conf_tx = ath9k_conf_tx,
  1792. .bss_info_changed = ath9k_bss_info_changed,
  1793. .set_key = ath9k_set_key,
  1794. .get_tsf = ath9k_get_tsf,
  1795. .set_tsf = ath9k_set_tsf,
  1796. .reset_tsf = ath9k_reset_tsf,
  1797. .ampdu_action = ath9k_ampdu_action,
  1798. .get_survey = ath9k_get_survey,
  1799. .sw_scan_start = ath9k_sw_scan_start,
  1800. .sw_scan_complete = ath9k_sw_scan_complete,
  1801. .rfkill_poll = ath9k_rfkill_poll_state,
  1802. .set_coverage_class = ath9k_set_coverage_class,
  1803. };