pci-sysfs.c 25 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/topology.h>
  21. #include <linux/mm.h>
  22. #include <linux/capability.h>
  23. #include <linux/pci-aspm.h>
  24. #include "pci.h"
  25. static int sysfs_initialized; /* = 0 */
  26. /* show configuration fields */
  27. #define pci_config_attr(field, format_string) \
  28. static ssize_t \
  29. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  30. { \
  31. struct pci_dev *pdev; \
  32. \
  33. pdev = to_pci_dev (dev); \
  34. return sprintf (buf, format_string, pdev->field); \
  35. }
  36. pci_config_attr(vendor, "0x%04x\n");
  37. pci_config_attr(device, "0x%04x\n");
  38. pci_config_attr(subsystem_vendor, "0x%04x\n");
  39. pci_config_attr(subsystem_device, "0x%04x\n");
  40. pci_config_attr(class, "0x%06x\n");
  41. pci_config_attr(irq, "%u\n");
  42. static ssize_t broken_parity_status_show(struct device *dev,
  43. struct device_attribute *attr,
  44. char *buf)
  45. {
  46. struct pci_dev *pdev = to_pci_dev(dev);
  47. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  48. }
  49. static ssize_t broken_parity_status_store(struct device *dev,
  50. struct device_attribute *attr,
  51. const char *buf, size_t count)
  52. {
  53. struct pci_dev *pdev = to_pci_dev(dev);
  54. unsigned long val;
  55. if (strict_strtoul(buf, 0, &val) < 0)
  56. return -EINVAL;
  57. pdev->broken_parity_status = !!val;
  58. return count;
  59. }
  60. static ssize_t local_cpus_show(struct device *dev,
  61. struct device_attribute *attr, char *buf)
  62. {
  63. const struct cpumask *mask;
  64. int len;
  65. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  66. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  67. buf[len++] = '\n';
  68. buf[len] = '\0';
  69. return len;
  70. }
  71. static ssize_t local_cpulist_show(struct device *dev,
  72. struct device_attribute *attr, char *buf)
  73. {
  74. const struct cpumask *mask;
  75. int len;
  76. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  77. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  78. buf[len++] = '\n';
  79. buf[len] = '\0';
  80. return len;
  81. }
  82. /* show resources */
  83. static ssize_t
  84. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  85. {
  86. struct pci_dev * pci_dev = to_pci_dev(dev);
  87. char * str = buf;
  88. int i;
  89. int max;
  90. resource_size_t start, end;
  91. if (pci_dev->subordinate)
  92. max = DEVICE_COUNT_RESOURCE;
  93. else
  94. max = PCI_BRIDGE_RESOURCES;
  95. for (i = 0; i < max; i++) {
  96. struct resource *res = &pci_dev->resource[i];
  97. pci_resource_to_user(pci_dev, i, res, &start, &end);
  98. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  99. (unsigned long long)start,
  100. (unsigned long long)end,
  101. (unsigned long long)res->flags);
  102. }
  103. return (str - buf);
  104. }
  105. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  106. {
  107. struct pci_dev *pci_dev = to_pci_dev(dev);
  108. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  109. pci_dev->vendor, pci_dev->device,
  110. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  111. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  112. (u8)(pci_dev->class));
  113. }
  114. static ssize_t is_enabled_store(struct device *dev,
  115. struct device_attribute *attr, const char *buf,
  116. size_t count)
  117. {
  118. struct pci_dev *pdev = to_pci_dev(dev);
  119. unsigned long val;
  120. ssize_t result = strict_strtoul(buf, 0, &val);
  121. if (result < 0)
  122. return result;
  123. /* this can crash the machine when done on the "wrong" device */
  124. if (!capable(CAP_SYS_ADMIN))
  125. return -EPERM;
  126. if (!val) {
  127. if (atomic_read(&pdev->enable_cnt) != 0)
  128. pci_disable_device(pdev);
  129. else
  130. result = -EIO;
  131. } else
  132. result = pci_enable_device(pdev);
  133. return result < 0 ? result : count;
  134. }
  135. static ssize_t is_enabled_show(struct device *dev,
  136. struct device_attribute *attr, char *buf)
  137. {
  138. struct pci_dev *pdev;
  139. pdev = to_pci_dev (dev);
  140. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  141. }
  142. #ifdef CONFIG_NUMA
  143. static ssize_t
  144. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  145. {
  146. return sprintf (buf, "%d\n", dev->numa_node);
  147. }
  148. #endif
  149. static ssize_t
  150. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  151. {
  152. struct pci_dev *pdev = to_pci_dev(dev);
  153. if (!pdev->subordinate)
  154. return 0;
  155. return sprintf (buf, "%u\n",
  156. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  157. }
  158. static ssize_t
  159. msi_bus_store(struct device *dev, struct device_attribute *attr,
  160. const char *buf, size_t count)
  161. {
  162. struct pci_dev *pdev = to_pci_dev(dev);
  163. unsigned long val;
  164. if (strict_strtoul(buf, 0, &val) < 0)
  165. return -EINVAL;
  166. /* bad things may happen if the no_msi flag is changed
  167. * while some drivers are loaded */
  168. if (!capable(CAP_SYS_ADMIN))
  169. return -EPERM;
  170. /* Maybe pci devices without subordinate busses shouldn't even have this
  171. * attribute in the first place? */
  172. if (!pdev->subordinate)
  173. return count;
  174. /* Is the flag going to change, or keep the value it already had? */
  175. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  176. !!val) {
  177. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  178. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  179. " bad things could happen\n", val ? "" : " not");
  180. }
  181. return count;
  182. }
  183. struct device_attribute pci_dev_attrs[] = {
  184. __ATTR_RO(resource),
  185. __ATTR_RO(vendor),
  186. __ATTR_RO(device),
  187. __ATTR_RO(subsystem_vendor),
  188. __ATTR_RO(subsystem_device),
  189. __ATTR_RO(class),
  190. __ATTR_RO(irq),
  191. __ATTR_RO(local_cpus),
  192. __ATTR_RO(local_cpulist),
  193. __ATTR_RO(modalias),
  194. #ifdef CONFIG_NUMA
  195. __ATTR_RO(numa_node),
  196. #endif
  197. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  198. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  199. broken_parity_status_show,broken_parity_status_store),
  200. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  201. __ATTR_NULL,
  202. };
  203. static ssize_t
  204. pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  205. char *buf, loff_t off, size_t count)
  206. {
  207. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  208. unsigned int size = 64;
  209. loff_t init_off = off;
  210. u8 *data = (u8*) buf;
  211. /* Several chips lock up trying to read undefined config space */
  212. if (capable(CAP_SYS_ADMIN)) {
  213. size = dev->cfg_size;
  214. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  215. size = 128;
  216. }
  217. if (off > size)
  218. return 0;
  219. if (off + count > size) {
  220. size -= off;
  221. count = size;
  222. } else {
  223. size = count;
  224. }
  225. if ((off & 1) && size) {
  226. u8 val;
  227. pci_user_read_config_byte(dev, off, &val);
  228. data[off - init_off] = val;
  229. off++;
  230. size--;
  231. }
  232. if ((off & 3) && size > 2) {
  233. u16 val;
  234. pci_user_read_config_word(dev, off, &val);
  235. data[off - init_off] = val & 0xff;
  236. data[off - init_off + 1] = (val >> 8) & 0xff;
  237. off += 2;
  238. size -= 2;
  239. }
  240. while (size > 3) {
  241. u32 val;
  242. pci_user_read_config_dword(dev, off, &val);
  243. data[off - init_off] = val & 0xff;
  244. data[off - init_off + 1] = (val >> 8) & 0xff;
  245. data[off - init_off + 2] = (val >> 16) & 0xff;
  246. data[off - init_off + 3] = (val >> 24) & 0xff;
  247. off += 4;
  248. size -= 4;
  249. }
  250. if (size >= 2) {
  251. u16 val;
  252. pci_user_read_config_word(dev, off, &val);
  253. data[off - init_off] = val & 0xff;
  254. data[off - init_off + 1] = (val >> 8) & 0xff;
  255. off += 2;
  256. size -= 2;
  257. }
  258. if (size > 0) {
  259. u8 val;
  260. pci_user_read_config_byte(dev, off, &val);
  261. data[off - init_off] = val;
  262. off++;
  263. --size;
  264. }
  265. return count;
  266. }
  267. static ssize_t
  268. pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  269. char *buf, loff_t off, size_t count)
  270. {
  271. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  272. unsigned int size = count;
  273. loff_t init_off = off;
  274. u8 *data = (u8*) buf;
  275. if (off > dev->cfg_size)
  276. return 0;
  277. if (off + count > dev->cfg_size) {
  278. size = dev->cfg_size - off;
  279. count = size;
  280. }
  281. if ((off & 1) && size) {
  282. pci_user_write_config_byte(dev, off, data[off - init_off]);
  283. off++;
  284. size--;
  285. }
  286. if ((off & 3) && size > 2) {
  287. u16 val = data[off - init_off];
  288. val |= (u16) data[off - init_off + 1] << 8;
  289. pci_user_write_config_word(dev, off, val);
  290. off += 2;
  291. size -= 2;
  292. }
  293. while (size > 3) {
  294. u32 val = data[off - init_off];
  295. val |= (u32) data[off - init_off + 1] << 8;
  296. val |= (u32) data[off - init_off + 2] << 16;
  297. val |= (u32) data[off - init_off + 3] << 24;
  298. pci_user_write_config_dword(dev, off, val);
  299. off += 4;
  300. size -= 4;
  301. }
  302. if (size >= 2) {
  303. u16 val = data[off - init_off];
  304. val |= (u16) data[off - init_off + 1] << 8;
  305. pci_user_write_config_word(dev, off, val);
  306. off += 2;
  307. size -= 2;
  308. }
  309. if (size) {
  310. pci_user_write_config_byte(dev, off, data[off - init_off]);
  311. off++;
  312. --size;
  313. }
  314. return count;
  315. }
  316. static ssize_t
  317. read_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
  318. char *buf, loff_t off, size_t count)
  319. {
  320. struct pci_dev *dev =
  321. to_pci_dev(container_of(kobj, struct device, kobj));
  322. if (off > bin_attr->size)
  323. count = 0;
  324. else if (count > bin_attr->size - off)
  325. count = bin_attr->size - off;
  326. return pci_read_vpd(dev, off, count, buf);
  327. }
  328. static ssize_t
  329. write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
  330. char *buf, loff_t off, size_t count)
  331. {
  332. struct pci_dev *dev =
  333. to_pci_dev(container_of(kobj, struct device, kobj));
  334. if (off > bin_attr->size)
  335. count = 0;
  336. else if (count > bin_attr->size - off)
  337. count = bin_attr->size - off;
  338. return pci_write_vpd(dev, off, count, buf);
  339. }
  340. #ifdef HAVE_PCI_LEGACY
  341. /**
  342. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  343. * @kobj: kobject corresponding to file to read from
  344. * @buf: buffer to store results
  345. * @off: offset into legacy I/O port space
  346. * @count: number of bytes to read
  347. *
  348. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  349. * callback routine (pci_legacy_read).
  350. */
  351. static ssize_t
  352. pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  353. char *buf, loff_t off, size_t count)
  354. {
  355. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  356. struct device,
  357. kobj));
  358. /* Only support 1, 2 or 4 byte accesses */
  359. if (count != 1 && count != 2 && count != 4)
  360. return -EINVAL;
  361. return pci_legacy_read(bus, off, (u32 *)buf, count);
  362. }
  363. /**
  364. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  365. * @kobj: kobject corresponding to file to read from
  366. * @buf: buffer containing value to be written
  367. * @off: offset into legacy I/O port space
  368. * @count: number of bytes to write
  369. *
  370. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  371. * callback routine (pci_legacy_write).
  372. */
  373. static ssize_t
  374. pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  375. char *buf, loff_t off, size_t count)
  376. {
  377. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  378. struct device,
  379. kobj));
  380. /* Only support 1, 2 or 4 byte accesses */
  381. if (count != 1 && count != 2 && count != 4)
  382. return -EINVAL;
  383. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  384. }
  385. /**
  386. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  387. * @kobj: kobject corresponding to device to be mapped
  388. * @attr: struct bin_attribute for this file
  389. * @vma: struct vm_area_struct passed to mmap
  390. *
  391. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  392. * legacy memory space (first meg of bus space) into application virtual
  393. * memory space.
  394. */
  395. static int
  396. pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
  397. struct vm_area_struct *vma)
  398. {
  399. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  400. struct device,
  401. kobj));
  402. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  403. }
  404. /**
  405. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  406. * @kobj: kobject corresponding to device to be mapped
  407. * @attr: struct bin_attribute for this file
  408. * @vma: struct vm_area_struct passed to mmap
  409. *
  410. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  411. * legacy IO space (first meg of bus space) into application virtual
  412. * memory space. Returns -ENOSYS if the operation isn't supported
  413. */
  414. static int
  415. pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
  416. struct vm_area_struct *vma)
  417. {
  418. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  419. struct device,
  420. kobj));
  421. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  422. }
  423. /**
  424. * pci_create_legacy_files - create legacy I/O port and memory files
  425. * @b: bus to create files under
  426. *
  427. * Some platforms allow access to legacy I/O port and ISA memory space on
  428. * a per-bus basis. This routine creates the files and ties them into
  429. * their associated read, write and mmap files from pci-sysfs.c
  430. *
  431. * On error unwind, but don't propogate the error to the caller
  432. * as it is ok to set up the PCI bus without these files.
  433. */
  434. void pci_create_legacy_files(struct pci_bus *b)
  435. {
  436. int error;
  437. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  438. GFP_ATOMIC);
  439. if (!b->legacy_io)
  440. goto kzalloc_err;
  441. b->legacy_io->attr.name = "legacy_io";
  442. b->legacy_io->size = 0xffff;
  443. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  444. b->legacy_io->read = pci_read_legacy_io;
  445. b->legacy_io->write = pci_write_legacy_io;
  446. b->legacy_io->mmap = pci_mmap_legacy_io;
  447. error = device_create_bin_file(&b->dev, b->legacy_io);
  448. if (error)
  449. goto legacy_io_err;
  450. /* Allocated above after the legacy_io struct */
  451. b->legacy_mem = b->legacy_io + 1;
  452. b->legacy_mem->attr.name = "legacy_mem";
  453. b->legacy_mem->size = 1024*1024;
  454. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  455. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  456. error = device_create_bin_file(&b->dev, b->legacy_mem);
  457. if (error)
  458. goto legacy_mem_err;
  459. return;
  460. legacy_mem_err:
  461. device_remove_bin_file(&b->dev, b->legacy_io);
  462. legacy_io_err:
  463. kfree(b->legacy_io);
  464. b->legacy_io = NULL;
  465. kzalloc_err:
  466. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  467. "and ISA memory resources to sysfs\n");
  468. return;
  469. }
  470. void pci_remove_legacy_files(struct pci_bus *b)
  471. {
  472. if (b->legacy_io) {
  473. device_remove_bin_file(&b->dev, b->legacy_io);
  474. device_remove_bin_file(&b->dev, b->legacy_mem);
  475. kfree(b->legacy_io); /* both are allocated here */
  476. }
  477. }
  478. #endif /* HAVE_PCI_LEGACY */
  479. #ifdef HAVE_PCI_MMAP
  480. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
  481. {
  482. unsigned long nr, start, size;
  483. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  484. start = vma->vm_pgoff;
  485. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  486. if (start < size && size - start >= nr)
  487. return 1;
  488. WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
  489. current->comm, start, start+nr, pci_name(pdev), resno, size);
  490. return 0;
  491. }
  492. /**
  493. * pci_mmap_resource - map a PCI resource into user memory space
  494. * @kobj: kobject for mapping
  495. * @attr: struct bin_attribute for the file being mapped
  496. * @vma: struct vm_area_struct passed into the mmap
  497. * @write_combine: 1 for write_combine mapping
  498. *
  499. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  500. */
  501. static int
  502. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  503. struct vm_area_struct *vma, int write_combine)
  504. {
  505. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  506. struct device, kobj));
  507. struct resource *res = (struct resource *)attr->private;
  508. enum pci_mmap_state mmap_type;
  509. resource_size_t start, end;
  510. int i;
  511. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  512. if (res == &pdev->resource[i])
  513. break;
  514. if (i >= PCI_ROM_RESOURCE)
  515. return -ENODEV;
  516. if (!pci_mmap_fits(pdev, i, vma))
  517. return -EINVAL;
  518. /* pci_mmap_page_range() expects the same kind of entry as coming
  519. * from /proc/bus/pci/ which is a "user visible" value. If this is
  520. * different from the resource itself, arch will do necessary fixup.
  521. */
  522. pci_resource_to_user(pdev, i, res, &start, &end);
  523. vma->vm_pgoff += start >> PAGE_SHIFT;
  524. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  525. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  526. return -EINVAL;
  527. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  528. }
  529. static int
  530. pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
  531. struct vm_area_struct *vma)
  532. {
  533. return pci_mmap_resource(kobj, attr, vma, 0);
  534. }
  535. static int
  536. pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
  537. struct vm_area_struct *vma)
  538. {
  539. return pci_mmap_resource(kobj, attr, vma, 1);
  540. }
  541. /**
  542. * pci_remove_resource_files - cleanup resource files
  543. * @dev: dev to cleanup
  544. *
  545. * If we created resource files for @dev, remove them from sysfs and
  546. * free their resources.
  547. */
  548. static void
  549. pci_remove_resource_files(struct pci_dev *pdev)
  550. {
  551. int i;
  552. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  553. struct bin_attribute *res_attr;
  554. res_attr = pdev->res_attr[i];
  555. if (res_attr) {
  556. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  557. kfree(res_attr);
  558. }
  559. res_attr = pdev->res_attr_wc[i];
  560. if (res_attr) {
  561. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  562. kfree(res_attr);
  563. }
  564. }
  565. }
  566. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  567. {
  568. /* allocate attribute structure, piggyback attribute name */
  569. int name_len = write_combine ? 13 : 10;
  570. struct bin_attribute *res_attr;
  571. int retval;
  572. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  573. if (res_attr) {
  574. char *res_attr_name = (char *)(res_attr + 1);
  575. if (write_combine) {
  576. pdev->res_attr_wc[num] = res_attr;
  577. sprintf(res_attr_name, "resource%d_wc", num);
  578. res_attr->mmap = pci_mmap_resource_wc;
  579. } else {
  580. pdev->res_attr[num] = res_attr;
  581. sprintf(res_attr_name, "resource%d", num);
  582. res_attr->mmap = pci_mmap_resource_uc;
  583. }
  584. res_attr->attr.name = res_attr_name;
  585. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  586. res_attr->size = pci_resource_len(pdev, num);
  587. res_attr->private = &pdev->resource[num];
  588. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  589. } else
  590. retval = -ENOMEM;
  591. return retval;
  592. }
  593. /**
  594. * pci_create_resource_files - create resource files in sysfs for @dev
  595. * @dev: dev in question
  596. *
  597. * Walk the resources in @dev creating files for each resource available.
  598. */
  599. static int pci_create_resource_files(struct pci_dev *pdev)
  600. {
  601. int i;
  602. int retval;
  603. /* Expose the PCI resources from this device as files */
  604. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  605. /* skip empty resources */
  606. if (!pci_resource_len(pdev, i))
  607. continue;
  608. retval = pci_create_attr(pdev, i, 0);
  609. /* for prefetchable resources, create a WC mappable file */
  610. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  611. retval = pci_create_attr(pdev, i, 1);
  612. if (retval) {
  613. pci_remove_resource_files(pdev);
  614. return retval;
  615. }
  616. }
  617. return 0;
  618. }
  619. #else /* !HAVE_PCI_MMAP */
  620. static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; }
  621. static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
  622. #endif /* HAVE_PCI_MMAP */
  623. /**
  624. * pci_write_rom - used to enable access to the PCI ROM display
  625. * @kobj: kernel object handle
  626. * @buf: user input
  627. * @off: file offset
  628. * @count: number of byte in input
  629. *
  630. * writing anything except 0 enables it
  631. */
  632. static ssize_t
  633. pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  634. char *buf, loff_t off, size_t count)
  635. {
  636. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  637. if ((off == 0) && (*buf == '0') && (count == 2))
  638. pdev->rom_attr_enabled = 0;
  639. else
  640. pdev->rom_attr_enabled = 1;
  641. return count;
  642. }
  643. /**
  644. * pci_read_rom - read a PCI ROM
  645. * @kobj: kernel object handle
  646. * @buf: where to put the data we read from the ROM
  647. * @off: file offset
  648. * @count: number of bytes to read
  649. *
  650. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  651. * device corresponding to @kobj.
  652. */
  653. static ssize_t
  654. pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  655. char *buf, loff_t off, size_t count)
  656. {
  657. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  658. void __iomem *rom;
  659. size_t size;
  660. if (!pdev->rom_attr_enabled)
  661. return -EINVAL;
  662. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  663. if (!rom || !size)
  664. return -EIO;
  665. if (off >= size)
  666. count = 0;
  667. else {
  668. if (off + count > size)
  669. count = size - off;
  670. memcpy_fromio(buf, rom + off, count);
  671. }
  672. pci_unmap_rom(pdev, rom);
  673. return count;
  674. }
  675. static struct bin_attribute pci_config_attr = {
  676. .attr = {
  677. .name = "config",
  678. .mode = S_IRUGO | S_IWUSR,
  679. },
  680. .size = PCI_CFG_SPACE_SIZE,
  681. .read = pci_read_config,
  682. .write = pci_write_config,
  683. };
  684. static struct bin_attribute pcie_config_attr = {
  685. .attr = {
  686. .name = "config",
  687. .mode = S_IRUGO | S_IWUSR,
  688. },
  689. .size = PCI_CFG_SPACE_EXP_SIZE,
  690. .read = pci_read_config,
  691. .write = pci_write_config,
  692. };
  693. int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
  694. {
  695. return 0;
  696. }
  697. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  698. {
  699. int retval;
  700. struct bin_attribute *attr;
  701. /* If the device has VPD, try to expose it in sysfs. */
  702. if (dev->vpd) {
  703. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  704. if (!attr)
  705. return -ENOMEM;
  706. attr->size = dev->vpd->len;
  707. attr->attr.name = "vpd";
  708. attr->attr.mode = S_IRUSR | S_IWUSR;
  709. attr->read = read_vpd_attr;
  710. attr->write = write_vpd_attr;
  711. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  712. if (retval) {
  713. kfree(dev->vpd->attr);
  714. return retval;
  715. }
  716. dev->vpd->attr = attr;
  717. }
  718. /* Active State Power Management */
  719. pcie_aspm_create_sysfs_dev_files(dev);
  720. return 0;
  721. }
  722. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  723. {
  724. int retval;
  725. int rom_size = 0;
  726. struct bin_attribute *attr;
  727. if (!sysfs_initialized)
  728. return -EACCES;
  729. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  730. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  731. else
  732. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  733. if (retval)
  734. goto err;
  735. retval = pci_create_resource_files(pdev);
  736. if (retval)
  737. goto err_config_file;
  738. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  739. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  740. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  741. rom_size = 0x20000;
  742. /* If the device has a ROM, try to expose it in sysfs. */
  743. if (rom_size) {
  744. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  745. if (!attr) {
  746. retval = -ENOMEM;
  747. goto err_resource_files;
  748. }
  749. attr->size = rom_size;
  750. attr->attr.name = "rom";
  751. attr->attr.mode = S_IRUSR;
  752. attr->read = pci_read_rom;
  753. attr->write = pci_write_rom;
  754. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  755. if (retval) {
  756. kfree(attr);
  757. goto err_resource_files;
  758. }
  759. pdev->rom_attr = attr;
  760. }
  761. /* add platform-specific attributes */
  762. retval = pcibios_add_platform_entries(pdev);
  763. if (retval)
  764. goto err_rom_file;
  765. /* add sysfs entries for various capabilities */
  766. retval = pci_create_capabilities_sysfs(pdev);
  767. if (retval)
  768. goto err_rom_file;
  769. return 0;
  770. err_rom_file:
  771. if (rom_size) {
  772. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  773. kfree(pdev->rom_attr);
  774. pdev->rom_attr = NULL;
  775. }
  776. err_resource_files:
  777. pci_remove_resource_files(pdev);
  778. err_config_file:
  779. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  780. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  781. else
  782. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  783. err:
  784. return retval;
  785. }
  786. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  787. {
  788. if (dev->vpd && dev->vpd->attr) {
  789. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  790. kfree(dev->vpd->attr);
  791. }
  792. pcie_aspm_remove_sysfs_dev_files(dev);
  793. }
  794. /**
  795. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  796. * @pdev: device whose entries we should free
  797. *
  798. * Cleanup when @pdev is removed from sysfs.
  799. */
  800. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  801. {
  802. int rom_size = 0;
  803. if (!sysfs_initialized)
  804. return;
  805. pci_remove_capabilities_sysfs(pdev);
  806. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  807. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  808. else
  809. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  810. pci_remove_resource_files(pdev);
  811. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  812. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  813. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  814. rom_size = 0x20000;
  815. if (rom_size && pdev->rom_attr) {
  816. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  817. kfree(pdev->rom_attr);
  818. }
  819. }
  820. static int __init pci_sysfs_init(void)
  821. {
  822. struct pci_dev *pdev = NULL;
  823. int retval;
  824. sysfs_initialized = 1;
  825. for_each_pci_dev(pdev) {
  826. retval = pci_create_sysfs_dev_files(pdev);
  827. if (retval) {
  828. pci_dev_put(pdev);
  829. return retval;
  830. }
  831. }
  832. return 0;
  833. }
  834. late_initcall(pci_sysfs_init);