events.c 23 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. Hardware interrupts. Not supported at present.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <asm/desc.h>
  31. #include <asm/ptrace.h>
  32. #include <asm/irq.h>
  33. #include <asm/idle.h>
  34. #include <asm/sync_bitops.h>
  35. #include <asm/xen/hypercall.h>
  36. #include <asm/xen/hypervisor.h>
  37. #include <xen/xen.h>
  38. #include <xen/hvm.h>
  39. #include <xen/xen-ops.h>
  40. #include <xen/events.h>
  41. #include <xen/interface/xen.h>
  42. #include <xen/interface/event_channel.h>
  43. #include <xen/interface/hvm/hvm_op.h>
  44. #include <xen/interface/hvm/params.h>
  45. /*
  46. * This lock protects updates to the following mapping and reference-count
  47. * arrays. The lock does not need to be acquired to read the mapping tables.
  48. */
  49. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  50. /* IRQ <-> VIRQ mapping. */
  51. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  52. /* IRQ <-> IPI mapping */
  53. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  54. /* Interrupt types. */
  55. enum xen_irq_type {
  56. IRQT_UNBOUND = 0,
  57. IRQT_PIRQ,
  58. IRQT_VIRQ,
  59. IRQT_IPI,
  60. IRQT_EVTCHN
  61. };
  62. /*
  63. * Packed IRQ information:
  64. * type - enum xen_irq_type
  65. * event channel - irq->event channel mapping
  66. * cpu - cpu this event channel is bound to
  67. * index - type-specific information:
  68. * PIRQ - vector, with MSB being "needs EIO"
  69. * VIRQ - virq number
  70. * IPI - IPI vector
  71. * EVTCHN -
  72. */
  73. struct irq_info
  74. {
  75. enum xen_irq_type type; /* type */
  76. unsigned short evtchn; /* event channel */
  77. unsigned short cpu; /* cpu bound */
  78. union {
  79. unsigned short virq;
  80. enum ipi_vector ipi;
  81. struct {
  82. unsigned short gsi;
  83. unsigned short vector;
  84. } pirq;
  85. } u;
  86. };
  87. static struct irq_info irq_info[NR_IRQS];
  88. static int evtchn_to_irq[NR_EVENT_CHANNELS] = {
  89. [0 ... NR_EVENT_CHANNELS-1] = -1
  90. };
  91. struct cpu_evtchn_s {
  92. unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
  93. };
  94. static struct cpu_evtchn_s *cpu_evtchn_mask_p;
  95. static inline unsigned long *cpu_evtchn_mask(int cpu)
  96. {
  97. return cpu_evtchn_mask_p[cpu].bits;
  98. }
  99. /* Xen will never allocate port zero for any purpose. */
  100. #define VALID_EVTCHN(chn) ((chn) != 0)
  101. static struct irq_chip xen_dynamic_chip;
  102. /* Constructor for packed IRQ information. */
  103. static struct irq_info mk_unbound_info(void)
  104. {
  105. return (struct irq_info) { .type = IRQT_UNBOUND };
  106. }
  107. static struct irq_info mk_evtchn_info(unsigned short evtchn)
  108. {
  109. return (struct irq_info) { .type = IRQT_EVTCHN, .evtchn = evtchn,
  110. .cpu = 0 };
  111. }
  112. static struct irq_info mk_ipi_info(unsigned short evtchn, enum ipi_vector ipi)
  113. {
  114. return (struct irq_info) { .type = IRQT_IPI, .evtchn = evtchn,
  115. .cpu = 0, .u.ipi = ipi };
  116. }
  117. static struct irq_info mk_virq_info(unsigned short evtchn, unsigned short virq)
  118. {
  119. return (struct irq_info) { .type = IRQT_VIRQ, .evtchn = evtchn,
  120. .cpu = 0, .u.virq = virq };
  121. }
  122. static struct irq_info mk_pirq_info(unsigned short evtchn,
  123. unsigned short gsi, unsigned short vector)
  124. {
  125. return (struct irq_info) { .type = IRQT_PIRQ, .evtchn = evtchn,
  126. .cpu = 0, .u.pirq = { .gsi = gsi, .vector = vector } };
  127. }
  128. /*
  129. * Accessors for packed IRQ information.
  130. */
  131. static struct irq_info *info_for_irq(unsigned irq)
  132. {
  133. return &irq_info[irq];
  134. }
  135. static unsigned int evtchn_from_irq(unsigned irq)
  136. {
  137. return info_for_irq(irq)->evtchn;
  138. }
  139. unsigned irq_from_evtchn(unsigned int evtchn)
  140. {
  141. return evtchn_to_irq[evtchn];
  142. }
  143. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  144. static enum ipi_vector ipi_from_irq(unsigned irq)
  145. {
  146. struct irq_info *info = info_for_irq(irq);
  147. BUG_ON(info == NULL);
  148. BUG_ON(info->type != IRQT_IPI);
  149. return info->u.ipi;
  150. }
  151. static unsigned virq_from_irq(unsigned irq)
  152. {
  153. struct irq_info *info = info_for_irq(irq);
  154. BUG_ON(info == NULL);
  155. BUG_ON(info->type != IRQT_VIRQ);
  156. return info->u.virq;
  157. }
  158. static unsigned gsi_from_irq(unsigned irq)
  159. {
  160. struct irq_info *info = info_for_irq(irq);
  161. BUG_ON(info == NULL);
  162. BUG_ON(info->type != IRQT_PIRQ);
  163. return info->u.pirq.gsi;
  164. }
  165. static unsigned vector_from_irq(unsigned irq)
  166. {
  167. struct irq_info *info = info_for_irq(irq);
  168. BUG_ON(info == NULL);
  169. BUG_ON(info->type != IRQT_PIRQ);
  170. return info->u.pirq.vector;
  171. }
  172. static enum xen_irq_type type_from_irq(unsigned irq)
  173. {
  174. return info_for_irq(irq)->type;
  175. }
  176. static unsigned cpu_from_irq(unsigned irq)
  177. {
  178. return info_for_irq(irq)->cpu;
  179. }
  180. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  181. {
  182. int irq = evtchn_to_irq[evtchn];
  183. unsigned ret = 0;
  184. if (irq != -1)
  185. ret = cpu_from_irq(irq);
  186. return ret;
  187. }
  188. static inline unsigned long active_evtchns(unsigned int cpu,
  189. struct shared_info *sh,
  190. unsigned int idx)
  191. {
  192. return (sh->evtchn_pending[idx] &
  193. cpu_evtchn_mask(cpu)[idx] &
  194. ~sh->evtchn_mask[idx]);
  195. }
  196. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  197. {
  198. int irq = evtchn_to_irq[chn];
  199. BUG_ON(irq == -1);
  200. #ifdef CONFIG_SMP
  201. cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
  202. #endif
  203. __clear_bit(chn, cpu_evtchn_mask(cpu_from_irq(irq)));
  204. __set_bit(chn, cpu_evtchn_mask(cpu));
  205. irq_info[irq].cpu = cpu;
  206. }
  207. static void init_evtchn_cpu_bindings(void)
  208. {
  209. #ifdef CONFIG_SMP
  210. struct irq_desc *desc;
  211. int i;
  212. /* By default all event channels notify CPU#0. */
  213. for_each_irq_desc(i, desc) {
  214. cpumask_copy(desc->affinity, cpumask_of(0));
  215. }
  216. #endif
  217. memset(cpu_evtchn_mask(0), ~0, sizeof(cpu_evtchn_mask(0)));
  218. }
  219. static inline void clear_evtchn(int port)
  220. {
  221. struct shared_info *s = HYPERVISOR_shared_info;
  222. sync_clear_bit(port, &s->evtchn_pending[0]);
  223. }
  224. static inline void set_evtchn(int port)
  225. {
  226. struct shared_info *s = HYPERVISOR_shared_info;
  227. sync_set_bit(port, &s->evtchn_pending[0]);
  228. }
  229. static inline int test_evtchn(int port)
  230. {
  231. struct shared_info *s = HYPERVISOR_shared_info;
  232. return sync_test_bit(port, &s->evtchn_pending[0]);
  233. }
  234. /**
  235. * notify_remote_via_irq - send event to remote end of event channel via irq
  236. * @irq: irq of event channel to send event to
  237. *
  238. * Unlike notify_remote_via_evtchn(), this is safe to use across
  239. * save/restore. Notifications on a broken connection are silently
  240. * dropped.
  241. */
  242. void notify_remote_via_irq(int irq)
  243. {
  244. int evtchn = evtchn_from_irq(irq);
  245. if (VALID_EVTCHN(evtchn))
  246. notify_remote_via_evtchn(evtchn);
  247. }
  248. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  249. static void mask_evtchn(int port)
  250. {
  251. struct shared_info *s = HYPERVISOR_shared_info;
  252. sync_set_bit(port, &s->evtchn_mask[0]);
  253. }
  254. static void unmask_evtchn(int port)
  255. {
  256. struct shared_info *s = HYPERVISOR_shared_info;
  257. unsigned int cpu = get_cpu();
  258. BUG_ON(!irqs_disabled());
  259. /* Slow path (hypercall) if this is a non-local port. */
  260. if (unlikely(cpu != cpu_from_evtchn(port))) {
  261. struct evtchn_unmask unmask = { .port = port };
  262. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  263. } else {
  264. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  265. sync_clear_bit(port, &s->evtchn_mask[0]);
  266. /*
  267. * The following is basically the equivalent of
  268. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  269. * the interrupt edge' if the channel is masked.
  270. */
  271. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  272. !sync_test_and_set_bit(port / BITS_PER_LONG,
  273. &vcpu_info->evtchn_pending_sel))
  274. vcpu_info->evtchn_upcall_pending = 1;
  275. }
  276. put_cpu();
  277. }
  278. static int find_unbound_irq(void)
  279. {
  280. int irq;
  281. struct irq_desc *desc;
  282. for (irq = 0; irq < nr_irqs; irq++) {
  283. desc = irq_to_desc(irq);
  284. /* only 0->15 have init'd desc; handle irq > 16 */
  285. if (desc == NULL)
  286. break;
  287. if (desc->chip == &no_irq_chip)
  288. break;
  289. if (desc->chip != &xen_dynamic_chip)
  290. continue;
  291. if (irq_info[irq].type == IRQT_UNBOUND)
  292. break;
  293. }
  294. if (irq == nr_irqs)
  295. panic("No available IRQ to bind to: increase nr_irqs!\n");
  296. desc = irq_to_desc_alloc_node(irq, 0);
  297. if (WARN_ON(desc == NULL))
  298. return -1;
  299. dynamic_irq_init_keep_chip_data(irq);
  300. return irq;
  301. }
  302. int bind_evtchn_to_irq(unsigned int evtchn)
  303. {
  304. int irq;
  305. spin_lock(&irq_mapping_update_lock);
  306. irq = evtchn_to_irq[evtchn];
  307. if (irq == -1) {
  308. irq = find_unbound_irq();
  309. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  310. handle_level_irq, "event");
  311. evtchn_to_irq[evtchn] = irq;
  312. irq_info[irq] = mk_evtchn_info(evtchn);
  313. }
  314. spin_unlock(&irq_mapping_update_lock);
  315. return irq;
  316. }
  317. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  318. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  319. {
  320. struct evtchn_bind_ipi bind_ipi;
  321. int evtchn, irq;
  322. spin_lock(&irq_mapping_update_lock);
  323. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  324. if (irq == -1) {
  325. irq = find_unbound_irq();
  326. if (irq < 0)
  327. goto out;
  328. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  329. handle_level_irq, "ipi");
  330. bind_ipi.vcpu = cpu;
  331. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  332. &bind_ipi) != 0)
  333. BUG();
  334. evtchn = bind_ipi.port;
  335. evtchn_to_irq[evtchn] = irq;
  336. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  337. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  338. bind_evtchn_to_cpu(evtchn, cpu);
  339. }
  340. out:
  341. spin_unlock(&irq_mapping_update_lock);
  342. return irq;
  343. }
  344. static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  345. {
  346. struct evtchn_bind_virq bind_virq;
  347. int evtchn, irq;
  348. spin_lock(&irq_mapping_update_lock);
  349. irq = per_cpu(virq_to_irq, cpu)[virq];
  350. if (irq == -1) {
  351. bind_virq.virq = virq;
  352. bind_virq.vcpu = cpu;
  353. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  354. &bind_virq) != 0)
  355. BUG();
  356. evtchn = bind_virq.port;
  357. irq = find_unbound_irq();
  358. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  359. handle_level_irq, "virq");
  360. evtchn_to_irq[evtchn] = irq;
  361. irq_info[irq] = mk_virq_info(evtchn, virq);
  362. per_cpu(virq_to_irq, cpu)[virq] = irq;
  363. bind_evtchn_to_cpu(evtchn, cpu);
  364. }
  365. spin_unlock(&irq_mapping_update_lock);
  366. return irq;
  367. }
  368. static void unbind_from_irq(unsigned int irq)
  369. {
  370. struct evtchn_close close;
  371. int evtchn = evtchn_from_irq(irq);
  372. spin_lock(&irq_mapping_update_lock);
  373. if (VALID_EVTCHN(evtchn)) {
  374. close.port = evtchn;
  375. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  376. BUG();
  377. switch (type_from_irq(irq)) {
  378. case IRQT_VIRQ:
  379. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  380. [virq_from_irq(irq)] = -1;
  381. break;
  382. case IRQT_IPI:
  383. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  384. [ipi_from_irq(irq)] = -1;
  385. break;
  386. default:
  387. break;
  388. }
  389. /* Closed ports are implicitly re-bound to VCPU0. */
  390. bind_evtchn_to_cpu(evtchn, 0);
  391. evtchn_to_irq[evtchn] = -1;
  392. }
  393. if (irq_info[irq].type != IRQT_UNBOUND) {
  394. irq_info[irq] = mk_unbound_info();
  395. dynamic_irq_cleanup(irq);
  396. }
  397. spin_unlock(&irq_mapping_update_lock);
  398. }
  399. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  400. irq_handler_t handler,
  401. unsigned long irqflags,
  402. const char *devname, void *dev_id)
  403. {
  404. unsigned int irq;
  405. int retval;
  406. irq = bind_evtchn_to_irq(evtchn);
  407. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  408. if (retval != 0) {
  409. unbind_from_irq(irq);
  410. return retval;
  411. }
  412. return irq;
  413. }
  414. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  415. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  416. irq_handler_t handler,
  417. unsigned long irqflags, const char *devname, void *dev_id)
  418. {
  419. unsigned int irq;
  420. int retval;
  421. irq = bind_virq_to_irq(virq, cpu);
  422. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  423. if (retval != 0) {
  424. unbind_from_irq(irq);
  425. return retval;
  426. }
  427. return irq;
  428. }
  429. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  430. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  431. unsigned int cpu,
  432. irq_handler_t handler,
  433. unsigned long irqflags,
  434. const char *devname,
  435. void *dev_id)
  436. {
  437. int irq, retval;
  438. irq = bind_ipi_to_irq(ipi, cpu);
  439. if (irq < 0)
  440. return irq;
  441. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  442. if (retval != 0) {
  443. unbind_from_irq(irq);
  444. return retval;
  445. }
  446. return irq;
  447. }
  448. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  449. {
  450. free_irq(irq, dev_id);
  451. unbind_from_irq(irq);
  452. }
  453. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  454. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  455. {
  456. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  457. BUG_ON(irq < 0);
  458. notify_remote_via_irq(irq);
  459. }
  460. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  461. {
  462. struct shared_info *sh = HYPERVISOR_shared_info;
  463. int cpu = smp_processor_id();
  464. int i;
  465. unsigned long flags;
  466. static DEFINE_SPINLOCK(debug_lock);
  467. spin_lock_irqsave(&debug_lock, flags);
  468. printk("vcpu %d\n ", cpu);
  469. for_each_online_cpu(i) {
  470. struct vcpu_info *v = per_cpu(xen_vcpu, i);
  471. printk("%d: masked=%d pending=%d event_sel %08lx\n ", i,
  472. (get_irq_regs() && i == cpu) ? xen_irqs_disabled(get_irq_regs()) : v->evtchn_upcall_mask,
  473. v->evtchn_upcall_pending,
  474. v->evtchn_pending_sel);
  475. }
  476. printk("pending:\n ");
  477. for(i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  478. printk("%08lx%s", sh->evtchn_pending[i],
  479. i % 8 == 0 ? "\n " : " ");
  480. printk("\nmasks:\n ");
  481. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  482. printk("%08lx%s", sh->evtchn_mask[i],
  483. i % 8 == 0 ? "\n " : " ");
  484. printk("\nunmasked:\n ");
  485. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  486. printk("%08lx%s", sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  487. i % 8 == 0 ? "\n " : " ");
  488. printk("\npending list:\n");
  489. for(i = 0; i < NR_EVENT_CHANNELS; i++) {
  490. if (sync_test_bit(i, sh->evtchn_pending)) {
  491. printk(" %d: event %d -> irq %d\n",
  492. cpu_from_evtchn(i), i,
  493. evtchn_to_irq[i]);
  494. }
  495. }
  496. spin_unlock_irqrestore(&debug_lock, flags);
  497. return IRQ_HANDLED;
  498. }
  499. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  500. /*
  501. * Search the CPUs pending events bitmasks. For each one found, map
  502. * the event number to an irq, and feed it into do_IRQ() for
  503. * handling.
  504. *
  505. * Xen uses a two-level bitmap to speed searching. The first level is
  506. * a bitset of words which contain pending event bits. The second
  507. * level is a bitset of pending events themselves.
  508. */
  509. static void __xen_evtchn_do_upcall(void)
  510. {
  511. int cpu = get_cpu();
  512. struct shared_info *s = HYPERVISOR_shared_info;
  513. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  514. unsigned count;
  515. do {
  516. unsigned long pending_words;
  517. vcpu_info->evtchn_upcall_pending = 0;
  518. if (__get_cpu_var(xed_nesting_count)++)
  519. goto out;
  520. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  521. /* Clear master flag /before/ clearing selector flag. */
  522. wmb();
  523. #endif
  524. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  525. while (pending_words != 0) {
  526. unsigned long pending_bits;
  527. int word_idx = __ffs(pending_words);
  528. pending_words &= ~(1UL << word_idx);
  529. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  530. int bit_idx = __ffs(pending_bits);
  531. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  532. int irq = evtchn_to_irq[port];
  533. struct irq_desc *desc;
  534. if (irq != -1) {
  535. desc = irq_to_desc(irq);
  536. if (desc)
  537. generic_handle_irq_desc(irq, desc);
  538. }
  539. }
  540. }
  541. BUG_ON(!irqs_disabled());
  542. count = __get_cpu_var(xed_nesting_count);
  543. __get_cpu_var(xed_nesting_count) = 0;
  544. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  545. out:
  546. put_cpu();
  547. }
  548. void xen_evtchn_do_upcall(struct pt_regs *regs)
  549. {
  550. struct pt_regs *old_regs = set_irq_regs(regs);
  551. exit_idle();
  552. irq_enter();
  553. __xen_evtchn_do_upcall();
  554. irq_exit();
  555. set_irq_regs(old_regs);
  556. }
  557. void xen_hvm_evtchn_do_upcall(void)
  558. {
  559. __xen_evtchn_do_upcall();
  560. }
  561. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  562. /* Rebind a new event channel to an existing irq. */
  563. void rebind_evtchn_irq(int evtchn, int irq)
  564. {
  565. struct irq_info *info = info_for_irq(irq);
  566. /* Make sure the irq is masked, since the new event channel
  567. will also be masked. */
  568. disable_irq(irq);
  569. spin_lock(&irq_mapping_update_lock);
  570. /* After resume the irq<->evtchn mappings are all cleared out */
  571. BUG_ON(evtchn_to_irq[evtchn] != -1);
  572. /* Expect irq to have been bound before,
  573. so there should be a proper type */
  574. BUG_ON(info->type == IRQT_UNBOUND);
  575. evtchn_to_irq[evtchn] = irq;
  576. irq_info[irq] = mk_evtchn_info(evtchn);
  577. spin_unlock(&irq_mapping_update_lock);
  578. /* new event channels are always bound to cpu 0 */
  579. irq_set_affinity(irq, cpumask_of(0));
  580. /* Unmask the event channel. */
  581. enable_irq(irq);
  582. }
  583. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  584. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  585. {
  586. struct evtchn_bind_vcpu bind_vcpu;
  587. int evtchn = evtchn_from_irq(irq);
  588. /* events delivered via platform PCI interrupts are always
  589. * routed to vcpu 0 */
  590. if (!VALID_EVTCHN(evtchn) ||
  591. (xen_hvm_domain() && !xen_have_vector_callback))
  592. return -1;
  593. /* Send future instances of this interrupt to other vcpu. */
  594. bind_vcpu.port = evtchn;
  595. bind_vcpu.vcpu = tcpu;
  596. /*
  597. * If this fails, it usually just indicates that we're dealing with a
  598. * virq or IPI channel, which don't actually need to be rebound. Ignore
  599. * it, but don't do the xenlinux-level rebind in that case.
  600. */
  601. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  602. bind_evtchn_to_cpu(evtchn, tcpu);
  603. return 0;
  604. }
  605. static int set_affinity_irq(unsigned irq, const struct cpumask *dest)
  606. {
  607. unsigned tcpu = cpumask_first(dest);
  608. return rebind_irq_to_cpu(irq, tcpu);
  609. }
  610. int resend_irq_on_evtchn(unsigned int irq)
  611. {
  612. int masked, evtchn = evtchn_from_irq(irq);
  613. struct shared_info *s = HYPERVISOR_shared_info;
  614. if (!VALID_EVTCHN(evtchn))
  615. return 1;
  616. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  617. sync_set_bit(evtchn, s->evtchn_pending);
  618. if (!masked)
  619. unmask_evtchn(evtchn);
  620. return 1;
  621. }
  622. static void enable_dynirq(unsigned int irq)
  623. {
  624. int evtchn = evtchn_from_irq(irq);
  625. if (VALID_EVTCHN(evtchn))
  626. unmask_evtchn(evtchn);
  627. }
  628. static void disable_dynirq(unsigned int irq)
  629. {
  630. int evtchn = evtchn_from_irq(irq);
  631. if (VALID_EVTCHN(evtchn))
  632. mask_evtchn(evtchn);
  633. }
  634. static void ack_dynirq(unsigned int irq)
  635. {
  636. int evtchn = evtchn_from_irq(irq);
  637. move_native_irq(irq);
  638. if (VALID_EVTCHN(evtchn))
  639. clear_evtchn(evtchn);
  640. }
  641. static int retrigger_dynirq(unsigned int irq)
  642. {
  643. int evtchn = evtchn_from_irq(irq);
  644. struct shared_info *sh = HYPERVISOR_shared_info;
  645. int ret = 0;
  646. if (VALID_EVTCHN(evtchn)) {
  647. int masked;
  648. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  649. sync_set_bit(evtchn, sh->evtchn_pending);
  650. if (!masked)
  651. unmask_evtchn(evtchn);
  652. ret = 1;
  653. }
  654. return ret;
  655. }
  656. static void restore_cpu_virqs(unsigned int cpu)
  657. {
  658. struct evtchn_bind_virq bind_virq;
  659. int virq, irq, evtchn;
  660. for (virq = 0; virq < NR_VIRQS; virq++) {
  661. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  662. continue;
  663. BUG_ON(virq_from_irq(irq) != virq);
  664. /* Get a new binding from Xen. */
  665. bind_virq.virq = virq;
  666. bind_virq.vcpu = cpu;
  667. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  668. &bind_virq) != 0)
  669. BUG();
  670. evtchn = bind_virq.port;
  671. /* Record the new mapping. */
  672. evtchn_to_irq[evtchn] = irq;
  673. irq_info[irq] = mk_virq_info(evtchn, virq);
  674. bind_evtchn_to_cpu(evtchn, cpu);
  675. /* Ready for use. */
  676. unmask_evtchn(evtchn);
  677. }
  678. }
  679. static void restore_cpu_ipis(unsigned int cpu)
  680. {
  681. struct evtchn_bind_ipi bind_ipi;
  682. int ipi, irq, evtchn;
  683. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  684. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  685. continue;
  686. BUG_ON(ipi_from_irq(irq) != ipi);
  687. /* Get a new binding from Xen. */
  688. bind_ipi.vcpu = cpu;
  689. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  690. &bind_ipi) != 0)
  691. BUG();
  692. evtchn = bind_ipi.port;
  693. /* Record the new mapping. */
  694. evtchn_to_irq[evtchn] = irq;
  695. irq_info[irq] = mk_ipi_info(evtchn, ipi);
  696. bind_evtchn_to_cpu(evtchn, cpu);
  697. /* Ready for use. */
  698. unmask_evtchn(evtchn);
  699. }
  700. }
  701. /* Clear an irq's pending state, in preparation for polling on it */
  702. void xen_clear_irq_pending(int irq)
  703. {
  704. int evtchn = evtchn_from_irq(irq);
  705. if (VALID_EVTCHN(evtchn))
  706. clear_evtchn(evtchn);
  707. }
  708. void xen_set_irq_pending(int irq)
  709. {
  710. int evtchn = evtchn_from_irq(irq);
  711. if (VALID_EVTCHN(evtchn))
  712. set_evtchn(evtchn);
  713. }
  714. bool xen_test_irq_pending(int irq)
  715. {
  716. int evtchn = evtchn_from_irq(irq);
  717. bool ret = false;
  718. if (VALID_EVTCHN(evtchn))
  719. ret = test_evtchn(evtchn);
  720. return ret;
  721. }
  722. /* Poll waiting for an irq to become pending. In the usual case, the
  723. irq will be disabled so it won't deliver an interrupt. */
  724. void xen_poll_irq(int irq)
  725. {
  726. evtchn_port_t evtchn = evtchn_from_irq(irq);
  727. if (VALID_EVTCHN(evtchn)) {
  728. struct sched_poll poll;
  729. poll.nr_ports = 1;
  730. poll.timeout = 0;
  731. set_xen_guest_handle(poll.ports, &evtchn);
  732. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  733. BUG();
  734. }
  735. }
  736. void xen_irq_resume(void)
  737. {
  738. unsigned int cpu, irq, evtchn;
  739. init_evtchn_cpu_bindings();
  740. /* New event-channel space is not 'live' yet. */
  741. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  742. mask_evtchn(evtchn);
  743. /* No IRQ <-> event-channel mappings. */
  744. for (irq = 0; irq < nr_irqs; irq++)
  745. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  746. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  747. evtchn_to_irq[evtchn] = -1;
  748. for_each_possible_cpu(cpu) {
  749. restore_cpu_virqs(cpu);
  750. restore_cpu_ipis(cpu);
  751. }
  752. }
  753. static struct irq_chip xen_dynamic_chip __read_mostly = {
  754. .name = "xen-dyn",
  755. .disable = disable_dynirq,
  756. .mask = disable_dynirq,
  757. .unmask = enable_dynirq,
  758. .ack = ack_dynirq,
  759. .set_affinity = set_affinity_irq,
  760. .retrigger = retrigger_dynirq,
  761. };
  762. int xen_set_callback_via(uint64_t via)
  763. {
  764. struct xen_hvm_param a;
  765. a.domid = DOMID_SELF;
  766. a.index = HVM_PARAM_CALLBACK_IRQ;
  767. a.value = via;
  768. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  769. }
  770. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  771. #ifdef CONFIG_XEN_PVHVM
  772. /* Vector callbacks are better than PCI interrupts to receive event
  773. * channel notifications because we can receive vector callbacks on any
  774. * vcpu and we don't need PCI support or APIC interactions. */
  775. void xen_callback_vector(void)
  776. {
  777. int rc;
  778. uint64_t callback_via;
  779. if (xen_have_vector_callback) {
  780. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  781. rc = xen_set_callback_via(callback_via);
  782. if (rc) {
  783. printk(KERN_ERR "Request for Xen HVM callback vector"
  784. " failed.\n");
  785. xen_have_vector_callback = 0;
  786. return;
  787. }
  788. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  789. "enabled\n");
  790. /* in the restore case the vector has already been allocated */
  791. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  792. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  793. }
  794. }
  795. #else
  796. void xen_callback_vector(void) {}
  797. #endif
  798. void __init xen_init_IRQ(void)
  799. {
  800. int i;
  801. cpu_evtchn_mask_p = kcalloc(nr_cpu_ids, sizeof(struct cpu_evtchn_s),
  802. GFP_KERNEL);
  803. BUG_ON(cpu_evtchn_mask_p == NULL);
  804. init_evtchn_cpu_bindings();
  805. /* No event channels are 'live' right now. */
  806. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  807. mask_evtchn(i);
  808. if (xen_hvm_domain()) {
  809. xen_callback_vector();
  810. native_init_IRQ();
  811. } else {
  812. irq_ctx_init(smp_processor_id());
  813. }
  814. }