regmap.h 14 KB

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  1. #ifndef __LINUX_REGMAP_H
  2. #define __LINUX_REGMAP_H
  3. /*
  4. * Register map access API
  5. *
  6. * Copyright 2011 Wolfson Microelectronics plc
  7. *
  8. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/list.h>
  15. #include <linux/rbtree.h>
  16. struct module;
  17. struct device;
  18. struct i2c_client;
  19. struct irq_domain;
  20. struct spi_device;
  21. struct regmap;
  22. struct regmap_range_cfg;
  23. /* An enum of all the supported cache types */
  24. enum regcache_type {
  25. REGCACHE_NONE,
  26. REGCACHE_RBTREE,
  27. REGCACHE_COMPRESSED
  28. };
  29. /**
  30. * Default value for a register. We use an array of structs rather
  31. * than a simple array as many modern devices have very sparse
  32. * register maps.
  33. *
  34. * @reg: Register address.
  35. * @def: Register default value.
  36. */
  37. struct reg_default {
  38. unsigned int reg;
  39. unsigned int def;
  40. };
  41. #ifdef CONFIG_REGMAP
  42. enum regmap_endian {
  43. /* Unspecified -> 0 -> Backwards compatible default */
  44. REGMAP_ENDIAN_DEFAULT = 0,
  45. REGMAP_ENDIAN_BIG,
  46. REGMAP_ENDIAN_LITTLE,
  47. REGMAP_ENDIAN_NATIVE,
  48. };
  49. typedef void (*regmap_lock)(void *);
  50. typedef void (*regmap_unlock)(void *);
  51. /**
  52. * Configuration for the register map of a device.
  53. *
  54. * @name: Optional name of the regmap. Useful when a device has multiple
  55. * register regions.
  56. *
  57. * @reg_bits: Number of bits in a register address, mandatory.
  58. * @reg_stride: The register address stride. Valid register addresses are a
  59. * multiple of this value. If set to 0, a value of 1 will be
  60. * used.
  61. * @pad_bits: Number of bits of padding between register and value.
  62. * @val_bits: Number of bits in a register value, mandatory.
  63. *
  64. * @writeable_reg: Optional callback returning true if the register
  65. * can be written to.
  66. * @readable_reg: Optional callback returning true if the register
  67. * can be read from.
  68. * @volatile_reg: Optional callback returning true if the register
  69. * value can't be cached.
  70. * @precious_reg: Optional callback returning true if the rgister
  71. * should not be read outside of a call from the driver
  72. * (eg, a clear on read interrupt status register).
  73. * @lock: Optional lock callback (overrides regmap's default lock
  74. * function, based on spinlock or mutex).
  75. * @unlock: As above for unlocking.
  76. * @lock_arg: this field is passed as the only argument of lock/unlock
  77. * functions (ignored in case regular lock/unlock functions
  78. * are not overridden).
  79. *
  80. * @max_register: Optional, specifies the maximum valid register index.
  81. * @reg_defaults: Power on reset values for registers (for use with
  82. * register cache support).
  83. * @num_reg_defaults: Number of elements in reg_defaults.
  84. *
  85. * @read_flag_mask: Mask to be set in the top byte of the register when doing
  86. * a read.
  87. * @write_flag_mask: Mask to be set in the top byte of the register when doing
  88. * a write. If both read_flag_mask and write_flag_mask are
  89. * empty the regmap_bus default masks are used.
  90. * @use_single_rw: If set, converts the bulk read and write operations into
  91. * a series of single read and write operations. This is useful
  92. * for device that does not support bulk read and write.
  93. *
  94. * @cache_type: The actual cache type.
  95. * @reg_defaults_raw: Power on reset values for registers (for use with
  96. * register cache support).
  97. * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
  98. * @reg_format_endian: Endianness for formatted register addresses. If this is
  99. * DEFAULT, the @reg_format_endian_default value from the
  100. * regmap bus is used.
  101. * @val_format_endian: Endianness for formatted register values. If this is
  102. * DEFAULT, the @reg_format_endian_default value from the
  103. * regmap bus is used.
  104. *
  105. * @ranges: Array of configuration entries for virtual address ranges.
  106. * @num_ranges: Number of range configuration entries.
  107. */
  108. struct regmap_config {
  109. const char *name;
  110. int reg_bits;
  111. int reg_stride;
  112. int pad_bits;
  113. int val_bits;
  114. bool (*writeable_reg)(struct device *dev, unsigned int reg);
  115. bool (*readable_reg)(struct device *dev, unsigned int reg);
  116. bool (*volatile_reg)(struct device *dev, unsigned int reg);
  117. bool (*precious_reg)(struct device *dev, unsigned int reg);
  118. regmap_lock lock;
  119. regmap_unlock unlock;
  120. void *lock_arg;
  121. unsigned int max_register;
  122. const struct reg_default *reg_defaults;
  123. unsigned int num_reg_defaults;
  124. enum regcache_type cache_type;
  125. const void *reg_defaults_raw;
  126. unsigned int num_reg_defaults_raw;
  127. u8 read_flag_mask;
  128. u8 write_flag_mask;
  129. bool use_single_rw;
  130. enum regmap_endian reg_format_endian;
  131. enum regmap_endian val_format_endian;
  132. const struct regmap_range_cfg *ranges;
  133. unsigned int num_ranges;
  134. };
  135. /**
  136. * Configuration for indirectly accessed or paged registers.
  137. * Registers, mapped to this virtual range, are accessed in two steps:
  138. * 1. page selector register update;
  139. * 2. access through data window registers.
  140. *
  141. * @name: Descriptive name for diagnostics
  142. *
  143. * @range_min: Address of the lowest register address in virtual range.
  144. * @range_max: Address of the highest register in virtual range.
  145. *
  146. * @page_sel_reg: Register with selector field.
  147. * @page_sel_mask: Bit shift for selector value.
  148. * @page_sel_shift: Bit mask for selector value.
  149. *
  150. * @window_start: Address of first (lowest) register in data window.
  151. * @window_len: Number of registers in data window.
  152. */
  153. struct regmap_range_cfg {
  154. const char *name;
  155. /* Registers of virtual address range */
  156. unsigned int range_min;
  157. unsigned int range_max;
  158. /* Page selector for indirect addressing */
  159. unsigned int selector_reg;
  160. unsigned int selector_mask;
  161. int selector_shift;
  162. /* Data window (per each page) */
  163. unsigned int window_start;
  164. unsigned int window_len;
  165. };
  166. typedef int (*regmap_hw_write)(void *context, const void *data,
  167. size_t count);
  168. typedef int (*regmap_hw_gather_write)(void *context,
  169. const void *reg, size_t reg_len,
  170. const void *val, size_t val_len);
  171. typedef int (*regmap_hw_read)(void *context,
  172. const void *reg_buf, size_t reg_size,
  173. void *val_buf, size_t val_size);
  174. typedef void (*regmap_hw_free_context)(void *context);
  175. /**
  176. * Description of a hardware bus for the register map infrastructure.
  177. *
  178. * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
  179. * to perform locking. This field is ignored if custom lock/unlock
  180. * functions are used (see fields lock/unlock of
  181. * struct regmap_config).
  182. * @write: Write operation.
  183. * @gather_write: Write operation with split register/value, return -ENOTSUPP
  184. * if not implemented on a given device.
  185. * @read: Read operation. Data is returned in the buffer used to transmit
  186. * data.
  187. * @read_flag_mask: Mask to be set in the top byte of the register when doing
  188. * a read.
  189. * @reg_format_endian_default: Default endianness for formatted register
  190. * addresses. Used when the regmap_config specifies DEFAULT. If this is
  191. * DEFAULT, BIG is assumed.
  192. * @val_format_endian_default: Default endianness for formatted register
  193. * values. Used when the regmap_config specifies DEFAULT. If this is
  194. * DEFAULT, BIG is assumed.
  195. */
  196. struct regmap_bus {
  197. bool fast_io;
  198. regmap_hw_write write;
  199. regmap_hw_gather_write gather_write;
  200. regmap_hw_read read;
  201. regmap_hw_free_context free_context;
  202. u8 read_flag_mask;
  203. enum regmap_endian reg_format_endian_default;
  204. enum regmap_endian val_format_endian_default;
  205. };
  206. struct regmap *regmap_init(struct device *dev,
  207. const struct regmap_bus *bus,
  208. void *bus_context,
  209. const struct regmap_config *config);
  210. struct regmap *regmap_init_i2c(struct i2c_client *i2c,
  211. const struct regmap_config *config);
  212. struct regmap *regmap_init_spi(struct spi_device *dev,
  213. const struct regmap_config *config);
  214. struct regmap *regmap_init_mmio(struct device *dev,
  215. void __iomem *regs,
  216. const struct regmap_config *config);
  217. struct regmap *devm_regmap_init(struct device *dev,
  218. const struct regmap_bus *bus,
  219. void *bus_context,
  220. const struct regmap_config *config);
  221. struct regmap *devm_regmap_init_i2c(struct i2c_client *i2c,
  222. const struct regmap_config *config);
  223. struct regmap *devm_regmap_init_spi(struct spi_device *dev,
  224. const struct regmap_config *config);
  225. struct regmap *devm_regmap_init_mmio(struct device *dev,
  226. void __iomem *regs,
  227. const struct regmap_config *config);
  228. void regmap_exit(struct regmap *map);
  229. int regmap_reinit_cache(struct regmap *map,
  230. const struct regmap_config *config);
  231. struct regmap *dev_get_regmap(struct device *dev, const char *name);
  232. int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
  233. int regmap_raw_write(struct regmap *map, unsigned int reg,
  234. const void *val, size_t val_len);
  235. int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
  236. size_t val_count);
  237. int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
  238. int regmap_raw_read(struct regmap *map, unsigned int reg,
  239. void *val, size_t val_len);
  240. int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
  241. size_t val_count);
  242. int regmap_update_bits(struct regmap *map, unsigned int reg,
  243. unsigned int mask, unsigned int val);
  244. int regmap_update_bits_check(struct regmap *map, unsigned int reg,
  245. unsigned int mask, unsigned int val,
  246. bool *change);
  247. int regmap_get_val_bytes(struct regmap *map);
  248. int regcache_sync(struct regmap *map);
  249. int regcache_sync_region(struct regmap *map, unsigned int min,
  250. unsigned int max);
  251. void regcache_cache_only(struct regmap *map, bool enable);
  252. void regcache_cache_bypass(struct regmap *map, bool enable);
  253. void regcache_mark_dirty(struct regmap *map);
  254. int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
  255. int num_regs);
  256. /**
  257. * Description of an IRQ for the generic regmap irq_chip.
  258. *
  259. * @reg_offset: Offset of the status/mask register within the bank
  260. * @mask: Mask used to flag/control the register.
  261. */
  262. struct regmap_irq {
  263. unsigned int reg_offset;
  264. unsigned int mask;
  265. };
  266. /**
  267. * Description of a generic regmap irq_chip. This is not intended to
  268. * handle every possible interrupt controller, but it should handle a
  269. * substantial proportion of those that are found in the wild.
  270. *
  271. * @name: Descriptive name for IRQ controller.
  272. *
  273. * @status_base: Base status register address.
  274. * @mask_base: Base mask register address.
  275. * @ack_base: Base ack address. If zero then the chip is clear on read.
  276. * @wake_base: Base address for wake enables. If zero unsupported.
  277. * @irq_reg_stride: Stride to use for chips where registers are not contiguous.
  278. * @runtime_pm: Hold a runtime PM lock on the device when accessing it.
  279. *
  280. * @num_regs: Number of registers in each control bank.
  281. * @irqs: Descriptors for individual IRQs. Interrupt numbers are
  282. * assigned based on the index in the array of the interrupt.
  283. * @num_irqs: Number of descriptors.
  284. */
  285. struct regmap_irq_chip {
  286. const char *name;
  287. unsigned int status_base;
  288. unsigned int mask_base;
  289. unsigned int ack_base;
  290. unsigned int wake_base;
  291. unsigned int irq_reg_stride;
  292. unsigned int mask_invert;
  293. bool runtime_pm;
  294. int num_regs;
  295. const struct regmap_irq *irqs;
  296. int num_irqs;
  297. };
  298. struct regmap_irq_chip_data;
  299. int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
  300. int irq_base, const struct regmap_irq_chip *chip,
  301. struct regmap_irq_chip_data **data);
  302. void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
  303. int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
  304. int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq);
  305. struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data);
  306. #else
  307. /*
  308. * These stubs should only ever be called by generic code which has
  309. * regmap based facilities, if they ever get called at runtime
  310. * something is going wrong and something probably needs to select
  311. * REGMAP.
  312. */
  313. static inline int regmap_write(struct regmap *map, unsigned int reg,
  314. unsigned int val)
  315. {
  316. WARN_ONCE(1, "regmap API is disabled");
  317. return -EINVAL;
  318. }
  319. static inline int regmap_raw_write(struct regmap *map, unsigned int reg,
  320. const void *val, size_t val_len)
  321. {
  322. WARN_ONCE(1, "regmap API is disabled");
  323. return -EINVAL;
  324. }
  325. static inline int regmap_bulk_write(struct regmap *map, unsigned int reg,
  326. const void *val, size_t val_count)
  327. {
  328. WARN_ONCE(1, "regmap API is disabled");
  329. return -EINVAL;
  330. }
  331. static inline int regmap_read(struct regmap *map, unsigned int reg,
  332. unsigned int *val)
  333. {
  334. WARN_ONCE(1, "regmap API is disabled");
  335. return -EINVAL;
  336. }
  337. static inline int regmap_raw_read(struct regmap *map, unsigned int reg,
  338. void *val, size_t val_len)
  339. {
  340. WARN_ONCE(1, "regmap API is disabled");
  341. return -EINVAL;
  342. }
  343. static inline int regmap_bulk_read(struct regmap *map, unsigned int reg,
  344. void *val, size_t val_count)
  345. {
  346. WARN_ONCE(1, "regmap API is disabled");
  347. return -EINVAL;
  348. }
  349. static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
  350. unsigned int mask, unsigned int val)
  351. {
  352. WARN_ONCE(1, "regmap API is disabled");
  353. return -EINVAL;
  354. }
  355. static inline int regmap_update_bits_check(struct regmap *map,
  356. unsigned int reg,
  357. unsigned int mask, unsigned int val,
  358. bool *change)
  359. {
  360. WARN_ONCE(1, "regmap API is disabled");
  361. return -EINVAL;
  362. }
  363. static inline int regmap_get_val_bytes(struct regmap *map)
  364. {
  365. WARN_ONCE(1, "regmap API is disabled");
  366. return -EINVAL;
  367. }
  368. static inline int regcache_sync(struct regmap *map)
  369. {
  370. WARN_ONCE(1, "regmap API is disabled");
  371. return -EINVAL;
  372. }
  373. static inline int regcache_sync_region(struct regmap *map, unsigned int min,
  374. unsigned int max)
  375. {
  376. WARN_ONCE(1, "regmap API is disabled");
  377. return -EINVAL;
  378. }
  379. static inline void regcache_cache_only(struct regmap *map, bool enable)
  380. {
  381. WARN_ONCE(1, "regmap API is disabled");
  382. }
  383. static inline void regcache_cache_bypass(struct regmap *map, bool enable)
  384. {
  385. WARN_ONCE(1, "regmap API is disabled");
  386. }
  387. static inline void regcache_mark_dirty(struct regmap *map)
  388. {
  389. WARN_ONCE(1, "regmap API is disabled");
  390. }
  391. static inline int regmap_register_patch(struct regmap *map,
  392. const struct reg_default *regs,
  393. int num_regs)
  394. {
  395. WARN_ONCE(1, "regmap API is disabled");
  396. return -EINVAL;
  397. }
  398. static inline struct regmap *dev_get_regmap(struct device *dev,
  399. const char *name)
  400. {
  401. return NULL;
  402. }
  403. #endif
  404. #endif